trx.c 28 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2009-2010 Realtek Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program; if not, write to the Free Software Foundation, Inc.,
  16. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17. *
  18. * The full GNU General Public License is included in this distribution in the
  19. * file called LICENSE.
  20. *
  21. * Contact Information:
  22. * wlanfae <wlanfae@realtek.com>
  23. * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  24. * Hsinchu 300, Taiwan.
  25. *
  26. * Larry Finger <Larry.Finger@lwfinger.net>
  27. *
  28. *****************************************************************************/
  29. #include "../wifi.h"
  30. #include "../pci.h"
  31. #include "../base.h"
  32. #include "reg.h"
  33. #include "def.h"
  34. #include "phy.h"
  35. #include "trx.h"
  36. #include "led.h"
  37. static u8 _rtl92de_map_hwqueue_to_fwqueue(struct sk_buff *skb, u8 hw_queue)
  38. {
  39. __le16 fc = rtl_get_fc(skb);
  40. if (unlikely(ieee80211_is_beacon(fc)))
  41. return QSLT_BEACON;
  42. if (ieee80211_is_mgmt(fc))
  43. return QSLT_MGNT;
  44. return skb->priority;
  45. }
  46. static int _rtl92de_rate_mapping(bool isht, u8 desc_rate)
  47. {
  48. int rate_idx;
  49. if (false == isht) {
  50. switch (desc_rate) {
  51. case DESC92D_RATE1M:
  52. rate_idx = 0;
  53. break;
  54. case DESC92D_RATE2M:
  55. rate_idx = 1;
  56. break;
  57. case DESC92D_RATE5_5M:
  58. rate_idx = 2;
  59. break;
  60. case DESC92D_RATE11M:
  61. rate_idx = 3;
  62. break;
  63. case DESC92D_RATE6M:
  64. rate_idx = 4;
  65. break;
  66. case DESC92D_RATE9M:
  67. rate_idx = 5;
  68. break;
  69. case DESC92D_RATE12M:
  70. rate_idx = 6;
  71. break;
  72. case DESC92D_RATE18M:
  73. rate_idx = 7;
  74. break;
  75. case DESC92D_RATE24M:
  76. rate_idx = 8;
  77. break;
  78. case DESC92D_RATE36M:
  79. rate_idx = 9;
  80. break;
  81. case DESC92D_RATE48M:
  82. rate_idx = 10;
  83. break;
  84. case DESC92D_RATE54M:
  85. rate_idx = 11;
  86. break;
  87. default:
  88. rate_idx = 0;
  89. break;
  90. }
  91. return rate_idx;
  92. } else {
  93. switch (desc_rate) {
  94. case DESC92D_RATE1M:
  95. rate_idx = 0;
  96. break;
  97. case DESC92D_RATE2M:
  98. rate_idx = 1;
  99. break;
  100. case DESC92D_RATE5_5M:
  101. rate_idx = 2;
  102. break;
  103. case DESC92D_RATE11M:
  104. rate_idx = 3;
  105. break;
  106. case DESC92D_RATE6M:
  107. rate_idx = 4;
  108. break;
  109. case DESC92D_RATE9M:
  110. rate_idx = 5;
  111. break;
  112. case DESC92D_RATE12M:
  113. rate_idx = 6;
  114. break;
  115. case DESC92D_RATE18M:
  116. rate_idx = 7;
  117. break;
  118. case DESC92D_RATE24M:
  119. rate_idx = 8;
  120. break;
  121. case DESC92D_RATE36M:
  122. rate_idx = 9;
  123. break;
  124. case DESC92D_RATE48M:
  125. rate_idx = 10;
  126. break;
  127. case DESC92D_RATE54M:
  128. rate_idx = 11;
  129. break;
  130. default:
  131. rate_idx = 11;
  132. break;
  133. }
  134. return rate_idx;
  135. }
  136. }
  137. static u8 _rtl92d_query_rxpwrpercentage(char antpower)
  138. {
  139. if ((antpower <= -100) || (antpower >= 20))
  140. return 0;
  141. else if (antpower >= 0)
  142. return 100;
  143. else
  144. return 100 + antpower;
  145. }
  146. static u8 _rtl92d_evm_db_to_percentage(char value)
  147. {
  148. char ret_val = value;
  149. if (ret_val >= 0)
  150. ret_val = 0;
  151. if (ret_val <= -33)
  152. ret_val = -33;
  153. ret_val = 0 - ret_val;
  154. ret_val *= 3;
  155. if (ret_val == 99)
  156. ret_val = 100;
  157. return ret_val;
  158. }
  159. static long _rtl92de_translate_todbm(struct ieee80211_hw *hw,
  160. u8 signal_strength_index)
  161. {
  162. long signal_power;
  163. signal_power = (long)((signal_strength_index + 1) >> 1);
  164. signal_power -= 95;
  165. return signal_power;
  166. }
  167. static long _rtl92de_signal_scale_mapping(struct ieee80211_hw *hw, long currsig)
  168. {
  169. long retsig;
  170. if (currsig >= 61 && currsig <= 100)
  171. retsig = 90 + ((currsig - 60) / 4);
  172. else if (currsig >= 41 && currsig <= 60)
  173. retsig = 78 + ((currsig - 40) / 2);
  174. else if (currsig >= 31 && currsig <= 40)
  175. retsig = 66 + (currsig - 30);
  176. else if (currsig >= 21 && currsig <= 30)
  177. retsig = 54 + (currsig - 20);
  178. else if (currsig >= 5 && currsig <= 20)
  179. retsig = 42 + (((currsig - 5) * 2) / 3);
  180. else if (currsig == 4)
  181. retsig = 36;
  182. else if (currsig == 3)
  183. retsig = 27;
  184. else if (currsig == 2)
  185. retsig = 18;
  186. else if (currsig == 1)
  187. retsig = 9;
  188. else
  189. retsig = currsig;
  190. return retsig;
  191. }
  192. static void _rtl92de_query_rxphystatus(struct ieee80211_hw *hw,
  193. struct rtl_stats *pstats,
  194. struct rx_desc_92d *pdesc,
  195. struct rx_fwinfo_92d *p_drvinfo,
  196. bool packet_match_bssid,
  197. bool packet_toself,
  198. bool packet_beacon)
  199. {
  200. struct rtl_priv *rtlpriv = rtl_priv(hw);
  201. struct rtl_ps_ctl *ppsc = rtl_psc(rtlpriv);
  202. struct phy_sts_cck_8192d *cck_buf;
  203. s8 rx_pwr_all, rx_pwr[4];
  204. u8 rf_rx_num = 0, evm, pwdb_all;
  205. u8 i, max_spatial_stream;
  206. u32 rssi, total_rssi = 0;
  207. bool is_cck_rate;
  208. is_cck_rate = RX_HAL_IS_CCK_RATE(pdesc);
  209. pstats->packet_matchbssid = packet_match_bssid;
  210. pstats->packet_toself = packet_toself;
  211. pstats->packet_beacon = packet_beacon;
  212. pstats->is_cck = is_cck_rate;
  213. pstats->rx_mimo_signalquality[0] = -1;
  214. pstats->rx_mimo_signalquality[1] = -1;
  215. if (is_cck_rate) {
  216. u8 report, cck_highpwr;
  217. cck_buf = (struct phy_sts_cck_8192d *)p_drvinfo;
  218. if (ppsc->rfpwr_state == ERFON)
  219. cck_highpwr = (u8) rtl_get_bbreg(hw,
  220. RFPGA0_XA_HSSIPARAMETER2,
  221. BIT(9));
  222. else
  223. cck_highpwr = false;
  224. if (!cck_highpwr) {
  225. u8 cck_agc_rpt = cck_buf->cck_agc_rpt;
  226. report = cck_buf->cck_agc_rpt & 0xc0;
  227. report = report >> 6;
  228. switch (report) {
  229. case 0x3:
  230. rx_pwr_all = -46 - (cck_agc_rpt & 0x3e);
  231. break;
  232. case 0x2:
  233. rx_pwr_all = -26 - (cck_agc_rpt & 0x3e);
  234. break;
  235. case 0x1:
  236. rx_pwr_all = -12 - (cck_agc_rpt & 0x3e);
  237. break;
  238. case 0x0:
  239. rx_pwr_all = 16 - (cck_agc_rpt & 0x3e);
  240. break;
  241. }
  242. } else {
  243. u8 cck_agc_rpt = cck_buf->cck_agc_rpt;
  244. report = p_drvinfo->cfosho[0] & 0x60;
  245. report = report >> 5;
  246. switch (report) {
  247. case 0x3:
  248. rx_pwr_all = -46 - ((cck_agc_rpt & 0x1f) << 1);
  249. break;
  250. case 0x2:
  251. rx_pwr_all = -26 - ((cck_agc_rpt & 0x1f) << 1);
  252. break;
  253. case 0x1:
  254. rx_pwr_all = -12 - ((cck_agc_rpt & 0x1f) << 1);
  255. break;
  256. case 0x0:
  257. rx_pwr_all = 16 - ((cck_agc_rpt & 0x1f) << 1);
  258. break;
  259. }
  260. }
  261. pwdb_all = _rtl92d_query_rxpwrpercentage(rx_pwr_all);
  262. /* CCK gain is smaller than OFDM/MCS gain, */
  263. /* so we add gain diff by experiences, the val is 6 */
  264. pwdb_all += 6;
  265. if (pwdb_all > 100)
  266. pwdb_all = 100;
  267. /* modify the offset to make the same gain index with OFDM. */
  268. if (pwdb_all > 34 && pwdb_all <= 42)
  269. pwdb_all -= 2;
  270. else if (pwdb_all > 26 && pwdb_all <= 34)
  271. pwdb_all -= 6;
  272. else if (pwdb_all > 14 && pwdb_all <= 26)
  273. pwdb_all -= 8;
  274. else if (pwdb_all > 4 && pwdb_all <= 14)
  275. pwdb_all -= 4;
  276. pstats->rx_pwdb_all = pwdb_all;
  277. pstats->recvsignalpower = rx_pwr_all;
  278. if (packet_match_bssid) {
  279. u8 sq;
  280. if (pstats->rx_pwdb_all > 40) {
  281. sq = 100;
  282. } else {
  283. sq = cck_buf->sq_rpt;
  284. if (sq > 64)
  285. sq = 0;
  286. else if (sq < 20)
  287. sq = 100;
  288. else
  289. sq = ((64 - sq) * 100) / 44;
  290. }
  291. pstats->signalquality = sq;
  292. pstats->rx_mimo_signalquality[0] = sq;
  293. pstats->rx_mimo_signalquality[1] = -1;
  294. }
  295. } else {
  296. rtlpriv->dm.rfpath_rxenable[0] = true;
  297. rtlpriv->dm.rfpath_rxenable[1] = true;
  298. for (i = RF90_PATH_A; i < RF6052_MAX_PATH; i++) {
  299. if (rtlpriv->dm.rfpath_rxenable[i])
  300. rf_rx_num++;
  301. rx_pwr[i] = ((p_drvinfo->gain_trsw[i] & 0x3f) * 2)
  302. - 110;
  303. rssi = _rtl92d_query_rxpwrpercentage(rx_pwr[i]);
  304. total_rssi += rssi;
  305. rtlpriv->stats.rx_snr_db[i] =
  306. (long)(p_drvinfo->rxsnr[i] / 2);
  307. if (packet_match_bssid)
  308. pstats->rx_mimo_signalstrength[i] = (u8) rssi;
  309. }
  310. rx_pwr_all = ((p_drvinfo->pwdb_all >> 1) & 0x7f) - 106;
  311. pwdb_all = _rtl92d_query_rxpwrpercentage(rx_pwr_all);
  312. pstats->rx_pwdb_all = pwdb_all;
  313. pstats->rxpower = rx_pwr_all;
  314. pstats->recvsignalpower = rx_pwr_all;
  315. if (pdesc->rxht && pdesc->rxmcs >= DESC92D_RATEMCS8 &&
  316. pdesc->rxmcs <= DESC92D_RATEMCS15)
  317. max_spatial_stream = 2;
  318. else
  319. max_spatial_stream = 1;
  320. for (i = 0; i < max_spatial_stream; i++) {
  321. evm = _rtl92d_evm_db_to_percentage(p_drvinfo->rxevm[i]);
  322. if (packet_match_bssid) {
  323. if (i == 0)
  324. pstats->signalquality =
  325. (u8)(evm & 0xff);
  326. pstats->rx_mimo_signalquality[i] =
  327. (u8)(evm & 0xff);
  328. }
  329. }
  330. }
  331. if (is_cck_rate)
  332. pstats->signalstrength = (u8)(_rtl92de_signal_scale_mapping(hw,
  333. pwdb_all));
  334. else if (rf_rx_num != 0)
  335. pstats->signalstrength = (u8)(_rtl92de_signal_scale_mapping(hw,
  336. total_rssi /= rf_rx_num));
  337. }
  338. static void rtl92d_loop_over_paths(struct ieee80211_hw *hw,
  339. struct rtl_stats *pstats)
  340. {
  341. struct rtl_priv *rtlpriv = rtl_priv(hw);
  342. struct rtl_phy *rtlphy = &(rtlpriv->phy);
  343. u8 rfpath;
  344. for (rfpath = RF90_PATH_A; rfpath < rtlphy->num_total_rfpath;
  345. rfpath++) {
  346. if (rtlpriv->stats.rx_rssi_percentage[rfpath] == 0) {
  347. rtlpriv->stats.rx_rssi_percentage[rfpath] =
  348. pstats->rx_mimo_signalstrength[rfpath];
  349. }
  350. if (pstats->rx_mimo_signalstrength[rfpath] >
  351. rtlpriv->stats.rx_rssi_percentage[rfpath]) {
  352. rtlpriv->stats.rx_rssi_percentage[rfpath] =
  353. ((rtlpriv->stats.rx_rssi_percentage[rfpath] *
  354. (RX_SMOOTH_FACTOR - 1)) +
  355. (pstats->rx_mimo_signalstrength[rfpath])) /
  356. (RX_SMOOTH_FACTOR);
  357. rtlpriv->stats.rx_rssi_percentage[rfpath] =
  358. rtlpriv->stats.rx_rssi_percentage[rfpath] + 1;
  359. } else {
  360. rtlpriv->stats.rx_rssi_percentage[rfpath] =
  361. ((rtlpriv->stats.rx_rssi_percentage[rfpath] *
  362. (RX_SMOOTH_FACTOR - 1)) +
  363. (pstats->rx_mimo_signalstrength[rfpath])) /
  364. (RX_SMOOTH_FACTOR);
  365. }
  366. }
  367. }
  368. static void _rtl92de_process_ui_rssi(struct ieee80211_hw *hw,
  369. struct rtl_stats *pstats)
  370. {
  371. struct rtl_priv *rtlpriv = rtl_priv(hw);
  372. u32 last_rssi, tmpval;
  373. if (pstats->packet_toself || pstats->packet_beacon) {
  374. rtlpriv->stats.rssi_calculate_cnt++;
  375. if (rtlpriv->stats.ui_rssi.total_num++ >=
  376. PHY_RSSI_SLID_WIN_MAX) {
  377. rtlpriv->stats.ui_rssi.total_num =
  378. PHY_RSSI_SLID_WIN_MAX;
  379. last_rssi = rtlpriv->stats.ui_rssi.elements[
  380. rtlpriv->stats.ui_rssi.index];
  381. rtlpriv->stats.ui_rssi.total_val -= last_rssi;
  382. }
  383. rtlpriv->stats.ui_rssi.total_val += pstats->signalstrength;
  384. rtlpriv->stats.ui_rssi.elements
  385. [rtlpriv->stats.ui_rssi.index++] =
  386. pstats->signalstrength;
  387. if (rtlpriv->stats.ui_rssi.index >= PHY_RSSI_SLID_WIN_MAX)
  388. rtlpriv->stats.ui_rssi.index = 0;
  389. tmpval = rtlpriv->stats.ui_rssi.total_val /
  390. rtlpriv->stats.ui_rssi.total_num;
  391. rtlpriv->stats.signal_strength = _rtl92de_translate_todbm(hw,
  392. (u8) tmpval);
  393. pstats->rssi = rtlpriv->stats.signal_strength;
  394. }
  395. if (!pstats->is_cck && pstats->packet_toself)
  396. rtl92d_loop_over_paths(hw, pstats);
  397. }
  398. static void _rtl92de_update_rxsignalstatistics(struct ieee80211_hw *hw,
  399. struct rtl_stats *pstats)
  400. {
  401. struct rtl_priv *rtlpriv = rtl_priv(hw);
  402. int weighting = 0;
  403. if (rtlpriv->stats.recv_signal_power == 0)
  404. rtlpriv->stats.recv_signal_power = pstats->recvsignalpower;
  405. if (pstats->recvsignalpower > rtlpriv->stats.recv_signal_power)
  406. weighting = 5;
  407. else if (pstats->recvsignalpower < rtlpriv->stats.recv_signal_power)
  408. weighting = (-5);
  409. rtlpriv->stats.recv_signal_power = (rtlpriv->stats.recv_signal_power *
  410. 5 + pstats->recvsignalpower + weighting) / 6;
  411. }
  412. static void _rtl92de_process_pwdb(struct ieee80211_hw *hw,
  413. struct rtl_stats *pstats)
  414. {
  415. struct rtl_priv *rtlpriv = rtl_priv(hw);
  416. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  417. long undecorated_smoothed_pwdb;
  418. if (mac->opmode == NL80211_IFTYPE_ADHOC ||
  419. mac->opmode == NL80211_IFTYPE_AP)
  420. return;
  421. else
  422. undecorated_smoothed_pwdb =
  423. rtlpriv->dm.undecorated_smoothed_pwdb;
  424. if (pstats->packet_toself || pstats->packet_beacon) {
  425. if (undecorated_smoothed_pwdb < 0)
  426. undecorated_smoothed_pwdb = pstats->rx_pwdb_all;
  427. if (pstats->rx_pwdb_all > (u32) undecorated_smoothed_pwdb) {
  428. undecorated_smoothed_pwdb =
  429. (((undecorated_smoothed_pwdb) *
  430. (RX_SMOOTH_FACTOR - 1)) +
  431. (pstats->rx_pwdb_all)) / (RX_SMOOTH_FACTOR);
  432. undecorated_smoothed_pwdb =
  433. undecorated_smoothed_pwdb + 1;
  434. } else {
  435. undecorated_smoothed_pwdb =
  436. (((undecorated_smoothed_pwdb) *
  437. (RX_SMOOTH_FACTOR - 1)) +
  438. (pstats->rx_pwdb_all)) / (RX_SMOOTH_FACTOR);
  439. }
  440. rtlpriv->dm.undecorated_smoothed_pwdb =
  441. undecorated_smoothed_pwdb;
  442. _rtl92de_update_rxsignalstatistics(hw, pstats);
  443. }
  444. }
  445. static void rtl92d_loop_over_streams(struct ieee80211_hw *hw,
  446. struct rtl_stats *pstats)
  447. {
  448. struct rtl_priv *rtlpriv = rtl_priv(hw);
  449. int stream;
  450. for (stream = 0; stream < 2; stream++) {
  451. if (pstats->rx_mimo_signalquality[stream] != -1) {
  452. if (rtlpriv->stats.rx_evm_percentage[stream] == 0) {
  453. rtlpriv->stats.rx_evm_percentage[stream] =
  454. pstats->rx_mimo_signalquality[stream];
  455. }
  456. rtlpriv->stats.rx_evm_percentage[stream] =
  457. ((rtlpriv->stats.rx_evm_percentage[stream]
  458. * (RX_SMOOTH_FACTOR - 1)) +
  459. (pstats->rx_mimo_signalquality[stream] * 1)) /
  460. (RX_SMOOTH_FACTOR);
  461. }
  462. }
  463. }
  464. static void _rtl92de_process_ui_link_quality(struct ieee80211_hw *hw,
  465. struct rtl_stats *pstats)
  466. {
  467. struct rtl_priv *rtlpriv = rtl_priv(hw);
  468. u32 last_evm, tmpval;
  469. if (pstats->signalquality == 0)
  470. return;
  471. if (pstats->packet_toself || pstats->packet_beacon) {
  472. if (rtlpriv->stats.ui_link_quality.total_num++ >=
  473. PHY_LINKQUALITY_SLID_WIN_MAX) {
  474. rtlpriv->stats.ui_link_quality.total_num =
  475. PHY_LINKQUALITY_SLID_WIN_MAX;
  476. last_evm = rtlpriv->stats.ui_link_quality.elements[
  477. rtlpriv->stats.ui_link_quality.index];
  478. rtlpriv->stats.ui_link_quality.total_val -= last_evm;
  479. }
  480. rtlpriv->stats.ui_link_quality.total_val +=
  481. pstats->signalquality;
  482. rtlpriv->stats.ui_link_quality.elements[
  483. rtlpriv->stats.ui_link_quality.index++] =
  484. pstats->signalquality;
  485. if (rtlpriv->stats.ui_link_quality.index >=
  486. PHY_LINKQUALITY_SLID_WIN_MAX)
  487. rtlpriv->stats.ui_link_quality.index = 0;
  488. tmpval = rtlpriv->stats.ui_link_quality.total_val /
  489. rtlpriv->stats.ui_link_quality.total_num;
  490. rtlpriv->stats.signal_quality = tmpval;
  491. rtlpriv->stats.last_sigstrength_inpercent = tmpval;
  492. rtl92d_loop_over_streams(hw, pstats);
  493. }
  494. }
  495. static void _rtl92de_process_phyinfo(struct ieee80211_hw *hw,
  496. u8 *buffer,
  497. struct rtl_stats *pcurrent_stats)
  498. {
  499. if (!pcurrent_stats->packet_matchbssid &&
  500. !pcurrent_stats->packet_beacon)
  501. return;
  502. _rtl92de_process_ui_rssi(hw, pcurrent_stats);
  503. _rtl92de_process_pwdb(hw, pcurrent_stats);
  504. _rtl92de_process_ui_link_quality(hw, pcurrent_stats);
  505. }
  506. static void _rtl92de_translate_rx_signal_stuff(struct ieee80211_hw *hw,
  507. struct sk_buff *skb,
  508. struct rtl_stats *pstats,
  509. struct rx_desc_92d *pdesc,
  510. struct rx_fwinfo_92d *p_drvinfo)
  511. {
  512. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  513. struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
  514. struct ieee80211_hdr *hdr;
  515. u8 *tmp_buf;
  516. u8 *praddr;
  517. u16 type, cfc;
  518. __le16 fc;
  519. bool packet_matchbssid, packet_toself, packet_beacon;
  520. tmp_buf = skb->data + pstats->rx_drvinfo_size + pstats->rx_bufshift;
  521. hdr = (struct ieee80211_hdr *)tmp_buf;
  522. fc = hdr->frame_control;
  523. cfc = le16_to_cpu(fc);
  524. type = WLAN_FC_GET_TYPE(fc);
  525. praddr = hdr->addr1;
  526. packet_matchbssid = ((IEEE80211_FTYPE_CTL != type) &&
  527. (!compare_ether_addr(mac->bssid, (cfc & IEEE80211_FCTL_TODS) ?
  528. hdr->addr1 : (cfc & IEEE80211_FCTL_FROMDS) ?
  529. hdr->addr2 : hdr->addr3)) && (!pstats->hwerror) &&
  530. (!pstats->crc) && (!pstats->icv));
  531. packet_toself = packet_matchbssid &&
  532. (!compare_ether_addr(praddr, rtlefuse->dev_addr));
  533. if (ieee80211_is_beacon(fc))
  534. packet_beacon = true;
  535. _rtl92de_query_rxphystatus(hw, pstats, pdesc, p_drvinfo,
  536. packet_matchbssid, packet_toself,
  537. packet_beacon);
  538. _rtl92de_process_phyinfo(hw, tmp_buf, pstats);
  539. }
  540. bool rtl92de_rx_query_desc(struct ieee80211_hw *hw, struct rtl_stats *stats,
  541. struct ieee80211_rx_status *rx_status,
  542. u8 *p_desc, struct sk_buff *skb)
  543. {
  544. struct rx_fwinfo_92d *p_drvinfo;
  545. struct rx_desc_92d *pdesc = (struct rx_desc_92d *)p_desc;
  546. u32 phystatus = GET_RX_DESC_PHYST(pdesc);
  547. stats->length = (u16) GET_RX_DESC_PKT_LEN(pdesc);
  548. stats->rx_drvinfo_size = (u8) GET_RX_DESC_DRV_INFO_SIZE(pdesc) *
  549. RX_DRV_INFO_SIZE_UNIT;
  550. stats->rx_bufshift = (u8) (GET_RX_DESC_SHIFT(pdesc) & 0x03);
  551. stats->icv = (u16) GET_RX_DESC_ICV(pdesc);
  552. stats->crc = (u16) GET_RX_DESC_CRC32(pdesc);
  553. stats->hwerror = (stats->crc | stats->icv);
  554. stats->decrypted = !GET_RX_DESC_SWDEC(pdesc);
  555. stats->rate = (u8) GET_RX_DESC_RXMCS(pdesc);
  556. stats->shortpreamble = (u16) GET_RX_DESC_SPLCP(pdesc);
  557. stats->isampdu = (bool) (GET_RX_DESC_PAGGR(pdesc) == 1);
  558. stats->isfirst_ampdu = (bool) ((GET_RX_DESC_PAGGR(pdesc) == 1)
  559. && (GET_RX_DESC_FAGGR(pdesc) == 1));
  560. stats->timestamp_low = GET_RX_DESC_TSFL(pdesc);
  561. stats->rx_is40Mhzpacket = (bool) GET_RX_DESC_BW(pdesc);
  562. rx_status->freq = hw->conf.channel->center_freq;
  563. rx_status->band = hw->conf.channel->band;
  564. if (GET_RX_DESC_CRC32(pdesc))
  565. rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
  566. if (!GET_RX_DESC_SWDEC(pdesc))
  567. rx_status->flag |= RX_FLAG_DECRYPTED;
  568. if (GET_RX_DESC_BW(pdesc))
  569. rx_status->flag |= RX_FLAG_40MHZ;
  570. if (GET_RX_DESC_RXHT(pdesc))
  571. rx_status->flag |= RX_FLAG_HT;
  572. rx_status->flag |= RX_FLAG_MACTIME_MPDU;
  573. if (stats->decrypted)
  574. rx_status->flag |= RX_FLAG_DECRYPTED;
  575. rx_status->rate_idx = _rtl92de_rate_mapping((bool)
  576. GET_RX_DESC_RXHT(pdesc),
  577. (u8)
  578. GET_RX_DESC_RXMCS(pdesc));
  579. rx_status->mactime = GET_RX_DESC_TSFL(pdesc);
  580. if (phystatus) {
  581. p_drvinfo = (struct rx_fwinfo_92d *)(skb->data +
  582. stats->rx_bufshift);
  583. _rtl92de_translate_rx_signal_stuff(hw,
  584. skb, stats, pdesc,
  585. p_drvinfo);
  586. }
  587. /*rx_status->qual = stats->signal; */
  588. rx_status->signal = stats->rssi + 10;
  589. /*rx_status->noise = -stats->noise; */
  590. return true;
  591. }
  592. static void _rtl92de_insert_emcontent(struct rtl_tcb_desc *ptcb_desc,
  593. u8 *virtualaddress)
  594. {
  595. memset(virtualaddress, 0, 8);
  596. SET_EARLYMODE_PKTNUM(virtualaddress, ptcb_desc->empkt_num);
  597. SET_EARLYMODE_LEN0(virtualaddress, ptcb_desc->empkt_len[0]);
  598. SET_EARLYMODE_LEN1(virtualaddress, ptcb_desc->empkt_len[1]);
  599. SET_EARLYMODE_LEN2_1(virtualaddress, ptcb_desc->empkt_len[2] & 0xF);
  600. SET_EARLYMODE_LEN2_2(virtualaddress, ptcb_desc->empkt_len[2] >> 4);
  601. SET_EARLYMODE_LEN3(virtualaddress, ptcb_desc->empkt_len[3]);
  602. SET_EARLYMODE_LEN4(virtualaddress, ptcb_desc->empkt_len[4]);
  603. }
  604. void rtl92de_tx_fill_desc(struct ieee80211_hw *hw,
  605. struct ieee80211_hdr *hdr, u8 *pdesc_tx,
  606. struct ieee80211_tx_info *info, struct sk_buff *skb,
  607. u8 hw_queue, struct rtl_tcb_desc *ptcb_desc)
  608. {
  609. struct rtl_priv *rtlpriv = rtl_priv(hw);
  610. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  611. struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  612. struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
  613. struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
  614. struct ieee80211_sta *sta = info->control.sta;
  615. u8 *pdesc = (u8 *) pdesc_tx;
  616. u16 seq_number;
  617. __le16 fc = hdr->frame_control;
  618. unsigned int buf_len = 0;
  619. unsigned int skb_len = skb->len;
  620. u8 fw_qsel = _rtl92de_map_hwqueue_to_fwqueue(skb, hw_queue);
  621. bool firstseg = ((hdr->seq_ctrl &
  622. cpu_to_le16(IEEE80211_SCTL_FRAG)) == 0);
  623. bool lastseg = ((hdr->frame_control &
  624. cpu_to_le16(IEEE80211_FCTL_MOREFRAGS)) == 0);
  625. dma_addr_t mapping;
  626. u8 bw_40 = 0;
  627. if (mac->opmode == NL80211_IFTYPE_STATION) {
  628. bw_40 = mac->bw_40;
  629. } else if (mac->opmode == NL80211_IFTYPE_AP ||
  630. mac->opmode == NL80211_IFTYPE_ADHOC) {
  631. if (sta)
  632. bw_40 = sta->ht_cap.cap &
  633. IEEE80211_HT_CAP_SUP_WIDTH_20_40;
  634. }
  635. seq_number = (le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4;
  636. rtl_get_tcb_desc(hw, info, sta, skb, ptcb_desc);
  637. /* reserve 8 byte for AMPDU early mode */
  638. if (rtlhal->earlymode_enable) {
  639. skb_push(skb, EM_HDR_LEN);
  640. memset(skb->data, 0, EM_HDR_LEN);
  641. }
  642. buf_len = skb->len;
  643. mapping = pci_map_single(rtlpci->pdev, skb->data, skb->len,
  644. PCI_DMA_TODEVICE);
  645. CLEAR_PCI_TX_DESC_CONTENT(pdesc, sizeof(struct tx_desc_92d));
  646. if (ieee80211_is_nullfunc(fc) || ieee80211_is_ctl(fc)) {
  647. firstseg = true;
  648. lastseg = true;
  649. }
  650. if (firstseg) {
  651. if (rtlhal->earlymode_enable) {
  652. SET_TX_DESC_PKT_OFFSET(pdesc, 1);
  653. SET_TX_DESC_OFFSET(pdesc, USB_HWDESC_HEADER_LEN +
  654. EM_HDR_LEN);
  655. if (ptcb_desc->empkt_num) {
  656. RT_TRACE(rtlpriv, COMP_SEND, DBG_LOUD,
  657. ("Insert 8 byte.pTcb->EMPktNum:%d\n",
  658. ptcb_desc->empkt_num));
  659. _rtl92de_insert_emcontent(ptcb_desc,
  660. (u8 *)(skb->data));
  661. }
  662. } else {
  663. SET_TX_DESC_OFFSET(pdesc, USB_HWDESC_HEADER_LEN);
  664. }
  665. /* 5G have no CCK rate */
  666. if (rtlhal->current_bandtype == BAND_ON_5G)
  667. if (ptcb_desc->hw_rate < DESC92D_RATE6M)
  668. ptcb_desc->hw_rate = DESC92D_RATE6M;
  669. SET_TX_DESC_TX_RATE(pdesc, ptcb_desc->hw_rate);
  670. if (ptcb_desc->use_shortgi || ptcb_desc->use_shortpreamble)
  671. SET_TX_DESC_DATA_SHORTGI(pdesc, 1);
  672. if (rtlhal->macphymode == DUALMAC_DUALPHY &&
  673. ptcb_desc->hw_rate == DESC92D_RATEMCS7)
  674. SET_TX_DESC_DATA_SHORTGI(pdesc, 1);
  675. if (info->flags & IEEE80211_TX_CTL_AMPDU) {
  676. SET_TX_DESC_AGG_ENABLE(pdesc, 1);
  677. SET_TX_DESC_MAX_AGG_NUM(pdesc, 0x14);
  678. }
  679. SET_TX_DESC_SEQ(pdesc, seq_number);
  680. SET_TX_DESC_RTS_ENABLE(pdesc, ((ptcb_desc->rts_enable &&
  681. !ptcb_desc->cts_enable) ? 1 : 0));
  682. SET_TX_DESC_HW_RTS_ENABLE(pdesc, ((ptcb_desc->rts_enable
  683. || ptcb_desc->cts_enable) ? 1 : 0));
  684. SET_TX_DESC_CTS2SELF(pdesc, ((ptcb_desc->cts_enable) ? 1 : 0));
  685. SET_TX_DESC_RTS_STBC(pdesc, ((ptcb_desc->rts_stbc) ? 1 : 0));
  686. /* 5G have no CCK rate */
  687. if (rtlhal->current_bandtype == BAND_ON_5G)
  688. if (ptcb_desc->rts_rate < DESC92D_RATE6M)
  689. ptcb_desc->rts_rate = DESC92D_RATE6M;
  690. SET_TX_DESC_RTS_RATE(pdesc, ptcb_desc->rts_rate);
  691. SET_TX_DESC_RTS_BW(pdesc, 0);
  692. SET_TX_DESC_RTS_SC(pdesc, ptcb_desc->rts_sc);
  693. SET_TX_DESC_RTS_SHORT(pdesc, ((ptcb_desc->rts_rate <=
  694. DESC92D_RATE54M) ?
  695. (ptcb_desc->rts_use_shortpreamble ? 1 : 0) :
  696. (ptcb_desc->rts_use_shortgi ? 1 : 0)));
  697. if (bw_40) {
  698. if (ptcb_desc->packet_bw) {
  699. SET_TX_DESC_DATA_BW(pdesc, 1);
  700. SET_TX_DESC_TX_SUB_CARRIER(pdesc, 3);
  701. } else {
  702. SET_TX_DESC_DATA_BW(pdesc, 0);
  703. SET_TX_DESC_TX_SUB_CARRIER(pdesc,
  704. mac->cur_40_prime_sc);
  705. }
  706. } else {
  707. SET_TX_DESC_DATA_BW(pdesc, 0);
  708. SET_TX_DESC_TX_SUB_CARRIER(pdesc, 0);
  709. }
  710. SET_TX_DESC_LINIP(pdesc, 0);
  711. SET_TX_DESC_PKT_SIZE(pdesc, (u16) skb_len);
  712. if (sta) {
  713. u8 ampdu_density = sta->ht_cap.ampdu_density;
  714. SET_TX_DESC_AMPDU_DENSITY(pdesc, ampdu_density);
  715. }
  716. if (info->control.hw_key) {
  717. struct ieee80211_key_conf *keyconf;
  718. keyconf = info->control.hw_key;
  719. switch (keyconf->cipher) {
  720. case WLAN_CIPHER_SUITE_WEP40:
  721. case WLAN_CIPHER_SUITE_WEP104:
  722. case WLAN_CIPHER_SUITE_TKIP:
  723. SET_TX_DESC_SEC_TYPE(pdesc, 0x1);
  724. break;
  725. case WLAN_CIPHER_SUITE_CCMP:
  726. SET_TX_DESC_SEC_TYPE(pdesc, 0x3);
  727. break;
  728. default:
  729. SET_TX_DESC_SEC_TYPE(pdesc, 0x0);
  730. break;
  731. }
  732. }
  733. SET_TX_DESC_PKT_ID(pdesc, 0);
  734. SET_TX_DESC_QUEUE_SEL(pdesc, fw_qsel);
  735. SET_TX_DESC_DATA_RATE_FB_LIMIT(pdesc, 0x1F);
  736. SET_TX_DESC_RTS_RATE_FB_LIMIT(pdesc, 0xF);
  737. SET_TX_DESC_DISABLE_FB(pdesc, ptcb_desc->disable_ratefallback ?
  738. 1 : 0);
  739. SET_TX_DESC_USE_RATE(pdesc, ptcb_desc->use_driver_rate ? 1 : 0);
  740. /* Set TxRate and RTSRate in TxDesc */
  741. /* This prevent Tx initial rate of new-coming packets */
  742. /* from being overwritten by retried packet rate.*/
  743. if (!ptcb_desc->use_driver_rate) {
  744. SET_TX_DESC_RTS_RATE(pdesc, 0x08);
  745. /* SET_TX_DESC_TX_RATE(pdesc, 0x0b); */
  746. }
  747. if (ieee80211_is_data_qos(fc)) {
  748. if (mac->rdg_en) {
  749. RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
  750. ("Enable RDG function.\n"));
  751. SET_TX_DESC_RDG_ENABLE(pdesc, 1);
  752. SET_TX_DESC_HTC(pdesc, 1);
  753. }
  754. }
  755. }
  756. SET_TX_DESC_FIRST_SEG(pdesc, (firstseg ? 1 : 0));
  757. SET_TX_DESC_LAST_SEG(pdesc, (lastseg ? 1 : 0));
  758. SET_TX_DESC_TX_BUFFER_SIZE(pdesc, (u16) buf_len);
  759. SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, mapping);
  760. if (rtlpriv->dm.useramask) {
  761. SET_TX_DESC_RATE_ID(pdesc, ptcb_desc->ratr_index);
  762. SET_TX_DESC_MACID(pdesc, ptcb_desc->mac_id);
  763. } else {
  764. SET_TX_DESC_RATE_ID(pdesc, 0xC + ptcb_desc->ratr_index);
  765. SET_TX_DESC_MACID(pdesc, ptcb_desc->ratr_index);
  766. }
  767. if (ieee80211_is_data_qos(fc))
  768. SET_TX_DESC_QOS(pdesc, 1);
  769. if ((!ieee80211_is_data_qos(fc)) && ppsc->fwctrl_lps) {
  770. SET_TX_DESC_HWSEQ_EN(pdesc, 1);
  771. SET_TX_DESC_PKT_ID(pdesc, 8);
  772. }
  773. SET_TX_DESC_MORE_FRAG(pdesc, (lastseg ? 0 : 1));
  774. RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE, ("\n"));
  775. }
  776. void rtl92de_tx_fill_cmddesc(struct ieee80211_hw *hw,
  777. u8 *pdesc, bool firstseg,
  778. bool lastseg, struct sk_buff *skb)
  779. {
  780. struct rtl_priv *rtlpriv = rtl_priv(hw);
  781. struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  782. struct rtl_ps_ctl *ppsc = rtl_psc(rtlpriv);
  783. struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
  784. u8 fw_queue = QSLT_BEACON;
  785. dma_addr_t mapping = pci_map_single(rtlpci->pdev,
  786. skb->data, skb->len, PCI_DMA_TODEVICE);
  787. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)(skb->data);
  788. __le16 fc = hdr->frame_control;
  789. CLEAR_PCI_TX_DESC_CONTENT(pdesc, TX_DESC_SIZE);
  790. if (firstseg)
  791. SET_TX_DESC_OFFSET(pdesc, USB_HWDESC_HEADER_LEN);
  792. /* 5G have no CCK rate
  793. * Caution: The macros below are multi-line expansions.
  794. * The braces are needed no matter what checkpatch says
  795. */
  796. if (rtlhal->current_bandtype == BAND_ON_5G) {
  797. SET_TX_DESC_TX_RATE(pdesc, DESC92D_RATE6M);
  798. } else {
  799. SET_TX_DESC_TX_RATE(pdesc, DESC92D_RATE1M);
  800. }
  801. SET_TX_DESC_SEQ(pdesc, 0);
  802. SET_TX_DESC_LINIP(pdesc, 0);
  803. SET_TX_DESC_QUEUE_SEL(pdesc, fw_queue);
  804. SET_TX_DESC_FIRST_SEG(pdesc, 1);
  805. SET_TX_DESC_LAST_SEG(pdesc, 1);
  806. SET_TX_DESC_TX_BUFFER_SIZE(pdesc, (u16) (skb->len));
  807. SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, mapping);
  808. SET_TX_DESC_RATE_ID(pdesc, 7);
  809. SET_TX_DESC_MACID(pdesc, 0);
  810. SET_TX_DESC_PKT_SIZE((u8 *) pdesc, (u16) (skb->len));
  811. SET_TX_DESC_FIRST_SEG(pdesc, 1);
  812. SET_TX_DESC_LAST_SEG(pdesc, 1);
  813. SET_TX_DESC_OFFSET(pdesc, 0x20);
  814. SET_TX_DESC_USE_RATE(pdesc, 1);
  815. if (!ieee80211_is_data_qos(fc) && ppsc->fwctrl_lps) {
  816. SET_TX_DESC_HWSEQ_EN(pdesc, 1);
  817. SET_TX_DESC_PKT_ID(pdesc, 8);
  818. }
  819. RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_LOUD,
  820. "H2C Tx Cmd Content\n", pdesc, TX_DESC_SIZE);
  821. wmb();
  822. SET_TX_DESC_OWN(pdesc, 1);
  823. }
  824. void rtl92de_set_desc(u8 *pdesc, bool istx, u8 desc_name, u8 *val)
  825. {
  826. if (istx) {
  827. switch (desc_name) {
  828. case HW_DESC_OWN:
  829. wmb();
  830. SET_TX_DESC_OWN(pdesc, 1);
  831. break;
  832. case HW_DESC_TX_NEXTDESC_ADDR:
  833. SET_TX_DESC_NEXT_DESC_ADDRESS(pdesc, *(u32 *) val);
  834. break;
  835. default:
  836. RT_ASSERT(false, ("ERR txdesc :%d"
  837. " not process\n", desc_name));
  838. break;
  839. }
  840. } else {
  841. switch (desc_name) {
  842. case HW_DESC_RXOWN:
  843. wmb();
  844. SET_RX_DESC_OWN(pdesc, 1);
  845. break;
  846. case HW_DESC_RXBUFF_ADDR:
  847. SET_RX_DESC_BUFF_ADDR(pdesc, *(u32 *) val);
  848. break;
  849. case HW_DESC_RXPKT_LEN:
  850. SET_RX_DESC_PKT_LEN(pdesc, *(u32 *) val);
  851. break;
  852. case HW_DESC_RXERO:
  853. SET_RX_DESC_EOR(pdesc, 1);
  854. break;
  855. default:
  856. RT_ASSERT(false, ("ERR rxdesc :%d "
  857. "not process\n", desc_name));
  858. break;
  859. }
  860. }
  861. }
  862. u32 rtl92de_get_desc(u8 *p_desc, bool istx, u8 desc_name)
  863. {
  864. u32 ret = 0;
  865. if (istx) {
  866. switch (desc_name) {
  867. case HW_DESC_OWN:
  868. ret = GET_TX_DESC_OWN(p_desc);
  869. break;
  870. case HW_DESC_TXBUFF_ADDR:
  871. ret = GET_TX_DESC_TX_BUFFER_ADDRESS(p_desc);
  872. break;
  873. default:
  874. RT_ASSERT(false, ("ERR txdesc :%d "
  875. "not process\n", desc_name));
  876. break;
  877. }
  878. } else {
  879. struct rx_desc_92c *pdesc = (struct rx_desc_92c *)p_desc;
  880. switch (desc_name) {
  881. case HW_DESC_OWN:
  882. ret = GET_RX_DESC_OWN(pdesc);
  883. break;
  884. case HW_DESC_RXPKT_LEN:
  885. ret = GET_RX_DESC_PKT_LEN(pdesc);
  886. break;
  887. default:
  888. RT_ASSERT(false, ("ERR rxdesc :%d "
  889. "not process\n", desc_name));
  890. break;
  891. }
  892. }
  893. return ret;
  894. }
  895. void rtl92de_tx_polling(struct ieee80211_hw *hw, u8 hw_queue)
  896. {
  897. struct rtl_priv *rtlpriv = rtl_priv(hw);
  898. if (hw_queue == BEACON_QUEUE)
  899. rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG, BIT(4));
  900. else
  901. rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG,
  902. BIT(0) << (hw_queue));
  903. }