dm.c 47 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2009-2010 Realtek Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program; if not, write to the Free Software Foundation, Inc.,
  16. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17. *
  18. * The full GNU General Public License is included in this distribution in the
  19. * file called LICENSE.
  20. *
  21. * Contact Information:
  22. * wlanfae <wlanfae@realtek.com>
  23. * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  24. * Hsinchu 300, Taiwan.
  25. *
  26. * Larry Finger <Larry.Finger@lwfinger.net>
  27. *
  28. *****************************************************************************/
  29. #include "../wifi.h"
  30. #include "../base.h"
  31. #include "reg.h"
  32. #include "def.h"
  33. #include "phy.h"
  34. #include "dm.h"
  35. #include "fw.h"
  36. #define UNDEC_SM_PWDB entry_min_undecoratedsmoothed_pwdb
  37. struct dig_t de_digtable;
  38. static const u32 ofdmswing_table[OFDM_TABLE_SIZE_92D] = {
  39. 0x7f8001fe, /* 0, +6.0dB */
  40. 0x788001e2, /* 1, +5.5dB */
  41. 0x71c001c7, /* 2, +5.0dB */
  42. 0x6b8001ae, /* 3, +4.5dB */
  43. 0x65400195, /* 4, +4.0dB */
  44. 0x5fc0017f, /* 5, +3.5dB */
  45. 0x5a400169, /* 6, +3.0dB */
  46. 0x55400155, /* 7, +2.5dB */
  47. 0x50800142, /* 8, +2.0dB */
  48. 0x4c000130, /* 9, +1.5dB */
  49. 0x47c0011f, /* 10, +1.0dB */
  50. 0x43c0010f, /* 11, +0.5dB */
  51. 0x40000100, /* 12, +0dB */
  52. 0x3c8000f2, /* 13, -0.5dB */
  53. 0x390000e4, /* 14, -1.0dB */
  54. 0x35c000d7, /* 15, -1.5dB */
  55. 0x32c000cb, /* 16, -2.0dB */
  56. 0x300000c0, /* 17, -2.5dB */
  57. 0x2d4000b5, /* 18, -3.0dB */
  58. 0x2ac000ab, /* 19, -3.5dB */
  59. 0x288000a2, /* 20, -4.0dB */
  60. 0x26000098, /* 21, -4.5dB */
  61. 0x24000090, /* 22, -5.0dB */
  62. 0x22000088, /* 23, -5.5dB */
  63. 0x20000080, /* 24, -6.0dB */
  64. 0x1e400079, /* 25, -6.5dB */
  65. 0x1c800072, /* 26, -7.0dB */
  66. 0x1b00006c, /* 27. -7.5dB */
  67. 0x19800066, /* 28, -8.0dB */
  68. 0x18000060, /* 29, -8.5dB */
  69. 0x16c0005b, /* 30, -9.0dB */
  70. 0x15800056, /* 31, -9.5dB */
  71. 0x14400051, /* 32, -10.0dB */
  72. 0x1300004c, /* 33, -10.5dB */
  73. 0x12000048, /* 34, -11.0dB */
  74. 0x11000044, /* 35, -11.5dB */
  75. 0x10000040, /* 36, -12.0dB */
  76. 0x0f00003c, /* 37, -12.5dB */
  77. 0x0e400039, /* 38, -13.0dB */
  78. 0x0d800036, /* 39, -13.5dB */
  79. 0x0cc00033, /* 40, -14.0dB */
  80. 0x0c000030, /* 41, -14.5dB */
  81. 0x0b40002d, /* 42, -15.0dB */
  82. };
  83. static const u8 cckswing_table_ch1ch13[CCK_TABLE_SIZE][8] = {
  84. {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04}, /* 0, +0dB */
  85. {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, /* 1, -0.5dB */
  86. {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, /* 2, -1.0dB */
  87. {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, /* 3, -1.5dB */
  88. {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, /* 4, -2.0dB */
  89. {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, /* 5, -2.5dB */
  90. {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, /* 6, -3.0dB */
  91. {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, /* 7, -3.5dB */
  92. {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, /* 8, -4.0dB */
  93. {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, /* 9, -4.5dB */
  94. {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, /* 10, -5.0dB */
  95. {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, /* 11, -5.5dB */
  96. {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, /* 12, -6.0dB */
  97. {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, /* 13, -6.5dB */
  98. {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, /* 14, -7.0dB */
  99. {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, /* 15, -7.5dB */
  100. {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, /* 16, -8.0dB */
  101. {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, /* 17, -8.5dB */
  102. {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, /* 18, -9.0dB */
  103. {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 19, -9.5dB */
  104. {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 20, -10.0dB */
  105. {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 21, -10.5dB */
  106. {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 22, -11.0dB */
  107. {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, /* 23, -11.5dB */
  108. {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, /* 24, -12.0dB */
  109. {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, /* 25, -12.5dB */
  110. {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, /* 26, -13.0dB */
  111. {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 27, -13.5dB */
  112. {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 28, -14.0dB */
  113. {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 29, -14.5dB */
  114. {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 30, -15.0dB */
  115. {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, /* 31, -15.5dB */
  116. {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01} /* 32, -16.0dB */
  117. };
  118. static const u8 cckswing_table_ch14[CCK_TABLE_SIZE][8] = {
  119. {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00}, /* 0, +0dB */
  120. {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, /* 1, -0.5dB */
  121. {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, /* 2, -1.0dB */
  122. {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, /* 3, -1.5dB */
  123. {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, /* 4, -2.0dB */
  124. {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, /* 5, -2.5dB */
  125. {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, /* 6, -3.0dB */
  126. {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, /* 7, -3.5dB */
  127. {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, /* 8, -4.0dB */
  128. {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, /* 9, -4.5dB */
  129. {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, /* 10, -5.0dB */
  130. {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 11, -5.5dB */
  131. {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 12, -6.0dB */
  132. {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, /* 13, -6.5dB */
  133. {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, /* 14, -7.0dB */
  134. {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 15, -7.5dB */
  135. {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 16, -8.0dB */
  136. {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 17, -8.5dB */
  137. {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 18, -9.0dB */
  138. {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 19, -9.5dB */
  139. {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 20, -10.0dB */
  140. {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 21, -10.5dB */
  141. {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 22, -11.0dB */
  142. {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 23, -11.5dB */
  143. {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 24, -12.0dB */
  144. {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 25, -12.5dB */
  145. {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 26, -13.0dB */
  146. {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 27, -13.5dB */
  147. {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 28, -14.0dB */
  148. {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 29, -14.5dB */
  149. {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 30, -15.0dB */
  150. {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 31, -15.5dB */
  151. {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00} /* 32, -16.0dB */
  152. };
  153. static void rtl92d_dm_diginit(struct ieee80211_hw *hw)
  154. {
  155. de_digtable.dig_enable_flag = true;
  156. de_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX;
  157. de_digtable.cur_igvalue = 0x20;
  158. de_digtable.pre_igvalue = 0x0;
  159. de_digtable.cursta_connectctate = DIG_STA_DISCONNECT;
  160. de_digtable.presta_connectstate = DIG_STA_DISCONNECT;
  161. de_digtable.curmultista_connectstate = DIG_MULTISTA_DISCONNECT;
  162. de_digtable.rssi_lowthresh = DM_DIG_THRESH_LOW;
  163. de_digtable.rssi_highthresh = DM_DIG_THRESH_HIGH;
  164. de_digtable.fa_lowthresh = DM_FALSEALARM_THRESH_LOW;
  165. de_digtable.fa_highthresh = DM_FALSEALARM_THRESH_HIGH;
  166. de_digtable.rx_gain_range_max = DM_DIG_FA_UPPER;
  167. de_digtable.rx_gain_range_min = DM_DIG_FA_LOWER;
  168. de_digtable.backoff_val = DM_DIG_BACKOFF_DEFAULT;
  169. de_digtable.backoff_val_range_max = DM_DIG_BACKOFF_MAX;
  170. de_digtable.backoff_val_range_min = DM_DIG_BACKOFF_MIN;
  171. de_digtable.pre_cck_pd_state = CCK_PD_STAGE_LOWRSSI;
  172. de_digtable.cur_cck_pd_state = CCK_PD_STAGE_MAX;
  173. de_digtable.large_fa_hit = 0;
  174. de_digtable.recover_cnt = 0;
  175. de_digtable.forbidden_igi = DM_DIG_FA_LOWER;
  176. }
  177. static void rtl92d_dm_false_alarm_counter_statistics(struct ieee80211_hw *hw)
  178. {
  179. u32 ret_value;
  180. struct rtl_priv *rtlpriv = rtl_priv(hw);
  181. struct false_alarm_statistics *falsealm_cnt = &(rtlpriv->falsealm_cnt);
  182. unsigned long flag = 0;
  183. /* hold ofdm counter */
  184. rtl_set_bbreg(hw, ROFDM0_LSTF, BIT(31), 1); /* hold page C counter */
  185. rtl_set_bbreg(hw, ROFDM1_LSTF, BIT(31), 1); /*hold page D counter */
  186. ret_value = rtl_get_bbreg(hw, ROFDM0_FRAMESYNC, BMASKDWORD);
  187. falsealm_cnt->cnt_fast_fsync_fail = (ret_value & 0xffff);
  188. falsealm_cnt->cnt_sb_search_fail = ((ret_value & 0xffff0000) >> 16);
  189. ret_value = rtl_get_bbreg(hw, ROFDM_PHYCOUNTER1, BMASKDWORD);
  190. falsealm_cnt->cnt_parity_fail = ((ret_value & 0xffff0000) >> 16);
  191. ret_value = rtl_get_bbreg(hw, ROFDM_PHYCOUNTER2, BMASKDWORD);
  192. falsealm_cnt->cnt_rate_illegal = (ret_value & 0xffff);
  193. falsealm_cnt->cnt_crc8_fail = ((ret_value & 0xffff0000) >> 16);
  194. ret_value = rtl_get_bbreg(hw, ROFDM_PHYCOUNTER3, BMASKDWORD);
  195. falsealm_cnt->cnt_mcs_fail = (ret_value & 0xffff);
  196. falsealm_cnt->cnt_ofdm_fail = falsealm_cnt->cnt_parity_fail +
  197. falsealm_cnt->cnt_rate_illegal +
  198. falsealm_cnt->cnt_crc8_fail +
  199. falsealm_cnt->cnt_mcs_fail +
  200. falsealm_cnt->cnt_fast_fsync_fail +
  201. falsealm_cnt->cnt_sb_search_fail;
  202. if (rtlpriv->rtlhal.current_bandtype != BAND_ON_5G) {
  203. /* hold cck counter */
  204. rtl92d_acquire_cckandrw_pagea_ctl(hw, &flag);
  205. ret_value = rtl_get_bbreg(hw, RCCK0_FACOUNTERLOWER, BMASKBYTE0);
  206. falsealm_cnt->cnt_cck_fail = ret_value;
  207. ret_value = rtl_get_bbreg(hw, RCCK0_FACOUNTERUPPER, BMASKBYTE3);
  208. falsealm_cnt->cnt_cck_fail += (ret_value & 0xff) << 8;
  209. rtl92d_release_cckandrw_pagea_ctl(hw, &flag);
  210. } else {
  211. falsealm_cnt->cnt_cck_fail = 0;
  212. }
  213. /* reset false alarm counter registers */
  214. falsealm_cnt->cnt_all = falsealm_cnt->cnt_fast_fsync_fail +
  215. falsealm_cnt->cnt_sb_search_fail +
  216. falsealm_cnt->cnt_parity_fail +
  217. falsealm_cnt->cnt_rate_illegal +
  218. falsealm_cnt->cnt_crc8_fail +
  219. falsealm_cnt->cnt_mcs_fail +
  220. falsealm_cnt->cnt_cck_fail;
  221. rtl_set_bbreg(hw, ROFDM1_LSTF, 0x08000000, 1);
  222. /* update ofdm counter */
  223. rtl_set_bbreg(hw, ROFDM1_LSTF, 0x08000000, 0);
  224. /* update page C counter */
  225. rtl_set_bbreg(hw, ROFDM0_LSTF, BIT(31), 0);
  226. /* update page D counter */
  227. rtl_set_bbreg(hw, ROFDM1_LSTF, BIT(31), 0);
  228. if (rtlpriv->rtlhal.current_bandtype != BAND_ON_5G) {
  229. /* reset cck counter */
  230. rtl92d_acquire_cckandrw_pagea_ctl(hw, &flag);
  231. rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT, 0x0000c000, 0);
  232. /* enable cck counter */
  233. rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT, 0x0000c000, 2);
  234. rtl92d_release_cckandrw_pagea_ctl(hw, &flag);
  235. }
  236. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, ("Cnt_Fast_Fsync_fail = %x, "
  237. "Cnt_SB_Search_fail = %x\n",
  238. falsealm_cnt->cnt_fast_fsync_fail,
  239. falsealm_cnt->cnt_sb_search_fail));
  240. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, ("Cnt_Parity_Fail = %x, "
  241. "Cnt_Rate_Illegal = %x, Cnt_Crc8_fail = %x, "
  242. "Cnt_Mcs_fail = %x\n",
  243. falsealm_cnt->cnt_parity_fail,
  244. falsealm_cnt->cnt_rate_illegal,
  245. falsealm_cnt->cnt_crc8_fail,
  246. falsealm_cnt->cnt_mcs_fail));
  247. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
  248. ("Cnt_Ofdm_fail = %x, " "Cnt_Cck_fail = %x, "
  249. "Cnt_all = %x\n",
  250. falsealm_cnt->cnt_ofdm_fail,
  251. falsealm_cnt->cnt_cck_fail,
  252. falsealm_cnt->cnt_all));
  253. }
  254. static void rtl92d_dm_find_minimum_rssi(struct ieee80211_hw *hw)
  255. {
  256. struct rtl_priv *rtlpriv = rtl_priv(hw);
  257. struct rtl_mac *mac = rtl_mac(rtlpriv);
  258. /* Determine the minimum RSSI */
  259. if ((mac->link_state < MAC80211_LINKED) &&
  260. (rtlpriv->dm.UNDEC_SM_PWDB == 0)) {
  261. de_digtable.min_undecorated_pwdb_for_dm = 0;
  262. RT_TRACE(rtlpriv, COMP_BB_POWERSAVING, DBG_LOUD,
  263. ("Not connected to any\n"));
  264. }
  265. if (mac->link_state >= MAC80211_LINKED) {
  266. if (mac->opmode == NL80211_IFTYPE_AP ||
  267. mac->opmode == NL80211_IFTYPE_ADHOC) {
  268. de_digtable.min_undecorated_pwdb_for_dm =
  269. rtlpriv->dm.UNDEC_SM_PWDB;
  270. RT_TRACE(rtlpriv, COMP_BB_POWERSAVING, DBG_LOUD,
  271. ("AP Client PWDB = 0x%lx\n",
  272. rtlpriv->dm.UNDEC_SM_PWDB));
  273. } else {
  274. de_digtable.min_undecorated_pwdb_for_dm =
  275. rtlpriv->dm.undecorated_smoothed_pwdb;
  276. RT_TRACE(rtlpriv, COMP_BB_POWERSAVING, DBG_LOUD,
  277. ("STA Default Port PWDB = 0x%x\n",
  278. de_digtable.min_undecorated_pwdb_for_dm));
  279. }
  280. } else {
  281. de_digtable.min_undecorated_pwdb_for_dm =
  282. rtlpriv->dm.UNDEC_SM_PWDB;
  283. RT_TRACE(rtlpriv, COMP_BB_POWERSAVING, DBG_LOUD,
  284. ("AP Ext Port or disconnet PWDB = 0x%x\n",
  285. de_digtable.min_undecorated_pwdb_for_dm));
  286. }
  287. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, ("MinUndecoratedPWDBForDM =%d\n",
  288. de_digtable.min_undecorated_pwdb_for_dm));
  289. }
  290. static void rtl92d_dm_cck_packet_detection_thresh(struct ieee80211_hw *hw)
  291. {
  292. struct rtl_priv *rtlpriv = rtl_priv(hw);
  293. unsigned long flag = 0;
  294. if (de_digtable.cursta_connectctate == DIG_STA_CONNECT) {
  295. if (de_digtable.pre_cck_pd_state == CCK_PD_STAGE_LOWRSSI) {
  296. if (de_digtable.min_undecorated_pwdb_for_dm <= 25)
  297. de_digtable.cur_cck_pd_state =
  298. CCK_PD_STAGE_LOWRSSI;
  299. else
  300. de_digtable.cur_cck_pd_state =
  301. CCK_PD_STAGE_HIGHRSSI;
  302. } else {
  303. if (de_digtable.min_undecorated_pwdb_for_dm <= 20)
  304. de_digtable.cur_cck_pd_state =
  305. CCK_PD_STAGE_LOWRSSI;
  306. else
  307. de_digtable.cur_cck_pd_state =
  308. CCK_PD_STAGE_HIGHRSSI;
  309. }
  310. } else {
  311. de_digtable.cur_cck_pd_state = CCK_PD_STAGE_LOWRSSI;
  312. }
  313. if (de_digtable.pre_cck_pd_state != de_digtable.cur_cck_pd_state) {
  314. if (de_digtable.cur_cck_pd_state == CCK_PD_STAGE_LOWRSSI) {
  315. rtl92d_acquire_cckandrw_pagea_ctl(hw, &flag);
  316. rtl_set_bbreg(hw, RCCK0_CCA, BMASKBYTE2, 0x83);
  317. rtl92d_release_cckandrw_pagea_ctl(hw, &flag);
  318. } else {
  319. rtl92d_acquire_cckandrw_pagea_ctl(hw, &flag);
  320. rtl_set_bbreg(hw, RCCK0_CCA, BMASKBYTE2, 0xcd);
  321. rtl92d_release_cckandrw_pagea_ctl(hw, &flag);
  322. }
  323. de_digtable.pre_cck_pd_state = de_digtable.cur_cck_pd_state;
  324. }
  325. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, ("CurSTAConnectState=%s\n",
  326. (de_digtable.cursta_connectctate == DIG_STA_CONNECT ?
  327. "DIG_STA_CONNECT " : "DIG_STA_DISCONNECT")));
  328. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, ("CCKPDStage=%s\n",
  329. (de_digtable.cur_cck_pd_state == CCK_PD_STAGE_LOWRSSI ?
  330. "Low RSSI " : "High RSSI ")));
  331. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, ("is92d single phy =%x\n",
  332. IS_92D_SINGLEPHY(rtlpriv->rtlhal.version)));
  333. }
  334. void rtl92d_dm_write_dig(struct ieee80211_hw *hw)
  335. {
  336. struct rtl_priv *rtlpriv = rtl_priv(hw);
  337. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, ("cur_igvalue = 0x%x, "
  338. "pre_igvalue = 0x%x, backoff_val = %d\n",
  339. de_digtable.cur_igvalue, de_digtable.pre_igvalue,
  340. de_digtable.backoff_val));
  341. if (de_digtable.dig_enable_flag == false) {
  342. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, ("DIG is disabled\n"));
  343. de_digtable.pre_igvalue = 0x17;
  344. return;
  345. }
  346. if (de_digtable.pre_igvalue != de_digtable.cur_igvalue) {
  347. rtl_set_bbreg(hw, ROFDM0_XAAGCCORE1, 0x7f,
  348. de_digtable.cur_igvalue);
  349. rtl_set_bbreg(hw, ROFDM0_XBAGCCORE1, 0x7f,
  350. de_digtable.cur_igvalue);
  351. de_digtable.pre_igvalue = de_digtable.cur_igvalue;
  352. }
  353. }
  354. static void rtl92d_early_mode_enabled(struct rtl_priv *rtlpriv)
  355. {
  356. if ((rtlpriv->mac80211.link_state >= MAC80211_LINKED) &&
  357. (rtlpriv->mac80211.vendor == PEER_CISCO)) {
  358. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
  359. ("IOT_PEER = CISCO\n"));
  360. if (de_digtable.last_min_undecorated_pwdb_for_dm >= 50
  361. && de_digtable.min_undecorated_pwdb_for_dm < 50) {
  362. rtl_write_byte(rtlpriv, REG_EARLY_MODE_CONTROL, 0x00);
  363. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
  364. ("Early Mode Off\n"));
  365. } else if (de_digtable.last_min_undecorated_pwdb_for_dm <= 55 &&
  366. de_digtable.min_undecorated_pwdb_for_dm > 55) {
  367. rtl_write_byte(rtlpriv, REG_EARLY_MODE_CONTROL, 0x0f);
  368. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
  369. ("Early Mode On\n"));
  370. }
  371. } else if (!(rtl_read_byte(rtlpriv, REG_EARLY_MODE_CONTROL) & 0xf)) {
  372. rtl_write_byte(rtlpriv, REG_EARLY_MODE_CONTROL, 0x0f);
  373. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, ("Early Mode On\n"));
  374. }
  375. }
  376. static void rtl92d_dm_dig(struct ieee80211_hw *hw)
  377. {
  378. struct rtl_priv *rtlpriv = rtl_priv(hw);
  379. u8 value_igi = de_digtable.cur_igvalue;
  380. struct false_alarm_statistics *falsealm_cnt = &(rtlpriv->falsealm_cnt);
  381. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, ("==>\n"));
  382. if (rtlpriv->rtlhal.earlymode_enable) {
  383. rtl92d_early_mode_enabled(rtlpriv);
  384. de_digtable.last_min_undecorated_pwdb_for_dm =
  385. de_digtable.min_undecorated_pwdb_for_dm;
  386. }
  387. if (rtlpriv->dm.dm_initialgain_enable == false)
  388. return;
  389. /* because we will send data pkt when scanning
  390. * this will cause some ap like gear-3700 wep TP
  391. * lower if we retrun here, this is the diff of
  392. * mac80211 driver vs ieee80211 driver */
  393. /* if (rtlpriv->mac80211.act_scanning)
  394. * return; */
  395. /* Not STA mode return tmp */
  396. if (rtlpriv->mac80211.opmode != NL80211_IFTYPE_STATION)
  397. return;
  398. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, ("progress\n"));
  399. /* Decide the current status and if modify initial gain or not */
  400. if (rtlpriv->mac80211.link_state >= MAC80211_LINKED)
  401. de_digtable.cursta_connectctate = DIG_STA_CONNECT;
  402. else
  403. de_digtable.cursta_connectctate = DIG_STA_DISCONNECT;
  404. /* adjust initial gain according to false alarm counter */
  405. if (falsealm_cnt->cnt_all < DM_DIG_FA_TH0)
  406. value_igi--;
  407. else if (falsealm_cnt->cnt_all < DM_DIG_FA_TH1)
  408. value_igi += 0;
  409. else if (falsealm_cnt->cnt_all < DM_DIG_FA_TH2)
  410. value_igi++;
  411. else if (falsealm_cnt->cnt_all >= DM_DIG_FA_TH2)
  412. value_igi += 2;
  413. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
  414. ("dm_DIG() Before: large_fa_hit=%d, forbidden_igi=%x\n",
  415. de_digtable.large_fa_hit, de_digtable.forbidden_igi));
  416. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
  417. ("dm_DIG() Before: Recover_cnt=%d, rx_gain_range_min=%x\n",
  418. de_digtable.recover_cnt, de_digtable.rx_gain_range_min));
  419. /* deal with abnorally large false alarm */
  420. if (falsealm_cnt->cnt_all > 10000) {
  421. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
  422. ("dm_DIG(): Abnornally false alarm case.\n"));
  423. de_digtable.large_fa_hit++;
  424. if (de_digtable.forbidden_igi < de_digtable.cur_igvalue) {
  425. de_digtable.forbidden_igi = de_digtable.cur_igvalue;
  426. de_digtable.large_fa_hit = 1;
  427. }
  428. if (de_digtable.large_fa_hit >= 3) {
  429. if ((de_digtable.forbidden_igi + 1) > DM_DIG_MAX)
  430. de_digtable.rx_gain_range_min = DM_DIG_MAX;
  431. else
  432. de_digtable.rx_gain_range_min =
  433. (de_digtable.forbidden_igi + 1);
  434. de_digtable.recover_cnt = 3600; /* 3600=2hr */
  435. }
  436. } else {
  437. /* Recovery mechanism for IGI lower bound */
  438. if (de_digtable.recover_cnt != 0) {
  439. de_digtable.recover_cnt--;
  440. } else {
  441. if (de_digtable.large_fa_hit == 0) {
  442. if ((de_digtable.forbidden_igi - 1) <
  443. DM_DIG_FA_LOWER) {
  444. de_digtable.forbidden_igi =
  445. DM_DIG_FA_LOWER;
  446. de_digtable.rx_gain_range_min =
  447. DM_DIG_FA_LOWER;
  448. } else {
  449. de_digtable.forbidden_igi--;
  450. de_digtable.rx_gain_range_min =
  451. (de_digtable.forbidden_igi + 1);
  452. }
  453. } else if (de_digtable.large_fa_hit == 3) {
  454. de_digtable.large_fa_hit = 0;
  455. }
  456. }
  457. }
  458. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
  459. ("dm_DIG() After: large_fa_hit=%d, forbidden_igi=%x\n",
  460. de_digtable.large_fa_hit, de_digtable.forbidden_igi));
  461. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
  462. ("dm_DIG() After: recover_cnt=%d, rx_gain_range_min=%x\n",
  463. de_digtable.recover_cnt, de_digtable.rx_gain_range_min));
  464. if (value_igi > DM_DIG_MAX)
  465. value_igi = DM_DIG_MAX;
  466. else if (value_igi < de_digtable.rx_gain_range_min)
  467. value_igi = de_digtable.rx_gain_range_min;
  468. de_digtable.cur_igvalue = value_igi;
  469. rtl92d_dm_write_dig(hw);
  470. if (rtlpriv->rtlhal.current_bandtype != BAND_ON_5G)
  471. rtl92d_dm_cck_packet_detection_thresh(hw);
  472. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, ("<<==\n"));
  473. }
  474. static void rtl92d_dm_init_dynamic_txpower(struct ieee80211_hw *hw)
  475. {
  476. struct rtl_priv *rtlpriv = rtl_priv(hw);
  477. rtlpriv->dm.dynamic_txpower_enable = true;
  478. rtlpriv->dm.last_dtp_lvl = TXHIGHPWRLEVEL_NORMAL;
  479. rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL;
  480. }
  481. static void rtl92d_dm_dynamic_txpower(struct ieee80211_hw *hw)
  482. {
  483. struct rtl_priv *rtlpriv = rtl_priv(hw);
  484. struct rtl_phy *rtlphy = &(rtlpriv->phy);
  485. struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
  486. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  487. long undecorated_smoothed_pwdb;
  488. if ((!rtlpriv->dm.dynamic_txpower_enable)
  489. || rtlpriv->dm.dm_flag & HAL_DM_HIPWR_DISABLE) {
  490. rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL;
  491. return;
  492. }
  493. if ((mac->link_state < MAC80211_LINKED) &&
  494. (rtlpriv->dm.UNDEC_SM_PWDB == 0)) {
  495. RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
  496. ("Not connected to any\n"));
  497. rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL;
  498. rtlpriv->dm.last_dtp_lvl = TXHIGHPWRLEVEL_NORMAL;
  499. return;
  500. }
  501. if (mac->link_state >= MAC80211_LINKED) {
  502. if (mac->opmode == NL80211_IFTYPE_ADHOC) {
  503. undecorated_smoothed_pwdb =
  504. rtlpriv->dm.UNDEC_SM_PWDB;
  505. RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
  506. ("IBSS Client PWDB = 0x%lx\n",
  507. undecorated_smoothed_pwdb));
  508. } else {
  509. undecorated_smoothed_pwdb =
  510. rtlpriv->dm.undecorated_smoothed_pwdb;
  511. RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
  512. ("STA Default Port PWDB = 0x%lx\n",
  513. undecorated_smoothed_pwdb));
  514. }
  515. } else {
  516. undecorated_smoothed_pwdb =
  517. rtlpriv->dm.UNDEC_SM_PWDB;
  518. RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
  519. ("AP Ext Port PWDB = 0x%lx\n",
  520. undecorated_smoothed_pwdb));
  521. }
  522. if (rtlhal->current_bandtype == BAND_ON_5G) {
  523. if (undecorated_smoothed_pwdb >= 0x33) {
  524. rtlpriv->dm.dynamic_txhighpower_lvl =
  525. TXHIGHPWRLEVEL_LEVEL2;
  526. RT_TRACE(rtlpriv, COMP_HIPWR, DBG_LOUD,
  527. ("5G:TxHighPwrLevel_Level2 (TxPwr=0x0)\n"));
  528. } else if ((undecorated_smoothed_pwdb < 0x33)
  529. && (undecorated_smoothed_pwdb >= 0x2b)) {
  530. rtlpriv->dm.dynamic_txhighpower_lvl =
  531. TXHIGHPWRLEVEL_LEVEL1;
  532. RT_TRACE(rtlpriv, COMP_HIPWR, DBG_LOUD,
  533. ("5G:TxHighPwrLevel_Level1 (TxPwr=0x10)\n"));
  534. } else if (undecorated_smoothed_pwdb < 0x2b) {
  535. rtlpriv->dm.dynamic_txhighpower_lvl =
  536. TXHIGHPWRLEVEL_NORMAL;
  537. RT_TRACE(rtlpriv, COMP_HIPWR, DBG_LOUD,
  538. ("5G:TxHighPwrLevel_Normal\n"));
  539. }
  540. } else {
  541. if (undecorated_smoothed_pwdb >=
  542. TX_POWER_NEAR_FIELD_THRESH_LVL2) {
  543. rtlpriv->dm.dynamic_txhighpower_lvl =
  544. TXHIGHPWRLEVEL_LEVEL2;
  545. RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
  546. ("TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x0)\n"));
  547. } else
  548. if ((undecorated_smoothed_pwdb <
  549. (TX_POWER_NEAR_FIELD_THRESH_LVL2 - 3))
  550. && (undecorated_smoothed_pwdb >=
  551. TX_POWER_NEAR_FIELD_THRESH_LVL1)) {
  552. rtlpriv->dm.dynamic_txhighpower_lvl =
  553. TXHIGHPWRLEVEL_LEVEL1;
  554. RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
  555. ("TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x10)\n"));
  556. } else if (undecorated_smoothed_pwdb <
  557. (TX_POWER_NEAR_FIELD_THRESH_LVL1 - 5)) {
  558. rtlpriv->dm.dynamic_txhighpower_lvl =
  559. TXHIGHPWRLEVEL_NORMAL;
  560. RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
  561. ("TXHIGHPWRLEVEL_NORMAL\n"));
  562. }
  563. }
  564. if ((rtlpriv->dm.dynamic_txhighpower_lvl != rtlpriv->dm.last_dtp_lvl)) {
  565. RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
  566. ("PHY_SetTxPowerLevel8192S() Channel = %d\n",
  567. rtlphy->current_channel));
  568. rtl92d_phy_set_txpower_level(hw, rtlphy->current_channel);
  569. }
  570. rtlpriv->dm.last_dtp_lvl = rtlpriv->dm.dynamic_txhighpower_lvl;
  571. }
  572. static void rtl92d_dm_pwdb_monitor(struct ieee80211_hw *hw)
  573. {
  574. struct rtl_priv *rtlpriv = rtl_priv(hw);
  575. /* AP & ADHOC & MESH will return tmp */
  576. if (rtlpriv->mac80211.opmode != NL80211_IFTYPE_STATION)
  577. return;
  578. /* Indicate Rx signal strength to FW. */
  579. if (rtlpriv->dm.useramask) {
  580. u32 temp = rtlpriv->dm.undecorated_smoothed_pwdb;
  581. temp <<= 16;
  582. temp |= 0x100;
  583. /* fw v12 cmdid 5:use max macid ,for nic ,
  584. * default macid is 0 ,max macid is 1 */
  585. rtl92d_fill_h2c_cmd(hw, H2C_RSSI_REPORT, 3, (u8 *) (&temp));
  586. } else {
  587. rtl_write_byte(rtlpriv, 0x4fe,
  588. (u8) rtlpriv->dm.undecorated_smoothed_pwdb);
  589. }
  590. }
  591. void rtl92d_dm_init_edca_turbo(struct ieee80211_hw *hw)
  592. {
  593. struct rtl_priv *rtlpriv = rtl_priv(hw);
  594. rtlpriv->dm.current_turbo_edca = false;
  595. rtlpriv->dm.is_any_nonbepkts = false;
  596. rtlpriv->dm.is_cur_rdlstate = false;
  597. }
  598. static void rtl92d_dm_check_edca_turbo(struct ieee80211_hw *hw)
  599. {
  600. struct rtl_priv *rtlpriv = rtl_priv(hw);
  601. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  602. static u64 last_txok_cnt;
  603. static u64 last_rxok_cnt;
  604. u64 cur_txok_cnt;
  605. u64 cur_rxok_cnt;
  606. u32 edca_be_ul = 0x5ea42b;
  607. u32 edca_be_dl = 0x5ea42b;
  608. if (mac->link_state != MAC80211_LINKED) {
  609. rtlpriv->dm.current_turbo_edca = false;
  610. goto exit;
  611. }
  612. /* Enable BEQ TxOP limit configuration in wireless G-mode. */
  613. /* To check whether we shall force turn on TXOP configuration. */
  614. if ((!rtlpriv->dm.disable_framebursting) &&
  615. (rtlpriv->sec.pairwise_enc_algorithm == WEP40_ENCRYPTION ||
  616. rtlpriv->sec.pairwise_enc_algorithm == WEP104_ENCRYPTION ||
  617. rtlpriv->sec.pairwise_enc_algorithm == TKIP_ENCRYPTION)) {
  618. /* Force TxOP limit to 0x005e for UL. */
  619. if (!(edca_be_ul & 0xffff0000))
  620. edca_be_ul |= 0x005e0000;
  621. /* Force TxOP limit to 0x005e for DL. */
  622. if (!(edca_be_dl & 0xffff0000))
  623. edca_be_dl |= 0x005e0000;
  624. }
  625. if ((!rtlpriv->dm.is_any_nonbepkts) &&
  626. (!rtlpriv->dm.disable_framebursting)) {
  627. cur_txok_cnt = rtlpriv->stats.txbytesunicast - last_txok_cnt;
  628. cur_rxok_cnt = rtlpriv->stats.rxbytesunicast - last_rxok_cnt;
  629. if (cur_rxok_cnt > 4 * cur_txok_cnt) {
  630. if (!rtlpriv->dm.is_cur_rdlstate ||
  631. !rtlpriv->dm.current_turbo_edca) {
  632. rtl_write_dword(rtlpriv, REG_EDCA_BE_PARAM,
  633. edca_be_dl);
  634. rtlpriv->dm.is_cur_rdlstate = true;
  635. }
  636. } else {
  637. if (rtlpriv->dm.is_cur_rdlstate ||
  638. !rtlpriv->dm.current_turbo_edca) {
  639. rtl_write_dword(rtlpriv, REG_EDCA_BE_PARAM,
  640. edca_be_ul);
  641. rtlpriv->dm.is_cur_rdlstate = false;
  642. }
  643. }
  644. rtlpriv->dm.current_turbo_edca = true;
  645. } else {
  646. if (rtlpriv->dm.current_turbo_edca) {
  647. u8 tmp = AC0_BE;
  648. rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_AC_PARAM,
  649. (u8 *) (&tmp));
  650. rtlpriv->dm.current_turbo_edca = false;
  651. }
  652. }
  653. exit:
  654. rtlpriv->dm.is_any_nonbepkts = false;
  655. last_txok_cnt = rtlpriv->stats.txbytesunicast;
  656. last_rxok_cnt = rtlpriv->stats.rxbytesunicast;
  657. }
  658. static void rtl92d_dm_rxgain_tracking_thermalmeter(struct ieee80211_hw *hw)
  659. {
  660. struct rtl_priv *rtlpriv = rtl_priv(hw);
  661. u8 index_mapping[RX_INDEX_MAPPING_NUM] = {
  662. 0x0f, 0x0f, 0x0d, 0x0c, 0x0b,
  663. 0x0a, 0x09, 0x08, 0x07, 0x06,
  664. 0x05, 0x04, 0x04, 0x03, 0x02
  665. };
  666. int i;
  667. u32 u4tmp;
  668. u4tmp = (index_mapping[(rtlpriv->efuse.eeprom_thermalmeter -
  669. rtlpriv->dm.thermalvalue_rxgain)]) << 12;
  670. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  671. ("===> Rx Gain %x\n", u4tmp));
  672. for (i = RF90_PATH_A; i < rtlpriv->phy.num_total_rfpath; i++)
  673. rtl_set_rfreg(hw, i, 0x3C, BRFREGOFFSETMASK,
  674. (rtlpriv->phy.reg_rf3c[i] & (~(0xF000))) | u4tmp);
  675. }
  676. static void rtl92d_bandtype_2_4G(struct ieee80211_hw *hw, long *temp_cckg,
  677. u8 *cck_index_old)
  678. {
  679. struct rtl_priv *rtlpriv = rtl_priv(hw);
  680. int i;
  681. unsigned long flag = 0;
  682. long temp_cck;
  683. /* Query CCK default setting From 0xa24 */
  684. rtl92d_acquire_cckandrw_pagea_ctl(hw, &flag);
  685. temp_cck = rtl_get_bbreg(hw, RCCK0_TXFILTER2,
  686. BMASKDWORD) & BMASKCCK;
  687. rtl92d_release_cckandrw_pagea_ctl(hw, &flag);
  688. for (i = 0; i < CCK_TABLE_LENGTH; i++) {
  689. if (rtlpriv->dm.cck_inch14) {
  690. if (!memcmp((void *)&temp_cck,
  691. (void *)&cckswing_table_ch14[i][2], 4)) {
  692. *cck_index_old = (u8) i;
  693. RT_TRACE(rtlpriv,
  694. COMP_POWER_TRACKING,
  695. DBG_LOUD,
  696. ("Initial reg0x%x = 0x%lx, "
  697. "cck_index=0x%x, ch 14 %d\n",
  698. RCCK0_TXFILTER2,
  699. temp_cck, *cck_index_old,
  700. rtlpriv->dm.cck_inch14));
  701. break;
  702. }
  703. } else {
  704. if (!memcmp((void *) &temp_cck,
  705. &cckswing_table_ch1ch13[i][2], 4)) {
  706. *cck_index_old = (u8) i;
  707. RT_TRACE(rtlpriv, COMP_POWER_TRACKING,
  708. DBG_LOUD,
  709. ("Initial reg0x%x = 0x%lx, "
  710. "cck_index = 0x%x, ch14 %d\n",
  711. RCCK0_TXFILTER2,
  712. temp_cck, *cck_index_old,
  713. rtlpriv->dm.cck_inch14));
  714. break;
  715. }
  716. }
  717. }
  718. *temp_cckg = temp_cck;
  719. }
  720. static void rtl92d_bandtype_5G(struct rtl_hal *rtlhal, u8 *ofdm_index,
  721. bool *internal_pa, u8 thermalvalue, u8 delta,
  722. u8 rf, struct rtl_efuse *rtlefuse,
  723. struct rtl_priv *rtlpriv, struct rtl_phy *rtlphy,
  724. u8 index_mapping[5][INDEX_MAPPING_NUM],
  725. u8 index_mapping_pa[8][INDEX_MAPPING_NUM])
  726. {
  727. int i;
  728. u8 index;
  729. u8 offset = 0;
  730. for (i = 0; i < rf; i++) {
  731. if (rtlhal->macphymode == DUALMAC_DUALPHY &&
  732. rtlhal->interfaceindex == 1) /* MAC 1 5G */
  733. *internal_pa = rtlefuse->internal_pa_5g[1];
  734. else
  735. *internal_pa = rtlefuse->internal_pa_5g[i];
  736. if (*internal_pa) {
  737. if (rtlhal->interfaceindex == 1 || i == rf)
  738. offset = 4;
  739. else
  740. offset = 0;
  741. if (rtlphy->current_channel >= 100 &&
  742. rtlphy->current_channel <= 165)
  743. offset += 2;
  744. } else {
  745. if (rtlhal->interfaceindex == 1 || i == rf)
  746. offset = 2;
  747. else
  748. offset = 0;
  749. }
  750. if (thermalvalue > rtlefuse->eeprom_thermalmeter)
  751. offset++;
  752. if (*internal_pa) {
  753. if (delta > INDEX_MAPPING_NUM - 1)
  754. index = index_mapping_pa[offset]
  755. [INDEX_MAPPING_NUM - 1];
  756. else
  757. index =
  758. index_mapping_pa[offset][delta];
  759. } else {
  760. if (delta > INDEX_MAPPING_NUM - 1)
  761. index =
  762. index_mapping[offset][INDEX_MAPPING_NUM - 1];
  763. else
  764. index = index_mapping[offset][delta];
  765. }
  766. if (thermalvalue > rtlefuse->eeprom_thermalmeter) {
  767. if (*internal_pa && thermalvalue > 0x12) {
  768. ofdm_index[i] = rtlpriv->dm.ofdm_index[i] -
  769. ((delta / 2) * 3 + (delta % 2));
  770. } else {
  771. ofdm_index[i] -= index;
  772. }
  773. } else {
  774. ofdm_index[i] += index;
  775. }
  776. }
  777. }
  778. static void rtl92d_dm_txpower_tracking_callback_thermalmeter(
  779. struct ieee80211_hw *hw)
  780. {
  781. struct rtl_priv *rtlpriv = rtl_priv(hw);
  782. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  783. struct rtl_phy *rtlphy = &(rtlpriv->phy);
  784. struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
  785. u8 thermalvalue, delta, delta_lck, delta_iqk, delta_rxgain;
  786. u8 offset, thermalvalue_avg_count = 0;
  787. u32 thermalvalue_avg = 0;
  788. bool internal_pa = false;
  789. long ele_a = 0, ele_d, temp_cck, val_x, value32;
  790. long val_y, ele_c = 0;
  791. u8 ofdm_index[2];
  792. u8 cck_index = 0;
  793. u8 ofdm_index_old[2];
  794. u8 cck_index_old = 0;
  795. u8 index;
  796. int i;
  797. bool is2t = IS_92D_SINGLEPHY(rtlhal->version);
  798. u8 ofdm_min_index = 6, ofdm_min_index_internal_pa = 3, rf;
  799. u8 indexforchannel =
  800. rtl92d_get_rightchnlplace_for_iqk(rtlphy->current_channel);
  801. u8 index_mapping[5][INDEX_MAPPING_NUM] = {
  802. /* 5G, path A/MAC 0, decrease power */
  803. {0, 1, 3, 6, 8, 9, 11, 13, 14, 16, 17, 18, 18},
  804. /* 5G, path A/MAC 0, increase power */
  805. {0, 2, 4, 5, 7, 10, 12, 14, 16, 18, 18, 18, 18},
  806. /* 5G, path B/MAC 1, decrease power */
  807. {0, 2, 3, 6, 8, 9, 11, 13, 14, 16, 17, 18, 18},
  808. /* 5G, path B/MAC 1, increase power */
  809. {0, 2, 4, 5, 7, 10, 13, 16, 16, 18, 18, 18, 18},
  810. /* 2.4G, for decreas power */
  811. {0, 1, 2, 3, 4, 5, 6, 7, 7, 8, 9, 10, 10},
  812. };
  813. u8 index_mapping_internal_pa[8][INDEX_MAPPING_NUM] = {
  814. /* 5G, path A/MAC 0, ch36-64, decrease power */
  815. {0, 1, 2, 4, 6, 7, 9, 11, 12, 14, 15, 16, 16},
  816. /* 5G, path A/MAC 0, ch36-64, increase power */
  817. {0, 2, 4, 5, 7, 10, 12, 14, 16, 18, 18, 18, 18},
  818. /* 5G, path A/MAC 0, ch100-165, decrease power */
  819. {0, 1, 2, 3, 5, 6, 8, 10, 11, 13, 14, 15, 15},
  820. /* 5G, path A/MAC 0, ch100-165, increase power */
  821. {0, 2, 4, 5, 7, 10, 12, 14, 16, 18, 18, 18, 18},
  822. /* 5G, path B/MAC 1, ch36-64, decrease power */
  823. {0, 1, 2, 4, 6, 7, 9, 11, 12, 14, 15, 16, 16},
  824. /* 5G, path B/MAC 1, ch36-64, increase power */
  825. {0, 2, 4, 5, 7, 10, 13, 16, 16, 18, 18, 18, 18},
  826. /* 5G, path B/MAC 1, ch100-165, decrease power */
  827. {0, 1, 2, 3, 5, 6, 8, 9, 10, 12, 13, 14, 14},
  828. /* 5G, path B/MAC 1, ch100-165, increase power */
  829. {0, 2, 4, 5, 7, 10, 13, 16, 16, 18, 18, 18, 18},
  830. };
  831. rtlpriv->dm.txpower_trackinginit = true;
  832. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD, ("\n"));
  833. thermalvalue = (u8) rtl_get_rfreg(hw, RF90_PATH_A, RF_T_METER, 0xf800);
  834. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  835. ("Readback Thermal Meter = 0x%x pre thermal meter 0x%x "
  836. "eeprom_thermalmeter 0x%x\n", thermalvalue,
  837. rtlpriv->dm.thermalvalue, rtlefuse->eeprom_thermalmeter));
  838. rtl92d_phy_ap_calibrate(hw, (thermalvalue -
  839. rtlefuse->eeprom_thermalmeter));
  840. if (is2t)
  841. rf = 2;
  842. else
  843. rf = 1;
  844. if (thermalvalue) {
  845. ele_d = rtl_get_bbreg(hw, ROFDM0_XATxIQIMBALANCE,
  846. BMASKDWORD) & BMASKOFDM_D;
  847. for (i = 0; i < OFDM_TABLE_SIZE_92D; i++) {
  848. if (ele_d == (ofdmswing_table[i] & BMASKOFDM_D)) {
  849. ofdm_index_old[0] = (u8) i;
  850. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  851. ("Initial pathA ele_d reg0x%x = 0x%lx,"
  852. " ofdm_index=0x%x\n",
  853. ROFDM0_XATxIQIMBALANCE,
  854. ele_d, ofdm_index_old[0]));
  855. break;
  856. }
  857. }
  858. if (is2t) {
  859. ele_d = rtl_get_bbreg(hw, ROFDM0_XBTxIQIMBALANCE,
  860. BMASKDWORD) & BMASKOFDM_D;
  861. for (i = 0; i < OFDM_TABLE_SIZE_92D; i++) {
  862. if (ele_d ==
  863. (ofdmswing_table[i] & BMASKOFDM_D)) {
  864. ofdm_index_old[1] = (u8) i;
  865. RT_TRACE(rtlpriv, COMP_POWER_TRACKING,
  866. DBG_LOUD,
  867. ("Initial pathB ele_d reg "
  868. "0x%x = 0x%lx, ofdm_index "
  869. "= 0x%x\n",
  870. ROFDM0_XBTxIQIMBALANCE, ele_d,
  871. ofdm_index_old[1]));
  872. break;
  873. }
  874. }
  875. }
  876. if (rtlhal->current_bandtype == BAND_ON_2_4G) {
  877. rtl92d_bandtype_2_4G(hw, &temp_cck, &cck_index_old);
  878. } else {
  879. temp_cck = 0x090e1317;
  880. cck_index_old = 12;
  881. }
  882. if (!rtlpriv->dm.thermalvalue) {
  883. rtlpriv->dm.thermalvalue =
  884. rtlefuse->eeprom_thermalmeter;
  885. rtlpriv->dm.thermalvalue_lck = thermalvalue;
  886. rtlpriv->dm.thermalvalue_iqk = thermalvalue;
  887. rtlpriv->dm.thermalvalue_rxgain =
  888. rtlefuse->eeprom_thermalmeter;
  889. for (i = 0; i < rf; i++)
  890. rtlpriv->dm.ofdm_index[i] = ofdm_index_old[i];
  891. rtlpriv->dm.cck_index = cck_index_old;
  892. }
  893. if (rtlhal->reloadtxpowerindex) {
  894. for (i = 0; i < rf; i++)
  895. rtlpriv->dm.ofdm_index[i] = ofdm_index_old[i];
  896. rtlpriv->dm.cck_index = cck_index_old;
  897. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  898. ("reload ofdm index for band switch\n"));
  899. }
  900. rtlpriv->dm.thermalvalue_avg
  901. [rtlpriv->dm.thermalvalue_avg_index] = thermalvalue;
  902. rtlpriv->dm.thermalvalue_avg_index++;
  903. if (rtlpriv->dm.thermalvalue_avg_index == AVG_THERMAL_NUM)
  904. rtlpriv->dm.thermalvalue_avg_index = 0;
  905. for (i = 0; i < AVG_THERMAL_NUM; i++) {
  906. if (rtlpriv->dm.thermalvalue_avg[i]) {
  907. thermalvalue_avg +=
  908. rtlpriv->dm.thermalvalue_avg[i];
  909. thermalvalue_avg_count++;
  910. }
  911. }
  912. if (thermalvalue_avg_count)
  913. thermalvalue = (u8) (thermalvalue_avg /
  914. thermalvalue_avg_count);
  915. if (rtlhal->reloadtxpowerindex) {
  916. delta = (thermalvalue > rtlefuse->eeprom_thermalmeter) ?
  917. (thermalvalue - rtlefuse->eeprom_thermalmeter) :
  918. (rtlefuse->eeprom_thermalmeter - thermalvalue);
  919. rtlhal->reloadtxpowerindex = false;
  920. rtlpriv->dm.done_txpower = false;
  921. } else if (rtlpriv->dm.done_txpower) {
  922. delta = (thermalvalue > rtlpriv->dm.thermalvalue) ?
  923. (thermalvalue - rtlpriv->dm.thermalvalue) :
  924. (rtlpriv->dm.thermalvalue - thermalvalue);
  925. } else {
  926. delta = (thermalvalue > rtlefuse->eeprom_thermalmeter) ?
  927. (thermalvalue - rtlefuse->eeprom_thermalmeter) :
  928. (rtlefuse->eeprom_thermalmeter - thermalvalue);
  929. }
  930. delta_lck = (thermalvalue > rtlpriv->dm.thermalvalue_lck) ?
  931. (thermalvalue - rtlpriv->dm.thermalvalue_lck) :
  932. (rtlpriv->dm.thermalvalue_lck - thermalvalue);
  933. delta_iqk = (thermalvalue > rtlpriv->dm.thermalvalue_iqk) ?
  934. (thermalvalue - rtlpriv->dm.thermalvalue_iqk) :
  935. (rtlpriv->dm.thermalvalue_iqk - thermalvalue);
  936. delta_rxgain =
  937. (thermalvalue > rtlpriv->dm.thermalvalue_rxgain) ?
  938. (thermalvalue - rtlpriv->dm.thermalvalue_rxgain) :
  939. (rtlpriv->dm.thermalvalue_rxgain - thermalvalue);
  940. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  941. ("Readback Thermal Meter = 0x%x pre thermal meter 0x%x"
  942. " eeprom_thermalmeter 0x%x delta 0x%x "
  943. "delta_lck 0x%x delta_iqk 0x%x\n",
  944. thermalvalue, rtlpriv->dm.thermalvalue,
  945. rtlefuse->eeprom_thermalmeter, delta, delta_lck,
  946. delta_iqk));
  947. if ((delta_lck > rtlefuse->delta_lck) &&
  948. (rtlefuse->delta_lck != 0)) {
  949. rtlpriv->dm.thermalvalue_lck = thermalvalue;
  950. rtl92d_phy_lc_calibrate(hw);
  951. }
  952. if (delta > 0 && rtlpriv->dm.txpower_track_control) {
  953. rtlpriv->dm.done_txpower = true;
  954. delta = (thermalvalue > rtlefuse->eeprom_thermalmeter) ?
  955. (thermalvalue - rtlefuse->eeprom_thermalmeter) :
  956. (rtlefuse->eeprom_thermalmeter - thermalvalue);
  957. if (rtlhal->current_bandtype == BAND_ON_2_4G) {
  958. offset = 4;
  959. if (delta > INDEX_MAPPING_NUM - 1)
  960. index = index_mapping[offset]
  961. [INDEX_MAPPING_NUM - 1];
  962. else
  963. index = index_mapping[offset][delta];
  964. if (thermalvalue > rtlpriv->dm.thermalvalue) {
  965. for (i = 0; i < rf; i++)
  966. ofdm_index[i] -= delta;
  967. cck_index -= delta;
  968. } else {
  969. for (i = 0; i < rf; i++)
  970. ofdm_index[i] += index;
  971. cck_index += index;
  972. }
  973. } else if (rtlhal->current_bandtype == BAND_ON_5G) {
  974. rtl92d_bandtype_5G(rtlhal, ofdm_index,
  975. &internal_pa, thermalvalue,
  976. delta, rf, rtlefuse, rtlpriv,
  977. rtlphy, index_mapping,
  978. index_mapping_internal_pa);
  979. }
  980. if (is2t) {
  981. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  982. ("temp OFDM_A_index=0x%x, OFDM_B_index"
  983. " = 0x%x,cck_index=0x%x\n",
  984. rtlpriv->dm.ofdm_index[0],
  985. rtlpriv->dm.ofdm_index[1],
  986. rtlpriv->dm.cck_index));
  987. } else {
  988. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  989. ("temp OFDM_A_index=0x%x,cck_index = "
  990. "0x%x\n",
  991. rtlpriv->dm.ofdm_index[0],
  992. rtlpriv->dm.cck_index));
  993. }
  994. for (i = 0; i < rf; i++) {
  995. if (ofdm_index[i] > OFDM_TABLE_SIZE_92D - 1)
  996. ofdm_index[i] = OFDM_TABLE_SIZE_92D - 1;
  997. else if (ofdm_index[i] < ofdm_min_index)
  998. ofdm_index[i] = ofdm_min_index;
  999. }
  1000. if (rtlhal->current_bandtype == BAND_ON_2_4G) {
  1001. if (cck_index > CCK_TABLE_SIZE - 1) {
  1002. cck_index = CCK_TABLE_SIZE - 1;
  1003. } else if (internal_pa ||
  1004. rtlhal->current_bandtype ==
  1005. BAND_ON_2_4G) {
  1006. if (ofdm_index[i] <
  1007. ofdm_min_index_internal_pa)
  1008. ofdm_index[i] =
  1009. ofdm_min_index_internal_pa;
  1010. } else if (cck_index < 0) {
  1011. cck_index = 0;
  1012. }
  1013. }
  1014. if (is2t) {
  1015. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  1016. ("new OFDM_A_index=0x%x, OFDM_B_index "
  1017. "= 0x%x, cck_index=0x%x\n",
  1018. ofdm_index[0], ofdm_index[1],
  1019. cck_index));
  1020. } else {
  1021. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  1022. ("new OFDM_A_index=0x%x,cck_index = "
  1023. "0x%x\n",
  1024. ofdm_index[0], cck_index));
  1025. }
  1026. ele_d = (ofdmswing_table[(u8) ofdm_index[0]] &
  1027. 0xFFC00000) >> 22;
  1028. val_x = rtlphy->iqk_matrix_regsetting
  1029. [indexforchannel].value[0][0];
  1030. val_y = rtlphy->iqk_matrix_regsetting
  1031. [indexforchannel].value[0][1];
  1032. if (val_x != 0) {
  1033. if ((val_x & 0x00000200) != 0)
  1034. val_x = val_x | 0xFFFFFC00;
  1035. ele_a =
  1036. ((val_x * ele_d) >> 8) & 0x000003FF;
  1037. /* new element C = element D x Y */
  1038. if ((val_y & 0x00000200) != 0)
  1039. val_y = val_y | 0xFFFFFC00;
  1040. ele_c = ((val_y * ele_d) >> 8) & 0x000003FF;
  1041. /* wirte new elements A, C, D to regC80 and
  1042. * regC94, element B is always 0 */
  1043. value32 = (ele_d << 22) | ((ele_c & 0x3F) <<
  1044. 16) | ele_a;
  1045. rtl_set_bbreg(hw, ROFDM0_XATxIQIMBALANCE,
  1046. BMASKDWORD, value32);
  1047. value32 = (ele_c & 0x000003C0) >> 6;
  1048. rtl_set_bbreg(hw, ROFDM0_XCTxAFE, BMASKH4BITS,
  1049. value32);
  1050. value32 = ((val_x * ele_d) >> 7) & 0x01;
  1051. rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD, BIT(24),
  1052. value32);
  1053. } else {
  1054. rtl_set_bbreg(hw, ROFDM0_XATxIQIMBALANCE,
  1055. BMASKDWORD,
  1056. ofdmswing_table
  1057. [(u8)ofdm_index[0]]);
  1058. rtl_set_bbreg(hw, ROFDM0_XCTxAFE, BMASKH4BITS,
  1059. 0x00);
  1060. rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
  1061. BIT(24), 0x00);
  1062. }
  1063. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  1064. ("TxPwrTracking for interface %d path A: X ="
  1065. " 0x%lx, Y = 0x%lx ele_A = 0x%lx ele_C = "
  1066. "0x%lx ele_D = 0x%lx 0xe94 = 0x%lx 0xe9c = "
  1067. "0x%lx\n", rtlhal->interfaceindex,
  1068. val_x, val_y, ele_a, ele_c, ele_d,
  1069. val_x, val_y));
  1070. if (rtlhal->current_bandtype == BAND_ON_2_4G) {
  1071. /* Adjust CCK according to IQK result */
  1072. if (!rtlpriv->dm.cck_inch14) {
  1073. rtl_write_byte(rtlpriv, 0xa22,
  1074. cckswing_table_ch1ch13
  1075. [(u8)cck_index][0]);
  1076. rtl_write_byte(rtlpriv, 0xa23,
  1077. cckswing_table_ch1ch13
  1078. [(u8)cck_index][1]);
  1079. rtl_write_byte(rtlpriv, 0xa24,
  1080. cckswing_table_ch1ch13
  1081. [(u8)cck_index][2]);
  1082. rtl_write_byte(rtlpriv, 0xa25,
  1083. cckswing_table_ch1ch13
  1084. [(u8)cck_index][3]);
  1085. rtl_write_byte(rtlpriv, 0xa26,
  1086. cckswing_table_ch1ch13
  1087. [(u8)cck_index][4]);
  1088. rtl_write_byte(rtlpriv, 0xa27,
  1089. cckswing_table_ch1ch13
  1090. [(u8)cck_index][5]);
  1091. rtl_write_byte(rtlpriv, 0xa28,
  1092. cckswing_table_ch1ch13
  1093. [(u8)cck_index][6]);
  1094. rtl_write_byte(rtlpriv, 0xa29,
  1095. cckswing_table_ch1ch13
  1096. [(u8)cck_index][7]);
  1097. } else {
  1098. rtl_write_byte(rtlpriv, 0xa22,
  1099. cckswing_table_ch14
  1100. [(u8)cck_index][0]);
  1101. rtl_write_byte(rtlpriv, 0xa23,
  1102. cckswing_table_ch14
  1103. [(u8)cck_index][1]);
  1104. rtl_write_byte(rtlpriv, 0xa24,
  1105. cckswing_table_ch14
  1106. [(u8)cck_index][2]);
  1107. rtl_write_byte(rtlpriv, 0xa25,
  1108. cckswing_table_ch14
  1109. [(u8)cck_index][3]);
  1110. rtl_write_byte(rtlpriv, 0xa26,
  1111. cckswing_table_ch14
  1112. [(u8)cck_index][4]);
  1113. rtl_write_byte(rtlpriv, 0xa27,
  1114. cckswing_table_ch14
  1115. [(u8)cck_index][5]);
  1116. rtl_write_byte(rtlpriv, 0xa28,
  1117. cckswing_table_ch14
  1118. [(u8)cck_index][6]);
  1119. rtl_write_byte(rtlpriv, 0xa29,
  1120. cckswing_table_ch14
  1121. [(u8)cck_index][7]);
  1122. }
  1123. }
  1124. if (is2t) {
  1125. ele_d = (ofdmswing_table[(u8) ofdm_index[1]] &
  1126. 0xFFC00000) >> 22;
  1127. val_x = rtlphy->iqk_matrix_regsetting
  1128. [indexforchannel].value[0][4];
  1129. val_y = rtlphy->iqk_matrix_regsetting
  1130. [indexforchannel].value[0][5];
  1131. if (val_x != 0) {
  1132. if ((val_x & 0x00000200) != 0)
  1133. /* consider minus */
  1134. val_x = val_x | 0xFFFFFC00;
  1135. ele_a = ((val_x * ele_d) >> 8) &
  1136. 0x000003FF;
  1137. /* new element C = element D x Y */
  1138. if ((val_y & 0x00000200) != 0)
  1139. val_y =
  1140. val_y | 0xFFFFFC00;
  1141. ele_c =
  1142. ((val_y *
  1143. ele_d) >> 8) & 0x00003FF;
  1144. /* write new elements A, C, D to regC88
  1145. * and regC9C, element B is always 0
  1146. */
  1147. value32 = (ele_d << 22) |
  1148. ((ele_c & 0x3F) << 16) |
  1149. ele_a;
  1150. rtl_set_bbreg(hw,
  1151. ROFDM0_XBTxIQIMBALANCE,
  1152. BMASKDWORD, value32);
  1153. value32 = (ele_c & 0x000003C0) >> 6;
  1154. rtl_set_bbreg(hw, ROFDM0_XDTxAFE,
  1155. BMASKH4BITS, value32);
  1156. value32 = ((val_x * ele_d) >> 7) & 0x01;
  1157. rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
  1158. BIT(28), value32);
  1159. } else {
  1160. rtl_set_bbreg(hw,
  1161. ROFDM0_XBTxIQIMBALANCE,
  1162. BMASKDWORD,
  1163. ofdmswing_table
  1164. [(u8) ofdm_index[1]]);
  1165. rtl_set_bbreg(hw, ROFDM0_XDTxAFE,
  1166. BMASKH4BITS, 0x00);
  1167. rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
  1168. BIT(28), 0x00);
  1169. }
  1170. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  1171. ("TxPwrTracking path B: X = 0x%lx, "
  1172. "Y = 0x%lx ele_A = 0x%lx ele_C = 0x"
  1173. "%lx ele_D = 0x%lx 0xeb4 = 0x%lx "
  1174. "0xebc = 0x%lx\n",
  1175. val_x, val_y, ele_a, ele_c,
  1176. ele_d, val_x, val_y));
  1177. }
  1178. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  1179. ("TxPwrTracking 0xc80 = 0x%x, 0xc94 = "
  1180. "0x%x RF 0x24 = 0x%x\n",
  1181. rtl_get_bbreg(hw, 0xc80, BMASKDWORD),
  1182. rtl_get_bbreg(hw, 0xc94, BMASKDWORD),
  1183. rtl_get_rfreg(hw, RF90_PATH_A, 0x24,
  1184. BRFREGOFFSETMASK)));
  1185. }
  1186. if ((delta_iqk > rtlefuse->delta_iqk) &&
  1187. (rtlefuse->delta_iqk != 0)) {
  1188. rtl92d_phy_reset_iqk_result(hw);
  1189. rtlpriv->dm.thermalvalue_iqk = thermalvalue;
  1190. rtl92d_phy_iq_calibrate(hw);
  1191. }
  1192. if (delta_rxgain > 0 && rtlhal->current_bandtype == BAND_ON_5G
  1193. && thermalvalue <= rtlefuse->eeprom_thermalmeter) {
  1194. rtlpriv->dm.thermalvalue_rxgain = thermalvalue;
  1195. rtl92d_dm_rxgain_tracking_thermalmeter(hw);
  1196. }
  1197. if (rtlpriv->dm.txpower_track_control)
  1198. rtlpriv->dm.thermalvalue = thermalvalue;
  1199. }
  1200. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD, ("<===\n"));
  1201. }
  1202. static void rtl92d_dm_initialize_txpower_tracking(struct ieee80211_hw *hw)
  1203. {
  1204. struct rtl_priv *rtlpriv = rtl_priv(hw);
  1205. rtlpriv->dm.txpower_tracking = true;
  1206. rtlpriv->dm.txpower_trackinginit = false;
  1207. rtlpriv->dm.txpower_track_control = true;
  1208. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  1209. ("pMgntInfo->txpower_tracking = %d\n",
  1210. rtlpriv->dm.txpower_tracking));
  1211. }
  1212. void rtl92d_dm_check_txpower_tracking_thermal_meter(struct ieee80211_hw *hw)
  1213. {
  1214. struct rtl_priv *rtlpriv = rtl_priv(hw);
  1215. static u8 tm_trigger;
  1216. if (!rtlpriv->dm.txpower_tracking)
  1217. return;
  1218. if (!tm_trigger) {
  1219. rtl_set_rfreg(hw, RF90_PATH_A, RF_T_METER, BIT(17) |
  1220. BIT(16), 0x03);
  1221. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  1222. ("Trigger 92S Thermal Meter!!\n"));
  1223. tm_trigger = 1;
  1224. return;
  1225. } else {
  1226. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  1227. ("Schedule TxPowerTracking direct call!!\n"));
  1228. rtl92d_dm_txpower_tracking_callback_thermalmeter(hw);
  1229. tm_trigger = 0;
  1230. }
  1231. }
  1232. void rtl92d_dm_init_rate_adaptive_mask(struct ieee80211_hw *hw)
  1233. {
  1234. struct rtl_priv *rtlpriv = rtl_priv(hw);
  1235. struct rate_adaptive *ra = &(rtlpriv->ra);
  1236. ra->ratr_state = DM_RATR_STA_INIT;
  1237. ra->pre_ratr_state = DM_RATR_STA_INIT;
  1238. if (rtlpriv->dm.dm_type == DM_TYPE_BYDRIVER)
  1239. rtlpriv->dm.useramask = true;
  1240. else
  1241. rtlpriv->dm.useramask = false;
  1242. }
  1243. void rtl92d_dm_init(struct ieee80211_hw *hw)
  1244. {
  1245. struct rtl_priv *rtlpriv = rtl_priv(hw);
  1246. rtlpriv->dm.dm_type = DM_TYPE_BYDRIVER;
  1247. rtl92d_dm_diginit(hw);
  1248. rtl92d_dm_init_dynamic_txpower(hw);
  1249. rtl92d_dm_init_edca_turbo(hw);
  1250. rtl92d_dm_init_rate_adaptive_mask(hw);
  1251. rtl92d_dm_initialize_txpower_tracking(hw);
  1252. }
  1253. void rtl92d_dm_watchdog(struct ieee80211_hw *hw)
  1254. {
  1255. struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
  1256. bool fw_current_inpsmode = false;
  1257. bool fwps_awake = true;
  1258. /* 1. RF is OFF. (No need to do DM.)
  1259. * 2. Fw is under power saving mode for FwLPS.
  1260. * (Prevent from SW/FW I/O racing.)
  1261. * 3. IPS workitem is scheduled. (Prevent from IPS sequence
  1262. * to be swapped with DM.
  1263. * 4. RFChangeInProgress is TRUE.
  1264. * (Prevent from broken by IPS/HW/SW Rf off.) */
  1265. if ((ppsc->rfpwr_state == ERFON) && ((!fw_current_inpsmode) &&
  1266. fwps_awake) && (!ppsc->rfchange_inprogress)) {
  1267. rtl92d_dm_pwdb_monitor(hw);
  1268. rtl92d_dm_false_alarm_counter_statistics(hw);
  1269. rtl92d_dm_find_minimum_rssi(hw);
  1270. rtl92d_dm_dig(hw);
  1271. /* rtl92d_dm_dynamic_bb_powersaving(hw); */
  1272. rtl92d_dm_dynamic_txpower(hw);
  1273. /* rtl92d_dm_check_txpower_tracking_thermal_meter(hw); */
  1274. /* rtl92d_dm_refresh_rate_adaptive_mask(hw); */
  1275. /* rtl92d_dm_interrupt_migration(hw); */
  1276. rtl92d_dm_check_edca_turbo(hw);
  1277. }
  1278. }