mac.c 32 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2009-2010 Realtek Corporation. All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program; if not, write to the Free Software Foundation, Inc.,
  16. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17. *
  18. * The full GNU General Public License is included in this distribution in the
  19. * file called LICENSE.
  20. *
  21. * Contact Information:
  22. * wlanfae <wlanfae@realtek.com>
  23. * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  24. * Hsinchu 300, Taiwan.
  25. *
  26. * Larry Finger <Larry.Finger@lwfinger.net>
  27. *
  28. ****************************************************************************/
  29. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  30. #include <linux/module.h>
  31. #include "../wifi.h"
  32. #include "../pci.h"
  33. #include "../usb.h"
  34. #include "../ps.h"
  35. #include "../cam.h"
  36. #include "reg.h"
  37. #include "def.h"
  38. #include "phy.h"
  39. #include "rf.h"
  40. #include "dm.h"
  41. #include "mac.h"
  42. #include "trx.h"
  43. /* macro to shorten lines */
  44. #define LINK_Q ui_link_quality
  45. #define RX_EVM rx_evm_percentage
  46. #define RX_SIGQ rx_mimo_signalquality
  47. void rtl92c_read_chip_version(struct ieee80211_hw *hw)
  48. {
  49. struct rtl_priv *rtlpriv = rtl_priv(hw);
  50. struct rtl_phy *rtlphy = &(rtlpriv->phy);
  51. struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
  52. enum version_8192c chip_version = VERSION_UNKNOWN;
  53. u32 value32;
  54. value32 = rtl_read_dword(rtlpriv, REG_SYS_CFG);
  55. if (value32 & TRP_VAUX_EN) {
  56. chip_version = (value32 & TYPE_ID) ? VERSION_TEST_CHIP_92C :
  57. VERSION_TEST_CHIP_88C;
  58. } else {
  59. /* Normal mass production chip. */
  60. chip_version = NORMAL_CHIP;
  61. chip_version |= ((value32 & TYPE_ID) ? CHIP_92C : 0);
  62. chip_version |= ((value32 & VENDOR_ID) ? CHIP_VENDOR_UMC : 0);
  63. /* RTL8723 with BT function. */
  64. chip_version |= ((value32 & BT_FUNC) ? CHIP_8723 : 0);
  65. if (IS_VENDOR_UMC(chip_version))
  66. chip_version |= ((value32 & CHIP_VER_RTL_MASK) ?
  67. CHIP_VENDOR_UMC_B_CUT : 0);
  68. if (IS_92C_SERIAL(chip_version)) {
  69. value32 = rtl_read_dword(rtlpriv, REG_HPON_FSM);
  70. chip_version |= ((CHIP_BONDING_IDENTIFIER(value32) ==
  71. CHIP_BONDING_92C_1T2R) ? CHIP_92C_1T2R : 0);
  72. } else if (IS_8723_SERIES(chip_version)) {
  73. value32 = rtl_read_dword(rtlpriv, REG_GPIO_OUTSTS);
  74. chip_version |= ((value32 & RF_RL_ID) ?
  75. CHIP_8723_DRV_REV : 0);
  76. }
  77. }
  78. rtlhal->version = (enum version_8192c)chip_version;
  79. switch (rtlhal->version) {
  80. case VERSION_NORMAL_TSMC_CHIP_92C_1T2R:
  81. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  82. ("Chip Version ID: VERSION_B_CHIP_92C.\n"));
  83. break;
  84. case VERSION_NORMAL_TSMC_CHIP_92C:
  85. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  86. ("Chip Version ID: VERSION_NORMAL_TSMC_CHIP_92C.\n"));
  87. break;
  88. case VERSION_NORMAL_TSMC_CHIP_88C:
  89. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  90. ("Chip Version ID: VERSION_NORMAL_TSMC_CHIP_88C.\n"));
  91. break;
  92. case VERSION_NORMAL_UMC_CHIP_92C_1T2R_A_CUT:
  93. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  94. ("Chip Version ID: VERSION_NORMAL_UMC_CHIP_i"
  95. "92C_1T2R_A_CUT.\n"));
  96. break;
  97. case VERSION_NORMAL_UMC_CHIP_92C_A_CUT:
  98. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  99. ("Chip Version ID: VERSION_NORMAL_UMC_CHIP_"
  100. "92C_A_CUT.\n"));
  101. break;
  102. case VERSION_NORMAL_UMC_CHIP_88C_A_CUT:
  103. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  104. ("Chip Version ID: VERSION_NORMAL_UMC_CHIP"
  105. "_88C_A_CUT.\n"));
  106. break;
  107. case VERSION_NORMAL_UMC_CHIP_92C_1T2R_B_CUT:
  108. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  109. ("Chip Version ID: VERSION_NORMAL_UMC_CHIP"
  110. "_92C_1T2R_B_CUT.\n"));
  111. break;
  112. case VERSION_NORMAL_UMC_CHIP_92C_B_CUT:
  113. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  114. ("Chip Version ID: VERSION_NORMAL_UMC_CHIP"
  115. "_92C_B_CUT.\n"));
  116. break;
  117. case VERSION_NORMAL_UMC_CHIP_88C_B_CUT:
  118. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  119. ("Chip Version ID: VERSION_NORMAL_UMC_CHIP"
  120. "_88C_B_CUT.\n"));
  121. break;
  122. case VERSION_NORMA_UMC_CHIP_8723_1T1R_A_CUT:
  123. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  124. ("Chip Version ID: VERSION_NORMA_UMC_CHIP"
  125. "_8723_1T1R_A_CUT.\n"));
  126. break;
  127. case VERSION_NORMA_UMC_CHIP_8723_1T1R_B_CUT:
  128. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  129. ("Chip Version ID: VERSION_NORMA_UMC_CHIP"
  130. "_8723_1T1R_B_CUT.\n"));
  131. break;
  132. case VERSION_TEST_CHIP_92C:
  133. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  134. ("Chip Version ID: VERSION_TEST_CHIP_92C.\n"));
  135. break;
  136. case VERSION_TEST_CHIP_88C:
  137. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  138. ("Chip Version ID: VERSION_TEST_CHIP_88C.\n"));
  139. break;
  140. default:
  141. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  142. ("Chip Version ID: ???????????????.\n"));
  143. break;
  144. }
  145. if (IS_92C_SERIAL(rtlhal->version))
  146. rtlphy->rf_type =
  147. (IS_92C_1T2R(rtlhal->version)) ? RF_1T2R : RF_2T2R;
  148. else
  149. rtlphy->rf_type = RF_1T1R;
  150. RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
  151. ("Chip RF Type: %s\n", (rtlphy->rf_type == RF_2T2R) ?
  152. "RF_2T2R" : "RF_1T1R"));
  153. if (get_rf_type(rtlphy) == RF_1T1R)
  154. rtlpriv->dm.rfpath_rxenable[0] = true;
  155. else
  156. rtlpriv->dm.rfpath_rxenable[0] =
  157. rtlpriv->dm.rfpath_rxenable[1] = true;
  158. RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, ("VersionID = 0x%4x\n",
  159. rtlhal->version));
  160. }
  161. /**
  162. * writeLLT - LLT table write access
  163. * @io: io callback
  164. * @address: LLT logical address.
  165. * @data: LLT data content
  166. *
  167. * Realtek hardware access function.
  168. *
  169. */
  170. bool rtl92c_llt_write(struct ieee80211_hw *hw, u32 address, u32 data)
  171. {
  172. struct rtl_priv *rtlpriv = rtl_priv(hw);
  173. bool status = true;
  174. long count = 0;
  175. u32 value = _LLT_INIT_ADDR(address) |
  176. _LLT_INIT_DATA(data) | _LLT_OP(_LLT_WRITE_ACCESS);
  177. rtl_write_dword(rtlpriv, REG_LLT_INIT, value);
  178. do {
  179. value = rtl_read_dword(rtlpriv, REG_LLT_INIT);
  180. if (_LLT_NO_ACTIVE == _LLT_OP_VALUE(value))
  181. break;
  182. if (count > POLLING_LLT_THRESHOLD) {
  183. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  184. ("Failed to polling write LLT done at"
  185. " address %d! _LLT_OP_VALUE(%x)\n",
  186. address, _LLT_OP_VALUE(value)));
  187. status = false;
  188. break;
  189. }
  190. } while (++count);
  191. return status;
  192. }
  193. /**
  194. * rtl92c_init_LLT_table - Init LLT table
  195. * @io: io callback
  196. * @boundary:
  197. *
  198. * Realtek hardware access function.
  199. *
  200. */
  201. bool rtl92c_init_llt_table(struct ieee80211_hw *hw, u32 boundary)
  202. {
  203. bool rst = true;
  204. u32 i;
  205. for (i = 0; i < (boundary - 1); i++) {
  206. rst = rtl92c_llt_write(hw, i , i + 1);
  207. if (true != rst) {
  208. pr_err("===> %s #1 fail\n", __func__);
  209. return rst;
  210. }
  211. }
  212. /* end of list */
  213. rst = rtl92c_llt_write(hw, (boundary - 1), 0xFF);
  214. if (true != rst) {
  215. pr_err("===> %s #2 fail\n", __func__);
  216. return rst;
  217. }
  218. /* Make the other pages as ring buffer
  219. * This ring buffer is used as beacon buffer if we config this MAC
  220. * as two MAC transfer.
  221. * Otherwise used as local loopback buffer.
  222. */
  223. for (i = boundary; i < LLT_LAST_ENTRY_OF_TX_PKT_BUFFER; i++) {
  224. rst = rtl92c_llt_write(hw, i, (i + 1));
  225. if (true != rst) {
  226. pr_err("===> %s #3 fail\n", __func__);
  227. return rst;
  228. }
  229. }
  230. /* Let last entry point to the start entry of ring buffer */
  231. rst = rtl92c_llt_write(hw, LLT_LAST_ENTRY_OF_TX_PKT_BUFFER, boundary);
  232. if (true != rst) {
  233. pr_err("===> %s #4 fail\n", __func__);
  234. return rst;
  235. }
  236. return rst;
  237. }
  238. void rtl92c_set_key(struct ieee80211_hw *hw, u32 key_index,
  239. u8 *p_macaddr, bool is_group, u8 enc_algo,
  240. bool is_wepkey, bool clear_all)
  241. {
  242. struct rtl_priv *rtlpriv = rtl_priv(hw);
  243. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  244. struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
  245. u8 *macaddr = p_macaddr;
  246. u32 entry_id = 0;
  247. bool is_pairwise = false;
  248. static u8 cam_const_addr[4][6] = {
  249. {0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
  250. {0x00, 0x00, 0x00, 0x00, 0x00, 0x01},
  251. {0x00, 0x00, 0x00, 0x00, 0x00, 0x02},
  252. {0x00, 0x00, 0x00, 0x00, 0x00, 0x03}
  253. };
  254. static u8 cam_const_broad[] = {
  255. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
  256. };
  257. if (clear_all) {
  258. u8 idx = 0;
  259. u8 cam_offset = 0;
  260. u8 clear_number = 5;
  261. RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG, ("clear_all\n"));
  262. for (idx = 0; idx < clear_number; idx++) {
  263. rtl_cam_mark_invalid(hw, cam_offset + idx);
  264. rtl_cam_empty_entry(hw, cam_offset + idx);
  265. if (idx < 5) {
  266. memset(rtlpriv->sec.key_buf[idx], 0,
  267. MAX_KEY_LEN);
  268. rtlpriv->sec.key_len[idx] = 0;
  269. }
  270. }
  271. } else {
  272. switch (enc_algo) {
  273. case WEP40_ENCRYPTION:
  274. enc_algo = CAM_WEP40;
  275. break;
  276. case WEP104_ENCRYPTION:
  277. enc_algo = CAM_WEP104;
  278. break;
  279. case TKIP_ENCRYPTION:
  280. enc_algo = CAM_TKIP;
  281. break;
  282. case AESCCMP_ENCRYPTION:
  283. enc_algo = CAM_AES;
  284. break;
  285. default:
  286. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  287. ("iillegal switch case\n"));
  288. enc_algo = CAM_TKIP;
  289. break;
  290. }
  291. if (is_wepkey || rtlpriv->sec.use_defaultkey) {
  292. macaddr = cam_const_addr[key_index];
  293. entry_id = key_index;
  294. } else {
  295. if (is_group) {
  296. macaddr = cam_const_broad;
  297. entry_id = key_index;
  298. } else {
  299. key_index = PAIRWISE_KEYIDX;
  300. entry_id = CAM_PAIRWISE_KEY_POSITION;
  301. is_pairwise = true;
  302. }
  303. }
  304. if (rtlpriv->sec.key_len[key_index] == 0) {
  305. RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
  306. ("delete one entry\n"));
  307. rtl_cam_delete_one_entry(hw, p_macaddr, entry_id);
  308. } else {
  309. RT_TRACE(rtlpriv, COMP_SEC, DBG_LOUD,
  310. ("The insert KEY length is %d\n",
  311. rtlpriv->sec.key_len[PAIRWISE_KEYIDX]));
  312. RT_TRACE(rtlpriv, COMP_SEC, DBG_LOUD,
  313. ("The insert KEY is %x %x\n",
  314. rtlpriv->sec.key_buf[0][0],
  315. rtlpriv->sec.key_buf[0][1]));
  316. RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
  317. ("add one entry\n"));
  318. if (is_pairwise) {
  319. RT_PRINT_DATA(rtlpriv, COMP_SEC, DBG_LOUD,
  320. "Pairwiase Key content :",
  321. rtlpriv->sec.pairwise_key,
  322. rtlpriv->sec.
  323. key_len[PAIRWISE_KEYIDX]);
  324. RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
  325. ("set Pairwiase key\n"));
  326. rtl_cam_add_one_entry(hw, macaddr, key_index,
  327. entry_id, enc_algo,
  328. CAM_CONFIG_NO_USEDK,
  329. rtlpriv->sec.
  330. key_buf[key_index]);
  331. } else {
  332. RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
  333. ("set group key\n"));
  334. if (mac->opmode == NL80211_IFTYPE_ADHOC) {
  335. rtl_cam_add_one_entry(hw,
  336. rtlefuse->dev_addr,
  337. PAIRWISE_KEYIDX,
  338. CAM_PAIRWISE_KEY_POSITION,
  339. enc_algo,
  340. CAM_CONFIG_NO_USEDK,
  341. rtlpriv->sec.key_buf
  342. [entry_id]);
  343. }
  344. rtl_cam_add_one_entry(hw, macaddr, key_index,
  345. entry_id, enc_algo,
  346. CAM_CONFIG_NO_USEDK,
  347. rtlpriv->sec.key_buf[entry_id]);
  348. }
  349. }
  350. }
  351. }
  352. u32 rtl92c_get_txdma_status(struct ieee80211_hw *hw)
  353. {
  354. struct rtl_priv *rtlpriv = rtl_priv(hw);
  355. return rtl_read_dword(rtlpriv, REG_TXDMA_STATUS);
  356. }
  357. void rtl92c_enable_interrupt(struct ieee80211_hw *hw)
  358. {
  359. struct rtl_priv *rtlpriv = rtl_priv(hw);
  360. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  361. struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  362. struct rtl_usb *rtlusb = rtl_usbdev(rtl_usbpriv(hw));
  363. if (IS_HARDWARE_TYPE_8192CE(rtlhal)) {
  364. rtl_write_dword(rtlpriv, REG_HIMR, rtlpci->irq_mask[0] &
  365. 0xFFFFFFFF);
  366. rtl_write_dword(rtlpriv, REG_HIMRE, rtlpci->irq_mask[1] &
  367. 0xFFFFFFFF);
  368. } else {
  369. rtl_write_dword(rtlpriv, REG_HIMR, rtlusb->irq_mask[0] &
  370. 0xFFFFFFFF);
  371. rtl_write_dword(rtlpriv, REG_HIMRE, rtlusb->irq_mask[1] &
  372. 0xFFFFFFFF);
  373. }
  374. }
  375. void rtl92c_init_interrupt(struct ieee80211_hw *hw)
  376. {
  377. rtl92c_enable_interrupt(hw);
  378. }
  379. void rtl92c_disable_interrupt(struct ieee80211_hw *hw)
  380. {
  381. struct rtl_priv *rtlpriv = rtl_priv(hw);
  382. rtl_write_dword(rtlpriv, REG_HIMR, IMR8190_DISABLED);
  383. rtl_write_dword(rtlpriv, REG_HIMRE, IMR8190_DISABLED);
  384. }
  385. void rtl92c_set_qos(struct ieee80211_hw *hw, int aci)
  386. {
  387. struct rtl_priv *rtlpriv = rtl_priv(hw);
  388. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  389. u32 u4b_ac_param;
  390. rtl92c_dm_init_edca_turbo(hw);
  391. u4b_ac_param = (u32) mac->ac[aci].aifs;
  392. u4b_ac_param |=
  393. ((u32) le16_to_cpu(mac->ac[aci].cw_min) & 0xF) <<
  394. AC_PARAM_ECW_MIN_OFFSET;
  395. u4b_ac_param |=
  396. ((u32) le16_to_cpu(mac->ac[aci].cw_max) & 0xF) <<
  397. AC_PARAM_ECW_MAX_OFFSET;
  398. u4b_ac_param |= (u32) le16_to_cpu(mac->ac[aci].tx_op) <<
  399. AC_PARAM_TXOP_OFFSET;
  400. RT_TRACE(rtlpriv, COMP_QOS, DBG_LOUD,
  401. ("queue:%x, ac_param:%x\n", aci, u4b_ac_param));
  402. switch (aci) {
  403. case AC1_BK:
  404. rtl_write_dword(rtlpriv, REG_EDCA_BK_PARAM, u4b_ac_param);
  405. break;
  406. case AC0_BE:
  407. rtl_write_dword(rtlpriv, REG_EDCA_BE_PARAM, u4b_ac_param);
  408. break;
  409. case AC2_VI:
  410. rtl_write_dword(rtlpriv, REG_EDCA_VI_PARAM, u4b_ac_param);
  411. break;
  412. case AC3_VO:
  413. rtl_write_dword(rtlpriv, REG_EDCA_VO_PARAM, u4b_ac_param);
  414. break;
  415. default:
  416. RT_ASSERT(false, ("invalid aci: %d !\n", aci));
  417. break;
  418. }
  419. }
  420. /*-------------------------------------------------------------------------
  421. * HW MAC Address
  422. *-------------------------------------------------------------------------*/
  423. void rtl92c_set_mac_addr(struct ieee80211_hw *hw, const u8 *addr)
  424. {
  425. u32 i;
  426. struct rtl_priv *rtlpriv = rtl_priv(hw);
  427. for (i = 0 ; i < ETH_ALEN ; i++)
  428. rtl_write_byte(rtlpriv, (REG_MACID + i), *(addr+i));
  429. RT_TRACE(rtlpriv, COMP_CMD, DBG_DMESG, ("MAC Address: %02X-%02X-%02X-"
  430. "%02X-%02X-%02X\n",
  431. rtl_read_byte(rtlpriv, REG_MACID),
  432. rtl_read_byte(rtlpriv, REG_MACID+1),
  433. rtl_read_byte(rtlpriv, REG_MACID+2),
  434. rtl_read_byte(rtlpriv, REG_MACID+3),
  435. rtl_read_byte(rtlpriv, REG_MACID+4),
  436. rtl_read_byte(rtlpriv, REG_MACID+5)));
  437. }
  438. void rtl92c_init_driver_info_size(struct ieee80211_hw *hw, u8 size)
  439. {
  440. struct rtl_priv *rtlpriv = rtl_priv(hw);
  441. rtl_write_byte(rtlpriv, REG_RX_DRVINFO_SZ, size);
  442. }
  443. int rtl92c_set_network_type(struct ieee80211_hw *hw, enum nl80211_iftype type)
  444. {
  445. u8 value;
  446. struct rtl_priv *rtlpriv = rtl_priv(hw);
  447. switch (type) {
  448. case NL80211_IFTYPE_UNSPECIFIED:
  449. value = NT_NO_LINK;
  450. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
  451. ("Set Network type to NO LINK!\n"));
  452. break;
  453. case NL80211_IFTYPE_ADHOC:
  454. value = NT_LINK_AD_HOC;
  455. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
  456. ("Set Network type to Ad Hoc!\n"));
  457. break;
  458. case NL80211_IFTYPE_STATION:
  459. value = NT_LINK_AP;
  460. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
  461. ("Set Network type to STA!\n"));
  462. break;
  463. case NL80211_IFTYPE_AP:
  464. value = NT_AS_AP;
  465. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
  466. ("Set Network type to AP!\n"));
  467. break;
  468. default:
  469. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
  470. ("Network type %d not support!\n", type));
  471. return -EOPNOTSUPP;
  472. }
  473. rtl_write_byte(rtlpriv, (REG_CR + 2), value);
  474. return 0;
  475. }
  476. void rtl92c_init_network_type(struct ieee80211_hw *hw)
  477. {
  478. rtl92c_set_network_type(hw, NL80211_IFTYPE_UNSPECIFIED);
  479. }
  480. void rtl92c_init_adaptive_ctrl(struct ieee80211_hw *hw)
  481. {
  482. u16 value16;
  483. u32 value32;
  484. struct rtl_priv *rtlpriv = rtl_priv(hw);
  485. /* Response Rate Set */
  486. value32 = rtl_read_dword(rtlpriv, REG_RRSR);
  487. value32 &= ~RATE_BITMAP_ALL;
  488. value32 |= RATE_RRSR_CCK_ONLY_1M;
  489. rtl_write_dword(rtlpriv, REG_RRSR, value32);
  490. /* SIFS (used in NAV) */
  491. value16 = _SPEC_SIFS_CCK(0x10) | _SPEC_SIFS_OFDM(0x10);
  492. rtl_write_word(rtlpriv, REG_SPEC_SIFS, value16);
  493. /* Retry Limit */
  494. value16 = _LRL(0x30) | _SRL(0x30);
  495. rtl_write_dword(rtlpriv, REG_RL, value16);
  496. }
  497. void rtl92c_init_rate_fallback(struct ieee80211_hw *hw)
  498. {
  499. struct rtl_priv *rtlpriv = rtl_priv(hw);
  500. /* Set Data Auto Rate Fallback Retry Count register. */
  501. rtl_write_dword(rtlpriv, REG_DARFRC, 0x00000000);
  502. rtl_write_dword(rtlpriv, REG_DARFRC+4, 0x10080404);
  503. rtl_write_dword(rtlpriv, REG_RARFRC, 0x04030201);
  504. rtl_write_dword(rtlpriv, REG_RARFRC+4, 0x08070605);
  505. }
  506. static void rtl92c_set_cck_sifs(struct ieee80211_hw *hw, u8 trx_sifs,
  507. u8 ctx_sifs)
  508. {
  509. struct rtl_priv *rtlpriv = rtl_priv(hw);
  510. rtl_write_byte(rtlpriv, REG_SIFS_CCK, trx_sifs);
  511. rtl_write_byte(rtlpriv, (REG_SIFS_CCK + 1), ctx_sifs);
  512. }
  513. static void rtl92c_set_ofdm_sifs(struct ieee80211_hw *hw, u8 trx_sifs,
  514. u8 ctx_sifs)
  515. {
  516. struct rtl_priv *rtlpriv = rtl_priv(hw);
  517. rtl_write_byte(rtlpriv, REG_SIFS_OFDM, trx_sifs);
  518. rtl_write_byte(rtlpriv, (REG_SIFS_OFDM + 1), ctx_sifs);
  519. }
  520. void rtl92c_init_edca_param(struct ieee80211_hw *hw,
  521. u16 queue, u16 txop, u8 cw_min, u8 cw_max, u8 aifs)
  522. {
  523. /* sequence: VO, VI, BE, BK ==> the same as 92C hardware design.
  524. * referenc : enum nl80211_txq_q or ieee80211_set_wmm_default function.
  525. */
  526. u32 value;
  527. struct rtl_priv *rtlpriv = rtl_priv(hw);
  528. value = (u32)aifs;
  529. value |= ((u32)cw_min & 0xF) << 8;
  530. value |= ((u32)cw_max & 0xF) << 12;
  531. value |= (u32)txop << 16;
  532. /* 92C hardware register sequence is the same as queue number. */
  533. rtl_write_dword(rtlpriv, (REG_EDCA_VO_PARAM + (queue * 4)), value);
  534. }
  535. void rtl92c_init_edca(struct ieee80211_hw *hw)
  536. {
  537. u16 value16;
  538. struct rtl_priv *rtlpriv = rtl_priv(hw);
  539. /* disable EDCCA count down, to reduce collison and retry */
  540. value16 = rtl_read_word(rtlpriv, REG_RD_CTRL);
  541. value16 |= DIS_EDCA_CNT_DWN;
  542. rtl_write_word(rtlpriv, REG_RD_CTRL, value16);
  543. /* Update SIFS timing. ??????????
  544. * pHalData->SifsTime = 0x0e0e0a0a; */
  545. rtl92c_set_cck_sifs(hw, 0xa, 0xa);
  546. rtl92c_set_ofdm_sifs(hw, 0xe, 0xe);
  547. /* Set CCK/OFDM SIFS to be 10us. */
  548. rtl_write_word(rtlpriv, REG_SIFS_CCK, 0x0a0a);
  549. rtl_write_word(rtlpriv, REG_SIFS_OFDM, 0x1010);
  550. rtl_write_word(rtlpriv, REG_PROT_MODE_CTRL, 0x0204);
  551. rtl_write_dword(rtlpriv, REG_BAR_MODE_CTRL, 0x014004);
  552. /* TXOP */
  553. rtl_write_dword(rtlpriv, REG_EDCA_BE_PARAM, 0x005EA42B);
  554. rtl_write_dword(rtlpriv, REG_EDCA_BK_PARAM, 0x0000A44F);
  555. rtl_write_dword(rtlpriv, REG_EDCA_VI_PARAM, 0x005EA324);
  556. rtl_write_dword(rtlpriv, REG_EDCA_VO_PARAM, 0x002FA226);
  557. /* PIFS */
  558. rtl_write_byte(rtlpriv, REG_PIFS, 0x1C);
  559. /* AGGR BREAK TIME Register */
  560. rtl_write_byte(rtlpriv, REG_AGGR_BREAK_TIME, 0x16);
  561. rtl_write_word(rtlpriv, REG_NAV_PROT_LEN, 0x0040);
  562. rtl_write_byte(rtlpriv, REG_BCNDMATIM, 0x02);
  563. rtl_write_byte(rtlpriv, REG_ATIMWND, 0x02);
  564. }
  565. void rtl92c_init_ampdu_aggregation(struct ieee80211_hw *hw)
  566. {
  567. struct rtl_priv *rtlpriv = rtl_priv(hw);
  568. rtl_write_dword(rtlpriv, REG_AGGLEN_LMT, 0x99997631);
  569. rtl_write_byte(rtlpriv, REG_AGGR_BREAK_TIME, 0x16);
  570. /* init AMPDU aggregation number, tuning for Tx's TP, */
  571. rtl_write_word(rtlpriv, 0x4CA, 0x0708);
  572. }
  573. void rtl92c_init_beacon_max_error(struct ieee80211_hw *hw, bool infra_mode)
  574. {
  575. struct rtl_priv *rtlpriv = rtl_priv(hw);
  576. rtl_write_byte(rtlpriv, REG_BCN_MAX_ERR, 0xFF);
  577. }
  578. void rtl92c_init_rdg_setting(struct ieee80211_hw *hw)
  579. {
  580. struct rtl_priv *rtlpriv = rtl_priv(hw);
  581. rtl_write_byte(rtlpriv, REG_RD_CTRL, 0xFF);
  582. rtl_write_word(rtlpriv, REG_RD_NAV_NXT, 0x200);
  583. rtl_write_byte(rtlpriv, REG_RD_RESP_PKT_TH, 0x05);
  584. }
  585. void rtl92c_init_retry_function(struct ieee80211_hw *hw)
  586. {
  587. u8 value8;
  588. struct rtl_priv *rtlpriv = rtl_priv(hw);
  589. value8 = rtl_read_byte(rtlpriv, REG_FWHW_TXQ_CTRL);
  590. value8 |= EN_AMPDU_RTY_NEW;
  591. rtl_write_byte(rtlpriv, REG_FWHW_TXQ_CTRL, value8);
  592. /* Set ACK timeout */
  593. rtl_write_byte(rtlpriv, REG_ACKTO, 0x40);
  594. }
  595. void rtl92c_init_beacon_parameters(struct ieee80211_hw *hw,
  596. enum version_8192c version)
  597. {
  598. struct rtl_priv *rtlpriv = rtl_priv(hw);
  599. struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
  600. rtl_write_word(rtlpriv, REG_TBTT_PROHIBIT, 0x6404);/* ms */
  601. rtl_write_byte(rtlpriv, REG_DRVERLYINT, DRIVER_EARLY_INT_TIME);/*ms*/
  602. rtl_write_byte(rtlpriv, REG_BCNDMATIM, BCN_DMA_ATIME_INT_TIME);
  603. if (IS_NORMAL_CHIP(rtlhal->version))
  604. rtl_write_word(rtlpriv, REG_BCNTCFG, 0x660F);
  605. else
  606. rtl_write_word(rtlpriv, REG_BCNTCFG, 0x66FF);
  607. }
  608. void rtl92c_disable_fast_edca(struct ieee80211_hw *hw)
  609. {
  610. struct rtl_priv *rtlpriv = rtl_priv(hw);
  611. rtl_write_word(rtlpriv, REG_FAST_EDCA_CTRL, 0);
  612. }
  613. void rtl92c_set_min_space(struct ieee80211_hw *hw, bool is2T)
  614. {
  615. struct rtl_priv *rtlpriv = rtl_priv(hw);
  616. u8 value = is2T ? MAX_MSS_DENSITY_2T : MAX_MSS_DENSITY_1T;
  617. rtl_write_byte(rtlpriv, REG_AMPDU_MIN_SPACE, value);
  618. }
  619. u16 rtl92c_get_mgt_filter(struct ieee80211_hw *hw)
  620. {
  621. struct rtl_priv *rtlpriv = rtl_priv(hw);
  622. return rtl_read_word(rtlpriv, REG_RXFLTMAP0);
  623. }
  624. void rtl92c_set_mgt_filter(struct ieee80211_hw *hw, u16 filter)
  625. {
  626. struct rtl_priv *rtlpriv = rtl_priv(hw);
  627. rtl_write_word(rtlpriv, REG_RXFLTMAP0, filter);
  628. }
  629. u16 rtl92c_get_ctrl_filter(struct ieee80211_hw *hw)
  630. {
  631. struct rtl_priv *rtlpriv = rtl_priv(hw);
  632. return rtl_read_word(rtlpriv, REG_RXFLTMAP1);
  633. }
  634. void rtl92c_set_ctrl_filter(struct ieee80211_hw *hw, u16 filter)
  635. {
  636. struct rtl_priv *rtlpriv = rtl_priv(hw);
  637. rtl_write_word(rtlpriv, REG_RXFLTMAP1, filter);
  638. }
  639. u16 rtl92c_get_data_filter(struct ieee80211_hw *hw)
  640. {
  641. struct rtl_priv *rtlpriv = rtl_priv(hw);
  642. return rtl_read_word(rtlpriv, REG_RXFLTMAP2);
  643. }
  644. void rtl92c_set_data_filter(struct ieee80211_hw *hw, u16 filter)
  645. {
  646. struct rtl_priv *rtlpriv = rtl_priv(hw);
  647. rtl_write_word(rtlpriv, REG_RXFLTMAP2, filter);
  648. }
  649. /*==============================================================*/
  650. static u8 _rtl92c_query_rxpwrpercentage(char antpower)
  651. {
  652. if ((antpower <= -100) || (antpower >= 20))
  653. return 0;
  654. else if (antpower >= 0)
  655. return 100;
  656. else
  657. return 100 + antpower;
  658. }
  659. static u8 _rtl92c_evm_db_to_percentage(char value)
  660. {
  661. char ret_val;
  662. ret_val = value;
  663. if (ret_val >= 0)
  664. ret_val = 0;
  665. if (ret_val <= -33)
  666. ret_val = -33;
  667. ret_val = 0 - ret_val;
  668. ret_val *= 3;
  669. if (ret_val == 99)
  670. ret_val = 100;
  671. return ret_val;
  672. }
  673. static long _rtl92c_translate_todbm(struct ieee80211_hw *hw,
  674. u8 signal_strength_index)
  675. {
  676. long signal_power;
  677. signal_power = (long)((signal_strength_index + 1) >> 1);
  678. signal_power -= 95;
  679. return signal_power;
  680. }
  681. static long _rtl92c_signal_scale_mapping(struct ieee80211_hw *hw,
  682. long currsig)
  683. {
  684. long retsig;
  685. if (currsig >= 61 && currsig <= 100)
  686. retsig = 90 + ((currsig - 60) / 4);
  687. else if (currsig >= 41 && currsig <= 60)
  688. retsig = 78 + ((currsig - 40) / 2);
  689. else if (currsig >= 31 && currsig <= 40)
  690. retsig = 66 + (currsig - 30);
  691. else if (currsig >= 21 && currsig <= 30)
  692. retsig = 54 + (currsig - 20);
  693. else if (currsig >= 5 && currsig <= 20)
  694. retsig = 42 + (((currsig - 5) * 2) / 3);
  695. else if (currsig == 4)
  696. retsig = 36;
  697. else if (currsig == 3)
  698. retsig = 27;
  699. else if (currsig == 2)
  700. retsig = 18;
  701. else if (currsig == 1)
  702. retsig = 9;
  703. else
  704. retsig = currsig;
  705. return retsig;
  706. }
  707. static void _rtl92c_query_rxphystatus(struct ieee80211_hw *hw,
  708. struct rtl_stats *pstats,
  709. struct rx_desc_92c *pdesc,
  710. struct rx_fwinfo_92c *p_drvinfo,
  711. bool packet_match_bssid,
  712. bool packet_toself,
  713. bool packet_beacon)
  714. {
  715. struct rtl_priv *rtlpriv = rtl_priv(hw);
  716. struct rtl_phy *rtlphy = &(rtlpriv->phy);
  717. struct phy_sts_cck_8192s_t *cck_buf;
  718. s8 rx_pwr_all = 0, rx_pwr[4];
  719. u8 rf_rx_num = 0, evm, pwdb_all;
  720. u8 i, max_spatial_stream;
  721. u32 rssi, total_rssi = 0;
  722. bool in_powersavemode = false;
  723. bool is_cck_rate;
  724. is_cck_rate = RX_HAL_IS_CCK_RATE(pdesc);
  725. pstats->packet_matchbssid = packet_match_bssid;
  726. pstats->packet_toself = packet_toself;
  727. pstats->is_cck = is_cck_rate;
  728. pstats->packet_beacon = packet_beacon;
  729. pstats->is_cck = is_cck_rate;
  730. pstats->RX_SIGQ[0] = -1;
  731. pstats->RX_SIGQ[1] = -1;
  732. if (is_cck_rate) {
  733. u8 report, cck_highpwr;
  734. cck_buf = (struct phy_sts_cck_8192s_t *)p_drvinfo;
  735. if (!in_powersavemode)
  736. cck_highpwr = rtlphy->cck_high_power;
  737. else
  738. cck_highpwr = false;
  739. if (!cck_highpwr) {
  740. u8 cck_agc_rpt = cck_buf->cck_agc_rpt;
  741. report = cck_buf->cck_agc_rpt & 0xc0;
  742. report = report >> 6;
  743. switch (report) {
  744. case 0x3:
  745. rx_pwr_all = -46 - (cck_agc_rpt & 0x3e);
  746. break;
  747. case 0x2:
  748. rx_pwr_all = -26 - (cck_agc_rpt & 0x3e);
  749. break;
  750. case 0x1:
  751. rx_pwr_all = -12 - (cck_agc_rpt & 0x3e);
  752. break;
  753. case 0x0:
  754. rx_pwr_all = 16 - (cck_agc_rpt & 0x3e);
  755. break;
  756. }
  757. } else {
  758. u8 cck_agc_rpt = cck_buf->cck_agc_rpt;
  759. report = p_drvinfo->cfosho[0] & 0x60;
  760. report = report >> 5;
  761. switch (report) {
  762. case 0x3:
  763. rx_pwr_all = -46 - ((cck_agc_rpt & 0x1f) << 1);
  764. break;
  765. case 0x2:
  766. rx_pwr_all = -26 - ((cck_agc_rpt & 0x1f) << 1);
  767. break;
  768. case 0x1:
  769. rx_pwr_all = -12 - ((cck_agc_rpt & 0x1f) << 1);
  770. break;
  771. case 0x0:
  772. rx_pwr_all = 16 - ((cck_agc_rpt & 0x1f) << 1);
  773. break;
  774. }
  775. }
  776. pwdb_all = _rtl92c_query_rxpwrpercentage(rx_pwr_all);
  777. pstats->rx_pwdb_all = pwdb_all;
  778. pstats->recvsignalpower = rx_pwr_all;
  779. if (packet_match_bssid) {
  780. u8 sq;
  781. if (pstats->rx_pwdb_all > 40)
  782. sq = 100;
  783. else {
  784. sq = cck_buf->sq_rpt;
  785. if (sq > 64)
  786. sq = 0;
  787. else if (sq < 20)
  788. sq = 100;
  789. else
  790. sq = ((64 - sq) * 100) / 44;
  791. }
  792. pstats->signalquality = sq;
  793. pstats->RX_SIGQ[0] = sq;
  794. pstats->RX_SIGQ[1] = -1;
  795. }
  796. } else {
  797. rtlpriv->dm.rfpath_rxenable[0] =
  798. rtlpriv->dm.rfpath_rxenable[1] = true;
  799. for (i = RF90_PATH_A; i < RF90_PATH_MAX; i++) {
  800. if (rtlpriv->dm.rfpath_rxenable[i])
  801. rf_rx_num++;
  802. rx_pwr[i] =
  803. ((p_drvinfo->gain_trsw[i] & 0x3f) * 2) - 110;
  804. rssi = _rtl92c_query_rxpwrpercentage(rx_pwr[i]);
  805. total_rssi += rssi;
  806. rtlpriv->stats.rx_snr_db[i] =
  807. (long)(p_drvinfo->rxsnr[i] / 2);
  808. if (packet_match_bssid)
  809. pstats->rx_mimo_signalstrength[i] = (u8) rssi;
  810. }
  811. rx_pwr_all = ((p_drvinfo->pwdb_all >> 1) & 0x7f) - 110;
  812. pwdb_all = _rtl92c_query_rxpwrpercentage(rx_pwr_all);
  813. pstats->rx_pwdb_all = pwdb_all;
  814. pstats->rxpower = rx_pwr_all;
  815. pstats->recvsignalpower = rx_pwr_all;
  816. if (GET_RX_DESC_RX_MCS(pdesc) &&
  817. GET_RX_DESC_RX_MCS(pdesc) >= DESC92C_RATEMCS8 &&
  818. GET_RX_DESC_RX_MCS(pdesc) <= DESC92C_RATEMCS15)
  819. max_spatial_stream = 2;
  820. else
  821. max_spatial_stream = 1;
  822. for (i = 0; i < max_spatial_stream; i++) {
  823. evm = _rtl92c_evm_db_to_percentage(p_drvinfo->rxevm[i]);
  824. if (packet_match_bssid) {
  825. if (i == 0)
  826. pstats->signalquality =
  827. (u8) (evm & 0xff);
  828. pstats->RX_SIGQ[i] =
  829. (u8) (evm & 0xff);
  830. }
  831. }
  832. }
  833. if (is_cck_rate)
  834. pstats->signalstrength =
  835. (u8) (_rtl92c_signal_scale_mapping(hw, pwdb_all));
  836. else if (rf_rx_num != 0)
  837. pstats->signalstrength =
  838. (u8) (_rtl92c_signal_scale_mapping
  839. (hw, total_rssi /= rf_rx_num));
  840. }
  841. static void _rtl92c_process_ui_rssi(struct ieee80211_hw *hw,
  842. struct rtl_stats *pstats)
  843. {
  844. struct rtl_priv *rtlpriv = rtl_priv(hw);
  845. struct rtl_phy *rtlphy = &(rtlpriv->phy);
  846. u8 rfpath;
  847. u32 last_rssi, tmpval;
  848. if (pstats->packet_toself || pstats->packet_beacon) {
  849. rtlpriv->stats.rssi_calculate_cnt++;
  850. if (rtlpriv->stats.ui_rssi.total_num++ >=
  851. PHY_RSSI_SLID_WIN_MAX) {
  852. rtlpriv->stats.ui_rssi.total_num =
  853. PHY_RSSI_SLID_WIN_MAX;
  854. last_rssi =
  855. rtlpriv->stats.ui_rssi.elements[rtlpriv->
  856. stats.ui_rssi.index];
  857. rtlpriv->stats.ui_rssi.total_val -= last_rssi;
  858. }
  859. rtlpriv->stats.ui_rssi.total_val += pstats->signalstrength;
  860. rtlpriv->stats.ui_rssi.elements[rtlpriv->stats.ui_rssi.
  861. index++] = pstats->signalstrength;
  862. if (rtlpriv->stats.ui_rssi.index >= PHY_RSSI_SLID_WIN_MAX)
  863. rtlpriv->stats.ui_rssi.index = 0;
  864. tmpval = rtlpriv->stats.ui_rssi.total_val /
  865. rtlpriv->stats.ui_rssi.total_num;
  866. rtlpriv->stats.signal_strength =
  867. _rtl92c_translate_todbm(hw, (u8) tmpval);
  868. pstats->rssi = rtlpriv->stats.signal_strength;
  869. }
  870. if (!pstats->is_cck && pstats->packet_toself) {
  871. for (rfpath = RF90_PATH_A; rfpath < rtlphy->num_total_rfpath;
  872. rfpath++) {
  873. if (!rtl8192_phy_check_is_legal_rfpath(hw, rfpath))
  874. continue;
  875. if (rtlpriv->stats.rx_rssi_percentage[rfpath] == 0) {
  876. rtlpriv->stats.rx_rssi_percentage[rfpath] =
  877. pstats->rx_mimo_signalstrength[rfpath];
  878. }
  879. if (pstats->rx_mimo_signalstrength[rfpath] >
  880. rtlpriv->stats.rx_rssi_percentage[rfpath]) {
  881. rtlpriv->stats.rx_rssi_percentage[rfpath] =
  882. ((rtlpriv->stats.
  883. rx_rssi_percentage[rfpath] *
  884. (RX_SMOOTH_FACTOR - 1)) +
  885. (pstats->rx_mimo_signalstrength[rfpath])) /
  886. (RX_SMOOTH_FACTOR);
  887. rtlpriv->stats.rx_rssi_percentage[rfpath] =
  888. rtlpriv->stats.rx_rssi_percentage[rfpath] +
  889. 1;
  890. } else {
  891. rtlpriv->stats.rx_rssi_percentage[rfpath] =
  892. ((rtlpriv->stats.
  893. rx_rssi_percentage[rfpath] *
  894. (RX_SMOOTH_FACTOR - 1)) +
  895. (pstats->rx_mimo_signalstrength[rfpath])) /
  896. (RX_SMOOTH_FACTOR);
  897. }
  898. }
  899. }
  900. }
  901. static void _rtl92c_update_rxsignalstatistics(struct ieee80211_hw *hw,
  902. struct rtl_stats *pstats)
  903. {
  904. struct rtl_priv *rtlpriv = rtl_priv(hw);
  905. int weighting = 0;
  906. if (rtlpriv->stats.recv_signal_power == 0)
  907. rtlpriv->stats.recv_signal_power = pstats->recvsignalpower;
  908. if (pstats->recvsignalpower > rtlpriv->stats.recv_signal_power)
  909. weighting = 5;
  910. else if (pstats->recvsignalpower < rtlpriv->stats.recv_signal_power)
  911. weighting = (-5);
  912. rtlpriv->stats.recv_signal_power =
  913. (rtlpriv->stats.recv_signal_power * 5 +
  914. pstats->recvsignalpower + weighting) / 6;
  915. }
  916. static void _rtl92c_process_pwdb(struct ieee80211_hw *hw,
  917. struct rtl_stats *pstats)
  918. {
  919. struct rtl_priv *rtlpriv = rtl_priv(hw);
  920. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  921. long undecorated_smoothed_pwdb = 0;
  922. if (mac->opmode == NL80211_IFTYPE_ADHOC) {
  923. return;
  924. } else {
  925. undecorated_smoothed_pwdb =
  926. rtlpriv->dm.undecorated_smoothed_pwdb;
  927. }
  928. if (pstats->packet_toself || pstats->packet_beacon) {
  929. if (undecorated_smoothed_pwdb < 0)
  930. undecorated_smoothed_pwdb = pstats->rx_pwdb_all;
  931. if (pstats->rx_pwdb_all > (u32) undecorated_smoothed_pwdb) {
  932. undecorated_smoothed_pwdb =
  933. (((undecorated_smoothed_pwdb) *
  934. (RX_SMOOTH_FACTOR - 1)) +
  935. (pstats->rx_pwdb_all)) / (RX_SMOOTH_FACTOR);
  936. undecorated_smoothed_pwdb = undecorated_smoothed_pwdb
  937. + 1;
  938. } else {
  939. undecorated_smoothed_pwdb =
  940. (((undecorated_smoothed_pwdb) *
  941. (RX_SMOOTH_FACTOR - 1)) +
  942. (pstats->rx_pwdb_all)) / (RX_SMOOTH_FACTOR);
  943. }
  944. rtlpriv->dm.undecorated_smoothed_pwdb =
  945. undecorated_smoothed_pwdb;
  946. _rtl92c_update_rxsignalstatistics(hw, pstats);
  947. }
  948. }
  949. static void _rtl92c_process_LINK_Q(struct ieee80211_hw *hw,
  950. struct rtl_stats *pstats)
  951. {
  952. struct rtl_priv *rtlpriv = rtl_priv(hw);
  953. u32 last_evm = 0, n_stream, tmpval;
  954. if (pstats->signalquality != 0) {
  955. if (pstats->packet_toself || pstats->packet_beacon) {
  956. if (rtlpriv->stats.LINK_Q.total_num++ >=
  957. PHY_LINKQUALITY_SLID_WIN_MAX) {
  958. rtlpriv->stats.LINK_Q.total_num =
  959. PHY_LINKQUALITY_SLID_WIN_MAX;
  960. last_evm =
  961. rtlpriv->stats.LINK_Q.elements
  962. [rtlpriv->stats.LINK_Q.index];
  963. rtlpriv->stats.LINK_Q.total_val -=
  964. last_evm;
  965. }
  966. rtlpriv->stats.LINK_Q.total_val +=
  967. pstats->signalquality;
  968. rtlpriv->stats.LINK_Q.elements
  969. [rtlpriv->stats.LINK_Q.index++] =
  970. pstats->signalquality;
  971. if (rtlpriv->stats.LINK_Q.index >=
  972. PHY_LINKQUALITY_SLID_WIN_MAX)
  973. rtlpriv->stats.LINK_Q.index = 0;
  974. tmpval = rtlpriv->stats.LINK_Q.total_val /
  975. rtlpriv->stats.LINK_Q.total_num;
  976. rtlpriv->stats.signal_quality = tmpval;
  977. rtlpriv->stats.last_sigstrength_inpercent = tmpval;
  978. for (n_stream = 0; n_stream < 2;
  979. n_stream++) {
  980. if (pstats->RX_SIGQ[n_stream] != -1) {
  981. if (!rtlpriv->stats.RX_EVM[n_stream]) {
  982. rtlpriv->stats.RX_EVM[n_stream]
  983. = pstats->RX_SIGQ[n_stream];
  984. }
  985. rtlpriv->stats.RX_EVM[n_stream] =
  986. ((rtlpriv->stats.RX_EVM
  987. [n_stream] *
  988. (RX_SMOOTH_FACTOR - 1)) +
  989. (pstats->RX_SIGQ
  990. [n_stream] * 1)) /
  991. (RX_SMOOTH_FACTOR);
  992. }
  993. }
  994. }
  995. } else {
  996. ;
  997. }
  998. }
  999. static void _rtl92c_process_phyinfo(struct ieee80211_hw *hw,
  1000. u8 *buffer,
  1001. struct rtl_stats *pcurrent_stats)
  1002. {
  1003. if (!pcurrent_stats->packet_matchbssid &&
  1004. !pcurrent_stats->packet_beacon)
  1005. return;
  1006. _rtl92c_process_ui_rssi(hw, pcurrent_stats);
  1007. _rtl92c_process_pwdb(hw, pcurrent_stats);
  1008. _rtl92c_process_LINK_Q(hw, pcurrent_stats);
  1009. }
  1010. void rtl92c_translate_rx_signal_stuff(struct ieee80211_hw *hw,
  1011. struct sk_buff *skb,
  1012. struct rtl_stats *pstats,
  1013. struct rx_desc_92c *pdesc,
  1014. struct rx_fwinfo_92c *p_drvinfo)
  1015. {
  1016. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  1017. struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
  1018. struct ieee80211_hdr *hdr;
  1019. u8 *tmp_buf;
  1020. u8 *praddr;
  1021. __le16 fc;
  1022. u16 type, cpu_fc;
  1023. bool packet_matchbssid, packet_toself, packet_beacon;
  1024. tmp_buf = skb->data + pstats->rx_drvinfo_size + pstats->rx_bufshift;
  1025. hdr = (struct ieee80211_hdr *)tmp_buf;
  1026. fc = hdr->frame_control;
  1027. cpu_fc = le16_to_cpu(fc);
  1028. type = WLAN_FC_GET_TYPE(fc);
  1029. praddr = hdr->addr1;
  1030. packet_matchbssid =
  1031. ((IEEE80211_FTYPE_CTL != type) &&
  1032. (!compare_ether_addr(mac->bssid,
  1033. (cpu_fc & IEEE80211_FCTL_TODS) ?
  1034. hdr->addr1 : (cpu_fc & IEEE80211_FCTL_FROMDS) ?
  1035. hdr->addr2 : hdr->addr3)) &&
  1036. (!pstats->hwerror) && (!pstats->crc) && (!pstats->icv));
  1037. packet_toself = packet_matchbssid &&
  1038. (!compare_ether_addr(praddr, rtlefuse->dev_addr));
  1039. if (ieee80211_is_beacon(fc))
  1040. packet_beacon = true;
  1041. _rtl92c_query_rxphystatus(hw, pstats, pdesc, p_drvinfo,
  1042. packet_matchbssid, packet_toself,
  1043. packet_beacon);
  1044. _rtl92c_process_phyinfo(hw, tmp_buf, pstats);
  1045. }