fw_common.c 23 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2009-2010 Realtek Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program; if not, write to the Free Software Foundation, Inc.,
  16. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17. *
  18. * The full GNU General Public License is included in this distribution in the
  19. * file called LICENSE.
  20. *
  21. * Contact Information:
  22. * wlanfae <wlanfae@realtek.com>
  23. * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  24. * Hsinchu 300, Taiwan.
  25. *
  26. * Larry Finger <Larry.Finger@lwfinger.net>
  27. *
  28. *****************************************************************************/
  29. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  30. #include <linux/firmware.h>
  31. #include "../wifi.h"
  32. #include "../pci.h"
  33. #include "../base.h"
  34. #include "../rtl8192ce/reg.h"
  35. #include "../rtl8192ce/def.h"
  36. #include "fw_common.h"
  37. static void _rtl92c_enable_fw_download(struct ieee80211_hw *hw, bool enable)
  38. {
  39. struct rtl_priv *rtlpriv = rtl_priv(hw);
  40. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  41. if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192CU) {
  42. u32 value32 = rtl_read_dword(rtlpriv, REG_MCUFWDL);
  43. if (enable)
  44. value32 |= MCUFWDL_EN;
  45. else
  46. value32 &= ~MCUFWDL_EN;
  47. rtl_write_dword(rtlpriv, REG_MCUFWDL, value32);
  48. } else if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192CE) {
  49. u8 tmp;
  50. if (enable) {
  51. tmp = rtl_read_byte(rtlpriv, REG_SYS_FUNC_EN + 1);
  52. rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN + 1,
  53. tmp | 0x04);
  54. tmp = rtl_read_byte(rtlpriv, REG_MCUFWDL);
  55. rtl_write_byte(rtlpriv, REG_MCUFWDL, tmp | 0x01);
  56. tmp = rtl_read_byte(rtlpriv, REG_MCUFWDL + 2);
  57. rtl_write_byte(rtlpriv, REG_MCUFWDL + 2, tmp & 0xf7);
  58. } else {
  59. tmp = rtl_read_byte(rtlpriv, REG_MCUFWDL);
  60. rtl_write_byte(rtlpriv, REG_MCUFWDL, tmp & 0xfe);
  61. rtl_write_byte(rtlpriv, REG_MCUFWDL + 1, 0x00);
  62. }
  63. }
  64. }
  65. static void _rtl92c_fw_block_write(struct ieee80211_hw *hw,
  66. const u8 *buffer, u32 size)
  67. {
  68. struct rtl_priv *rtlpriv = rtl_priv(hw);
  69. u32 blockSize = sizeof(u32);
  70. u8 *bufferPtr = (u8 *) buffer;
  71. u32 *pu4BytePtr = (u32 *) buffer;
  72. u32 i, offset, blockCount, remainSize;
  73. blockCount = size / blockSize;
  74. remainSize = size % blockSize;
  75. for (i = 0; i < blockCount; i++) {
  76. offset = i * blockSize;
  77. rtl_write_dword(rtlpriv, (FW_8192C_START_ADDRESS + offset),
  78. *(pu4BytePtr + i));
  79. }
  80. if (remainSize) {
  81. offset = blockCount * blockSize;
  82. bufferPtr += offset;
  83. for (i = 0; i < remainSize; i++) {
  84. rtl_write_byte(rtlpriv, (FW_8192C_START_ADDRESS +
  85. offset + i), *(bufferPtr + i));
  86. }
  87. }
  88. }
  89. static void _rtl92c_fw_page_write(struct ieee80211_hw *hw,
  90. u32 page, const u8 *buffer, u32 size)
  91. {
  92. struct rtl_priv *rtlpriv = rtl_priv(hw);
  93. u8 value8;
  94. u8 u8page = (u8) (page & 0x07);
  95. value8 = (rtl_read_byte(rtlpriv, REG_MCUFWDL + 2) & 0xF8) | u8page;
  96. rtl_write_byte(rtlpriv, (REG_MCUFWDL + 2), value8);
  97. _rtl92c_fw_block_write(hw, buffer, size);
  98. }
  99. static void _rtl92c_fill_dummy(u8 *pfwbuf, u32 *pfwlen)
  100. {
  101. u32 fwlen = *pfwlen;
  102. u8 remain = (u8) (fwlen % 4);
  103. remain = (remain == 0) ? 0 : (4 - remain);
  104. while (remain > 0) {
  105. pfwbuf[fwlen] = 0;
  106. fwlen++;
  107. remain--;
  108. }
  109. *pfwlen = fwlen;
  110. }
  111. static void _rtl92c_write_fw(struct ieee80211_hw *hw,
  112. enum version_8192c version, u8 *buffer, u32 size)
  113. {
  114. struct rtl_priv *rtlpriv = rtl_priv(hw);
  115. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  116. u8 *bufferPtr = (u8 *) buffer;
  117. RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE, ("FW size is %d bytes,\n", size));
  118. if (IS_CHIP_VER_B(version)) {
  119. u32 pageNums, remainSize;
  120. u32 page, offset;
  121. if (IS_HARDWARE_TYPE_8192CE(rtlhal))
  122. _rtl92c_fill_dummy(bufferPtr, &size);
  123. pageNums = size / FW_8192C_PAGE_SIZE;
  124. remainSize = size % FW_8192C_PAGE_SIZE;
  125. if (pageNums > 4) {
  126. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  127. ("Page numbers should not greater then 4\n"));
  128. }
  129. for (page = 0; page < pageNums; page++) {
  130. offset = page * FW_8192C_PAGE_SIZE;
  131. _rtl92c_fw_page_write(hw, page, (bufferPtr + offset),
  132. FW_8192C_PAGE_SIZE);
  133. }
  134. if (remainSize) {
  135. offset = pageNums * FW_8192C_PAGE_SIZE;
  136. page = pageNums;
  137. _rtl92c_fw_page_write(hw, page, (bufferPtr + offset),
  138. remainSize);
  139. }
  140. } else {
  141. _rtl92c_fw_block_write(hw, buffer, size);
  142. }
  143. }
  144. static int _rtl92c_fw_free_to_go(struct ieee80211_hw *hw)
  145. {
  146. struct rtl_priv *rtlpriv = rtl_priv(hw);
  147. u32 counter = 0;
  148. u32 value32;
  149. do {
  150. value32 = rtl_read_dword(rtlpriv, REG_MCUFWDL);
  151. } while ((counter++ < FW_8192C_POLLING_TIMEOUT_COUNT) &&
  152. (!(value32 & FWDL_ChkSum_rpt)));
  153. if (counter >= FW_8192C_POLLING_TIMEOUT_COUNT) {
  154. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  155. ("chksum report faill ! REG_MCUFWDL:0x%08x .\n",
  156. value32));
  157. return -EIO;
  158. }
  159. RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE,
  160. ("Checksum report OK ! REG_MCUFWDL:0x%08x .\n", value32));
  161. value32 = rtl_read_dword(rtlpriv, REG_MCUFWDL);
  162. value32 |= MCUFWDL_RDY;
  163. value32 &= ~WINTINI_RDY;
  164. rtl_write_dword(rtlpriv, REG_MCUFWDL, value32);
  165. counter = 0;
  166. do {
  167. value32 = rtl_read_dword(rtlpriv, REG_MCUFWDL);
  168. if (value32 & WINTINI_RDY) {
  169. RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE,
  170. ("Polling FW ready success!!"
  171. " REG_MCUFWDL:0x%08x .\n",
  172. value32));
  173. return 0;
  174. }
  175. mdelay(FW_8192C_POLLING_DELAY);
  176. } while (counter++ < FW_8192C_POLLING_TIMEOUT_COUNT);
  177. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  178. ("Polling FW ready fail!! REG_MCUFWDL:0x%08x .\n", value32));
  179. return -EIO;
  180. }
  181. int rtl92c_download_fw(struct ieee80211_hw *hw)
  182. {
  183. struct rtl_priv *rtlpriv = rtl_priv(hw);
  184. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  185. struct rtl92c_firmware_header *pfwheader;
  186. u8 *pfwdata;
  187. u32 fwsize;
  188. enum version_8192c version = rtlhal->version;
  189. pr_info("Loading firmware file %s\n", rtlpriv->cfg->fw_name);
  190. if (!rtlhal->pfirmware)
  191. return 1;
  192. pfwheader = (struct rtl92c_firmware_header *)rtlhal->pfirmware;
  193. pfwdata = (u8 *) rtlhal->pfirmware;
  194. fwsize = rtlhal->fwsize;
  195. if (IS_FW_HEADER_EXIST(pfwheader)) {
  196. RT_TRACE(rtlpriv, COMP_FW, DBG_DMESG,
  197. ("Firmware Version(%d), Signature(%#x),Size(%d)\n",
  198. pfwheader->version, pfwheader->signature,
  199. (uint)sizeof(struct rtl92c_firmware_header)));
  200. pfwdata = pfwdata + sizeof(struct rtl92c_firmware_header);
  201. fwsize = fwsize - sizeof(struct rtl92c_firmware_header);
  202. }
  203. _rtl92c_enable_fw_download(hw, true);
  204. _rtl92c_write_fw(hw, version, pfwdata, fwsize);
  205. _rtl92c_enable_fw_download(hw, false);
  206. if (_rtl92c_fw_free_to_go(hw)) {
  207. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  208. ("Firmware is not ready to run!\n"));
  209. } else {
  210. RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE,
  211. ("Firmware is ready to run!\n"));
  212. }
  213. return 0;
  214. }
  215. EXPORT_SYMBOL(rtl92c_download_fw);
  216. static bool _rtl92c_check_fw_read_last_h2c(struct ieee80211_hw *hw, u8 boxnum)
  217. {
  218. struct rtl_priv *rtlpriv = rtl_priv(hw);
  219. u8 val_hmetfr, val_mcutst_1;
  220. bool result = false;
  221. val_hmetfr = rtl_read_byte(rtlpriv, REG_HMETFR);
  222. val_mcutst_1 = rtl_read_byte(rtlpriv, (REG_MCUTST_1 + boxnum));
  223. if (((val_hmetfr >> boxnum) & BIT(0)) == 0 && val_mcutst_1 == 0)
  224. result = true;
  225. return result;
  226. }
  227. static void _rtl92c_fill_h2c_command(struct ieee80211_hw *hw,
  228. u8 element_id, u32 cmd_len, u8 *p_cmdbuffer)
  229. {
  230. struct rtl_priv *rtlpriv = rtl_priv(hw);
  231. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  232. u8 boxnum;
  233. u16 box_reg = 0, box_extreg = 0;
  234. u8 u1b_tmp;
  235. bool isfw_read = false;
  236. bool bwrite_sucess = false;
  237. u8 wait_h2c_limmit = 100;
  238. u8 wait_writeh2c_limmit = 100;
  239. u8 boxcontent[4], boxextcontent[2];
  240. u32 h2c_waitcounter = 0;
  241. unsigned long flag;
  242. u8 idx;
  243. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD, ("come in\n"));
  244. while (true) {
  245. spin_lock_irqsave(&rtlpriv->locks.h2c_lock, flag);
  246. if (rtlhal->h2c_setinprogress) {
  247. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  248. ("H2C set in progress! Wait to set.."
  249. "element_id(%d).\n", element_id));
  250. while (rtlhal->h2c_setinprogress) {
  251. spin_unlock_irqrestore(&rtlpriv->locks.h2c_lock,
  252. flag);
  253. h2c_waitcounter++;
  254. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  255. ("Wait 100 us (%d times)...\n",
  256. h2c_waitcounter));
  257. udelay(100);
  258. if (h2c_waitcounter > 1000)
  259. return;
  260. spin_lock_irqsave(&rtlpriv->locks.h2c_lock,
  261. flag);
  262. }
  263. spin_unlock_irqrestore(&rtlpriv->locks.h2c_lock, flag);
  264. } else {
  265. rtlhal->h2c_setinprogress = true;
  266. spin_unlock_irqrestore(&rtlpriv->locks.h2c_lock, flag);
  267. break;
  268. }
  269. }
  270. while (!bwrite_sucess) {
  271. wait_writeh2c_limmit--;
  272. if (wait_writeh2c_limmit == 0) {
  273. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  274. ("Write H2C fail because no trigger "
  275. "for FW INT!\n"));
  276. break;
  277. }
  278. boxnum = rtlhal->last_hmeboxnum;
  279. switch (boxnum) {
  280. case 0:
  281. box_reg = REG_HMEBOX_0;
  282. box_extreg = REG_HMEBOX_EXT_0;
  283. break;
  284. case 1:
  285. box_reg = REG_HMEBOX_1;
  286. box_extreg = REG_HMEBOX_EXT_1;
  287. break;
  288. case 2:
  289. box_reg = REG_HMEBOX_2;
  290. box_extreg = REG_HMEBOX_EXT_2;
  291. break;
  292. case 3:
  293. box_reg = REG_HMEBOX_3;
  294. box_extreg = REG_HMEBOX_EXT_3;
  295. break;
  296. default:
  297. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  298. ("switch case not process\n"));
  299. break;
  300. }
  301. isfw_read = _rtl92c_check_fw_read_last_h2c(hw, boxnum);
  302. while (!isfw_read) {
  303. wait_h2c_limmit--;
  304. if (wait_h2c_limmit == 0) {
  305. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  306. ("Wating too long for FW read "
  307. "clear HMEBox(%d)!\n", boxnum));
  308. break;
  309. }
  310. udelay(10);
  311. isfw_read = _rtl92c_check_fw_read_last_h2c(hw, boxnum);
  312. u1b_tmp = rtl_read_byte(rtlpriv, 0x1BF);
  313. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  314. ("Wating for FW read clear HMEBox(%d)!!! "
  315. "0x1BF = %2x\n", boxnum, u1b_tmp));
  316. }
  317. if (!isfw_read) {
  318. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  319. ("Write H2C register BOX[%d] fail!!!!! "
  320. "Fw do not read.\n", boxnum));
  321. break;
  322. }
  323. memset(boxcontent, 0, sizeof(boxcontent));
  324. memset(boxextcontent, 0, sizeof(boxextcontent));
  325. boxcontent[0] = element_id;
  326. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  327. ("Write element_id box_reg(%4x) = %2x\n",
  328. box_reg, element_id));
  329. switch (cmd_len) {
  330. case 1:
  331. boxcontent[0] &= ~(BIT(7));
  332. memcpy((u8 *) (boxcontent) + 1,
  333. p_cmdbuffer, 1);
  334. for (idx = 0; idx < 4; idx++) {
  335. rtl_write_byte(rtlpriv, box_reg + idx,
  336. boxcontent[idx]);
  337. }
  338. break;
  339. case 2:
  340. boxcontent[0] &= ~(BIT(7));
  341. memcpy((u8 *) (boxcontent) + 1,
  342. p_cmdbuffer, 2);
  343. for (idx = 0; idx < 4; idx++) {
  344. rtl_write_byte(rtlpriv, box_reg + idx,
  345. boxcontent[idx]);
  346. }
  347. break;
  348. case 3:
  349. boxcontent[0] &= ~(BIT(7));
  350. memcpy((u8 *) (boxcontent) + 1,
  351. p_cmdbuffer, 3);
  352. for (idx = 0; idx < 4; idx++) {
  353. rtl_write_byte(rtlpriv, box_reg + idx,
  354. boxcontent[idx]);
  355. }
  356. break;
  357. case 4:
  358. boxcontent[0] |= (BIT(7));
  359. memcpy((u8 *) (boxextcontent),
  360. p_cmdbuffer, 2);
  361. memcpy((u8 *) (boxcontent) + 1,
  362. p_cmdbuffer + 2, 2);
  363. for (idx = 0; idx < 2; idx++) {
  364. rtl_write_byte(rtlpriv, box_extreg + idx,
  365. boxextcontent[idx]);
  366. }
  367. for (idx = 0; idx < 4; idx++) {
  368. rtl_write_byte(rtlpriv, box_reg + idx,
  369. boxcontent[idx]);
  370. }
  371. break;
  372. case 5:
  373. boxcontent[0] |= (BIT(7));
  374. memcpy((u8 *) (boxextcontent),
  375. p_cmdbuffer, 2);
  376. memcpy((u8 *) (boxcontent) + 1,
  377. p_cmdbuffer + 2, 3);
  378. for (idx = 0; idx < 2; idx++) {
  379. rtl_write_byte(rtlpriv, box_extreg + idx,
  380. boxextcontent[idx]);
  381. }
  382. for (idx = 0; idx < 4; idx++) {
  383. rtl_write_byte(rtlpriv, box_reg + idx,
  384. boxcontent[idx]);
  385. }
  386. break;
  387. default:
  388. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  389. ("switch case not process\n"));
  390. break;
  391. }
  392. bwrite_sucess = true;
  393. rtlhal->last_hmeboxnum = boxnum + 1;
  394. if (rtlhal->last_hmeboxnum == 4)
  395. rtlhal->last_hmeboxnum = 0;
  396. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  397. ("pHalData->last_hmeboxnum = %d\n",
  398. rtlhal->last_hmeboxnum));
  399. }
  400. spin_lock_irqsave(&rtlpriv->locks.h2c_lock, flag);
  401. rtlhal->h2c_setinprogress = false;
  402. spin_unlock_irqrestore(&rtlpriv->locks.h2c_lock, flag);
  403. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD, ("go out\n"));
  404. }
  405. void rtl92c_fill_h2c_cmd(struct ieee80211_hw *hw,
  406. u8 element_id, u32 cmd_len, u8 *p_cmdbuffer)
  407. {
  408. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  409. u32 tmp_cmdbuf[2];
  410. if (rtlhal->fw_ready == false) {
  411. RT_ASSERT(false, ("return H2C cmd because of Fw "
  412. "download fail!!!\n"));
  413. return;
  414. }
  415. memset(tmp_cmdbuf, 0, 8);
  416. memcpy(tmp_cmdbuf, p_cmdbuffer, cmd_len);
  417. _rtl92c_fill_h2c_command(hw, element_id, cmd_len, (u8 *)&tmp_cmdbuf);
  418. return;
  419. }
  420. EXPORT_SYMBOL(rtl92c_fill_h2c_cmd);
  421. void rtl92c_firmware_selfreset(struct ieee80211_hw *hw)
  422. {
  423. u8 u1b_tmp;
  424. u8 delay = 100;
  425. struct rtl_priv *rtlpriv = rtl_priv(hw);
  426. rtl_write_byte(rtlpriv, REG_HMETFR + 3, 0x20);
  427. u1b_tmp = rtl_read_byte(rtlpriv, REG_SYS_FUNC_EN + 1);
  428. while (u1b_tmp & BIT(2)) {
  429. delay--;
  430. if (delay == 0) {
  431. RT_ASSERT(false, ("8051 reset fail.\n"));
  432. break;
  433. }
  434. udelay(50);
  435. u1b_tmp = rtl_read_byte(rtlpriv, REG_SYS_FUNC_EN + 1);
  436. }
  437. }
  438. EXPORT_SYMBOL(rtl92c_firmware_selfreset);
  439. void rtl92c_set_fw_pwrmode_cmd(struct ieee80211_hw *hw, u8 mode)
  440. {
  441. struct rtl_priv *rtlpriv = rtl_priv(hw);
  442. u8 u1_h2c_set_pwrmode[3] = {0};
  443. struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
  444. RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, ("FW LPS mode = %d\n", mode));
  445. SET_H2CCMD_PWRMODE_PARM_MODE(u1_h2c_set_pwrmode, mode);
  446. SET_H2CCMD_PWRMODE_PARM_SMART_PS(u1_h2c_set_pwrmode, 1);
  447. SET_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(u1_h2c_set_pwrmode,
  448. ppsc->reg_max_lps_awakeintvl);
  449. RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_DMESG,
  450. "rtl92c_set_fw_rsvdpagepkt(): u1_h2c_set_pwrmode\n",
  451. u1_h2c_set_pwrmode, 3);
  452. rtl92c_fill_h2c_cmd(hw, H2C_SETPWRMODE, 3, u1_h2c_set_pwrmode);
  453. }
  454. EXPORT_SYMBOL(rtl92c_set_fw_pwrmode_cmd);
  455. static bool _rtl92c_cmd_send_packet(struct ieee80211_hw *hw,
  456. struct sk_buff *skb)
  457. {
  458. struct rtl_priv *rtlpriv = rtl_priv(hw);
  459. struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  460. struct rtl8192_tx_ring *ring;
  461. struct rtl_tx_desc *pdesc;
  462. unsigned long flags;
  463. struct sk_buff *pskb = NULL;
  464. ring = &rtlpci->tx_ring[BEACON_QUEUE];
  465. pskb = __skb_dequeue(&ring->queue);
  466. if (pskb)
  467. kfree_skb(pskb);
  468. spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
  469. pdesc = &ring->desc[0];
  470. rtlpriv->cfg->ops->fill_tx_cmddesc(hw, (u8 *) pdesc, 1, 1, skb);
  471. __skb_queue_tail(&ring->queue, skb);
  472. spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
  473. rtlpriv->cfg->ops->tx_polling(hw, BEACON_QUEUE);
  474. return true;
  475. }
  476. #define BEACON_PG 0 /*->1*/
  477. #define PSPOLL_PG 2
  478. #define NULL_PG 3
  479. #define PROBERSP_PG 4 /*->5*/
  480. #define TOTAL_RESERVED_PKT_LEN 768
  481. static u8 reserved_page_packet[TOTAL_RESERVED_PKT_LEN] = {
  482. /* page 0 beacon */
  483. 0x80, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF,
  484. 0xFF, 0xFF, 0x00, 0xE0, 0x4C, 0x76, 0x00, 0x42,
  485. 0x00, 0x40, 0x10, 0x10, 0x00, 0x03, 0x50, 0x08,
  486. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  487. 0x64, 0x00, 0x00, 0x04, 0x00, 0x0C, 0x6C, 0x69,
  488. 0x6E, 0x6B, 0x73, 0x79, 0x73, 0x5F, 0x77, 0x6C,
  489. 0x61, 0x6E, 0x01, 0x04, 0x82, 0x84, 0x8B, 0x96,
  490. 0x03, 0x01, 0x01, 0x06, 0x02, 0x00, 0x00, 0x2A,
  491. 0x01, 0x00, 0x32, 0x08, 0x24, 0x30, 0x48, 0x6C,
  492. 0x0C, 0x12, 0x18, 0x60, 0x2D, 0x1A, 0x6C, 0x18,
  493. 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  494. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  495. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  496. 0x3D, 0x00, 0xDD, 0x06, 0x00, 0xE0, 0x4C, 0x02,
  497. 0x01, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  498. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  499. /* page 1 beacon */
  500. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  501. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  502. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  503. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  504. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  505. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  506. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  507. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  508. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  509. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  510. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  511. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  512. 0x10, 0x00, 0x20, 0x8C, 0x00, 0x12, 0x10, 0x00,
  513. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  514. 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  515. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  516. /* page 2 ps-poll */
  517. 0xA4, 0x10, 0x01, 0xC0, 0x00, 0x40, 0x10, 0x10,
  518. 0x00, 0x03, 0x00, 0xE0, 0x4C, 0x76, 0x00, 0x42,
  519. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  520. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  521. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  522. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  523. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  524. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  525. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  526. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  527. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  528. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  529. 0x18, 0x00, 0x20, 0x8C, 0x00, 0x12, 0x00, 0x00,
  530. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80,
  531. 0x80, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  532. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  533. /* page 3 null */
  534. 0x48, 0x01, 0x00, 0x00, 0x00, 0x40, 0x10, 0x10,
  535. 0x00, 0x03, 0x00, 0xE0, 0x4C, 0x76, 0x00, 0x42,
  536. 0x00, 0x40, 0x10, 0x10, 0x00, 0x03, 0x00, 0x00,
  537. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  538. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  539. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  540. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  541. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  542. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  543. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  544. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  545. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  546. 0x72, 0x00, 0x20, 0x8C, 0x00, 0x12, 0x00, 0x00,
  547. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80,
  548. 0x80, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  549. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  550. /* page 4 probe_resp */
  551. 0x50, 0x00, 0x00, 0x00, 0x00, 0x40, 0x10, 0x10,
  552. 0x00, 0x03, 0x00, 0xE0, 0x4C, 0x76, 0x00, 0x42,
  553. 0x00, 0x40, 0x10, 0x10, 0x00, 0x03, 0x00, 0x00,
  554. 0x9E, 0x46, 0x15, 0x32, 0x27, 0xF2, 0x2D, 0x00,
  555. 0x64, 0x00, 0x00, 0x04, 0x00, 0x0C, 0x6C, 0x69,
  556. 0x6E, 0x6B, 0x73, 0x79, 0x73, 0x5F, 0x77, 0x6C,
  557. 0x61, 0x6E, 0x01, 0x04, 0x82, 0x84, 0x8B, 0x96,
  558. 0x03, 0x01, 0x01, 0x06, 0x02, 0x00, 0x00, 0x2A,
  559. 0x01, 0x00, 0x32, 0x08, 0x24, 0x30, 0x48, 0x6C,
  560. 0x0C, 0x12, 0x18, 0x60, 0x2D, 0x1A, 0x6C, 0x18,
  561. 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  562. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  563. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  564. 0x3D, 0x00, 0xDD, 0x06, 0x00, 0xE0, 0x4C, 0x02,
  565. 0x01, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  566. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  567. /* page 5 probe_resp */
  568. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  569. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  570. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  571. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  572. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  573. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  574. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  575. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  576. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  577. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  578. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  579. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  580. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  581. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  582. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  583. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  584. };
  585. void rtl92c_set_fw_rsvdpagepkt(struct ieee80211_hw *hw, bool dl_finished)
  586. {
  587. struct rtl_priv *rtlpriv = rtl_priv(hw);
  588. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  589. struct sk_buff *skb = NULL;
  590. u32 totalpacketlen;
  591. bool rtstatus;
  592. u8 u1RsvdPageLoc[3] = {0};
  593. bool dlok = false;
  594. u8 *beacon;
  595. u8 *pspoll;
  596. u8 *nullfunc;
  597. u8 *probersp;
  598. /*---------------------------------------------------------
  599. (1) beacon
  600. ---------------------------------------------------------*/
  601. beacon = &reserved_page_packet[BEACON_PG * 128];
  602. SET_80211_HDR_ADDRESS2(beacon, mac->mac_addr);
  603. SET_80211_HDR_ADDRESS3(beacon, mac->bssid);
  604. /*-------------------------------------------------------
  605. (2) ps-poll
  606. --------------------------------------------------------*/
  607. pspoll = &reserved_page_packet[PSPOLL_PG * 128];
  608. SET_80211_PS_POLL_AID(pspoll, (mac->assoc_id | 0xc000));
  609. SET_80211_PS_POLL_BSSID(pspoll, mac->bssid);
  610. SET_80211_PS_POLL_TA(pspoll, mac->mac_addr);
  611. SET_H2CCMD_RSVDPAGE_LOC_PSPOLL(u1RsvdPageLoc, PSPOLL_PG);
  612. /*--------------------------------------------------------
  613. (3) null data
  614. ---------------------------------------------------------*/
  615. nullfunc = &reserved_page_packet[NULL_PG * 128];
  616. SET_80211_HDR_ADDRESS1(nullfunc, mac->bssid);
  617. SET_80211_HDR_ADDRESS2(nullfunc, mac->mac_addr);
  618. SET_80211_HDR_ADDRESS3(nullfunc, mac->bssid);
  619. SET_H2CCMD_RSVDPAGE_LOC_NULL_DATA(u1RsvdPageLoc, NULL_PG);
  620. /*---------------------------------------------------------
  621. (4) probe response
  622. ----------------------------------------------------------*/
  623. probersp = &reserved_page_packet[PROBERSP_PG * 128];
  624. SET_80211_HDR_ADDRESS1(probersp, mac->bssid);
  625. SET_80211_HDR_ADDRESS2(probersp, mac->mac_addr);
  626. SET_80211_HDR_ADDRESS3(probersp, mac->bssid);
  627. SET_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(u1RsvdPageLoc, PROBERSP_PG);
  628. totalpacketlen = TOTAL_RESERVED_PKT_LEN;
  629. RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_LOUD,
  630. "rtl92c_set_fw_rsvdpagepkt(): HW_VAR_SET_TX_CMD: ALL\n",
  631. &reserved_page_packet[0], totalpacketlen);
  632. RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_DMESG,
  633. "rtl92c_set_fw_rsvdpagepkt(): HW_VAR_SET_TX_CMD: ALL\n",
  634. u1RsvdPageLoc, 3);
  635. skb = dev_alloc_skb(totalpacketlen);
  636. memcpy((u8 *) skb_put(skb, totalpacketlen),
  637. &reserved_page_packet, totalpacketlen);
  638. rtstatus = _rtl92c_cmd_send_packet(hw, skb);
  639. if (rtstatus)
  640. dlok = true;
  641. if (dlok) {
  642. RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
  643. ("Set RSVD page location to Fw.\n"));
  644. RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_DMESG,
  645. "H2C_RSVDPAGE:\n",
  646. u1RsvdPageLoc, 3);
  647. rtl92c_fill_h2c_cmd(hw, H2C_RSVDPAGE,
  648. sizeof(u1RsvdPageLoc), u1RsvdPageLoc);
  649. } else
  650. RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
  651. ("Set RSVD page location to Fw FAIL!!!!!!.\n"));
  652. }
  653. EXPORT_SYMBOL(rtl92c_set_fw_rsvdpagepkt);
  654. void rtl92c_set_fw_joinbss_report_cmd(struct ieee80211_hw *hw, u8 mstatus)
  655. {
  656. u8 u1_joinbssrpt_parm[1] = {0};
  657. SET_H2CCMD_JOINBSSRPT_PARM_OPMODE(u1_joinbssrpt_parm, mstatus);
  658. rtl92c_fill_h2c_cmd(hw, H2C_JOINBSSRPT, 1, u1_joinbssrpt_parm);
  659. }
  660. EXPORT_SYMBOL(rtl92c_set_fw_joinbss_report_cmd);