rt2x00reg.h 6.2 KB

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  1. /*
  2. Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
  3. <http://rt2x00.serialmonkey.com>
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the
  14. Free Software Foundation, Inc.,
  15. 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  16. */
  17. /*
  18. Module: rt2x00
  19. Abstract: rt2x00 generic register information.
  20. */
  21. #ifndef RT2X00REG_H
  22. #define RT2X00REG_H
  23. /*
  24. * RX crypto status
  25. */
  26. enum rx_crypto {
  27. RX_CRYPTO_SUCCESS = 0,
  28. RX_CRYPTO_FAIL_ICV = 1,
  29. RX_CRYPTO_FAIL_MIC = 2,
  30. RX_CRYPTO_FAIL_KEY = 3,
  31. };
  32. /*
  33. * Antenna values
  34. */
  35. enum antenna {
  36. ANTENNA_SW_DIVERSITY = 0,
  37. ANTENNA_A = 1,
  38. ANTENNA_B = 2,
  39. ANTENNA_HW_DIVERSITY = 3,
  40. };
  41. /*
  42. * Led mode values.
  43. */
  44. enum led_mode {
  45. LED_MODE_DEFAULT = 0,
  46. LED_MODE_TXRX_ACTIVITY = 1,
  47. LED_MODE_SIGNAL_STRENGTH = 2,
  48. LED_MODE_ASUS = 3,
  49. LED_MODE_ALPHA = 4,
  50. };
  51. /*
  52. * TSF sync values
  53. */
  54. enum tsf_sync {
  55. TSF_SYNC_NONE = 0,
  56. TSF_SYNC_INFRA = 1,
  57. TSF_SYNC_ADHOC = 2,
  58. TSF_SYNC_AP_NONE = 3,
  59. };
  60. /*
  61. * Device states
  62. */
  63. enum dev_state {
  64. STATE_DEEP_SLEEP = 0,
  65. STATE_SLEEP = 1,
  66. STATE_STANDBY = 2,
  67. STATE_AWAKE = 3,
  68. /*
  69. * Additional device states, these values are
  70. * not strict since they are not directly passed
  71. * into the device.
  72. */
  73. STATE_RADIO_ON,
  74. STATE_RADIO_OFF,
  75. STATE_RADIO_IRQ_ON,
  76. STATE_RADIO_IRQ_OFF,
  77. };
  78. /*
  79. * IFS backoff values
  80. */
  81. enum ifs {
  82. IFS_BACKOFF = 0,
  83. IFS_SIFS = 1,
  84. IFS_NEW_BACKOFF = 2,
  85. IFS_NONE = 3,
  86. };
  87. /*
  88. * IFS backoff values for HT devices
  89. */
  90. enum txop {
  91. TXOP_HTTXOP = 0,
  92. TXOP_PIFS = 1,
  93. TXOP_SIFS = 2,
  94. TXOP_BACKOFF = 3,
  95. };
  96. /*
  97. * Cipher types for hardware encryption
  98. */
  99. enum cipher {
  100. CIPHER_NONE = 0,
  101. CIPHER_WEP64 = 1,
  102. CIPHER_WEP128 = 2,
  103. CIPHER_TKIP = 3,
  104. CIPHER_AES = 4,
  105. /*
  106. * The following fields were added by rt61pci and rt73usb.
  107. */
  108. CIPHER_CKIP64 = 5,
  109. CIPHER_CKIP128 = 6,
  110. CIPHER_TKIP_NO_MIC = 7, /* Don't send to device */
  111. /*
  112. * Max cipher type.
  113. * Note that CIPHER_NONE isn't counted, and CKIP64 and CKIP128
  114. * are excluded due to limitations in mac80211.
  115. */
  116. CIPHER_MAX = 4,
  117. };
  118. /*
  119. * Rate modulations
  120. */
  121. enum rate_modulation {
  122. RATE_MODE_CCK = 0,
  123. RATE_MODE_OFDM = 1,
  124. RATE_MODE_HT_MIX = 2,
  125. RATE_MODE_HT_GREENFIELD = 3,
  126. };
  127. /*
  128. * Firmware validation error codes
  129. */
  130. enum firmware_errors {
  131. FW_OK,
  132. FW_BAD_CRC,
  133. FW_BAD_LENGTH,
  134. FW_BAD_VERSION,
  135. };
  136. /*
  137. * Register handlers.
  138. * We store the position of a register field inside a field structure,
  139. * This will simplify the process of setting and reading a certain field
  140. * inside the register while making sure the process remains byte order safe.
  141. */
  142. struct rt2x00_field8 {
  143. u8 bit_offset;
  144. u8 bit_mask;
  145. };
  146. struct rt2x00_field16 {
  147. u16 bit_offset;
  148. u16 bit_mask;
  149. };
  150. struct rt2x00_field32 {
  151. u32 bit_offset;
  152. u32 bit_mask;
  153. };
  154. /*
  155. * Power of two check, this will check
  156. * if the mask that has been given contains and contiguous set of bits.
  157. * Note that we cannot use the is_power_of_2() function since this
  158. * check must be done at compile-time.
  159. */
  160. #define is_power_of_two(x) ( !((x) & ((x)-1)) )
  161. #define low_bit_mask(x) ( ((x)-1) & ~(x) )
  162. #define is_valid_mask(x) is_power_of_two(1LU + (x) + low_bit_mask(x))
  163. /*
  164. * Macros to find first set bit in a variable.
  165. * These macros behave the same as the __ffs() functions but
  166. * the most important difference that this is done during
  167. * compile-time rather then run-time.
  168. */
  169. #define compile_ffs2(__x) \
  170. __builtin_choose_expr(((__x) & 0x1), 0, 1)
  171. #define compile_ffs4(__x) \
  172. __builtin_choose_expr(((__x) & 0x3), \
  173. (compile_ffs2((__x))), \
  174. (compile_ffs2((__x) >> 2) + 2))
  175. #define compile_ffs8(__x) \
  176. __builtin_choose_expr(((__x) & 0xf), \
  177. (compile_ffs4((__x))), \
  178. (compile_ffs4((__x) >> 4) + 4))
  179. #define compile_ffs16(__x) \
  180. __builtin_choose_expr(((__x) & 0xff), \
  181. (compile_ffs8((__x))), \
  182. (compile_ffs8((__x) >> 8) + 8))
  183. #define compile_ffs32(__x) \
  184. __builtin_choose_expr(((__x) & 0xffff), \
  185. (compile_ffs16((__x))), \
  186. (compile_ffs16((__x) >> 16) + 16))
  187. /*
  188. * This macro will check the requirements for the FIELD{8,16,32} macros
  189. * The mask should be a constant non-zero contiguous set of bits which
  190. * does not exceed the given typelimit.
  191. */
  192. #define FIELD_CHECK(__mask, __type) \
  193. BUILD_BUG_ON(!(__mask) || \
  194. !is_valid_mask(__mask) || \
  195. (__mask) != (__type)(__mask)) \
  196. #define FIELD8(__mask) \
  197. ({ \
  198. FIELD_CHECK(__mask, u8); \
  199. (struct rt2x00_field8) { \
  200. compile_ffs8(__mask), (__mask) \
  201. }; \
  202. })
  203. #define FIELD16(__mask) \
  204. ({ \
  205. FIELD_CHECK(__mask, u16); \
  206. (struct rt2x00_field16) { \
  207. compile_ffs16(__mask), (__mask) \
  208. }; \
  209. })
  210. #define FIELD32(__mask) \
  211. ({ \
  212. FIELD_CHECK(__mask, u32); \
  213. (struct rt2x00_field32) { \
  214. compile_ffs32(__mask), (__mask) \
  215. }; \
  216. })
  217. #define SET_FIELD(__reg, __type, __field, __value)\
  218. ({ \
  219. typecheck(__type, __field); \
  220. *(__reg) &= ~((__field).bit_mask); \
  221. *(__reg) |= ((__value) << \
  222. ((__field).bit_offset)) & \
  223. ((__field).bit_mask); \
  224. })
  225. #define GET_FIELD(__reg, __type, __field) \
  226. ({ \
  227. typecheck(__type, __field); \
  228. ((__reg) & ((__field).bit_mask)) >> \
  229. ((__field).bit_offset); \
  230. })
  231. #define rt2x00_set_field32(__reg, __field, __value) \
  232. SET_FIELD(__reg, struct rt2x00_field32, __field, __value)
  233. #define rt2x00_get_field32(__reg, __field) \
  234. GET_FIELD(__reg, struct rt2x00_field32, __field)
  235. #define rt2x00_set_field16(__reg, __field, __value) \
  236. SET_FIELD(__reg, struct rt2x00_field16, __field, __value)
  237. #define rt2x00_get_field16(__reg, __field) \
  238. GET_FIELD(__reg, struct rt2x00_field16, __field)
  239. #define rt2x00_set_field8(__reg, __field, __value) \
  240. SET_FIELD(__reg, struct rt2x00_field8, __field, __value)
  241. #define rt2x00_get_field8(__reg, __field) \
  242. GET_FIELD(__reg, struct rt2x00_field8, __field)
  243. #endif /* RT2X00REG_H */