mwl8k.c 138 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147214821492150215121522153215421552156215721582159216021612162216321642165216621672168216921702171217221732174217521762177217821792180218121822183218421852186218721882189219021912192219321942195219621972198219922002201220222032204220522062207220822092210221122122213221422152216221722182219222022212222222322242225222622272228222922302231223222332234223522362237223822392240224122422243224422452246224722482249225022512252225322542255225622572258225922602261226222632264226522662267226822692270227122722273227422752276227722782279228022812282228322842285228622872288228922902291229222932294229522962297229822992300230123022303230423052306230723082309231023112312231323142315231623172318231923202321232223232324232523262327232823292330233123322333233423352336233723382339234023412342234323442345234623472348234923502351235223532354235523562357235823592360236123622363236423652366236723682369237023712372237323742375237623772378237923802381238223832384238523862387238823892390239123922393239423952396239723982399240024012402240324042405240624072408240924102411241224132414241524162417241824192420242124222423242424252426242724282429243024312432243324342435243624372438243924402441244224432444244524462447244824492450245124522453245424552456245724582459246024612462246324642465246624672468246924702471247224732474247524762477247824792480248124822483248424852486248724882489249024912492249324942495249624972498249925002501250225032504250525062507250825092510251125122513251425152516251725182519252025212522252325242525252625272528252925302531253225332534253525362537253825392540254125422543254425452546254725482549255025512552255325542555255625572558255925602561256225632564256525662567256825692570257125722573257425752576257725782579258025812582258325842585258625872588258925902591259225932594259525962597259825992600260126022603260426052606260726082609261026112612261326142615261626172618261926202621262226232624262526262627262826292630263126322633263426352636263726382639264026412642264326442645264626472648264926502651265226532654265526562657265826592660266126622663266426652666266726682669267026712672267326742675267626772678267926802681268226832684268526862687268826892690269126922693269426952696269726982699270027012702270327042705270627072708270927102711271227132714271527162717271827192720272127222723272427252726272727282729273027312732273327342735273627372738273927402741274227432744274527462747274827492750275127522753275427552756275727582759276027612762276327642765276627672768276927702771277227732774277527762777277827792780278127822783278427852786278727882789279027912792279327942795279627972798279928002801280228032804280528062807280828092810281128122813281428152816281728182819282028212822282328242825282628272828282928302831283228332834283528362837283828392840284128422843284428452846284728482849285028512852285328542855285628572858285928602861286228632864286528662867286828692870287128722873287428752876287728782879288028812882288328842885288628872888288928902891289228932894289528962897289828992900290129022903290429052906290729082909291029112912291329142915291629172918291929202921292229232924292529262927292829292930293129322933293429352936293729382939294029412942294329442945294629472948294929502951295229532954295529562957295829592960296129622963296429652966296729682969297029712972297329742975297629772978297929802981298229832984298529862987298829892990299129922993299429952996299729982999300030013002300330043005300630073008300930103011301230133014301530163017301830193020302130223023302430253026302730283029303030313032303330343035303630373038303930403041304230433044304530463047304830493050305130523053305430553056305730583059306030613062306330643065306630673068306930703071307230733074307530763077307830793080308130823083308430853086308730883089309030913092309330943095309630973098309931003101310231033104310531063107310831093110311131123113311431153116311731183119312031213122312331243125312631273128312931303131313231333134313531363137313831393140314131423143314431453146314731483149315031513152315331543155315631573158315931603161316231633164316531663167316831693170317131723173317431753176317731783179318031813182318331843185318631873188318931903191319231933194319531963197319831993200320132023203320432053206320732083209321032113212321332143215321632173218321932203221322232233224322532263227322832293230323132323233323432353236323732383239324032413242324332443245324632473248324932503251325232533254325532563257325832593260326132623263326432653266326732683269327032713272327332743275327632773278327932803281328232833284328532863287328832893290329132923293329432953296329732983299330033013302330333043305330633073308330933103311331233133314331533163317331833193320332133223323332433253326332733283329333033313332333333343335333633373338333933403341334233433344334533463347334833493350335133523353335433553356335733583359336033613362336333643365336633673368336933703371337233733374337533763377337833793380338133823383338433853386338733883389339033913392339333943395339633973398339934003401340234033404340534063407340834093410341134123413341434153416341734183419342034213422342334243425342634273428342934303431343234333434343534363437343834393440344134423443344434453446344734483449345034513452345334543455345634573458345934603461346234633464346534663467346834693470347134723473347434753476347734783479348034813482348334843485348634873488348934903491349234933494349534963497349834993500350135023503350435053506350735083509351035113512351335143515351635173518351935203521352235233524352535263527352835293530353135323533353435353536353735383539354035413542354335443545354635473548354935503551355235533554355535563557355835593560356135623563356435653566356735683569357035713572357335743575357635773578357935803581358235833584358535863587358835893590359135923593359435953596359735983599360036013602360336043605360636073608360936103611361236133614361536163617361836193620362136223623362436253626362736283629363036313632363336343635363636373638363936403641364236433644364536463647364836493650365136523653365436553656365736583659366036613662366336643665366636673668366936703671367236733674367536763677367836793680368136823683368436853686368736883689369036913692369336943695369636973698369937003701370237033704370537063707370837093710371137123713371437153716371737183719372037213722372337243725372637273728372937303731373237333734373537363737373837393740374137423743374437453746374737483749375037513752375337543755375637573758375937603761376237633764376537663767376837693770377137723773377437753776377737783779378037813782378337843785378637873788378937903791379237933794379537963797379837993800380138023803380438053806380738083809381038113812381338143815381638173818381938203821382238233824382538263827382838293830383138323833383438353836383738383839384038413842384338443845384638473848384938503851385238533854385538563857385838593860386138623863386438653866386738683869387038713872387338743875387638773878387938803881388238833884388538863887388838893890389138923893389438953896389738983899390039013902390339043905390639073908390939103911391239133914391539163917391839193920392139223923392439253926392739283929393039313932393339343935393639373938393939403941394239433944394539463947394839493950395139523953395439553956395739583959396039613962396339643965396639673968396939703971397239733974397539763977397839793980398139823983398439853986398739883989399039913992399339943995399639973998399940004001400240034004400540064007400840094010401140124013401440154016401740184019402040214022402340244025402640274028402940304031403240334034403540364037403840394040404140424043404440454046404740484049405040514052405340544055405640574058405940604061406240634064406540664067406840694070407140724073407440754076407740784079408040814082408340844085408640874088408940904091409240934094409540964097409840994100410141024103410441054106410741084109411041114112411341144115411641174118411941204121412241234124412541264127412841294130413141324133413441354136413741384139414041414142414341444145414641474148414941504151415241534154415541564157415841594160416141624163416441654166416741684169417041714172417341744175417641774178417941804181418241834184418541864187418841894190419141924193419441954196419741984199420042014202420342044205420642074208420942104211421242134214421542164217421842194220422142224223422442254226422742284229423042314232423342344235423642374238423942404241424242434244424542464247424842494250425142524253425442554256425742584259426042614262426342644265426642674268426942704271427242734274427542764277427842794280428142824283428442854286428742884289429042914292429342944295429642974298429943004301430243034304430543064307430843094310431143124313431443154316431743184319432043214322432343244325432643274328432943304331433243334334433543364337433843394340434143424343434443454346434743484349435043514352435343544355435643574358435943604361436243634364436543664367436843694370437143724373437443754376437743784379438043814382438343844385438643874388438943904391439243934394439543964397439843994400440144024403440444054406440744084409441044114412441344144415441644174418441944204421442244234424442544264427442844294430443144324433443444354436443744384439444044414442444344444445444644474448444944504451445244534454445544564457445844594460446144624463446444654466446744684469447044714472447344744475447644774478447944804481448244834484448544864487448844894490449144924493449444954496449744984499450045014502450345044505450645074508450945104511451245134514451545164517451845194520452145224523452445254526452745284529453045314532453345344535453645374538453945404541454245434544454545464547454845494550455145524553455445554556455745584559456045614562456345644565456645674568456945704571457245734574457545764577457845794580458145824583458445854586458745884589459045914592459345944595459645974598459946004601460246034604460546064607460846094610461146124613461446154616461746184619462046214622462346244625462646274628462946304631463246334634463546364637463846394640464146424643464446454646464746484649465046514652465346544655465646574658465946604661466246634664466546664667466846694670467146724673467446754676467746784679468046814682468346844685468646874688468946904691469246934694469546964697469846994700470147024703470447054706470747084709471047114712471347144715471647174718471947204721472247234724472547264727472847294730473147324733473447354736473747384739474047414742474347444745474647474748474947504751475247534754475547564757475847594760476147624763476447654766476747684769477047714772477347744775477647774778477947804781478247834784478547864787478847894790479147924793479447954796479747984799480048014802480348044805480648074808480948104811481248134814481548164817481848194820482148224823482448254826482748284829483048314832483348344835483648374838483948404841484248434844484548464847484848494850485148524853485448554856485748584859486048614862486348644865486648674868486948704871487248734874487548764877487848794880488148824883488448854886488748884889489048914892489348944895489648974898489949004901490249034904490549064907490849094910491149124913491449154916491749184919492049214922492349244925492649274928492949304931493249334934493549364937493849394940494149424943494449454946494749484949495049514952495349544955495649574958495949604961496249634964496549664967496849694970497149724973497449754976497749784979498049814982498349844985498649874988498949904991499249934994499549964997499849995000500150025003500450055006500750085009501050115012501350145015501650175018501950205021502250235024502550265027502850295030503150325033503450355036503750385039504050415042504350445045504650475048504950505051505250535054505550565057505850595060506150625063506450655066506750685069507050715072507350745075507650775078507950805081508250835084508550865087508850895090509150925093509450955096509750985099510051015102510351045105510651075108510951105111511251135114511551165117511851195120512151225123512451255126512751285129513051315132513351345135513651375138513951405141514251435144514551465147514851495150515151525153515451555156515751585159516051615162516351645165516651675168516951705171517251735174517551765177517851795180518151825183518451855186518751885189519051915192519351945195519651975198519952005201520252035204520552065207520852095210521152125213521452155216521752185219522052215222522352245225522652275228522952305231523252335234523552365237523852395240524152425243524452455246524752485249525052515252525352545255525652575258525952605261526252635264526552665267526852695270527152725273527452755276527752785279528052815282528352845285528652875288528952905291529252935294529552965297529852995300530153025303530453055306530753085309531053115312531353145315531653175318531953205321532253235324532553265327532853295330533153325333533453355336533753385339534053415342534353445345534653475348534953505351535253535354535553565357535853595360536153625363536453655366536753685369537053715372537353745375537653775378537953805381538253835384538553865387538853895390539153925393539453955396539753985399540054015402540354045405540654075408540954105411541254135414541554165417541854195420542154225423542454255426542754285429543054315432543354345435543654375438543954405441544254435444544554465447544854495450545154525453545454555456545754585459546054615462546354645465546654675468546954705471547254735474547554765477547854795480548154825483548454855486548754885489549054915492549354945495549654975498549955005501550255035504550555065507550855095510551155125513551455155516551755185519552055215522552355245525552655275528552955305531553255335534553555365537553855395540554155425543554455455546554755485549555055515552555355545555555655575558555955605561556255635564556555665567556855695570557155725573557455755576557755785579558055815582558355845585558655875588558955905591559255935594559555965597559855995600560156025603560456055606560756085609561056115612561356145615561656175618561956205621562256235624562556265627562856295630563156325633563456355636563756385639564056415642564356445645564656475648564956505651565256535654565556565657565856595660566156625663566456655666566756685669567056715672567356745675567656775678567956805681568256835684568556865687568856895690569156925693569456955696569756985699570057015702570357045705570657075708570957105711571257135714571557165717571857195720572157225723572457255726572757285729573057315732573357345735573657375738573957405741574257435744574557465747574857495750575157525753575457555756575757585759576057615762576357645765
  1. /*
  2. * drivers/net/wireless/mwl8k.c
  3. * Driver for Marvell TOPDOG 802.11 Wireless cards
  4. *
  5. * Copyright (C) 2008, 2009, 2010 Marvell Semiconductor Inc.
  6. *
  7. * This file is licensed under the terms of the GNU General Public
  8. * License version 2. This program is licensed "as is" without any
  9. * warranty of any kind, whether express or implied.
  10. */
  11. #include <linux/init.h>
  12. #include <linux/interrupt.h>
  13. #include <linux/module.h>
  14. #include <linux/kernel.h>
  15. #include <linux/sched.h>
  16. #include <linux/spinlock.h>
  17. #include <linux/list.h>
  18. #include <linux/pci.h>
  19. #include <linux/delay.h>
  20. #include <linux/completion.h>
  21. #include <linux/etherdevice.h>
  22. #include <linux/slab.h>
  23. #include <net/mac80211.h>
  24. #include <linux/moduleparam.h>
  25. #include <linux/firmware.h>
  26. #include <linux/workqueue.h>
  27. #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
  28. #define MWL8K_NAME KBUILD_MODNAME
  29. #define MWL8K_VERSION "0.12"
  30. /* Module parameters */
  31. static unsigned ap_mode_default;
  32. module_param(ap_mode_default, bool, 0);
  33. MODULE_PARM_DESC(ap_mode_default,
  34. "Set to 1 to make ap mode the default instead of sta mode");
  35. /* Register definitions */
  36. #define MWL8K_HIU_GEN_PTR 0x00000c10
  37. #define MWL8K_MODE_STA 0x0000005a
  38. #define MWL8K_MODE_AP 0x000000a5
  39. #define MWL8K_HIU_INT_CODE 0x00000c14
  40. #define MWL8K_FWSTA_READY 0xf0f1f2f4
  41. #define MWL8K_FWAP_READY 0xf1f2f4a5
  42. #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
  43. #define MWL8K_HIU_SCRATCH 0x00000c40
  44. /* Host->device communications */
  45. #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
  46. #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
  47. #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
  48. #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
  49. #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
  50. #define MWL8K_H2A_INT_DUMMY (1 << 20)
  51. #define MWL8K_H2A_INT_RESET (1 << 15)
  52. #define MWL8K_H2A_INT_DOORBELL (1 << 1)
  53. #define MWL8K_H2A_INT_PPA_READY (1 << 0)
  54. /* Device->host communications */
  55. #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
  56. #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
  57. #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
  58. #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
  59. #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
  60. #define MWL8K_A2H_INT_DUMMY (1 << 20)
  61. #define MWL8K_A2H_INT_BA_WATCHDOG (1 << 14)
  62. #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
  63. #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
  64. #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
  65. #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
  66. #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
  67. #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
  68. #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
  69. #define MWL8K_A2H_INT_RX_READY (1 << 1)
  70. #define MWL8K_A2H_INT_TX_DONE (1 << 0)
  71. /* HW micro second timer register
  72. * located at offset 0xA600. This
  73. * will be used to timestamp tx
  74. * packets.
  75. */
  76. #define MWL8K_HW_TIMER_REGISTER 0x0000a600
  77. #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
  78. MWL8K_A2H_INT_CHNL_SWITCHED | \
  79. MWL8K_A2H_INT_QUEUE_EMPTY | \
  80. MWL8K_A2H_INT_RADAR_DETECT | \
  81. MWL8K_A2H_INT_RADIO_ON | \
  82. MWL8K_A2H_INT_RADIO_OFF | \
  83. MWL8K_A2H_INT_MAC_EVENT | \
  84. MWL8K_A2H_INT_OPC_DONE | \
  85. MWL8K_A2H_INT_RX_READY | \
  86. MWL8K_A2H_INT_TX_DONE | \
  87. MWL8K_A2H_INT_BA_WATCHDOG)
  88. #define MWL8K_RX_QUEUES 1
  89. #define MWL8K_TX_WMM_QUEUES 4
  90. #define MWL8K_MAX_AMPDU_QUEUES 8
  91. #define MWL8K_MAX_TX_QUEUES (MWL8K_TX_WMM_QUEUES + MWL8K_MAX_AMPDU_QUEUES)
  92. #define mwl8k_tx_queues(priv) (MWL8K_TX_WMM_QUEUES + (priv)->num_ampdu_queues)
  93. struct rxd_ops {
  94. int rxd_size;
  95. void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr);
  96. void (*rxd_refill)(void *rxd, dma_addr_t addr, int len);
  97. int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status,
  98. __le16 *qos, s8 *noise);
  99. };
  100. struct mwl8k_device_info {
  101. char *part_name;
  102. char *helper_image;
  103. char *fw_image_sta;
  104. char *fw_image_ap;
  105. struct rxd_ops *ap_rxd_ops;
  106. u32 fw_api_ap;
  107. };
  108. struct mwl8k_rx_queue {
  109. int rxd_count;
  110. /* hw receives here */
  111. int head;
  112. /* refill descs here */
  113. int tail;
  114. void *rxd;
  115. dma_addr_t rxd_dma;
  116. struct {
  117. struct sk_buff *skb;
  118. DEFINE_DMA_UNMAP_ADDR(dma);
  119. } *buf;
  120. };
  121. struct mwl8k_tx_queue {
  122. /* hw transmits here */
  123. int head;
  124. /* sw appends here */
  125. int tail;
  126. unsigned int len;
  127. struct mwl8k_tx_desc *txd;
  128. dma_addr_t txd_dma;
  129. struct sk_buff **skb;
  130. };
  131. enum {
  132. AMPDU_NO_STREAM,
  133. AMPDU_STREAM_NEW,
  134. AMPDU_STREAM_IN_PROGRESS,
  135. AMPDU_STREAM_ACTIVE,
  136. };
  137. struct mwl8k_ampdu_stream {
  138. struct ieee80211_sta *sta;
  139. u8 tid;
  140. u8 state;
  141. u8 idx;
  142. u8 txq_idx; /* index of this stream in priv->txq */
  143. };
  144. struct mwl8k_priv {
  145. struct ieee80211_hw *hw;
  146. struct pci_dev *pdev;
  147. int irq;
  148. struct mwl8k_device_info *device_info;
  149. void __iomem *sram;
  150. void __iomem *regs;
  151. /* firmware */
  152. const struct firmware *fw_helper;
  153. const struct firmware *fw_ucode;
  154. /* hardware/firmware parameters */
  155. bool ap_fw;
  156. struct rxd_ops *rxd_ops;
  157. struct ieee80211_supported_band band_24;
  158. struct ieee80211_channel channels_24[14];
  159. struct ieee80211_rate rates_24[14];
  160. struct ieee80211_supported_band band_50;
  161. struct ieee80211_channel channels_50[4];
  162. struct ieee80211_rate rates_50[9];
  163. u32 ap_macids_supported;
  164. u32 sta_macids_supported;
  165. /* Ampdu stream information */
  166. u8 num_ampdu_queues;
  167. spinlock_t stream_lock;
  168. struct mwl8k_ampdu_stream ampdu[MWL8K_MAX_AMPDU_QUEUES];
  169. struct work_struct watchdog_ba_handle;
  170. /* firmware access */
  171. struct mutex fw_mutex;
  172. struct task_struct *fw_mutex_owner;
  173. int fw_mutex_depth;
  174. struct completion *hostcmd_wait;
  175. /* lock held over TX and TX reap */
  176. spinlock_t tx_lock;
  177. /* TX quiesce completion, protected by fw_mutex and tx_lock */
  178. struct completion *tx_wait;
  179. /* List of interfaces. */
  180. u32 macids_used;
  181. struct list_head vif_list;
  182. /* power management status cookie from firmware */
  183. u32 *cookie;
  184. dma_addr_t cookie_dma;
  185. u16 num_mcaddrs;
  186. u8 hw_rev;
  187. u32 fw_rev;
  188. /*
  189. * Running count of TX packets in flight, to avoid
  190. * iterating over the transmit rings each time.
  191. */
  192. int pending_tx_pkts;
  193. struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
  194. struct mwl8k_tx_queue txq[MWL8K_MAX_TX_QUEUES];
  195. u32 txq_offset[MWL8K_MAX_TX_QUEUES];
  196. bool radio_on;
  197. bool radio_short_preamble;
  198. bool sniffer_enabled;
  199. bool wmm_enabled;
  200. /* XXX need to convert this to handle multiple interfaces */
  201. bool capture_beacon;
  202. u8 capture_bssid[ETH_ALEN];
  203. struct sk_buff *beacon_skb;
  204. /*
  205. * This FJ worker has to be global as it is scheduled from the
  206. * RX handler. At this point we don't know which interface it
  207. * belongs to until the list of bssids waiting to complete join
  208. * is checked.
  209. */
  210. struct work_struct finalize_join_worker;
  211. /* Tasklet to perform TX reclaim. */
  212. struct tasklet_struct poll_tx_task;
  213. /* Tasklet to perform RX. */
  214. struct tasklet_struct poll_rx_task;
  215. /* Most recently reported noise in dBm */
  216. s8 noise;
  217. /*
  218. * preserve the queue configurations so they can be restored if/when
  219. * the firmware image is swapped.
  220. */
  221. struct ieee80211_tx_queue_params wmm_params[MWL8K_TX_WMM_QUEUES];
  222. /* async firmware loading state */
  223. unsigned fw_state;
  224. char *fw_pref;
  225. char *fw_alt;
  226. struct completion firmware_loading_complete;
  227. };
  228. #define MAX_WEP_KEY_LEN 13
  229. #define NUM_WEP_KEYS 4
  230. /* Per interface specific private data */
  231. struct mwl8k_vif {
  232. struct list_head list;
  233. struct ieee80211_vif *vif;
  234. /* Firmware macid for this vif. */
  235. int macid;
  236. /* Non AMPDU sequence number assigned by driver. */
  237. u16 seqno;
  238. /* Saved WEP keys */
  239. struct {
  240. u8 enabled;
  241. u8 key[sizeof(struct ieee80211_key_conf) + MAX_WEP_KEY_LEN];
  242. } wep_key_conf[NUM_WEP_KEYS];
  243. /* BSSID */
  244. u8 bssid[ETH_ALEN];
  245. /* A flag to indicate is HW crypto is enabled for this bssid */
  246. bool is_hw_crypto_enabled;
  247. };
  248. #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
  249. #define IEEE80211_KEY_CONF(_u8) ((struct ieee80211_key_conf *)(_u8))
  250. struct tx_traffic_info {
  251. u32 start_time;
  252. u32 pkts;
  253. };
  254. #define MWL8K_MAX_TID 8
  255. struct mwl8k_sta {
  256. /* Index into station database. Returned by UPDATE_STADB. */
  257. u8 peer_id;
  258. u8 is_ampdu_allowed;
  259. struct tx_traffic_info tx_stats[MWL8K_MAX_TID];
  260. };
  261. #define MWL8K_STA(_sta) ((struct mwl8k_sta *)&((_sta)->drv_priv))
  262. static const struct ieee80211_channel mwl8k_channels_24[] = {
  263. { .center_freq = 2412, .hw_value = 1, },
  264. { .center_freq = 2417, .hw_value = 2, },
  265. { .center_freq = 2422, .hw_value = 3, },
  266. { .center_freq = 2427, .hw_value = 4, },
  267. { .center_freq = 2432, .hw_value = 5, },
  268. { .center_freq = 2437, .hw_value = 6, },
  269. { .center_freq = 2442, .hw_value = 7, },
  270. { .center_freq = 2447, .hw_value = 8, },
  271. { .center_freq = 2452, .hw_value = 9, },
  272. { .center_freq = 2457, .hw_value = 10, },
  273. { .center_freq = 2462, .hw_value = 11, },
  274. { .center_freq = 2467, .hw_value = 12, },
  275. { .center_freq = 2472, .hw_value = 13, },
  276. { .center_freq = 2484, .hw_value = 14, },
  277. };
  278. static const struct ieee80211_rate mwl8k_rates_24[] = {
  279. { .bitrate = 10, .hw_value = 2, },
  280. { .bitrate = 20, .hw_value = 4, },
  281. { .bitrate = 55, .hw_value = 11, },
  282. { .bitrate = 110, .hw_value = 22, },
  283. { .bitrate = 220, .hw_value = 44, },
  284. { .bitrate = 60, .hw_value = 12, },
  285. { .bitrate = 90, .hw_value = 18, },
  286. { .bitrate = 120, .hw_value = 24, },
  287. { .bitrate = 180, .hw_value = 36, },
  288. { .bitrate = 240, .hw_value = 48, },
  289. { .bitrate = 360, .hw_value = 72, },
  290. { .bitrate = 480, .hw_value = 96, },
  291. { .bitrate = 540, .hw_value = 108, },
  292. { .bitrate = 720, .hw_value = 144, },
  293. };
  294. static const struct ieee80211_channel mwl8k_channels_50[] = {
  295. { .center_freq = 5180, .hw_value = 36, },
  296. { .center_freq = 5200, .hw_value = 40, },
  297. { .center_freq = 5220, .hw_value = 44, },
  298. { .center_freq = 5240, .hw_value = 48, },
  299. };
  300. static const struct ieee80211_rate mwl8k_rates_50[] = {
  301. { .bitrate = 60, .hw_value = 12, },
  302. { .bitrate = 90, .hw_value = 18, },
  303. { .bitrate = 120, .hw_value = 24, },
  304. { .bitrate = 180, .hw_value = 36, },
  305. { .bitrate = 240, .hw_value = 48, },
  306. { .bitrate = 360, .hw_value = 72, },
  307. { .bitrate = 480, .hw_value = 96, },
  308. { .bitrate = 540, .hw_value = 108, },
  309. { .bitrate = 720, .hw_value = 144, },
  310. };
  311. /* Set or get info from Firmware */
  312. #define MWL8K_CMD_GET 0x0000
  313. #define MWL8K_CMD_SET 0x0001
  314. #define MWL8K_CMD_SET_LIST 0x0002
  315. /* Firmware command codes */
  316. #define MWL8K_CMD_CODE_DNLD 0x0001
  317. #define MWL8K_CMD_GET_HW_SPEC 0x0003
  318. #define MWL8K_CMD_SET_HW_SPEC 0x0004
  319. #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
  320. #define MWL8K_CMD_GET_STAT 0x0014
  321. #define MWL8K_CMD_RADIO_CONTROL 0x001c
  322. #define MWL8K_CMD_RF_TX_POWER 0x001e
  323. #define MWL8K_CMD_TX_POWER 0x001f
  324. #define MWL8K_CMD_RF_ANTENNA 0x0020
  325. #define MWL8K_CMD_SET_BEACON 0x0100 /* per-vif */
  326. #define MWL8K_CMD_SET_PRE_SCAN 0x0107
  327. #define MWL8K_CMD_SET_POST_SCAN 0x0108
  328. #define MWL8K_CMD_SET_RF_CHANNEL 0x010a
  329. #define MWL8K_CMD_SET_AID 0x010d
  330. #define MWL8K_CMD_SET_RATE 0x0110
  331. #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
  332. #define MWL8K_CMD_RTS_THRESHOLD 0x0113
  333. #define MWL8K_CMD_SET_SLOT 0x0114
  334. #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
  335. #define MWL8K_CMD_SET_WMM_MODE 0x0123
  336. #define MWL8K_CMD_MIMO_CONFIG 0x0125
  337. #define MWL8K_CMD_USE_FIXED_RATE 0x0126
  338. #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
  339. #define MWL8K_CMD_SET_MAC_ADDR 0x0202 /* per-vif */
  340. #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
  341. #define MWL8K_CMD_GET_WATCHDOG_BITMAP 0x0205
  342. #define MWL8K_CMD_BSS_START 0x1100 /* per-vif */
  343. #define MWL8K_CMD_SET_NEW_STN 0x1111 /* per-vif */
  344. #define MWL8K_CMD_UPDATE_ENCRYPTION 0x1122 /* per-vif */
  345. #define MWL8K_CMD_UPDATE_STADB 0x1123
  346. #define MWL8K_CMD_BASTREAM 0x1125
  347. static const char *mwl8k_cmd_name(__le16 cmd, char *buf, int bufsize)
  348. {
  349. u16 command = le16_to_cpu(cmd);
  350. #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
  351. snprintf(buf, bufsize, "%s", #x);\
  352. return buf;\
  353. } while (0)
  354. switch (command & ~0x8000) {
  355. MWL8K_CMDNAME(CODE_DNLD);
  356. MWL8K_CMDNAME(GET_HW_SPEC);
  357. MWL8K_CMDNAME(SET_HW_SPEC);
  358. MWL8K_CMDNAME(MAC_MULTICAST_ADR);
  359. MWL8K_CMDNAME(GET_STAT);
  360. MWL8K_CMDNAME(RADIO_CONTROL);
  361. MWL8K_CMDNAME(RF_TX_POWER);
  362. MWL8K_CMDNAME(TX_POWER);
  363. MWL8K_CMDNAME(RF_ANTENNA);
  364. MWL8K_CMDNAME(SET_BEACON);
  365. MWL8K_CMDNAME(SET_PRE_SCAN);
  366. MWL8K_CMDNAME(SET_POST_SCAN);
  367. MWL8K_CMDNAME(SET_RF_CHANNEL);
  368. MWL8K_CMDNAME(SET_AID);
  369. MWL8K_CMDNAME(SET_RATE);
  370. MWL8K_CMDNAME(SET_FINALIZE_JOIN);
  371. MWL8K_CMDNAME(RTS_THRESHOLD);
  372. MWL8K_CMDNAME(SET_SLOT);
  373. MWL8K_CMDNAME(SET_EDCA_PARAMS);
  374. MWL8K_CMDNAME(SET_WMM_MODE);
  375. MWL8K_CMDNAME(MIMO_CONFIG);
  376. MWL8K_CMDNAME(USE_FIXED_RATE);
  377. MWL8K_CMDNAME(ENABLE_SNIFFER);
  378. MWL8K_CMDNAME(SET_MAC_ADDR);
  379. MWL8K_CMDNAME(SET_RATEADAPT_MODE);
  380. MWL8K_CMDNAME(BSS_START);
  381. MWL8K_CMDNAME(SET_NEW_STN);
  382. MWL8K_CMDNAME(UPDATE_ENCRYPTION);
  383. MWL8K_CMDNAME(UPDATE_STADB);
  384. MWL8K_CMDNAME(BASTREAM);
  385. MWL8K_CMDNAME(GET_WATCHDOG_BITMAP);
  386. default:
  387. snprintf(buf, bufsize, "0x%x", cmd);
  388. }
  389. #undef MWL8K_CMDNAME
  390. return buf;
  391. }
  392. /* Hardware and firmware reset */
  393. static void mwl8k_hw_reset(struct mwl8k_priv *priv)
  394. {
  395. iowrite32(MWL8K_H2A_INT_RESET,
  396. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  397. iowrite32(MWL8K_H2A_INT_RESET,
  398. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  399. msleep(20);
  400. }
  401. /* Release fw image */
  402. static void mwl8k_release_fw(const struct firmware **fw)
  403. {
  404. if (*fw == NULL)
  405. return;
  406. release_firmware(*fw);
  407. *fw = NULL;
  408. }
  409. static void mwl8k_release_firmware(struct mwl8k_priv *priv)
  410. {
  411. mwl8k_release_fw(&priv->fw_ucode);
  412. mwl8k_release_fw(&priv->fw_helper);
  413. }
  414. /* states for asynchronous f/w loading */
  415. static void mwl8k_fw_state_machine(const struct firmware *fw, void *context);
  416. enum {
  417. FW_STATE_INIT = 0,
  418. FW_STATE_LOADING_PREF,
  419. FW_STATE_LOADING_ALT,
  420. FW_STATE_ERROR,
  421. };
  422. /* Request fw image */
  423. static int mwl8k_request_fw(struct mwl8k_priv *priv,
  424. const char *fname, const struct firmware **fw,
  425. bool nowait)
  426. {
  427. /* release current image */
  428. if (*fw != NULL)
  429. mwl8k_release_fw(fw);
  430. if (nowait)
  431. return request_firmware_nowait(THIS_MODULE, 1, fname,
  432. &priv->pdev->dev, GFP_KERNEL,
  433. priv, mwl8k_fw_state_machine);
  434. else
  435. return request_firmware(fw, fname, &priv->pdev->dev);
  436. }
  437. static int mwl8k_request_firmware(struct mwl8k_priv *priv, char *fw_image,
  438. bool nowait)
  439. {
  440. struct mwl8k_device_info *di = priv->device_info;
  441. int rc;
  442. if (di->helper_image != NULL) {
  443. if (nowait)
  444. rc = mwl8k_request_fw(priv, di->helper_image,
  445. &priv->fw_helper, true);
  446. else
  447. rc = mwl8k_request_fw(priv, di->helper_image,
  448. &priv->fw_helper, false);
  449. if (rc)
  450. printk(KERN_ERR "%s: Error requesting helper fw %s\n",
  451. pci_name(priv->pdev), di->helper_image);
  452. if (rc || nowait)
  453. return rc;
  454. }
  455. if (nowait) {
  456. /*
  457. * if we get here, no helper image is needed. Skip the
  458. * FW_STATE_INIT state.
  459. */
  460. priv->fw_state = FW_STATE_LOADING_PREF;
  461. rc = mwl8k_request_fw(priv, fw_image,
  462. &priv->fw_ucode,
  463. true);
  464. } else
  465. rc = mwl8k_request_fw(priv, fw_image,
  466. &priv->fw_ucode, false);
  467. if (rc) {
  468. printk(KERN_ERR "%s: Error requesting firmware file %s\n",
  469. pci_name(priv->pdev), fw_image);
  470. mwl8k_release_fw(&priv->fw_helper);
  471. return rc;
  472. }
  473. return 0;
  474. }
  475. struct mwl8k_cmd_pkt {
  476. __le16 code;
  477. __le16 length;
  478. __u8 seq_num;
  479. __u8 macid;
  480. __le16 result;
  481. char payload[0];
  482. } __packed;
  483. /*
  484. * Firmware loading.
  485. */
  486. static int
  487. mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
  488. {
  489. void __iomem *regs = priv->regs;
  490. dma_addr_t dma_addr;
  491. int loops;
  492. dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
  493. if (pci_dma_mapping_error(priv->pdev, dma_addr))
  494. return -ENOMEM;
  495. iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
  496. iowrite32(0, regs + MWL8K_HIU_INT_CODE);
  497. iowrite32(MWL8K_H2A_INT_DOORBELL,
  498. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  499. iowrite32(MWL8K_H2A_INT_DUMMY,
  500. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  501. loops = 1000;
  502. do {
  503. u32 int_code;
  504. int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
  505. if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
  506. iowrite32(0, regs + MWL8K_HIU_INT_CODE);
  507. break;
  508. }
  509. cond_resched();
  510. udelay(1);
  511. } while (--loops);
  512. pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
  513. return loops ? 0 : -ETIMEDOUT;
  514. }
  515. static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
  516. const u8 *data, size_t length)
  517. {
  518. struct mwl8k_cmd_pkt *cmd;
  519. int done;
  520. int rc = 0;
  521. cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
  522. if (cmd == NULL)
  523. return -ENOMEM;
  524. cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
  525. cmd->seq_num = 0;
  526. cmd->macid = 0;
  527. cmd->result = 0;
  528. done = 0;
  529. while (length) {
  530. int block_size = length > 256 ? 256 : length;
  531. memcpy(cmd->payload, data + done, block_size);
  532. cmd->length = cpu_to_le16(block_size);
  533. rc = mwl8k_send_fw_load_cmd(priv, cmd,
  534. sizeof(*cmd) + block_size);
  535. if (rc)
  536. break;
  537. done += block_size;
  538. length -= block_size;
  539. }
  540. if (!rc) {
  541. cmd->length = 0;
  542. rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
  543. }
  544. kfree(cmd);
  545. return rc;
  546. }
  547. static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
  548. const u8 *data, size_t length)
  549. {
  550. unsigned char *buffer;
  551. int may_continue, rc = 0;
  552. u32 done, prev_block_size;
  553. buffer = kmalloc(1024, GFP_KERNEL);
  554. if (buffer == NULL)
  555. return -ENOMEM;
  556. done = 0;
  557. prev_block_size = 0;
  558. may_continue = 1000;
  559. while (may_continue > 0) {
  560. u32 block_size;
  561. block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
  562. if (block_size & 1) {
  563. block_size &= ~1;
  564. may_continue--;
  565. } else {
  566. done += prev_block_size;
  567. length -= prev_block_size;
  568. }
  569. if (block_size > 1024 || block_size > length) {
  570. rc = -EOVERFLOW;
  571. break;
  572. }
  573. if (length == 0) {
  574. rc = 0;
  575. break;
  576. }
  577. if (block_size == 0) {
  578. rc = -EPROTO;
  579. may_continue--;
  580. udelay(1);
  581. continue;
  582. }
  583. prev_block_size = block_size;
  584. memcpy(buffer, data + done, block_size);
  585. rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
  586. if (rc)
  587. break;
  588. }
  589. if (!rc && length != 0)
  590. rc = -EREMOTEIO;
  591. kfree(buffer);
  592. return rc;
  593. }
  594. static int mwl8k_load_firmware(struct ieee80211_hw *hw)
  595. {
  596. struct mwl8k_priv *priv = hw->priv;
  597. const struct firmware *fw = priv->fw_ucode;
  598. int rc;
  599. int loops;
  600. if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) {
  601. const struct firmware *helper = priv->fw_helper;
  602. if (helper == NULL) {
  603. printk(KERN_ERR "%s: helper image needed but none "
  604. "given\n", pci_name(priv->pdev));
  605. return -EINVAL;
  606. }
  607. rc = mwl8k_load_fw_image(priv, helper->data, helper->size);
  608. if (rc) {
  609. printk(KERN_ERR "%s: unable to load firmware "
  610. "helper image\n", pci_name(priv->pdev));
  611. return rc;
  612. }
  613. msleep(20);
  614. rc = mwl8k_feed_fw_image(priv, fw->data, fw->size);
  615. } else {
  616. rc = mwl8k_load_fw_image(priv, fw->data, fw->size);
  617. }
  618. if (rc) {
  619. printk(KERN_ERR "%s: unable to load firmware image\n",
  620. pci_name(priv->pdev));
  621. return rc;
  622. }
  623. iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
  624. loops = 500000;
  625. do {
  626. u32 ready_code;
  627. ready_code = ioread32(priv->regs + MWL8K_HIU_INT_CODE);
  628. if (ready_code == MWL8K_FWAP_READY) {
  629. priv->ap_fw = 1;
  630. break;
  631. } else if (ready_code == MWL8K_FWSTA_READY) {
  632. priv->ap_fw = 0;
  633. break;
  634. }
  635. cond_resched();
  636. udelay(1);
  637. } while (--loops);
  638. return loops ? 0 : -ETIMEDOUT;
  639. }
  640. /* DMA header used by firmware and hardware. */
  641. struct mwl8k_dma_data {
  642. __le16 fwlen;
  643. struct ieee80211_hdr wh;
  644. char data[0];
  645. } __packed;
  646. /* Routines to add/remove DMA header from skb. */
  647. static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos)
  648. {
  649. struct mwl8k_dma_data *tr;
  650. int hdrlen;
  651. tr = (struct mwl8k_dma_data *)skb->data;
  652. hdrlen = ieee80211_hdrlen(tr->wh.frame_control);
  653. if (hdrlen != sizeof(tr->wh)) {
  654. if (ieee80211_is_data_qos(tr->wh.frame_control)) {
  655. memmove(tr->data - hdrlen, &tr->wh, hdrlen - 2);
  656. *((__le16 *)(tr->data - 2)) = qos;
  657. } else {
  658. memmove(tr->data - hdrlen, &tr->wh, hdrlen);
  659. }
  660. }
  661. if (hdrlen != sizeof(*tr))
  662. skb_pull(skb, sizeof(*tr) - hdrlen);
  663. }
  664. #define REDUCED_TX_HEADROOM 8
  665. static void
  666. mwl8k_add_dma_header(struct mwl8k_priv *priv, struct sk_buff *skb,
  667. int head_pad, int tail_pad)
  668. {
  669. struct ieee80211_hdr *wh;
  670. int hdrlen;
  671. int reqd_hdrlen;
  672. struct mwl8k_dma_data *tr;
  673. /*
  674. * Add a firmware DMA header; the firmware requires that we
  675. * present a 2-byte payload length followed by a 4-address
  676. * header (without QoS field), followed (optionally) by any
  677. * WEP/ExtIV header (but only filled in for CCMP).
  678. */
  679. wh = (struct ieee80211_hdr *)skb->data;
  680. hdrlen = ieee80211_hdrlen(wh->frame_control);
  681. /*
  682. * Check if skb_resize is required because of
  683. * tx_headroom adjustment.
  684. */
  685. if (priv->ap_fw && (hdrlen < (sizeof(struct ieee80211_cts)
  686. + REDUCED_TX_HEADROOM))) {
  687. if (pskb_expand_head(skb, REDUCED_TX_HEADROOM, 0, GFP_ATOMIC)) {
  688. wiphy_err(priv->hw->wiphy,
  689. "Failed to reallocate TX buffer\n");
  690. return;
  691. }
  692. skb->truesize += REDUCED_TX_HEADROOM;
  693. }
  694. reqd_hdrlen = sizeof(*tr) + head_pad;
  695. if (hdrlen != reqd_hdrlen)
  696. skb_push(skb, reqd_hdrlen - hdrlen);
  697. if (ieee80211_is_data_qos(wh->frame_control))
  698. hdrlen -= IEEE80211_QOS_CTL_LEN;
  699. tr = (struct mwl8k_dma_data *)skb->data;
  700. if (wh != &tr->wh)
  701. memmove(&tr->wh, wh, hdrlen);
  702. if (hdrlen != sizeof(tr->wh))
  703. memset(((void *)&tr->wh) + hdrlen, 0, sizeof(tr->wh) - hdrlen);
  704. /*
  705. * Firmware length is the length of the fully formed "802.11
  706. * payload". That is, everything except for the 802.11 header.
  707. * This includes all crypto material including the MIC.
  708. */
  709. tr->fwlen = cpu_to_le16(skb->len - sizeof(*tr) + tail_pad);
  710. }
  711. static void mwl8k_encapsulate_tx_frame(struct mwl8k_priv *priv,
  712. struct sk_buff *skb)
  713. {
  714. struct ieee80211_hdr *wh;
  715. struct ieee80211_tx_info *tx_info;
  716. struct ieee80211_key_conf *key_conf;
  717. int data_pad;
  718. int head_pad = 0;
  719. wh = (struct ieee80211_hdr *)skb->data;
  720. tx_info = IEEE80211_SKB_CB(skb);
  721. key_conf = NULL;
  722. if (ieee80211_is_data(wh->frame_control))
  723. key_conf = tx_info->control.hw_key;
  724. /*
  725. * Make sure the packet header is in the DMA header format (4-address
  726. * without QoS), and add head & tail padding when HW crypto is enabled.
  727. *
  728. * We have the following trailer padding requirements:
  729. * - WEP: 4 trailer bytes (ICV)
  730. * - TKIP: 12 trailer bytes (8 MIC + 4 ICV)
  731. * - CCMP: 8 trailer bytes (MIC)
  732. */
  733. data_pad = 0;
  734. if (key_conf != NULL) {
  735. head_pad = key_conf->iv_len;
  736. switch (key_conf->cipher) {
  737. case WLAN_CIPHER_SUITE_WEP40:
  738. case WLAN_CIPHER_SUITE_WEP104:
  739. data_pad = 4;
  740. break;
  741. case WLAN_CIPHER_SUITE_TKIP:
  742. data_pad = 12;
  743. break;
  744. case WLAN_CIPHER_SUITE_CCMP:
  745. data_pad = 8;
  746. break;
  747. }
  748. }
  749. mwl8k_add_dma_header(priv, skb, head_pad, data_pad);
  750. }
  751. /*
  752. * Packet reception for 88w8366 AP firmware.
  753. */
  754. struct mwl8k_rxd_8366_ap {
  755. __le16 pkt_len;
  756. __u8 sq2;
  757. __u8 rate;
  758. __le32 pkt_phys_addr;
  759. __le32 next_rxd_phys_addr;
  760. __le16 qos_control;
  761. __le16 htsig2;
  762. __le32 hw_rssi_info;
  763. __le32 hw_noise_floor_info;
  764. __u8 noise_floor;
  765. __u8 pad0[3];
  766. __u8 rssi;
  767. __u8 rx_status;
  768. __u8 channel;
  769. __u8 rx_ctrl;
  770. } __packed;
  771. #define MWL8K_8366_AP_RATE_INFO_MCS_FORMAT 0x80
  772. #define MWL8K_8366_AP_RATE_INFO_40MHZ 0x40
  773. #define MWL8K_8366_AP_RATE_INFO_RATEID(x) ((x) & 0x3f)
  774. #define MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST 0x80
  775. /* 8366 AP rx_status bits */
  776. #define MWL8K_8366_AP_RXSTAT_DECRYPT_ERR_MASK 0x80
  777. #define MWL8K_8366_AP_RXSTAT_GENERAL_DECRYPT_ERR 0xFF
  778. #define MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_MIC_ERR 0x02
  779. #define MWL8K_8366_AP_RXSTAT_WEP_DECRYPT_ICV_ERR 0x04
  780. #define MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_ICV_ERR 0x08
  781. static void mwl8k_rxd_8366_ap_init(void *_rxd, dma_addr_t next_dma_addr)
  782. {
  783. struct mwl8k_rxd_8366_ap *rxd = _rxd;
  784. rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
  785. rxd->rx_ctrl = MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST;
  786. }
  787. static void mwl8k_rxd_8366_ap_refill(void *_rxd, dma_addr_t addr, int len)
  788. {
  789. struct mwl8k_rxd_8366_ap *rxd = _rxd;
  790. rxd->pkt_len = cpu_to_le16(len);
  791. rxd->pkt_phys_addr = cpu_to_le32(addr);
  792. wmb();
  793. rxd->rx_ctrl = 0;
  794. }
  795. static int
  796. mwl8k_rxd_8366_ap_process(void *_rxd, struct ieee80211_rx_status *status,
  797. __le16 *qos, s8 *noise)
  798. {
  799. struct mwl8k_rxd_8366_ap *rxd = _rxd;
  800. if (!(rxd->rx_ctrl & MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST))
  801. return -1;
  802. rmb();
  803. memset(status, 0, sizeof(*status));
  804. status->signal = -rxd->rssi;
  805. *noise = -rxd->noise_floor;
  806. if (rxd->rate & MWL8K_8366_AP_RATE_INFO_MCS_FORMAT) {
  807. status->flag |= RX_FLAG_HT;
  808. if (rxd->rate & MWL8K_8366_AP_RATE_INFO_40MHZ)
  809. status->flag |= RX_FLAG_40MHZ;
  810. status->rate_idx = MWL8K_8366_AP_RATE_INFO_RATEID(rxd->rate);
  811. } else {
  812. int i;
  813. for (i = 0; i < ARRAY_SIZE(mwl8k_rates_24); i++) {
  814. if (mwl8k_rates_24[i].hw_value == rxd->rate) {
  815. status->rate_idx = i;
  816. break;
  817. }
  818. }
  819. }
  820. if (rxd->channel > 14) {
  821. status->band = IEEE80211_BAND_5GHZ;
  822. if (!(status->flag & RX_FLAG_HT))
  823. status->rate_idx -= 5;
  824. } else {
  825. status->band = IEEE80211_BAND_2GHZ;
  826. }
  827. status->freq = ieee80211_channel_to_frequency(rxd->channel,
  828. status->band);
  829. *qos = rxd->qos_control;
  830. if ((rxd->rx_status != MWL8K_8366_AP_RXSTAT_GENERAL_DECRYPT_ERR) &&
  831. (rxd->rx_status & MWL8K_8366_AP_RXSTAT_DECRYPT_ERR_MASK) &&
  832. (rxd->rx_status & MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_MIC_ERR))
  833. status->flag |= RX_FLAG_MMIC_ERROR;
  834. return le16_to_cpu(rxd->pkt_len);
  835. }
  836. static struct rxd_ops rxd_8366_ap_ops = {
  837. .rxd_size = sizeof(struct mwl8k_rxd_8366_ap),
  838. .rxd_init = mwl8k_rxd_8366_ap_init,
  839. .rxd_refill = mwl8k_rxd_8366_ap_refill,
  840. .rxd_process = mwl8k_rxd_8366_ap_process,
  841. };
  842. /*
  843. * Packet reception for STA firmware.
  844. */
  845. struct mwl8k_rxd_sta {
  846. __le16 pkt_len;
  847. __u8 link_quality;
  848. __u8 noise_level;
  849. __le32 pkt_phys_addr;
  850. __le32 next_rxd_phys_addr;
  851. __le16 qos_control;
  852. __le16 rate_info;
  853. __le32 pad0[4];
  854. __u8 rssi;
  855. __u8 channel;
  856. __le16 pad1;
  857. __u8 rx_ctrl;
  858. __u8 rx_status;
  859. __u8 pad2[2];
  860. } __packed;
  861. #define MWL8K_STA_RATE_INFO_SHORTPRE 0x8000
  862. #define MWL8K_STA_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3)
  863. #define MWL8K_STA_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f)
  864. #define MWL8K_STA_RATE_INFO_40MHZ 0x0004
  865. #define MWL8K_STA_RATE_INFO_SHORTGI 0x0002
  866. #define MWL8K_STA_RATE_INFO_MCS_FORMAT 0x0001
  867. #define MWL8K_STA_RX_CTRL_OWNED_BY_HOST 0x02
  868. #define MWL8K_STA_RX_CTRL_DECRYPT_ERROR 0x04
  869. /* ICV=0 or MIC=1 */
  870. #define MWL8K_STA_RX_CTRL_DEC_ERR_TYPE 0x08
  871. /* Key is uploaded only in failure case */
  872. #define MWL8K_STA_RX_CTRL_KEY_INDEX 0x30
  873. static void mwl8k_rxd_sta_init(void *_rxd, dma_addr_t next_dma_addr)
  874. {
  875. struct mwl8k_rxd_sta *rxd = _rxd;
  876. rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
  877. rxd->rx_ctrl = MWL8K_STA_RX_CTRL_OWNED_BY_HOST;
  878. }
  879. static void mwl8k_rxd_sta_refill(void *_rxd, dma_addr_t addr, int len)
  880. {
  881. struct mwl8k_rxd_sta *rxd = _rxd;
  882. rxd->pkt_len = cpu_to_le16(len);
  883. rxd->pkt_phys_addr = cpu_to_le32(addr);
  884. wmb();
  885. rxd->rx_ctrl = 0;
  886. }
  887. static int
  888. mwl8k_rxd_sta_process(void *_rxd, struct ieee80211_rx_status *status,
  889. __le16 *qos, s8 *noise)
  890. {
  891. struct mwl8k_rxd_sta *rxd = _rxd;
  892. u16 rate_info;
  893. if (!(rxd->rx_ctrl & MWL8K_STA_RX_CTRL_OWNED_BY_HOST))
  894. return -1;
  895. rmb();
  896. rate_info = le16_to_cpu(rxd->rate_info);
  897. memset(status, 0, sizeof(*status));
  898. status->signal = -rxd->rssi;
  899. *noise = -rxd->noise_level;
  900. status->antenna = MWL8K_STA_RATE_INFO_ANTSELECT(rate_info);
  901. status->rate_idx = MWL8K_STA_RATE_INFO_RATEID(rate_info);
  902. if (rate_info & MWL8K_STA_RATE_INFO_SHORTPRE)
  903. status->flag |= RX_FLAG_SHORTPRE;
  904. if (rate_info & MWL8K_STA_RATE_INFO_40MHZ)
  905. status->flag |= RX_FLAG_40MHZ;
  906. if (rate_info & MWL8K_STA_RATE_INFO_SHORTGI)
  907. status->flag |= RX_FLAG_SHORT_GI;
  908. if (rate_info & MWL8K_STA_RATE_INFO_MCS_FORMAT)
  909. status->flag |= RX_FLAG_HT;
  910. if (rxd->channel > 14) {
  911. status->band = IEEE80211_BAND_5GHZ;
  912. if (!(status->flag & RX_FLAG_HT))
  913. status->rate_idx -= 5;
  914. } else {
  915. status->band = IEEE80211_BAND_2GHZ;
  916. }
  917. status->freq = ieee80211_channel_to_frequency(rxd->channel,
  918. status->band);
  919. *qos = rxd->qos_control;
  920. if ((rxd->rx_ctrl & MWL8K_STA_RX_CTRL_DECRYPT_ERROR) &&
  921. (rxd->rx_ctrl & MWL8K_STA_RX_CTRL_DEC_ERR_TYPE))
  922. status->flag |= RX_FLAG_MMIC_ERROR;
  923. return le16_to_cpu(rxd->pkt_len);
  924. }
  925. static struct rxd_ops rxd_sta_ops = {
  926. .rxd_size = sizeof(struct mwl8k_rxd_sta),
  927. .rxd_init = mwl8k_rxd_sta_init,
  928. .rxd_refill = mwl8k_rxd_sta_refill,
  929. .rxd_process = mwl8k_rxd_sta_process,
  930. };
  931. #define MWL8K_RX_DESCS 256
  932. #define MWL8K_RX_MAXSZ 3800
  933. static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
  934. {
  935. struct mwl8k_priv *priv = hw->priv;
  936. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  937. int size;
  938. int i;
  939. rxq->rxd_count = 0;
  940. rxq->head = 0;
  941. rxq->tail = 0;
  942. size = MWL8K_RX_DESCS * priv->rxd_ops->rxd_size;
  943. rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma);
  944. if (rxq->rxd == NULL) {
  945. wiphy_err(hw->wiphy, "failed to alloc RX descriptors\n");
  946. return -ENOMEM;
  947. }
  948. memset(rxq->rxd, 0, size);
  949. rxq->buf = kcalloc(MWL8K_RX_DESCS, sizeof(*rxq->buf), GFP_KERNEL);
  950. if (rxq->buf == NULL) {
  951. wiphy_err(hw->wiphy, "failed to alloc RX skbuff list\n");
  952. pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma);
  953. return -ENOMEM;
  954. }
  955. for (i = 0; i < MWL8K_RX_DESCS; i++) {
  956. int desc_size;
  957. void *rxd;
  958. int nexti;
  959. dma_addr_t next_dma_addr;
  960. desc_size = priv->rxd_ops->rxd_size;
  961. rxd = rxq->rxd + (i * priv->rxd_ops->rxd_size);
  962. nexti = i + 1;
  963. if (nexti == MWL8K_RX_DESCS)
  964. nexti = 0;
  965. next_dma_addr = rxq->rxd_dma + (nexti * desc_size);
  966. priv->rxd_ops->rxd_init(rxd, next_dma_addr);
  967. }
  968. return 0;
  969. }
  970. static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
  971. {
  972. struct mwl8k_priv *priv = hw->priv;
  973. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  974. int refilled;
  975. refilled = 0;
  976. while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) {
  977. struct sk_buff *skb;
  978. dma_addr_t addr;
  979. int rx;
  980. void *rxd;
  981. skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
  982. if (skb == NULL)
  983. break;
  984. addr = pci_map_single(priv->pdev, skb->data,
  985. MWL8K_RX_MAXSZ, DMA_FROM_DEVICE);
  986. rxq->rxd_count++;
  987. rx = rxq->tail++;
  988. if (rxq->tail == MWL8K_RX_DESCS)
  989. rxq->tail = 0;
  990. rxq->buf[rx].skb = skb;
  991. dma_unmap_addr_set(&rxq->buf[rx], dma, addr);
  992. rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size);
  993. priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ);
  994. refilled++;
  995. }
  996. return refilled;
  997. }
  998. /* Must be called only when the card's reception is completely halted */
  999. static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
  1000. {
  1001. struct mwl8k_priv *priv = hw->priv;
  1002. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  1003. int i;
  1004. if (rxq->rxd == NULL)
  1005. return;
  1006. for (i = 0; i < MWL8K_RX_DESCS; i++) {
  1007. if (rxq->buf[i].skb != NULL) {
  1008. pci_unmap_single(priv->pdev,
  1009. dma_unmap_addr(&rxq->buf[i], dma),
  1010. MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
  1011. dma_unmap_addr_set(&rxq->buf[i], dma, 0);
  1012. kfree_skb(rxq->buf[i].skb);
  1013. rxq->buf[i].skb = NULL;
  1014. }
  1015. }
  1016. kfree(rxq->buf);
  1017. rxq->buf = NULL;
  1018. pci_free_consistent(priv->pdev,
  1019. MWL8K_RX_DESCS * priv->rxd_ops->rxd_size,
  1020. rxq->rxd, rxq->rxd_dma);
  1021. rxq->rxd = NULL;
  1022. }
  1023. /*
  1024. * Scan a list of BSSIDs to process for finalize join.
  1025. * Allows for extension to process multiple BSSIDs.
  1026. */
  1027. static inline int
  1028. mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
  1029. {
  1030. return priv->capture_beacon &&
  1031. ieee80211_is_beacon(wh->frame_control) &&
  1032. !compare_ether_addr(wh->addr3, priv->capture_bssid);
  1033. }
  1034. static inline void mwl8k_save_beacon(struct ieee80211_hw *hw,
  1035. struct sk_buff *skb)
  1036. {
  1037. struct mwl8k_priv *priv = hw->priv;
  1038. priv->capture_beacon = false;
  1039. memset(priv->capture_bssid, 0, ETH_ALEN);
  1040. /*
  1041. * Use GFP_ATOMIC as rxq_process is called from
  1042. * the primary interrupt handler, memory allocation call
  1043. * must not sleep.
  1044. */
  1045. priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
  1046. if (priv->beacon_skb != NULL)
  1047. ieee80211_queue_work(hw, &priv->finalize_join_worker);
  1048. }
  1049. static inline struct mwl8k_vif *mwl8k_find_vif_bss(struct list_head *vif_list,
  1050. u8 *bssid)
  1051. {
  1052. struct mwl8k_vif *mwl8k_vif;
  1053. list_for_each_entry(mwl8k_vif,
  1054. vif_list, list) {
  1055. if (memcmp(bssid, mwl8k_vif->bssid,
  1056. ETH_ALEN) == 0)
  1057. return mwl8k_vif;
  1058. }
  1059. return NULL;
  1060. }
  1061. static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
  1062. {
  1063. struct mwl8k_priv *priv = hw->priv;
  1064. struct mwl8k_vif *mwl8k_vif = NULL;
  1065. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  1066. int processed;
  1067. processed = 0;
  1068. while (rxq->rxd_count && limit--) {
  1069. struct sk_buff *skb;
  1070. void *rxd;
  1071. int pkt_len;
  1072. struct ieee80211_rx_status status;
  1073. struct ieee80211_hdr *wh;
  1074. __le16 qos;
  1075. skb = rxq->buf[rxq->head].skb;
  1076. if (skb == NULL)
  1077. break;
  1078. rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size);
  1079. pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos,
  1080. &priv->noise);
  1081. if (pkt_len < 0)
  1082. break;
  1083. rxq->buf[rxq->head].skb = NULL;
  1084. pci_unmap_single(priv->pdev,
  1085. dma_unmap_addr(&rxq->buf[rxq->head], dma),
  1086. MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
  1087. dma_unmap_addr_set(&rxq->buf[rxq->head], dma, 0);
  1088. rxq->head++;
  1089. if (rxq->head == MWL8K_RX_DESCS)
  1090. rxq->head = 0;
  1091. rxq->rxd_count--;
  1092. wh = &((struct mwl8k_dma_data *)skb->data)->wh;
  1093. /*
  1094. * Check for a pending join operation. Save a
  1095. * copy of the beacon and schedule a tasklet to
  1096. * send a FINALIZE_JOIN command to the firmware.
  1097. */
  1098. if (mwl8k_capture_bssid(priv, (void *)skb->data))
  1099. mwl8k_save_beacon(hw, skb);
  1100. if (ieee80211_has_protected(wh->frame_control)) {
  1101. /* Check if hw crypto has been enabled for
  1102. * this bss. If yes, set the status flags
  1103. * accordingly
  1104. */
  1105. mwl8k_vif = mwl8k_find_vif_bss(&priv->vif_list,
  1106. wh->addr1);
  1107. if (mwl8k_vif != NULL &&
  1108. mwl8k_vif->is_hw_crypto_enabled == true) {
  1109. /*
  1110. * When MMIC ERROR is encountered
  1111. * by the firmware, payload is
  1112. * dropped and only 32 bytes of
  1113. * mwl8k Firmware header is sent
  1114. * to the host.
  1115. *
  1116. * We need to add four bytes of
  1117. * key information. In it
  1118. * MAC80211 expects keyidx set to
  1119. * 0 for triggering Counter
  1120. * Measure of MMIC failure.
  1121. */
  1122. if (status.flag & RX_FLAG_MMIC_ERROR) {
  1123. struct mwl8k_dma_data *tr;
  1124. tr = (struct mwl8k_dma_data *)skb->data;
  1125. memset((void *)&(tr->data), 0, 4);
  1126. pkt_len += 4;
  1127. }
  1128. if (!ieee80211_is_auth(wh->frame_control))
  1129. status.flag |= RX_FLAG_IV_STRIPPED |
  1130. RX_FLAG_DECRYPTED |
  1131. RX_FLAG_MMIC_STRIPPED;
  1132. }
  1133. }
  1134. skb_put(skb, pkt_len);
  1135. mwl8k_remove_dma_header(skb, qos);
  1136. memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
  1137. ieee80211_rx_irqsafe(hw, skb);
  1138. processed++;
  1139. }
  1140. return processed;
  1141. }
  1142. /*
  1143. * Packet transmission.
  1144. */
  1145. #define MWL8K_TXD_STATUS_OK 0x00000001
  1146. #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
  1147. #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
  1148. #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
  1149. #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
  1150. #define MWL8K_QOS_QLEN_UNSPEC 0xff00
  1151. #define MWL8K_QOS_ACK_POLICY_MASK 0x0060
  1152. #define MWL8K_QOS_ACK_POLICY_NORMAL 0x0000
  1153. #define MWL8K_QOS_ACK_POLICY_BLOCKACK 0x0060
  1154. #define MWL8K_QOS_EOSP 0x0010
  1155. struct mwl8k_tx_desc {
  1156. __le32 status;
  1157. __u8 data_rate;
  1158. __u8 tx_priority;
  1159. __le16 qos_control;
  1160. __le32 pkt_phys_addr;
  1161. __le16 pkt_len;
  1162. __u8 dest_MAC_addr[ETH_ALEN];
  1163. __le32 next_txd_phys_addr;
  1164. __le32 timestamp;
  1165. __le16 rate_info;
  1166. __u8 peer_id;
  1167. __u8 tx_frag_cnt;
  1168. } __packed;
  1169. #define MWL8K_TX_DESCS 128
  1170. static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
  1171. {
  1172. struct mwl8k_priv *priv = hw->priv;
  1173. struct mwl8k_tx_queue *txq = priv->txq + index;
  1174. int size;
  1175. int i;
  1176. txq->len = 0;
  1177. txq->head = 0;
  1178. txq->tail = 0;
  1179. size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
  1180. txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma);
  1181. if (txq->txd == NULL) {
  1182. wiphy_err(hw->wiphy, "failed to alloc TX descriptors\n");
  1183. return -ENOMEM;
  1184. }
  1185. memset(txq->txd, 0, size);
  1186. txq->skb = kcalloc(MWL8K_TX_DESCS, sizeof(*txq->skb), GFP_KERNEL);
  1187. if (txq->skb == NULL) {
  1188. wiphy_err(hw->wiphy, "failed to alloc TX skbuff list\n");
  1189. pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma);
  1190. return -ENOMEM;
  1191. }
  1192. for (i = 0; i < MWL8K_TX_DESCS; i++) {
  1193. struct mwl8k_tx_desc *tx_desc;
  1194. int nexti;
  1195. tx_desc = txq->txd + i;
  1196. nexti = (i + 1) % MWL8K_TX_DESCS;
  1197. tx_desc->status = 0;
  1198. tx_desc->next_txd_phys_addr =
  1199. cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc));
  1200. }
  1201. return 0;
  1202. }
  1203. static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
  1204. {
  1205. iowrite32(MWL8K_H2A_INT_PPA_READY,
  1206. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1207. iowrite32(MWL8K_H2A_INT_DUMMY,
  1208. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1209. ioread32(priv->regs + MWL8K_HIU_INT_CODE);
  1210. }
  1211. static void mwl8k_dump_tx_rings(struct ieee80211_hw *hw)
  1212. {
  1213. struct mwl8k_priv *priv = hw->priv;
  1214. int i;
  1215. for (i = 0; i < mwl8k_tx_queues(priv); i++) {
  1216. struct mwl8k_tx_queue *txq = priv->txq + i;
  1217. int fw_owned = 0;
  1218. int drv_owned = 0;
  1219. int unused = 0;
  1220. int desc;
  1221. for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
  1222. struct mwl8k_tx_desc *tx_desc = txq->txd + desc;
  1223. u32 status;
  1224. status = le32_to_cpu(tx_desc->status);
  1225. if (status & MWL8K_TXD_STATUS_FW_OWNED)
  1226. fw_owned++;
  1227. else
  1228. drv_owned++;
  1229. if (tx_desc->pkt_len == 0)
  1230. unused++;
  1231. }
  1232. wiphy_err(hw->wiphy,
  1233. "txq[%d] len=%d head=%d tail=%d "
  1234. "fw_owned=%d drv_owned=%d unused=%d\n",
  1235. i,
  1236. txq->len, txq->head, txq->tail,
  1237. fw_owned, drv_owned, unused);
  1238. }
  1239. }
  1240. /*
  1241. * Must be called with priv->fw_mutex held and tx queues stopped.
  1242. */
  1243. #define MWL8K_TX_WAIT_TIMEOUT_MS 5000
  1244. static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw)
  1245. {
  1246. struct mwl8k_priv *priv = hw->priv;
  1247. DECLARE_COMPLETION_ONSTACK(tx_wait);
  1248. int retry;
  1249. int rc;
  1250. might_sleep();
  1251. /*
  1252. * The TX queues are stopped at this point, so this test
  1253. * doesn't need to take ->tx_lock.
  1254. */
  1255. if (!priv->pending_tx_pkts)
  1256. return 0;
  1257. retry = 0;
  1258. rc = 0;
  1259. spin_lock_bh(&priv->tx_lock);
  1260. priv->tx_wait = &tx_wait;
  1261. while (!rc) {
  1262. int oldcount;
  1263. unsigned long timeout;
  1264. oldcount = priv->pending_tx_pkts;
  1265. spin_unlock_bh(&priv->tx_lock);
  1266. timeout = wait_for_completion_timeout(&tx_wait,
  1267. msecs_to_jiffies(MWL8K_TX_WAIT_TIMEOUT_MS));
  1268. spin_lock_bh(&priv->tx_lock);
  1269. if (timeout) {
  1270. WARN_ON(priv->pending_tx_pkts);
  1271. if (retry)
  1272. wiphy_notice(hw->wiphy, "tx rings drained\n");
  1273. break;
  1274. }
  1275. if (priv->pending_tx_pkts < oldcount) {
  1276. wiphy_notice(hw->wiphy,
  1277. "waiting for tx rings to drain (%d -> %d pkts)\n",
  1278. oldcount, priv->pending_tx_pkts);
  1279. retry = 1;
  1280. continue;
  1281. }
  1282. priv->tx_wait = NULL;
  1283. wiphy_err(hw->wiphy, "tx rings stuck for %d ms\n",
  1284. MWL8K_TX_WAIT_TIMEOUT_MS);
  1285. mwl8k_dump_tx_rings(hw);
  1286. rc = -ETIMEDOUT;
  1287. }
  1288. spin_unlock_bh(&priv->tx_lock);
  1289. return rc;
  1290. }
  1291. #define MWL8K_TXD_SUCCESS(status) \
  1292. ((status) & (MWL8K_TXD_STATUS_OK | \
  1293. MWL8K_TXD_STATUS_OK_RETRY | \
  1294. MWL8K_TXD_STATUS_OK_MORE_RETRY))
  1295. static int mwl8k_tid_queue_mapping(u8 tid)
  1296. {
  1297. BUG_ON(tid > 7);
  1298. switch (tid) {
  1299. case 0:
  1300. case 3:
  1301. return IEEE80211_AC_BE;
  1302. break;
  1303. case 1:
  1304. case 2:
  1305. return IEEE80211_AC_BK;
  1306. break;
  1307. case 4:
  1308. case 5:
  1309. return IEEE80211_AC_VI;
  1310. break;
  1311. case 6:
  1312. case 7:
  1313. return IEEE80211_AC_VO;
  1314. break;
  1315. default:
  1316. return -1;
  1317. break;
  1318. }
  1319. }
  1320. /* The firmware will fill in the rate information
  1321. * for each packet that gets queued in the hardware
  1322. * and these macros will interpret that info.
  1323. */
  1324. #define RI_FORMAT(a) (a & 0x0001)
  1325. #define RI_RATE_ID_MCS(a) ((a & 0x01f8) >> 3)
  1326. static int
  1327. mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int limit, int force)
  1328. {
  1329. struct mwl8k_priv *priv = hw->priv;
  1330. struct mwl8k_tx_queue *txq = priv->txq + index;
  1331. int processed;
  1332. processed = 0;
  1333. while (txq->len > 0 && limit--) {
  1334. int tx;
  1335. struct mwl8k_tx_desc *tx_desc;
  1336. unsigned long addr;
  1337. int size;
  1338. struct sk_buff *skb;
  1339. struct ieee80211_tx_info *info;
  1340. u32 status;
  1341. struct ieee80211_sta *sta;
  1342. struct mwl8k_sta *sta_info = NULL;
  1343. u16 rate_info;
  1344. struct ieee80211_hdr *wh;
  1345. tx = txq->head;
  1346. tx_desc = txq->txd + tx;
  1347. status = le32_to_cpu(tx_desc->status);
  1348. if (status & MWL8K_TXD_STATUS_FW_OWNED) {
  1349. if (!force)
  1350. break;
  1351. tx_desc->status &=
  1352. ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
  1353. }
  1354. txq->head = (tx + 1) % MWL8K_TX_DESCS;
  1355. BUG_ON(txq->len == 0);
  1356. txq->len--;
  1357. priv->pending_tx_pkts--;
  1358. addr = le32_to_cpu(tx_desc->pkt_phys_addr);
  1359. size = le16_to_cpu(tx_desc->pkt_len);
  1360. skb = txq->skb[tx];
  1361. txq->skb[tx] = NULL;
  1362. BUG_ON(skb == NULL);
  1363. pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
  1364. mwl8k_remove_dma_header(skb, tx_desc->qos_control);
  1365. wh = (struct ieee80211_hdr *) skb->data;
  1366. /* Mark descriptor as unused */
  1367. tx_desc->pkt_phys_addr = 0;
  1368. tx_desc->pkt_len = 0;
  1369. info = IEEE80211_SKB_CB(skb);
  1370. if (ieee80211_is_data(wh->frame_control)) {
  1371. sta = info->control.sta;
  1372. if (sta) {
  1373. sta_info = MWL8K_STA(sta);
  1374. BUG_ON(sta_info == NULL);
  1375. rate_info = le16_to_cpu(tx_desc->rate_info);
  1376. /* If rate is < 6.5 Mpbs for an ht station
  1377. * do not form an ampdu. If the station is a
  1378. * legacy station (format = 0), do not form an
  1379. * ampdu
  1380. */
  1381. if (RI_RATE_ID_MCS(rate_info) < 1 ||
  1382. RI_FORMAT(rate_info) == 0) {
  1383. sta_info->is_ampdu_allowed = false;
  1384. } else {
  1385. sta_info->is_ampdu_allowed = true;
  1386. }
  1387. }
  1388. }
  1389. ieee80211_tx_info_clear_status(info);
  1390. /* Rate control is happening in the firmware.
  1391. * Ensure no tx rate is being reported.
  1392. */
  1393. info->status.rates[0].idx = -1;
  1394. info->status.rates[0].count = 1;
  1395. if (MWL8K_TXD_SUCCESS(status))
  1396. info->flags |= IEEE80211_TX_STAT_ACK;
  1397. ieee80211_tx_status_irqsafe(hw, skb);
  1398. processed++;
  1399. }
  1400. return processed;
  1401. }
  1402. /* must be called only when the card's transmit is completely halted */
  1403. static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
  1404. {
  1405. struct mwl8k_priv *priv = hw->priv;
  1406. struct mwl8k_tx_queue *txq = priv->txq + index;
  1407. if (txq->txd == NULL)
  1408. return;
  1409. mwl8k_txq_reclaim(hw, index, INT_MAX, 1);
  1410. kfree(txq->skb);
  1411. txq->skb = NULL;
  1412. pci_free_consistent(priv->pdev,
  1413. MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
  1414. txq->txd, txq->txd_dma);
  1415. txq->txd = NULL;
  1416. }
  1417. /* caller must hold priv->stream_lock when calling the stream functions */
  1418. static struct mwl8k_ampdu_stream *
  1419. mwl8k_add_stream(struct ieee80211_hw *hw, struct ieee80211_sta *sta, u8 tid)
  1420. {
  1421. struct mwl8k_ampdu_stream *stream;
  1422. struct mwl8k_priv *priv = hw->priv;
  1423. int i;
  1424. for (i = 0; i < priv->num_ampdu_queues; i++) {
  1425. stream = &priv->ampdu[i];
  1426. if (stream->state == AMPDU_NO_STREAM) {
  1427. stream->sta = sta;
  1428. stream->state = AMPDU_STREAM_NEW;
  1429. stream->tid = tid;
  1430. stream->idx = i;
  1431. stream->txq_idx = MWL8K_TX_WMM_QUEUES + i;
  1432. wiphy_debug(hw->wiphy, "Added a new stream for %pM %d",
  1433. sta->addr, tid);
  1434. return stream;
  1435. }
  1436. }
  1437. return NULL;
  1438. }
  1439. static int
  1440. mwl8k_start_stream(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream)
  1441. {
  1442. int ret;
  1443. /* if the stream has already been started, don't start it again */
  1444. if (stream->state != AMPDU_STREAM_NEW)
  1445. return 0;
  1446. ret = ieee80211_start_tx_ba_session(stream->sta, stream->tid, 0);
  1447. if (ret)
  1448. wiphy_debug(hw->wiphy, "Failed to start stream for %pM %d: "
  1449. "%d\n", stream->sta->addr, stream->tid, ret);
  1450. else
  1451. wiphy_debug(hw->wiphy, "Started stream for %pM %d\n",
  1452. stream->sta->addr, stream->tid);
  1453. return ret;
  1454. }
  1455. static void
  1456. mwl8k_remove_stream(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream)
  1457. {
  1458. wiphy_debug(hw->wiphy, "Remove stream for %pM %d\n", stream->sta->addr,
  1459. stream->tid);
  1460. memset(stream, 0, sizeof(*stream));
  1461. }
  1462. static struct mwl8k_ampdu_stream *
  1463. mwl8k_lookup_stream(struct ieee80211_hw *hw, u8 *addr, u8 tid)
  1464. {
  1465. struct mwl8k_priv *priv = hw->priv;
  1466. int i;
  1467. for (i = 0 ; i < priv->num_ampdu_queues; i++) {
  1468. struct mwl8k_ampdu_stream *stream;
  1469. stream = &priv->ampdu[i];
  1470. if (stream->state == AMPDU_NO_STREAM)
  1471. continue;
  1472. if (!memcmp(stream->sta->addr, addr, ETH_ALEN) &&
  1473. stream->tid == tid)
  1474. return stream;
  1475. }
  1476. return NULL;
  1477. }
  1478. #define MWL8K_AMPDU_PACKET_THRESHOLD 64
  1479. static inline bool mwl8k_ampdu_allowed(struct ieee80211_sta *sta, u8 tid)
  1480. {
  1481. struct mwl8k_sta *sta_info = MWL8K_STA(sta);
  1482. struct tx_traffic_info *tx_stats;
  1483. BUG_ON(tid >= MWL8K_MAX_TID);
  1484. tx_stats = &sta_info->tx_stats[tid];
  1485. return sta_info->is_ampdu_allowed &&
  1486. tx_stats->pkts > MWL8K_AMPDU_PACKET_THRESHOLD;
  1487. }
  1488. static inline void mwl8k_tx_count_packet(struct ieee80211_sta *sta, u8 tid)
  1489. {
  1490. struct mwl8k_sta *sta_info = MWL8K_STA(sta);
  1491. struct tx_traffic_info *tx_stats;
  1492. BUG_ON(tid >= MWL8K_MAX_TID);
  1493. tx_stats = &sta_info->tx_stats[tid];
  1494. if (tx_stats->start_time == 0)
  1495. tx_stats->start_time = jiffies;
  1496. /* reset the packet count after each second elapses. If the number of
  1497. * packets ever exceeds the ampdu_min_traffic threshold, we will allow
  1498. * an ampdu stream to be started.
  1499. */
  1500. if (jiffies - tx_stats->start_time > HZ) {
  1501. tx_stats->pkts = 0;
  1502. tx_stats->start_time = 0;
  1503. } else
  1504. tx_stats->pkts++;
  1505. }
  1506. static void
  1507. mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
  1508. {
  1509. struct mwl8k_priv *priv = hw->priv;
  1510. struct ieee80211_tx_info *tx_info;
  1511. struct mwl8k_vif *mwl8k_vif;
  1512. struct ieee80211_sta *sta;
  1513. struct ieee80211_hdr *wh;
  1514. struct mwl8k_tx_queue *txq;
  1515. struct mwl8k_tx_desc *tx;
  1516. dma_addr_t dma;
  1517. u32 txstatus;
  1518. u8 txdatarate;
  1519. u16 qos;
  1520. int txpriority;
  1521. u8 tid = 0;
  1522. struct mwl8k_ampdu_stream *stream = NULL;
  1523. bool start_ba_session = false;
  1524. bool mgmtframe = false;
  1525. struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data;
  1526. wh = (struct ieee80211_hdr *)skb->data;
  1527. if (ieee80211_is_data_qos(wh->frame_control))
  1528. qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
  1529. else
  1530. qos = 0;
  1531. if (ieee80211_is_mgmt(wh->frame_control))
  1532. mgmtframe = true;
  1533. if (priv->ap_fw)
  1534. mwl8k_encapsulate_tx_frame(priv, skb);
  1535. else
  1536. mwl8k_add_dma_header(priv, skb, 0, 0);
  1537. wh = &((struct mwl8k_dma_data *)skb->data)->wh;
  1538. tx_info = IEEE80211_SKB_CB(skb);
  1539. sta = tx_info->control.sta;
  1540. mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
  1541. if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
  1542. wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
  1543. wh->seq_ctrl |= cpu_to_le16(mwl8k_vif->seqno);
  1544. mwl8k_vif->seqno += 0x10;
  1545. }
  1546. /* Setup firmware control bit fields for each frame type. */
  1547. txstatus = 0;
  1548. txdatarate = 0;
  1549. if (ieee80211_is_mgmt(wh->frame_control) ||
  1550. ieee80211_is_ctl(wh->frame_control)) {
  1551. txdatarate = 0;
  1552. qos |= MWL8K_QOS_QLEN_UNSPEC | MWL8K_QOS_EOSP;
  1553. } else if (ieee80211_is_data(wh->frame_control)) {
  1554. txdatarate = 1;
  1555. if (is_multicast_ether_addr(wh->addr1))
  1556. txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX;
  1557. qos &= ~MWL8K_QOS_ACK_POLICY_MASK;
  1558. if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
  1559. qos |= MWL8K_QOS_ACK_POLICY_BLOCKACK;
  1560. else
  1561. qos |= MWL8K_QOS_ACK_POLICY_NORMAL;
  1562. }
  1563. /* Queue ADDBA request in the respective data queue. While setting up
  1564. * the ampdu stream, mac80211 queues further packets for that
  1565. * particular ra/tid pair. However, packets piled up in the hardware
  1566. * for that ra/tid pair will still go out. ADDBA request and the
  1567. * related data packets going out from different queues asynchronously
  1568. * will cause a shift in the receiver window which might result in
  1569. * ampdu packets getting dropped at the receiver after the stream has
  1570. * been setup.
  1571. */
  1572. if (unlikely(ieee80211_is_action(wh->frame_control) &&
  1573. mgmt->u.action.category == WLAN_CATEGORY_BACK &&
  1574. mgmt->u.action.u.addba_req.action_code == WLAN_ACTION_ADDBA_REQ &&
  1575. priv->ap_fw)) {
  1576. u16 capab = le16_to_cpu(mgmt->u.action.u.addba_req.capab);
  1577. tid = (capab & IEEE80211_ADDBA_PARAM_TID_MASK) >> 2;
  1578. index = mwl8k_tid_queue_mapping(tid);
  1579. }
  1580. txpriority = index;
  1581. if (priv->ap_fw && sta && sta->ht_cap.ht_supported
  1582. && skb->protocol != cpu_to_be16(ETH_P_PAE)
  1583. && ieee80211_is_data_qos(wh->frame_control)) {
  1584. tid = qos & 0xf;
  1585. mwl8k_tx_count_packet(sta, tid);
  1586. spin_lock(&priv->stream_lock);
  1587. stream = mwl8k_lookup_stream(hw, sta->addr, tid);
  1588. if (stream != NULL) {
  1589. if (stream->state == AMPDU_STREAM_ACTIVE) {
  1590. txpriority = stream->txq_idx;
  1591. index = stream->txq_idx;
  1592. } else if (stream->state == AMPDU_STREAM_NEW) {
  1593. /* We get here if the driver sends us packets
  1594. * after we've initiated a stream, but before
  1595. * our ampdu_action routine has been called
  1596. * with IEEE80211_AMPDU_TX_START to get the SSN
  1597. * for the ADDBA request. So this packet can
  1598. * go out with no risk of sequence number
  1599. * mismatch. No special handling is required.
  1600. */
  1601. } else {
  1602. /* Drop packets that would go out after the
  1603. * ADDBA request was sent but before the ADDBA
  1604. * response is received. If we don't do this,
  1605. * the recipient would probably receive it
  1606. * after the ADDBA request with SSN 0. This
  1607. * will cause the recipient's BA receive window
  1608. * to shift, which would cause the subsequent
  1609. * packets in the BA stream to be discarded.
  1610. * mac80211 queues our packets for us in this
  1611. * case, so this is really just a safety check.
  1612. */
  1613. wiphy_warn(hw->wiphy,
  1614. "Cannot send packet while ADDBA "
  1615. "dialog is underway.\n");
  1616. spin_unlock(&priv->stream_lock);
  1617. dev_kfree_skb(skb);
  1618. return;
  1619. }
  1620. } else {
  1621. /* Defer calling mwl8k_start_stream so that the current
  1622. * skb can go out before the ADDBA request. This
  1623. * prevents sequence number mismatch at the recepient
  1624. * as described above.
  1625. */
  1626. if (mwl8k_ampdu_allowed(sta, tid)) {
  1627. stream = mwl8k_add_stream(hw, sta, tid);
  1628. if (stream != NULL)
  1629. start_ba_session = true;
  1630. }
  1631. }
  1632. spin_unlock(&priv->stream_lock);
  1633. }
  1634. dma = pci_map_single(priv->pdev, skb->data,
  1635. skb->len, PCI_DMA_TODEVICE);
  1636. if (pci_dma_mapping_error(priv->pdev, dma)) {
  1637. wiphy_debug(hw->wiphy,
  1638. "failed to dma map skb, dropping TX frame.\n");
  1639. if (start_ba_session) {
  1640. spin_lock(&priv->stream_lock);
  1641. mwl8k_remove_stream(hw, stream);
  1642. spin_unlock(&priv->stream_lock);
  1643. }
  1644. dev_kfree_skb(skb);
  1645. return;
  1646. }
  1647. spin_lock_bh(&priv->tx_lock);
  1648. txq = priv->txq + index;
  1649. /* Mgmt frames that go out frequently are probe
  1650. * responses. Other mgmt frames got out relatively
  1651. * infrequently. Hence reserve 2 buffers so that
  1652. * other mgmt frames do not get dropped due to an
  1653. * already queued probe response in one of the
  1654. * reserved buffers.
  1655. */
  1656. if (txq->len >= MWL8K_TX_DESCS - 2) {
  1657. if (mgmtframe == false ||
  1658. txq->len == MWL8K_TX_DESCS) {
  1659. if (start_ba_session) {
  1660. spin_lock(&priv->stream_lock);
  1661. mwl8k_remove_stream(hw, stream);
  1662. spin_unlock(&priv->stream_lock);
  1663. }
  1664. spin_unlock_bh(&priv->tx_lock);
  1665. dev_kfree_skb(skb);
  1666. return;
  1667. }
  1668. }
  1669. BUG_ON(txq->skb[txq->tail] != NULL);
  1670. txq->skb[txq->tail] = skb;
  1671. tx = txq->txd + txq->tail;
  1672. tx->data_rate = txdatarate;
  1673. tx->tx_priority = txpriority;
  1674. tx->qos_control = cpu_to_le16(qos);
  1675. tx->pkt_phys_addr = cpu_to_le32(dma);
  1676. tx->pkt_len = cpu_to_le16(skb->len);
  1677. tx->rate_info = 0;
  1678. if (!priv->ap_fw && tx_info->control.sta != NULL)
  1679. tx->peer_id = MWL8K_STA(tx_info->control.sta)->peer_id;
  1680. else
  1681. tx->peer_id = 0;
  1682. if (priv->ap_fw)
  1683. tx->timestamp = cpu_to_le32(ioread32(priv->regs +
  1684. MWL8K_HW_TIMER_REGISTER));
  1685. wmb();
  1686. tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus);
  1687. txq->len++;
  1688. priv->pending_tx_pkts++;
  1689. txq->tail++;
  1690. if (txq->tail == MWL8K_TX_DESCS)
  1691. txq->tail = 0;
  1692. mwl8k_tx_start(priv);
  1693. spin_unlock_bh(&priv->tx_lock);
  1694. /* Initiate the ampdu session here */
  1695. if (start_ba_session) {
  1696. spin_lock(&priv->stream_lock);
  1697. if (mwl8k_start_stream(hw, stream))
  1698. mwl8k_remove_stream(hw, stream);
  1699. spin_unlock(&priv->stream_lock);
  1700. }
  1701. }
  1702. /*
  1703. * Firmware access.
  1704. *
  1705. * We have the following requirements for issuing firmware commands:
  1706. * - Some commands require that the packet transmit path is idle when
  1707. * the command is issued. (For simplicity, we'll just quiesce the
  1708. * transmit path for every command.)
  1709. * - There are certain sequences of commands that need to be issued to
  1710. * the hardware sequentially, with no other intervening commands.
  1711. *
  1712. * This leads to an implementation of a "firmware lock" as a mutex that
  1713. * can be taken recursively, and which is taken by both the low-level
  1714. * command submission function (mwl8k_post_cmd) as well as any users of
  1715. * that function that require issuing of an atomic sequence of commands,
  1716. * and quiesces the transmit path whenever it's taken.
  1717. */
  1718. static int mwl8k_fw_lock(struct ieee80211_hw *hw)
  1719. {
  1720. struct mwl8k_priv *priv = hw->priv;
  1721. if (priv->fw_mutex_owner != current) {
  1722. int rc;
  1723. mutex_lock(&priv->fw_mutex);
  1724. ieee80211_stop_queues(hw);
  1725. rc = mwl8k_tx_wait_empty(hw);
  1726. if (rc) {
  1727. ieee80211_wake_queues(hw);
  1728. mutex_unlock(&priv->fw_mutex);
  1729. return rc;
  1730. }
  1731. priv->fw_mutex_owner = current;
  1732. }
  1733. priv->fw_mutex_depth++;
  1734. return 0;
  1735. }
  1736. static void mwl8k_fw_unlock(struct ieee80211_hw *hw)
  1737. {
  1738. struct mwl8k_priv *priv = hw->priv;
  1739. if (!--priv->fw_mutex_depth) {
  1740. ieee80211_wake_queues(hw);
  1741. priv->fw_mutex_owner = NULL;
  1742. mutex_unlock(&priv->fw_mutex);
  1743. }
  1744. }
  1745. /*
  1746. * Command processing.
  1747. */
  1748. /* Timeout firmware commands after 10s */
  1749. #define MWL8K_CMD_TIMEOUT_MS 10000
  1750. static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
  1751. {
  1752. DECLARE_COMPLETION_ONSTACK(cmd_wait);
  1753. struct mwl8k_priv *priv = hw->priv;
  1754. void __iomem *regs = priv->regs;
  1755. dma_addr_t dma_addr;
  1756. unsigned int dma_size;
  1757. int rc;
  1758. unsigned long timeout = 0;
  1759. u8 buf[32];
  1760. cmd->result = (__force __le16) 0xffff;
  1761. dma_size = le16_to_cpu(cmd->length);
  1762. dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
  1763. PCI_DMA_BIDIRECTIONAL);
  1764. if (pci_dma_mapping_error(priv->pdev, dma_addr))
  1765. return -ENOMEM;
  1766. rc = mwl8k_fw_lock(hw);
  1767. if (rc) {
  1768. pci_unmap_single(priv->pdev, dma_addr, dma_size,
  1769. PCI_DMA_BIDIRECTIONAL);
  1770. return rc;
  1771. }
  1772. priv->hostcmd_wait = &cmd_wait;
  1773. iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
  1774. iowrite32(MWL8K_H2A_INT_DOORBELL,
  1775. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1776. iowrite32(MWL8K_H2A_INT_DUMMY,
  1777. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1778. timeout = wait_for_completion_timeout(&cmd_wait,
  1779. msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
  1780. priv->hostcmd_wait = NULL;
  1781. mwl8k_fw_unlock(hw);
  1782. pci_unmap_single(priv->pdev, dma_addr, dma_size,
  1783. PCI_DMA_BIDIRECTIONAL);
  1784. if (!timeout) {
  1785. wiphy_err(hw->wiphy, "Command %s timeout after %u ms\n",
  1786. mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
  1787. MWL8K_CMD_TIMEOUT_MS);
  1788. rc = -ETIMEDOUT;
  1789. } else {
  1790. int ms;
  1791. ms = MWL8K_CMD_TIMEOUT_MS - jiffies_to_msecs(timeout);
  1792. rc = cmd->result ? -EINVAL : 0;
  1793. if (rc)
  1794. wiphy_err(hw->wiphy, "Command %s error 0x%x\n",
  1795. mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
  1796. le16_to_cpu(cmd->result));
  1797. else if (ms > 2000)
  1798. wiphy_notice(hw->wiphy, "Command %s took %d ms\n",
  1799. mwl8k_cmd_name(cmd->code,
  1800. buf, sizeof(buf)),
  1801. ms);
  1802. }
  1803. return rc;
  1804. }
  1805. static int mwl8k_post_pervif_cmd(struct ieee80211_hw *hw,
  1806. struct ieee80211_vif *vif,
  1807. struct mwl8k_cmd_pkt *cmd)
  1808. {
  1809. if (vif != NULL)
  1810. cmd->macid = MWL8K_VIF(vif)->macid;
  1811. return mwl8k_post_cmd(hw, cmd);
  1812. }
  1813. /*
  1814. * Setup code shared between STA and AP firmware images.
  1815. */
  1816. static void mwl8k_setup_2ghz_band(struct ieee80211_hw *hw)
  1817. {
  1818. struct mwl8k_priv *priv = hw->priv;
  1819. BUILD_BUG_ON(sizeof(priv->channels_24) != sizeof(mwl8k_channels_24));
  1820. memcpy(priv->channels_24, mwl8k_channels_24, sizeof(mwl8k_channels_24));
  1821. BUILD_BUG_ON(sizeof(priv->rates_24) != sizeof(mwl8k_rates_24));
  1822. memcpy(priv->rates_24, mwl8k_rates_24, sizeof(mwl8k_rates_24));
  1823. priv->band_24.band = IEEE80211_BAND_2GHZ;
  1824. priv->band_24.channels = priv->channels_24;
  1825. priv->band_24.n_channels = ARRAY_SIZE(mwl8k_channels_24);
  1826. priv->band_24.bitrates = priv->rates_24;
  1827. priv->band_24.n_bitrates = ARRAY_SIZE(mwl8k_rates_24);
  1828. hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band_24;
  1829. }
  1830. static void mwl8k_setup_5ghz_band(struct ieee80211_hw *hw)
  1831. {
  1832. struct mwl8k_priv *priv = hw->priv;
  1833. BUILD_BUG_ON(sizeof(priv->channels_50) != sizeof(mwl8k_channels_50));
  1834. memcpy(priv->channels_50, mwl8k_channels_50, sizeof(mwl8k_channels_50));
  1835. BUILD_BUG_ON(sizeof(priv->rates_50) != sizeof(mwl8k_rates_50));
  1836. memcpy(priv->rates_50, mwl8k_rates_50, sizeof(mwl8k_rates_50));
  1837. priv->band_50.band = IEEE80211_BAND_5GHZ;
  1838. priv->band_50.channels = priv->channels_50;
  1839. priv->band_50.n_channels = ARRAY_SIZE(mwl8k_channels_50);
  1840. priv->band_50.bitrates = priv->rates_50;
  1841. priv->band_50.n_bitrates = ARRAY_SIZE(mwl8k_rates_50);
  1842. hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->band_50;
  1843. }
  1844. /*
  1845. * CMD_GET_HW_SPEC (STA version).
  1846. */
  1847. struct mwl8k_cmd_get_hw_spec_sta {
  1848. struct mwl8k_cmd_pkt header;
  1849. __u8 hw_rev;
  1850. __u8 host_interface;
  1851. __le16 num_mcaddrs;
  1852. __u8 perm_addr[ETH_ALEN];
  1853. __le16 region_code;
  1854. __le32 fw_rev;
  1855. __le32 ps_cookie;
  1856. __le32 caps;
  1857. __u8 mcs_bitmap[16];
  1858. __le32 rx_queue_ptr;
  1859. __le32 num_tx_queues;
  1860. __le32 tx_queue_ptrs[MWL8K_TX_WMM_QUEUES];
  1861. __le32 caps2;
  1862. __le32 num_tx_desc_per_queue;
  1863. __le32 total_rxd;
  1864. } __packed;
  1865. #define MWL8K_CAP_MAX_AMSDU 0x20000000
  1866. #define MWL8K_CAP_GREENFIELD 0x08000000
  1867. #define MWL8K_CAP_AMPDU 0x04000000
  1868. #define MWL8K_CAP_RX_STBC 0x01000000
  1869. #define MWL8K_CAP_TX_STBC 0x00800000
  1870. #define MWL8K_CAP_SHORTGI_40MHZ 0x00400000
  1871. #define MWL8K_CAP_SHORTGI_20MHZ 0x00200000
  1872. #define MWL8K_CAP_RX_ANTENNA_MASK 0x000e0000
  1873. #define MWL8K_CAP_TX_ANTENNA_MASK 0x0001c000
  1874. #define MWL8K_CAP_DELAY_BA 0x00003000
  1875. #define MWL8K_CAP_MIMO 0x00000200
  1876. #define MWL8K_CAP_40MHZ 0x00000100
  1877. #define MWL8K_CAP_BAND_MASK 0x00000007
  1878. #define MWL8K_CAP_5GHZ 0x00000004
  1879. #define MWL8K_CAP_2GHZ4 0x00000001
  1880. static void
  1881. mwl8k_set_ht_caps(struct ieee80211_hw *hw,
  1882. struct ieee80211_supported_band *band, u32 cap)
  1883. {
  1884. int rx_streams;
  1885. int tx_streams;
  1886. band->ht_cap.ht_supported = 1;
  1887. if (cap & MWL8K_CAP_MAX_AMSDU)
  1888. band->ht_cap.cap |= IEEE80211_HT_CAP_MAX_AMSDU;
  1889. if (cap & MWL8K_CAP_GREENFIELD)
  1890. band->ht_cap.cap |= IEEE80211_HT_CAP_GRN_FLD;
  1891. if (cap & MWL8K_CAP_AMPDU) {
  1892. hw->flags |= IEEE80211_HW_AMPDU_AGGREGATION;
  1893. band->ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
  1894. band->ht_cap.ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE;
  1895. }
  1896. if (cap & MWL8K_CAP_RX_STBC)
  1897. band->ht_cap.cap |= IEEE80211_HT_CAP_RX_STBC;
  1898. if (cap & MWL8K_CAP_TX_STBC)
  1899. band->ht_cap.cap |= IEEE80211_HT_CAP_TX_STBC;
  1900. if (cap & MWL8K_CAP_SHORTGI_40MHZ)
  1901. band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_40;
  1902. if (cap & MWL8K_CAP_SHORTGI_20MHZ)
  1903. band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_20;
  1904. if (cap & MWL8K_CAP_DELAY_BA)
  1905. band->ht_cap.cap |= IEEE80211_HT_CAP_DELAY_BA;
  1906. if (cap & MWL8K_CAP_40MHZ)
  1907. band->ht_cap.cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
  1908. rx_streams = hweight32(cap & MWL8K_CAP_RX_ANTENNA_MASK);
  1909. tx_streams = hweight32(cap & MWL8K_CAP_TX_ANTENNA_MASK);
  1910. band->ht_cap.mcs.rx_mask[0] = 0xff;
  1911. if (rx_streams >= 2)
  1912. band->ht_cap.mcs.rx_mask[1] = 0xff;
  1913. if (rx_streams >= 3)
  1914. band->ht_cap.mcs.rx_mask[2] = 0xff;
  1915. band->ht_cap.mcs.rx_mask[4] = 0x01;
  1916. band->ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
  1917. if (rx_streams != tx_streams) {
  1918. band->ht_cap.mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
  1919. band->ht_cap.mcs.tx_params |= (tx_streams - 1) <<
  1920. IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
  1921. }
  1922. }
  1923. static void
  1924. mwl8k_set_caps(struct ieee80211_hw *hw, u32 caps)
  1925. {
  1926. struct mwl8k_priv *priv = hw->priv;
  1927. if ((caps & MWL8K_CAP_2GHZ4) || !(caps & MWL8K_CAP_BAND_MASK)) {
  1928. mwl8k_setup_2ghz_band(hw);
  1929. if (caps & MWL8K_CAP_MIMO)
  1930. mwl8k_set_ht_caps(hw, &priv->band_24, caps);
  1931. }
  1932. if (caps & MWL8K_CAP_5GHZ) {
  1933. mwl8k_setup_5ghz_band(hw);
  1934. if (caps & MWL8K_CAP_MIMO)
  1935. mwl8k_set_ht_caps(hw, &priv->band_50, caps);
  1936. }
  1937. }
  1938. static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw *hw)
  1939. {
  1940. struct mwl8k_priv *priv = hw->priv;
  1941. struct mwl8k_cmd_get_hw_spec_sta *cmd;
  1942. int rc;
  1943. int i;
  1944. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1945. if (cmd == NULL)
  1946. return -ENOMEM;
  1947. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
  1948. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1949. memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
  1950. cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
  1951. cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
  1952. cmd->num_tx_queues = cpu_to_le32(mwl8k_tx_queues(priv));
  1953. for (i = 0; i < mwl8k_tx_queues(priv); i++)
  1954. cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
  1955. cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
  1956. cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
  1957. rc = mwl8k_post_cmd(hw, &cmd->header);
  1958. if (!rc) {
  1959. SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
  1960. priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
  1961. priv->fw_rev = le32_to_cpu(cmd->fw_rev);
  1962. priv->hw_rev = cmd->hw_rev;
  1963. mwl8k_set_caps(hw, le32_to_cpu(cmd->caps));
  1964. priv->ap_macids_supported = 0x00000000;
  1965. priv->sta_macids_supported = 0x00000001;
  1966. }
  1967. kfree(cmd);
  1968. return rc;
  1969. }
  1970. /*
  1971. * CMD_GET_HW_SPEC (AP version).
  1972. */
  1973. struct mwl8k_cmd_get_hw_spec_ap {
  1974. struct mwl8k_cmd_pkt header;
  1975. __u8 hw_rev;
  1976. __u8 host_interface;
  1977. __le16 num_wcb;
  1978. __le16 num_mcaddrs;
  1979. __u8 perm_addr[ETH_ALEN];
  1980. __le16 region_code;
  1981. __le16 num_antenna;
  1982. __le32 fw_rev;
  1983. __le32 wcbbase0;
  1984. __le32 rxwrptr;
  1985. __le32 rxrdptr;
  1986. __le32 ps_cookie;
  1987. __le32 wcbbase1;
  1988. __le32 wcbbase2;
  1989. __le32 wcbbase3;
  1990. __le32 fw_api_version;
  1991. __le32 caps;
  1992. __le32 num_of_ampdu_queues;
  1993. __le32 wcbbase_ampdu[MWL8K_MAX_AMPDU_QUEUES];
  1994. } __packed;
  1995. static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw)
  1996. {
  1997. struct mwl8k_priv *priv = hw->priv;
  1998. struct mwl8k_cmd_get_hw_spec_ap *cmd;
  1999. int rc, i;
  2000. u32 api_version;
  2001. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2002. if (cmd == NULL)
  2003. return -ENOMEM;
  2004. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
  2005. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2006. memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
  2007. cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
  2008. rc = mwl8k_post_cmd(hw, &cmd->header);
  2009. if (!rc) {
  2010. int off;
  2011. api_version = le32_to_cpu(cmd->fw_api_version);
  2012. if (priv->device_info->fw_api_ap != api_version) {
  2013. printk(KERN_ERR "%s: Unsupported fw API version for %s."
  2014. " Expected %d got %d.\n", MWL8K_NAME,
  2015. priv->device_info->part_name,
  2016. priv->device_info->fw_api_ap,
  2017. api_version);
  2018. rc = -EINVAL;
  2019. goto done;
  2020. }
  2021. SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
  2022. priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
  2023. priv->fw_rev = le32_to_cpu(cmd->fw_rev);
  2024. priv->hw_rev = cmd->hw_rev;
  2025. mwl8k_set_caps(hw, le32_to_cpu(cmd->caps));
  2026. priv->ap_macids_supported = 0x000000ff;
  2027. priv->sta_macids_supported = 0x00000000;
  2028. priv->num_ampdu_queues = le32_to_cpu(cmd->num_of_ampdu_queues);
  2029. if (priv->num_ampdu_queues > MWL8K_MAX_AMPDU_QUEUES) {
  2030. wiphy_warn(hw->wiphy, "fw reported %d ampdu queues"
  2031. " but we only support %d.\n",
  2032. priv->num_ampdu_queues,
  2033. MWL8K_MAX_AMPDU_QUEUES);
  2034. priv->num_ampdu_queues = MWL8K_MAX_AMPDU_QUEUES;
  2035. }
  2036. off = le32_to_cpu(cmd->rxwrptr) & 0xffff;
  2037. iowrite32(priv->rxq[0].rxd_dma, priv->sram + off);
  2038. off = le32_to_cpu(cmd->rxrdptr) & 0xffff;
  2039. iowrite32(priv->rxq[0].rxd_dma, priv->sram + off);
  2040. priv->txq_offset[0] = le32_to_cpu(cmd->wcbbase0) & 0xffff;
  2041. priv->txq_offset[1] = le32_to_cpu(cmd->wcbbase1) & 0xffff;
  2042. priv->txq_offset[2] = le32_to_cpu(cmd->wcbbase2) & 0xffff;
  2043. priv->txq_offset[3] = le32_to_cpu(cmd->wcbbase3) & 0xffff;
  2044. for (i = 0; i < priv->num_ampdu_queues; i++)
  2045. priv->txq_offset[i + MWL8K_TX_WMM_QUEUES] =
  2046. le32_to_cpu(cmd->wcbbase_ampdu[i]) & 0xffff;
  2047. }
  2048. done:
  2049. kfree(cmd);
  2050. return rc;
  2051. }
  2052. /*
  2053. * CMD_SET_HW_SPEC.
  2054. */
  2055. struct mwl8k_cmd_set_hw_spec {
  2056. struct mwl8k_cmd_pkt header;
  2057. __u8 hw_rev;
  2058. __u8 host_interface;
  2059. __le16 num_mcaddrs;
  2060. __u8 perm_addr[ETH_ALEN];
  2061. __le16 region_code;
  2062. __le32 fw_rev;
  2063. __le32 ps_cookie;
  2064. __le32 caps;
  2065. __le32 rx_queue_ptr;
  2066. __le32 num_tx_queues;
  2067. __le32 tx_queue_ptrs[MWL8K_MAX_TX_QUEUES];
  2068. __le32 flags;
  2069. __le32 num_tx_desc_per_queue;
  2070. __le32 total_rxd;
  2071. } __packed;
  2072. /* If enabled, MWL8K_SET_HW_SPEC_FLAG_ENABLE_LIFE_TIME_EXPIRY will cause
  2073. * packets to expire 500 ms after the timestamp in the tx descriptor. That is,
  2074. * the packets that are queued for more than 500ms, will be dropped in the
  2075. * hardware. This helps minimizing the issues caused due to head-of-line
  2076. * blocking where a slow client can hog the bandwidth and affect traffic to a
  2077. * faster client.
  2078. */
  2079. #define MWL8K_SET_HW_SPEC_FLAG_ENABLE_LIFE_TIME_EXPIRY 0x00000400
  2080. #define MWL8K_SET_HW_SPEC_FLAG_GENERATE_CCMP_HDR 0x00000200
  2081. #define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080
  2082. #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP 0x00000020
  2083. #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON 0x00000010
  2084. static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw *hw)
  2085. {
  2086. struct mwl8k_priv *priv = hw->priv;
  2087. struct mwl8k_cmd_set_hw_spec *cmd;
  2088. int rc;
  2089. int i;
  2090. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2091. if (cmd == NULL)
  2092. return -ENOMEM;
  2093. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_HW_SPEC);
  2094. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2095. cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
  2096. cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
  2097. cmd->num_tx_queues = cpu_to_le32(mwl8k_tx_queues(priv));
  2098. /*
  2099. * Mac80211 stack has Q0 as highest priority and Q3 as lowest in
  2100. * that order. Firmware has Q3 as highest priority and Q0 as lowest
  2101. * in that order. Map Q3 of mac80211 to Q0 of firmware so that the
  2102. * priority is interpreted the right way in firmware.
  2103. */
  2104. for (i = 0; i < mwl8k_tx_queues(priv); i++) {
  2105. int j = mwl8k_tx_queues(priv) - 1 - i;
  2106. cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[j].txd_dma);
  2107. }
  2108. cmd->flags = cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT |
  2109. MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP |
  2110. MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON |
  2111. MWL8K_SET_HW_SPEC_FLAG_ENABLE_LIFE_TIME_EXPIRY |
  2112. MWL8K_SET_HW_SPEC_FLAG_GENERATE_CCMP_HDR);
  2113. cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
  2114. cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
  2115. rc = mwl8k_post_cmd(hw, &cmd->header);
  2116. kfree(cmd);
  2117. return rc;
  2118. }
  2119. /*
  2120. * CMD_MAC_MULTICAST_ADR.
  2121. */
  2122. struct mwl8k_cmd_mac_multicast_adr {
  2123. struct mwl8k_cmd_pkt header;
  2124. __le16 action;
  2125. __le16 numaddr;
  2126. __u8 addr[0][ETH_ALEN];
  2127. };
  2128. #define MWL8K_ENABLE_RX_DIRECTED 0x0001
  2129. #define MWL8K_ENABLE_RX_MULTICAST 0x0002
  2130. #define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
  2131. #define MWL8K_ENABLE_RX_BROADCAST 0x0008
  2132. static struct mwl8k_cmd_pkt *
  2133. __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti,
  2134. struct netdev_hw_addr_list *mc_list)
  2135. {
  2136. struct mwl8k_priv *priv = hw->priv;
  2137. struct mwl8k_cmd_mac_multicast_adr *cmd;
  2138. int size;
  2139. int mc_count = 0;
  2140. if (mc_list)
  2141. mc_count = netdev_hw_addr_list_count(mc_list);
  2142. if (allmulti || mc_count > priv->num_mcaddrs) {
  2143. allmulti = 1;
  2144. mc_count = 0;
  2145. }
  2146. size = sizeof(*cmd) + mc_count * ETH_ALEN;
  2147. cmd = kzalloc(size, GFP_ATOMIC);
  2148. if (cmd == NULL)
  2149. return NULL;
  2150. cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
  2151. cmd->header.length = cpu_to_le16(size);
  2152. cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED |
  2153. MWL8K_ENABLE_RX_BROADCAST);
  2154. if (allmulti) {
  2155. cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST);
  2156. } else if (mc_count) {
  2157. struct netdev_hw_addr *ha;
  2158. int i = 0;
  2159. cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
  2160. cmd->numaddr = cpu_to_le16(mc_count);
  2161. netdev_hw_addr_list_for_each(ha, mc_list) {
  2162. memcpy(cmd->addr[i], ha->addr, ETH_ALEN);
  2163. }
  2164. }
  2165. return &cmd->header;
  2166. }
  2167. /*
  2168. * CMD_GET_STAT.
  2169. */
  2170. struct mwl8k_cmd_get_stat {
  2171. struct mwl8k_cmd_pkt header;
  2172. __le32 stats[64];
  2173. } __packed;
  2174. #define MWL8K_STAT_ACK_FAILURE 9
  2175. #define MWL8K_STAT_RTS_FAILURE 12
  2176. #define MWL8K_STAT_FCS_ERROR 24
  2177. #define MWL8K_STAT_RTS_SUCCESS 11
  2178. static int mwl8k_cmd_get_stat(struct ieee80211_hw *hw,
  2179. struct ieee80211_low_level_stats *stats)
  2180. {
  2181. struct mwl8k_cmd_get_stat *cmd;
  2182. int rc;
  2183. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2184. if (cmd == NULL)
  2185. return -ENOMEM;
  2186. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
  2187. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2188. rc = mwl8k_post_cmd(hw, &cmd->header);
  2189. if (!rc) {
  2190. stats->dot11ACKFailureCount =
  2191. le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
  2192. stats->dot11RTSFailureCount =
  2193. le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
  2194. stats->dot11FCSErrorCount =
  2195. le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
  2196. stats->dot11RTSSuccessCount =
  2197. le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
  2198. }
  2199. kfree(cmd);
  2200. return rc;
  2201. }
  2202. /*
  2203. * CMD_RADIO_CONTROL.
  2204. */
  2205. struct mwl8k_cmd_radio_control {
  2206. struct mwl8k_cmd_pkt header;
  2207. __le16 action;
  2208. __le16 control;
  2209. __le16 radio_on;
  2210. } __packed;
  2211. static int
  2212. mwl8k_cmd_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
  2213. {
  2214. struct mwl8k_priv *priv = hw->priv;
  2215. struct mwl8k_cmd_radio_control *cmd;
  2216. int rc;
  2217. if (enable == priv->radio_on && !force)
  2218. return 0;
  2219. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2220. if (cmd == NULL)
  2221. return -ENOMEM;
  2222. cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
  2223. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2224. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2225. cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1);
  2226. cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
  2227. rc = mwl8k_post_cmd(hw, &cmd->header);
  2228. kfree(cmd);
  2229. if (!rc)
  2230. priv->radio_on = enable;
  2231. return rc;
  2232. }
  2233. static int mwl8k_cmd_radio_disable(struct ieee80211_hw *hw)
  2234. {
  2235. return mwl8k_cmd_radio_control(hw, 0, 0);
  2236. }
  2237. static int mwl8k_cmd_radio_enable(struct ieee80211_hw *hw)
  2238. {
  2239. return mwl8k_cmd_radio_control(hw, 1, 0);
  2240. }
  2241. static int
  2242. mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
  2243. {
  2244. struct mwl8k_priv *priv = hw->priv;
  2245. priv->radio_short_preamble = short_preamble;
  2246. return mwl8k_cmd_radio_control(hw, 1, 1);
  2247. }
  2248. /*
  2249. * CMD_RF_TX_POWER.
  2250. */
  2251. #define MWL8K_RF_TX_POWER_LEVEL_TOTAL 8
  2252. struct mwl8k_cmd_rf_tx_power {
  2253. struct mwl8k_cmd_pkt header;
  2254. __le16 action;
  2255. __le16 support_level;
  2256. __le16 current_level;
  2257. __le16 reserved;
  2258. __le16 power_level_list[MWL8K_RF_TX_POWER_LEVEL_TOTAL];
  2259. } __packed;
  2260. static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm)
  2261. {
  2262. struct mwl8k_cmd_rf_tx_power *cmd;
  2263. int rc;
  2264. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2265. if (cmd == NULL)
  2266. return -ENOMEM;
  2267. cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
  2268. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2269. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2270. cmd->support_level = cpu_to_le16(dBm);
  2271. rc = mwl8k_post_cmd(hw, &cmd->header);
  2272. kfree(cmd);
  2273. return rc;
  2274. }
  2275. /*
  2276. * CMD_TX_POWER.
  2277. */
  2278. #define MWL8K_TX_POWER_LEVEL_TOTAL 12
  2279. struct mwl8k_cmd_tx_power {
  2280. struct mwl8k_cmd_pkt header;
  2281. __le16 action;
  2282. __le16 band;
  2283. __le16 channel;
  2284. __le16 bw;
  2285. __le16 sub_ch;
  2286. __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
  2287. } __packed;
  2288. static int mwl8k_cmd_tx_power(struct ieee80211_hw *hw,
  2289. struct ieee80211_conf *conf,
  2290. unsigned short pwr)
  2291. {
  2292. struct ieee80211_channel *channel = conf->channel;
  2293. struct mwl8k_cmd_tx_power *cmd;
  2294. int rc;
  2295. int i;
  2296. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2297. if (cmd == NULL)
  2298. return -ENOMEM;
  2299. cmd->header.code = cpu_to_le16(MWL8K_CMD_TX_POWER);
  2300. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2301. cmd->action = cpu_to_le16(MWL8K_CMD_SET_LIST);
  2302. if (channel->band == IEEE80211_BAND_2GHZ)
  2303. cmd->band = cpu_to_le16(0x1);
  2304. else if (channel->band == IEEE80211_BAND_5GHZ)
  2305. cmd->band = cpu_to_le16(0x4);
  2306. cmd->channel = channel->hw_value;
  2307. if (conf->channel_type == NL80211_CHAN_NO_HT ||
  2308. conf->channel_type == NL80211_CHAN_HT20) {
  2309. cmd->bw = cpu_to_le16(0x2);
  2310. } else {
  2311. cmd->bw = cpu_to_le16(0x4);
  2312. if (conf->channel_type == NL80211_CHAN_HT40MINUS)
  2313. cmd->sub_ch = cpu_to_le16(0x3);
  2314. else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
  2315. cmd->sub_ch = cpu_to_le16(0x1);
  2316. }
  2317. for (i = 0; i < MWL8K_TX_POWER_LEVEL_TOTAL; i++)
  2318. cmd->power_level_list[i] = cpu_to_le16(pwr);
  2319. rc = mwl8k_post_cmd(hw, &cmd->header);
  2320. kfree(cmd);
  2321. return rc;
  2322. }
  2323. /*
  2324. * CMD_RF_ANTENNA.
  2325. */
  2326. struct mwl8k_cmd_rf_antenna {
  2327. struct mwl8k_cmd_pkt header;
  2328. __le16 antenna;
  2329. __le16 mode;
  2330. } __packed;
  2331. #define MWL8K_RF_ANTENNA_RX 1
  2332. #define MWL8K_RF_ANTENNA_TX 2
  2333. static int
  2334. mwl8k_cmd_rf_antenna(struct ieee80211_hw *hw, int antenna, int mask)
  2335. {
  2336. struct mwl8k_cmd_rf_antenna *cmd;
  2337. int rc;
  2338. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2339. if (cmd == NULL)
  2340. return -ENOMEM;
  2341. cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_ANTENNA);
  2342. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2343. cmd->antenna = cpu_to_le16(antenna);
  2344. cmd->mode = cpu_to_le16(mask);
  2345. rc = mwl8k_post_cmd(hw, &cmd->header);
  2346. kfree(cmd);
  2347. return rc;
  2348. }
  2349. /*
  2350. * CMD_SET_BEACON.
  2351. */
  2352. struct mwl8k_cmd_set_beacon {
  2353. struct mwl8k_cmd_pkt header;
  2354. __le16 beacon_len;
  2355. __u8 beacon[0];
  2356. };
  2357. static int mwl8k_cmd_set_beacon(struct ieee80211_hw *hw,
  2358. struct ieee80211_vif *vif, u8 *beacon, int len)
  2359. {
  2360. struct mwl8k_cmd_set_beacon *cmd;
  2361. int rc;
  2362. cmd = kzalloc(sizeof(*cmd) + len, GFP_KERNEL);
  2363. if (cmd == NULL)
  2364. return -ENOMEM;
  2365. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_BEACON);
  2366. cmd->header.length = cpu_to_le16(sizeof(*cmd) + len);
  2367. cmd->beacon_len = cpu_to_le16(len);
  2368. memcpy(cmd->beacon, beacon, len);
  2369. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2370. kfree(cmd);
  2371. return rc;
  2372. }
  2373. /*
  2374. * CMD_SET_PRE_SCAN.
  2375. */
  2376. struct mwl8k_cmd_set_pre_scan {
  2377. struct mwl8k_cmd_pkt header;
  2378. } __packed;
  2379. static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
  2380. {
  2381. struct mwl8k_cmd_set_pre_scan *cmd;
  2382. int rc;
  2383. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2384. if (cmd == NULL)
  2385. return -ENOMEM;
  2386. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
  2387. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2388. rc = mwl8k_post_cmd(hw, &cmd->header);
  2389. kfree(cmd);
  2390. return rc;
  2391. }
  2392. /*
  2393. * CMD_SET_POST_SCAN.
  2394. */
  2395. struct mwl8k_cmd_set_post_scan {
  2396. struct mwl8k_cmd_pkt header;
  2397. __le32 isibss;
  2398. __u8 bssid[ETH_ALEN];
  2399. } __packed;
  2400. static int
  2401. mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, const __u8 *mac)
  2402. {
  2403. struct mwl8k_cmd_set_post_scan *cmd;
  2404. int rc;
  2405. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2406. if (cmd == NULL)
  2407. return -ENOMEM;
  2408. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
  2409. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2410. cmd->isibss = 0;
  2411. memcpy(cmd->bssid, mac, ETH_ALEN);
  2412. rc = mwl8k_post_cmd(hw, &cmd->header);
  2413. kfree(cmd);
  2414. return rc;
  2415. }
  2416. /*
  2417. * CMD_SET_RF_CHANNEL.
  2418. */
  2419. struct mwl8k_cmd_set_rf_channel {
  2420. struct mwl8k_cmd_pkt header;
  2421. __le16 action;
  2422. __u8 current_channel;
  2423. __le32 channel_flags;
  2424. } __packed;
  2425. static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
  2426. struct ieee80211_conf *conf)
  2427. {
  2428. struct ieee80211_channel *channel = conf->channel;
  2429. struct mwl8k_cmd_set_rf_channel *cmd;
  2430. int rc;
  2431. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2432. if (cmd == NULL)
  2433. return -ENOMEM;
  2434. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
  2435. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2436. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2437. cmd->current_channel = channel->hw_value;
  2438. if (channel->band == IEEE80211_BAND_2GHZ)
  2439. cmd->channel_flags |= cpu_to_le32(0x00000001);
  2440. else if (channel->band == IEEE80211_BAND_5GHZ)
  2441. cmd->channel_flags |= cpu_to_le32(0x00000004);
  2442. if (conf->channel_type == NL80211_CHAN_NO_HT ||
  2443. conf->channel_type == NL80211_CHAN_HT20)
  2444. cmd->channel_flags |= cpu_to_le32(0x00000080);
  2445. else if (conf->channel_type == NL80211_CHAN_HT40MINUS)
  2446. cmd->channel_flags |= cpu_to_le32(0x000001900);
  2447. else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
  2448. cmd->channel_flags |= cpu_to_le32(0x000000900);
  2449. rc = mwl8k_post_cmd(hw, &cmd->header);
  2450. kfree(cmd);
  2451. return rc;
  2452. }
  2453. /*
  2454. * CMD_SET_AID.
  2455. */
  2456. #define MWL8K_FRAME_PROT_DISABLED 0x00
  2457. #define MWL8K_FRAME_PROT_11G 0x07
  2458. #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
  2459. #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
  2460. struct mwl8k_cmd_update_set_aid {
  2461. struct mwl8k_cmd_pkt header;
  2462. __le16 aid;
  2463. /* AP's MAC address (BSSID) */
  2464. __u8 bssid[ETH_ALEN];
  2465. __le16 protection_mode;
  2466. __u8 supp_rates[14];
  2467. } __packed;
  2468. static void legacy_rate_mask_to_array(u8 *rates, u32 mask)
  2469. {
  2470. int i;
  2471. int j;
  2472. /*
  2473. * Clear nonstandard rates 4 and 13.
  2474. */
  2475. mask &= 0x1fef;
  2476. for (i = 0, j = 0; i < 14; i++) {
  2477. if (mask & (1 << i))
  2478. rates[j++] = mwl8k_rates_24[i].hw_value;
  2479. }
  2480. }
  2481. static int
  2482. mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
  2483. struct ieee80211_vif *vif, u32 legacy_rate_mask)
  2484. {
  2485. struct mwl8k_cmd_update_set_aid *cmd;
  2486. u16 prot_mode;
  2487. int rc;
  2488. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2489. if (cmd == NULL)
  2490. return -ENOMEM;
  2491. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
  2492. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2493. cmd->aid = cpu_to_le16(vif->bss_conf.aid);
  2494. memcpy(cmd->bssid, vif->bss_conf.bssid, ETH_ALEN);
  2495. if (vif->bss_conf.use_cts_prot) {
  2496. prot_mode = MWL8K_FRAME_PROT_11G;
  2497. } else {
  2498. switch (vif->bss_conf.ht_operation_mode &
  2499. IEEE80211_HT_OP_MODE_PROTECTION) {
  2500. case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
  2501. prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
  2502. break;
  2503. case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
  2504. prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
  2505. break;
  2506. default:
  2507. prot_mode = MWL8K_FRAME_PROT_DISABLED;
  2508. break;
  2509. }
  2510. }
  2511. cmd->protection_mode = cpu_to_le16(prot_mode);
  2512. legacy_rate_mask_to_array(cmd->supp_rates, legacy_rate_mask);
  2513. rc = mwl8k_post_cmd(hw, &cmd->header);
  2514. kfree(cmd);
  2515. return rc;
  2516. }
  2517. /*
  2518. * CMD_SET_RATE.
  2519. */
  2520. struct mwl8k_cmd_set_rate {
  2521. struct mwl8k_cmd_pkt header;
  2522. __u8 legacy_rates[14];
  2523. /* Bitmap for supported MCS codes. */
  2524. __u8 mcs_set[16];
  2525. __u8 reserved[16];
  2526. } __packed;
  2527. static int
  2528. mwl8k_cmd_set_rate(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  2529. u32 legacy_rate_mask, u8 *mcs_rates)
  2530. {
  2531. struct mwl8k_cmd_set_rate *cmd;
  2532. int rc;
  2533. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2534. if (cmd == NULL)
  2535. return -ENOMEM;
  2536. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
  2537. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2538. legacy_rate_mask_to_array(cmd->legacy_rates, legacy_rate_mask);
  2539. memcpy(cmd->mcs_set, mcs_rates, 16);
  2540. rc = mwl8k_post_cmd(hw, &cmd->header);
  2541. kfree(cmd);
  2542. return rc;
  2543. }
  2544. /*
  2545. * CMD_FINALIZE_JOIN.
  2546. */
  2547. #define MWL8K_FJ_BEACON_MAXLEN 128
  2548. struct mwl8k_cmd_finalize_join {
  2549. struct mwl8k_cmd_pkt header;
  2550. __le32 sleep_interval; /* Number of beacon periods to sleep */
  2551. __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
  2552. } __packed;
  2553. static int mwl8k_cmd_finalize_join(struct ieee80211_hw *hw, void *frame,
  2554. int framelen, int dtim)
  2555. {
  2556. struct mwl8k_cmd_finalize_join *cmd;
  2557. struct ieee80211_mgmt *payload = frame;
  2558. int payload_len;
  2559. int rc;
  2560. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2561. if (cmd == NULL)
  2562. return -ENOMEM;
  2563. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
  2564. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2565. cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
  2566. payload_len = framelen - ieee80211_hdrlen(payload->frame_control);
  2567. if (payload_len < 0)
  2568. payload_len = 0;
  2569. else if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
  2570. payload_len = MWL8K_FJ_BEACON_MAXLEN;
  2571. memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
  2572. rc = mwl8k_post_cmd(hw, &cmd->header);
  2573. kfree(cmd);
  2574. return rc;
  2575. }
  2576. /*
  2577. * CMD_SET_RTS_THRESHOLD.
  2578. */
  2579. struct mwl8k_cmd_set_rts_threshold {
  2580. struct mwl8k_cmd_pkt header;
  2581. __le16 action;
  2582. __le16 threshold;
  2583. } __packed;
  2584. static int
  2585. mwl8k_cmd_set_rts_threshold(struct ieee80211_hw *hw, int rts_thresh)
  2586. {
  2587. struct mwl8k_cmd_set_rts_threshold *cmd;
  2588. int rc;
  2589. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2590. if (cmd == NULL)
  2591. return -ENOMEM;
  2592. cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
  2593. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2594. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2595. cmd->threshold = cpu_to_le16(rts_thresh);
  2596. rc = mwl8k_post_cmd(hw, &cmd->header);
  2597. kfree(cmd);
  2598. return rc;
  2599. }
  2600. /*
  2601. * CMD_SET_SLOT.
  2602. */
  2603. struct mwl8k_cmd_set_slot {
  2604. struct mwl8k_cmd_pkt header;
  2605. __le16 action;
  2606. __u8 short_slot;
  2607. } __packed;
  2608. static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time)
  2609. {
  2610. struct mwl8k_cmd_set_slot *cmd;
  2611. int rc;
  2612. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2613. if (cmd == NULL)
  2614. return -ENOMEM;
  2615. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
  2616. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2617. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2618. cmd->short_slot = short_slot_time;
  2619. rc = mwl8k_post_cmd(hw, &cmd->header);
  2620. kfree(cmd);
  2621. return rc;
  2622. }
  2623. /*
  2624. * CMD_SET_EDCA_PARAMS.
  2625. */
  2626. struct mwl8k_cmd_set_edca_params {
  2627. struct mwl8k_cmd_pkt header;
  2628. /* See MWL8K_SET_EDCA_XXX below */
  2629. __le16 action;
  2630. /* TX opportunity in units of 32 us */
  2631. __le16 txop;
  2632. union {
  2633. struct {
  2634. /* Log exponent of max contention period: 0...15 */
  2635. __le32 log_cw_max;
  2636. /* Log exponent of min contention period: 0...15 */
  2637. __le32 log_cw_min;
  2638. /* Adaptive interframe spacing in units of 32us */
  2639. __u8 aifs;
  2640. /* TX queue to configure */
  2641. __u8 txq;
  2642. } ap;
  2643. struct {
  2644. /* Log exponent of max contention period: 0...15 */
  2645. __u8 log_cw_max;
  2646. /* Log exponent of min contention period: 0...15 */
  2647. __u8 log_cw_min;
  2648. /* Adaptive interframe spacing in units of 32us */
  2649. __u8 aifs;
  2650. /* TX queue to configure */
  2651. __u8 txq;
  2652. } sta;
  2653. };
  2654. } __packed;
  2655. #define MWL8K_SET_EDCA_CW 0x01
  2656. #define MWL8K_SET_EDCA_TXOP 0x02
  2657. #define MWL8K_SET_EDCA_AIFS 0x04
  2658. #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
  2659. MWL8K_SET_EDCA_TXOP | \
  2660. MWL8K_SET_EDCA_AIFS)
  2661. static int
  2662. mwl8k_cmd_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
  2663. __u16 cw_min, __u16 cw_max,
  2664. __u8 aifs, __u16 txop)
  2665. {
  2666. struct mwl8k_priv *priv = hw->priv;
  2667. struct mwl8k_cmd_set_edca_params *cmd;
  2668. int rc;
  2669. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2670. if (cmd == NULL)
  2671. return -ENOMEM;
  2672. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
  2673. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2674. cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
  2675. cmd->txop = cpu_to_le16(txop);
  2676. if (priv->ap_fw) {
  2677. cmd->ap.log_cw_max = cpu_to_le32(ilog2(cw_max + 1));
  2678. cmd->ap.log_cw_min = cpu_to_le32(ilog2(cw_min + 1));
  2679. cmd->ap.aifs = aifs;
  2680. cmd->ap.txq = qnum;
  2681. } else {
  2682. cmd->sta.log_cw_max = (u8)ilog2(cw_max + 1);
  2683. cmd->sta.log_cw_min = (u8)ilog2(cw_min + 1);
  2684. cmd->sta.aifs = aifs;
  2685. cmd->sta.txq = qnum;
  2686. }
  2687. rc = mwl8k_post_cmd(hw, &cmd->header);
  2688. kfree(cmd);
  2689. return rc;
  2690. }
  2691. /*
  2692. * CMD_SET_WMM_MODE.
  2693. */
  2694. struct mwl8k_cmd_set_wmm_mode {
  2695. struct mwl8k_cmd_pkt header;
  2696. __le16 action;
  2697. } __packed;
  2698. static int mwl8k_cmd_set_wmm_mode(struct ieee80211_hw *hw, bool enable)
  2699. {
  2700. struct mwl8k_priv *priv = hw->priv;
  2701. struct mwl8k_cmd_set_wmm_mode *cmd;
  2702. int rc;
  2703. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2704. if (cmd == NULL)
  2705. return -ENOMEM;
  2706. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
  2707. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2708. cmd->action = cpu_to_le16(!!enable);
  2709. rc = mwl8k_post_cmd(hw, &cmd->header);
  2710. kfree(cmd);
  2711. if (!rc)
  2712. priv->wmm_enabled = enable;
  2713. return rc;
  2714. }
  2715. /*
  2716. * CMD_MIMO_CONFIG.
  2717. */
  2718. struct mwl8k_cmd_mimo_config {
  2719. struct mwl8k_cmd_pkt header;
  2720. __le32 action;
  2721. __u8 rx_antenna_map;
  2722. __u8 tx_antenna_map;
  2723. } __packed;
  2724. static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
  2725. {
  2726. struct mwl8k_cmd_mimo_config *cmd;
  2727. int rc;
  2728. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2729. if (cmd == NULL)
  2730. return -ENOMEM;
  2731. cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
  2732. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2733. cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
  2734. cmd->rx_antenna_map = rx;
  2735. cmd->tx_antenna_map = tx;
  2736. rc = mwl8k_post_cmd(hw, &cmd->header);
  2737. kfree(cmd);
  2738. return rc;
  2739. }
  2740. /*
  2741. * CMD_USE_FIXED_RATE (STA version).
  2742. */
  2743. struct mwl8k_cmd_use_fixed_rate_sta {
  2744. struct mwl8k_cmd_pkt header;
  2745. __le32 action;
  2746. __le32 allow_rate_drop;
  2747. __le32 num_rates;
  2748. struct {
  2749. __le32 is_ht_rate;
  2750. __le32 enable_retry;
  2751. __le32 rate;
  2752. __le32 retry_count;
  2753. } rate_entry[8];
  2754. __le32 rate_type;
  2755. __le32 reserved1;
  2756. __le32 reserved2;
  2757. } __packed;
  2758. #define MWL8K_USE_AUTO_RATE 0x0002
  2759. #define MWL8K_UCAST_RATE 0
  2760. static int mwl8k_cmd_use_fixed_rate_sta(struct ieee80211_hw *hw)
  2761. {
  2762. struct mwl8k_cmd_use_fixed_rate_sta *cmd;
  2763. int rc;
  2764. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2765. if (cmd == NULL)
  2766. return -ENOMEM;
  2767. cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
  2768. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2769. cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
  2770. cmd->rate_type = cpu_to_le32(MWL8K_UCAST_RATE);
  2771. rc = mwl8k_post_cmd(hw, &cmd->header);
  2772. kfree(cmd);
  2773. return rc;
  2774. }
  2775. /*
  2776. * CMD_USE_FIXED_RATE (AP version).
  2777. */
  2778. struct mwl8k_cmd_use_fixed_rate_ap {
  2779. struct mwl8k_cmd_pkt header;
  2780. __le32 action;
  2781. __le32 allow_rate_drop;
  2782. __le32 num_rates;
  2783. struct mwl8k_rate_entry_ap {
  2784. __le32 is_ht_rate;
  2785. __le32 enable_retry;
  2786. __le32 rate;
  2787. __le32 retry_count;
  2788. } rate_entry[4];
  2789. u8 multicast_rate;
  2790. u8 multicast_rate_type;
  2791. u8 management_rate;
  2792. } __packed;
  2793. static int
  2794. mwl8k_cmd_use_fixed_rate_ap(struct ieee80211_hw *hw, int mcast, int mgmt)
  2795. {
  2796. struct mwl8k_cmd_use_fixed_rate_ap *cmd;
  2797. int rc;
  2798. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2799. if (cmd == NULL)
  2800. return -ENOMEM;
  2801. cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
  2802. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2803. cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
  2804. cmd->multicast_rate = mcast;
  2805. cmd->management_rate = mgmt;
  2806. rc = mwl8k_post_cmd(hw, &cmd->header);
  2807. kfree(cmd);
  2808. return rc;
  2809. }
  2810. /*
  2811. * CMD_ENABLE_SNIFFER.
  2812. */
  2813. struct mwl8k_cmd_enable_sniffer {
  2814. struct mwl8k_cmd_pkt header;
  2815. __le32 action;
  2816. } __packed;
  2817. static int mwl8k_cmd_enable_sniffer(struct ieee80211_hw *hw, bool enable)
  2818. {
  2819. struct mwl8k_cmd_enable_sniffer *cmd;
  2820. int rc;
  2821. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2822. if (cmd == NULL)
  2823. return -ENOMEM;
  2824. cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
  2825. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2826. cmd->action = cpu_to_le32(!!enable);
  2827. rc = mwl8k_post_cmd(hw, &cmd->header);
  2828. kfree(cmd);
  2829. return rc;
  2830. }
  2831. /*
  2832. * CMD_SET_MAC_ADDR.
  2833. */
  2834. struct mwl8k_cmd_set_mac_addr {
  2835. struct mwl8k_cmd_pkt header;
  2836. union {
  2837. struct {
  2838. __le16 mac_type;
  2839. __u8 mac_addr[ETH_ALEN];
  2840. } mbss;
  2841. __u8 mac_addr[ETH_ALEN];
  2842. };
  2843. } __packed;
  2844. #define MWL8K_MAC_TYPE_PRIMARY_CLIENT 0
  2845. #define MWL8K_MAC_TYPE_SECONDARY_CLIENT 1
  2846. #define MWL8K_MAC_TYPE_PRIMARY_AP 2
  2847. #define MWL8K_MAC_TYPE_SECONDARY_AP 3
  2848. static int mwl8k_cmd_set_mac_addr(struct ieee80211_hw *hw,
  2849. struct ieee80211_vif *vif, u8 *mac)
  2850. {
  2851. struct mwl8k_priv *priv = hw->priv;
  2852. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  2853. struct mwl8k_cmd_set_mac_addr *cmd;
  2854. int mac_type;
  2855. int rc;
  2856. mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
  2857. if (vif != NULL && vif->type == NL80211_IFTYPE_STATION) {
  2858. if (mwl8k_vif->macid + 1 == ffs(priv->sta_macids_supported))
  2859. mac_type = MWL8K_MAC_TYPE_PRIMARY_CLIENT;
  2860. else
  2861. mac_type = MWL8K_MAC_TYPE_SECONDARY_CLIENT;
  2862. } else if (vif != NULL && vif->type == NL80211_IFTYPE_AP) {
  2863. if (mwl8k_vif->macid + 1 == ffs(priv->ap_macids_supported))
  2864. mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
  2865. else
  2866. mac_type = MWL8K_MAC_TYPE_SECONDARY_AP;
  2867. }
  2868. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2869. if (cmd == NULL)
  2870. return -ENOMEM;
  2871. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR);
  2872. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2873. if (priv->ap_fw) {
  2874. cmd->mbss.mac_type = cpu_to_le16(mac_type);
  2875. memcpy(cmd->mbss.mac_addr, mac, ETH_ALEN);
  2876. } else {
  2877. memcpy(cmd->mac_addr, mac, ETH_ALEN);
  2878. }
  2879. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2880. kfree(cmd);
  2881. return rc;
  2882. }
  2883. /*
  2884. * CMD_SET_RATEADAPT_MODE.
  2885. */
  2886. struct mwl8k_cmd_set_rate_adapt_mode {
  2887. struct mwl8k_cmd_pkt header;
  2888. __le16 action;
  2889. __le16 mode;
  2890. } __packed;
  2891. static int mwl8k_cmd_set_rateadapt_mode(struct ieee80211_hw *hw, __u16 mode)
  2892. {
  2893. struct mwl8k_cmd_set_rate_adapt_mode *cmd;
  2894. int rc;
  2895. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2896. if (cmd == NULL)
  2897. return -ENOMEM;
  2898. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
  2899. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2900. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2901. cmd->mode = cpu_to_le16(mode);
  2902. rc = mwl8k_post_cmd(hw, &cmd->header);
  2903. kfree(cmd);
  2904. return rc;
  2905. }
  2906. /*
  2907. * CMD_GET_WATCHDOG_BITMAP.
  2908. */
  2909. struct mwl8k_cmd_get_watchdog_bitmap {
  2910. struct mwl8k_cmd_pkt header;
  2911. u8 bitmap;
  2912. } __packed;
  2913. static int mwl8k_cmd_get_watchdog_bitmap(struct ieee80211_hw *hw, u8 *bitmap)
  2914. {
  2915. struct mwl8k_cmd_get_watchdog_bitmap *cmd;
  2916. int rc;
  2917. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2918. if (cmd == NULL)
  2919. return -ENOMEM;
  2920. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_WATCHDOG_BITMAP);
  2921. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2922. rc = mwl8k_post_cmd(hw, &cmd->header);
  2923. if (!rc)
  2924. *bitmap = cmd->bitmap;
  2925. kfree(cmd);
  2926. return rc;
  2927. }
  2928. #define INVALID_BA 0xAA
  2929. static void mwl8k_watchdog_ba_events(struct work_struct *work)
  2930. {
  2931. int rc;
  2932. u8 bitmap = 0, stream_index;
  2933. struct mwl8k_ampdu_stream *streams;
  2934. struct mwl8k_priv *priv =
  2935. container_of(work, struct mwl8k_priv, watchdog_ba_handle);
  2936. rc = mwl8k_cmd_get_watchdog_bitmap(priv->hw, &bitmap);
  2937. if (rc)
  2938. return;
  2939. if (bitmap == INVALID_BA)
  2940. return;
  2941. /* the bitmap is the hw queue number. Map it to the ampdu queue. */
  2942. stream_index = bitmap - MWL8K_TX_WMM_QUEUES;
  2943. BUG_ON(stream_index >= priv->num_ampdu_queues);
  2944. streams = &priv->ampdu[stream_index];
  2945. if (streams->state == AMPDU_STREAM_ACTIVE)
  2946. ieee80211_stop_tx_ba_session(streams->sta, streams->tid);
  2947. return;
  2948. }
  2949. /*
  2950. * CMD_BSS_START.
  2951. */
  2952. struct mwl8k_cmd_bss_start {
  2953. struct mwl8k_cmd_pkt header;
  2954. __le32 enable;
  2955. } __packed;
  2956. static int mwl8k_cmd_bss_start(struct ieee80211_hw *hw,
  2957. struct ieee80211_vif *vif, int enable)
  2958. {
  2959. struct mwl8k_cmd_bss_start *cmd;
  2960. int rc;
  2961. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2962. if (cmd == NULL)
  2963. return -ENOMEM;
  2964. cmd->header.code = cpu_to_le16(MWL8K_CMD_BSS_START);
  2965. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2966. cmd->enable = cpu_to_le32(enable);
  2967. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2968. kfree(cmd);
  2969. return rc;
  2970. }
  2971. /*
  2972. * CMD_BASTREAM.
  2973. */
  2974. /*
  2975. * UPSTREAM is tx direction
  2976. */
  2977. #define BASTREAM_FLAG_DIRECTION_UPSTREAM 0x00
  2978. #define BASTREAM_FLAG_IMMEDIATE_TYPE 0x01
  2979. enum ba_stream_action_type {
  2980. MWL8K_BA_CREATE,
  2981. MWL8K_BA_UPDATE,
  2982. MWL8K_BA_DESTROY,
  2983. MWL8K_BA_FLUSH,
  2984. MWL8K_BA_CHECK,
  2985. };
  2986. struct mwl8k_create_ba_stream {
  2987. __le32 flags;
  2988. __le32 idle_thrs;
  2989. __le32 bar_thrs;
  2990. __le32 window_size;
  2991. u8 peer_mac_addr[6];
  2992. u8 dialog_token;
  2993. u8 tid;
  2994. u8 queue_id;
  2995. u8 param_info;
  2996. __le32 ba_context;
  2997. u8 reset_seq_no_flag;
  2998. __le16 curr_seq_no;
  2999. u8 sta_src_mac_addr[6];
  3000. } __packed;
  3001. struct mwl8k_destroy_ba_stream {
  3002. __le32 flags;
  3003. __le32 ba_context;
  3004. } __packed;
  3005. struct mwl8k_cmd_bastream {
  3006. struct mwl8k_cmd_pkt header;
  3007. __le32 action;
  3008. union {
  3009. struct mwl8k_create_ba_stream create_params;
  3010. struct mwl8k_destroy_ba_stream destroy_params;
  3011. };
  3012. } __packed;
  3013. static int
  3014. mwl8k_check_ba(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream)
  3015. {
  3016. struct mwl8k_cmd_bastream *cmd;
  3017. int rc;
  3018. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3019. if (cmd == NULL)
  3020. return -ENOMEM;
  3021. cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM);
  3022. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3023. cmd->action = cpu_to_le32(MWL8K_BA_CHECK);
  3024. cmd->create_params.queue_id = stream->idx;
  3025. memcpy(&cmd->create_params.peer_mac_addr[0], stream->sta->addr,
  3026. ETH_ALEN);
  3027. cmd->create_params.tid = stream->tid;
  3028. cmd->create_params.flags =
  3029. cpu_to_le32(BASTREAM_FLAG_IMMEDIATE_TYPE) |
  3030. cpu_to_le32(BASTREAM_FLAG_DIRECTION_UPSTREAM);
  3031. rc = mwl8k_post_cmd(hw, &cmd->header);
  3032. kfree(cmd);
  3033. return rc;
  3034. }
  3035. static int
  3036. mwl8k_create_ba(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream,
  3037. u8 buf_size)
  3038. {
  3039. struct mwl8k_cmd_bastream *cmd;
  3040. int rc;
  3041. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3042. if (cmd == NULL)
  3043. return -ENOMEM;
  3044. cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM);
  3045. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3046. cmd->action = cpu_to_le32(MWL8K_BA_CREATE);
  3047. cmd->create_params.bar_thrs = cpu_to_le32((u32)buf_size);
  3048. cmd->create_params.window_size = cpu_to_le32((u32)buf_size);
  3049. cmd->create_params.queue_id = stream->idx;
  3050. memcpy(cmd->create_params.peer_mac_addr, stream->sta->addr, ETH_ALEN);
  3051. cmd->create_params.tid = stream->tid;
  3052. cmd->create_params.curr_seq_no = cpu_to_le16(0);
  3053. cmd->create_params.reset_seq_no_flag = 1;
  3054. cmd->create_params.param_info =
  3055. (stream->sta->ht_cap.ampdu_factor &
  3056. IEEE80211_HT_AMPDU_PARM_FACTOR) |
  3057. ((stream->sta->ht_cap.ampdu_density << 2) &
  3058. IEEE80211_HT_AMPDU_PARM_DENSITY);
  3059. cmd->create_params.flags =
  3060. cpu_to_le32(BASTREAM_FLAG_IMMEDIATE_TYPE |
  3061. BASTREAM_FLAG_DIRECTION_UPSTREAM);
  3062. rc = mwl8k_post_cmd(hw, &cmd->header);
  3063. wiphy_debug(hw->wiphy, "Created a BA stream for %pM : tid %d\n",
  3064. stream->sta->addr, stream->tid);
  3065. kfree(cmd);
  3066. return rc;
  3067. }
  3068. static void mwl8k_destroy_ba(struct ieee80211_hw *hw,
  3069. struct mwl8k_ampdu_stream *stream)
  3070. {
  3071. struct mwl8k_cmd_bastream *cmd;
  3072. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3073. if (cmd == NULL)
  3074. return;
  3075. cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM);
  3076. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3077. cmd->action = cpu_to_le32(MWL8K_BA_DESTROY);
  3078. cmd->destroy_params.ba_context = cpu_to_le32(stream->idx);
  3079. mwl8k_post_cmd(hw, &cmd->header);
  3080. wiphy_debug(hw->wiphy, "Deleted BA stream index %d\n", stream->idx);
  3081. kfree(cmd);
  3082. }
  3083. /*
  3084. * CMD_SET_NEW_STN.
  3085. */
  3086. struct mwl8k_cmd_set_new_stn {
  3087. struct mwl8k_cmd_pkt header;
  3088. __le16 aid;
  3089. __u8 mac_addr[6];
  3090. __le16 stn_id;
  3091. __le16 action;
  3092. __le16 rsvd;
  3093. __le32 legacy_rates;
  3094. __u8 ht_rates[4];
  3095. __le16 cap_info;
  3096. __le16 ht_capabilities_info;
  3097. __u8 mac_ht_param_info;
  3098. __u8 rev;
  3099. __u8 control_channel;
  3100. __u8 add_channel;
  3101. __le16 op_mode;
  3102. __le16 stbc;
  3103. __u8 add_qos_info;
  3104. __u8 is_qos_sta;
  3105. __le32 fw_sta_ptr;
  3106. } __packed;
  3107. #define MWL8K_STA_ACTION_ADD 0
  3108. #define MWL8K_STA_ACTION_REMOVE 2
  3109. static int mwl8k_cmd_set_new_stn_add(struct ieee80211_hw *hw,
  3110. struct ieee80211_vif *vif,
  3111. struct ieee80211_sta *sta)
  3112. {
  3113. struct mwl8k_cmd_set_new_stn *cmd;
  3114. u32 rates;
  3115. int rc;
  3116. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3117. if (cmd == NULL)
  3118. return -ENOMEM;
  3119. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
  3120. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3121. cmd->aid = cpu_to_le16(sta->aid);
  3122. memcpy(cmd->mac_addr, sta->addr, ETH_ALEN);
  3123. cmd->stn_id = cpu_to_le16(sta->aid);
  3124. cmd->action = cpu_to_le16(MWL8K_STA_ACTION_ADD);
  3125. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
  3126. rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
  3127. else
  3128. rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
  3129. cmd->legacy_rates = cpu_to_le32(rates);
  3130. if (sta->ht_cap.ht_supported) {
  3131. cmd->ht_rates[0] = sta->ht_cap.mcs.rx_mask[0];
  3132. cmd->ht_rates[1] = sta->ht_cap.mcs.rx_mask[1];
  3133. cmd->ht_rates[2] = sta->ht_cap.mcs.rx_mask[2];
  3134. cmd->ht_rates[3] = sta->ht_cap.mcs.rx_mask[3];
  3135. cmd->ht_capabilities_info = cpu_to_le16(sta->ht_cap.cap);
  3136. cmd->mac_ht_param_info = (sta->ht_cap.ampdu_factor & 3) |
  3137. ((sta->ht_cap.ampdu_density & 7) << 2);
  3138. cmd->is_qos_sta = 1;
  3139. }
  3140. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  3141. kfree(cmd);
  3142. return rc;
  3143. }
  3144. static int mwl8k_cmd_set_new_stn_add_self(struct ieee80211_hw *hw,
  3145. struct ieee80211_vif *vif)
  3146. {
  3147. struct mwl8k_cmd_set_new_stn *cmd;
  3148. int rc;
  3149. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3150. if (cmd == NULL)
  3151. return -ENOMEM;
  3152. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
  3153. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3154. memcpy(cmd->mac_addr, vif->addr, ETH_ALEN);
  3155. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  3156. kfree(cmd);
  3157. return rc;
  3158. }
  3159. static int mwl8k_cmd_set_new_stn_del(struct ieee80211_hw *hw,
  3160. struct ieee80211_vif *vif, u8 *addr)
  3161. {
  3162. struct mwl8k_cmd_set_new_stn *cmd;
  3163. int rc;
  3164. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3165. if (cmd == NULL)
  3166. return -ENOMEM;
  3167. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
  3168. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3169. memcpy(cmd->mac_addr, addr, ETH_ALEN);
  3170. cmd->action = cpu_to_le16(MWL8K_STA_ACTION_REMOVE);
  3171. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  3172. kfree(cmd);
  3173. return rc;
  3174. }
  3175. /*
  3176. * CMD_UPDATE_ENCRYPTION.
  3177. */
  3178. #define MAX_ENCR_KEY_LENGTH 16
  3179. #define MIC_KEY_LENGTH 8
  3180. struct mwl8k_cmd_update_encryption {
  3181. struct mwl8k_cmd_pkt header;
  3182. __le32 action;
  3183. __le32 reserved;
  3184. __u8 mac_addr[6];
  3185. __u8 encr_type;
  3186. } __packed;
  3187. struct mwl8k_cmd_set_key {
  3188. struct mwl8k_cmd_pkt header;
  3189. __le32 action;
  3190. __le32 reserved;
  3191. __le16 length;
  3192. __le16 key_type_id;
  3193. __le32 key_info;
  3194. __le32 key_id;
  3195. __le16 key_len;
  3196. __u8 key_material[MAX_ENCR_KEY_LENGTH];
  3197. __u8 tkip_tx_mic_key[MIC_KEY_LENGTH];
  3198. __u8 tkip_rx_mic_key[MIC_KEY_LENGTH];
  3199. __le16 tkip_rsc_low;
  3200. __le32 tkip_rsc_high;
  3201. __le16 tkip_tsc_low;
  3202. __le32 tkip_tsc_high;
  3203. __u8 mac_addr[6];
  3204. } __packed;
  3205. enum {
  3206. MWL8K_ENCR_ENABLE,
  3207. MWL8K_ENCR_SET_KEY,
  3208. MWL8K_ENCR_REMOVE_KEY,
  3209. MWL8K_ENCR_SET_GROUP_KEY,
  3210. };
  3211. #define MWL8K_UPDATE_ENCRYPTION_TYPE_WEP 0
  3212. #define MWL8K_UPDATE_ENCRYPTION_TYPE_DISABLE 1
  3213. #define MWL8K_UPDATE_ENCRYPTION_TYPE_TKIP 4
  3214. #define MWL8K_UPDATE_ENCRYPTION_TYPE_MIXED 7
  3215. #define MWL8K_UPDATE_ENCRYPTION_TYPE_AES 8
  3216. enum {
  3217. MWL8K_ALG_WEP,
  3218. MWL8K_ALG_TKIP,
  3219. MWL8K_ALG_CCMP,
  3220. };
  3221. #define MWL8K_KEY_FLAG_TXGROUPKEY 0x00000004
  3222. #define MWL8K_KEY_FLAG_PAIRWISE 0x00000008
  3223. #define MWL8K_KEY_FLAG_TSC_VALID 0x00000040
  3224. #define MWL8K_KEY_FLAG_WEP_TXKEY 0x01000000
  3225. #define MWL8K_KEY_FLAG_MICKEY_VALID 0x02000000
  3226. static int mwl8k_cmd_update_encryption_enable(struct ieee80211_hw *hw,
  3227. struct ieee80211_vif *vif,
  3228. u8 *addr,
  3229. u8 encr_type)
  3230. {
  3231. struct mwl8k_cmd_update_encryption *cmd;
  3232. int rc;
  3233. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3234. if (cmd == NULL)
  3235. return -ENOMEM;
  3236. cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_ENCRYPTION);
  3237. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3238. cmd->action = cpu_to_le32(MWL8K_ENCR_ENABLE);
  3239. memcpy(cmd->mac_addr, addr, ETH_ALEN);
  3240. cmd->encr_type = encr_type;
  3241. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  3242. kfree(cmd);
  3243. return rc;
  3244. }
  3245. static int mwl8k_encryption_set_cmd_info(struct mwl8k_cmd_set_key *cmd,
  3246. u8 *addr,
  3247. struct ieee80211_key_conf *key)
  3248. {
  3249. cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_ENCRYPTION);
  3250. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3251. cmd->length = cpu_to_le16(sizeof(*cmd) -
  3252. offsetof(struct mwl8k_cmd_set_key, length));
  3253. cmd->key_id = cpu_to_le32(key->keyidx);
  3254. cmd->key_len = cpu_to_le16(key->keylen);
  3255. memcpy(cmd->mac_addr, addr, ETH_ALEN);
  3256. switch (key->cipher) {
  3257. case WLAN_CIPHER_SUITE_WEP40:
  3258. case WLAN_CIPHER_SUITE_WEP104:
  3259. cmd->key_type_id = cpu_to_le16(MWL8K_ALG_WEP);
  3260. if (key->keyidx == 0)
  3261. cmd->key_info = cpu_to_le32(MWL8K_KEY_FLAG_WEP_TXKEY);
  3262. break;
  3263. case WLAN_CIPHER_SUITE_TKIP:
  3264. cmd->key_type_id = cpu_to_le16(MWL8K_ALG_TKIP);
  3265. cmd->key_info = (key->flags & IEEE80211_KEY_FLAG_PAIRWISE)
  3266. ? cpu_to_le32(MWL8K_KEY_FLAG_PAIRWISE)
  3267. : cpu_to_le32(MWL8K_KEY_FLAG_TXGROUPKEY);
  3268. cmd->key_info |= cpu_to_le32(MWL8K_KEY_FLAG_MICKEY_VALID
  3269. | MWL8K_KEY_FLAG_TSC_VALID);
  3270. break;
  3271. case WLAN_CIPHER_SUITE_CCMP:
  3272. cmd->key_type_id = cpu_to_le16(MWL8K_ALG_CCMP);
  3273. cmd->key_info = (key->flags & IEEE80211_KEY_FLAG_PAIRWISE)
  3274. ? cpu_to_le32(MWL8K_KEY_FLAG_PAIRWISE)
  3275. : cpu_to_le32(MWL8K_KEY_FLAG_TXGROUPKEY);
  3276. break;
  3277. default:
  3278. return -ENOTSUPP;
  3279. }
  3280. return 0;
  3281. }
  3282. static int mwl8k_cmd_encryption_set_key(struct ieee80211_hw *hw,
  3283. struct ieee80211_vif *vif,
  3284. u8 *addr,
  3285. struct ieee80211_key_conf *key)
  3286. {
  3287. struct mwl8k_cmd_set_key *cmd;
  3288. int rc;
  3289. int keymlen;
  3290. u32 action;
  3291. u8 idx;
  3292. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  3293. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3294. if (cmd == NULL)
  3295. return -ENOMEM;
  3296. rc = mwl8k_encryption_set_cmd_info(cmd, addr, key);
  3297. if (rc < 0)
  3298. goto done;
  3299. idx = key->keyidx;
  3300. if (key->flags & IEEE80211_KEY_FLAG_PAIRWISE)
  3301. action = MWL8K_ENCR_SET_KEY;
  3302. else
  3303. action = MWL8K_ENCR_SET_GROUP_KEY;
  3304. switch (key->cipher) {
  3305. case WLAN_CIPHER_SUITE_WEP40:
  3306. case WLAN_CIPHER_SUITE_WEP104:
  3307. if (!mwl8k_vif->wep_key_conf[idx].enabled) {
  3308. memcpy(mwl8k_vif->wep_key_conf[idx].key, key,
  3309. sizeof(*key) + key->keylen);
  3310. mwl8k_vif->wep_key_conf[idx].enabled = 1;
  3311. }
  3312. keymlen = key->keylen;
  3313. action = MWL8K_ENCR_SET_KEY;
  3314. break;
  3315. case WLAN_CIPHER_SUITE_TKIP:
  3316. keymlen = MAX_ENCR_KEY_LENGTH + 2 * MIC_KEY_LENGTH;
  3317. break;
  3318. case WLAN_CIPHER_SUITE_CCMP:
  3319. keymlen = key->keylen;
  3320. break;
  3321. default:
  3322. rc = -ENOTSUPP;
  3323. goto done;
  3324. }
  3325. memcpy(cmd->key_material, key->key, keymlen);
  3326. cmd->action = cpu_to_le32(action);
  3327. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  3328. done:
  3329. kfree(cmd);
  3330. return rc;
  3331. }
  3332. static int mwl8k_cmd_encryption_remove_key(struct ieee80211_hw *hw,
  3333. struct ieee80211_vif *vif,
  3334. u8 *addr,
  3335. struct ieee80211_key_conf *key)
  3336. {
  3337. struct mwl8k_cmd_set_key *cmd;
  3338. int rc;
  3339. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  3340. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3341. if (cmd == NULL)
  3342. return -ENOMEM;
  3343. rc = mwl8k_encryption_set_cmd_info(cmd, addr, key);
  3344. if (rc < 0)
  3345. goto done;
  3346. if (key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
  3347. WLAN_CIPHER_SUITE_WEP104)
  3348. mwl8k_vif->wep_key_conf[key->keyidx].enabled = 0;
  3349. cmd->action = cpu_to_le32(MWL8K_ENCR_REMOVE_KEY);
  3350. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  3351. done:
  3352. kfree(cmd);
  3353. return rc;
  3354. }
  3355. static int mwl8k_set_key(struct ieee80211_hw *hw,
  3356. enum set_key_cmd cmd_param,
  3357. struct ieee80211_vif *vif,
  3358. struct ieee80211_sta *sta,
  3359. struct ieee80211_key_conf *key)
  3360. {
  3361. int rc = 0;
  3362. u8 encr_type;
  3363. u8 *addr;
  3364. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  3365. if (vif->type == NL80211_IFTYPE_STATION)
  3366. return -EOPNOTSUPP;
  3367. if (sta == NULL)
  3368. addr = hw->wiphy->perm_addr;
  3369. else
  3370. addr = sta->addr;
  3371. if (cmd_param == SET_KEY) {
  3372. rc = mwl8k_cmd_encryption_set_key(hw, vif, addr, key);
  3373. if (rc)
  3374. goto out;
  3375. if ((key->cipher == WLAN_CIPHER_SUITE_WEP40)
  3376. || (key->cipher == WLAN_CIPHER_SUITE_WEP104))
  3377. encr_type = MWL8K_UPDATE_ENCRYPTION_TYPE_WEP;
  3378. else
  3379. encr_type = MWL8K_UPDATE_ENCRYPTION_TYPE_MIXED;
  3380. rc = mwl8k_cmd_update_encryption_enable(hw, vif, addr,
  3381. encr_type);
  3382. if (rc)
  3383. goto out;
  3384. mwl8k_vif->is_hw_crypto_enabled = true;
  3385. } else {
  3386. rc = mwl8k_cmd_encryption_remove_key(hw, vif, addr, key);
  3387. if (rc)
  3388. goto out;
  3389. mwl8k_vif->is_hw_crypto_enabled = false;
  3390. }
  3391. out:
  3392. return rc;
  3393. }
  3394. /*
  3395. * CMD_UPDATE_STADB.
  3396. */
  3397. struct ewc_ht_info {
  3398. __le16 control1;
  3399. __le16 control2;
  3400. __le16 control3;
  3401. } __packed;
  3402. struct peer_capability_info {
  3403. /* Peer type - AP vs. STA. */
  3404. __u8 peer_type;
  3405. /* Basic 802.11 capabilities from assoc resp. */
  3406. __le16 basic_caps;
  3407. /* Set if peer supports 802.11n high throughput (HT). */
  3408. __u8 ht_support;
  3409. /* Valid if HT is supported. */
  3410. __le16 ht_caps;
  3411. __u8 extended_ht_caps;
  3412. struct ewc_ht_info ewc_info;
  3413. /* Legacy rate table. Intersection of our rates and peer rates. */
  3414. __u8 legacy_rates[12];
  3415. /* HT rate table. Intersection of our rates and peer rates. */
  3416. __u8 ht_rates[16];
  3417. __u8 pad[16];
  3418. /* If set, interoperability mode, no proprietary extensions. */
  3419. __u8 interop;
  3420. __u8 pad2;
  3421. __u8 station_id;
  3422. __le16 amsdu_enabled;
  3423. } __packed;
  3424. struct mwl8k_cmd_update_stadb {
  3425. struct mwl8k_cmd_pkt header;
  3426. /* See STADB_ACTION_TYPE */
  3427. __le32 action;
  3428. /* Peer MAC address */
  3429. __u8 peer_addr[ETH_ALEN];
  3430. __le32 reserved;
  3431. /* Peer info - valid during add/update. */
  3432. struct peer_capability_info peer_info;
  3433. } __packed;
  3434. #define MWL8K_STA_DB_MODIFY_ENTRY 1
  3435. #define MWL8K_STA_DB_DEL_ENTRY 2
  3436. /* Peer Entry flags - used to define the type of the peer node */
  3437. #define MWL8K_PEER_TYPE_ACCESSPOINT 2
  3438. static int mwl8k_cmd_update_stadb_add(struct ieee80211_hw *hw,
  3439. struct ieee80211_vif *vif,
  3440. struct ieee80211_sta *sta)
  3441. {
  3442. struct mwl8k_cmd_update_stadb *cmd;
  3443. struct peer_capability_info *p;
  3444. u32 rates;
  3445. int rc;
  3446. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3447. if (cmd == NULL)
  3448. return -ENOMEM;
  3449. cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
  3450. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3451. cmd->action = cpu_to_le32(MWL8K_STA_DB_MODIFY_ENTRY);
  3452. memcpy(cmd->peer_addr, sta->addr, ETH_ALEN);
  3453. p = &cmd->peer_info;
  3454. p->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
  3455. p->basic_caps = cpu_to_le16(vif->bss_conf.assoc_capability);
  3456. p->ht_support = sta->ht_cap.ht_supported;
  3457. p->ht_caps = cpu_to_le16(sta->ht_cap.cap);
  3458. p->extended_ht_caps = (sta->ht_cap.ampdu_factor & 3) |
  3459. ((sta->ht_cap.ampdu_density & 7) << 2);
  3460. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
  3461. rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
  3462. else
  3463. rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
  3464. legacy_rate_mask_to_array(p->legacy_rates, rates);
  3465. memcpy(p->ht_rates, sta->ht_cap.mcs.rx_mask, 16);
  3466. p->interop = 1;
  3467. p->amsdu_enabled = 0;
  3468. rc = mwl8k_post_cmd(hw, &cmd->header);
  3469. kfree(cmd);
  3470. return rc ? rc : p->station_id;
  3471. }
  3472. static int mwl8k_cmd_update_stadb_del(struct ieee80211_hw *hw,
  3473. struct ieee80211_vif *vif, u8 *addr)
  3474. {
  3475. struct mwl8k_cmd_update_stadb *cmd;
  3476. int rc;
  3477. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3478. if (cmd == NULL)
  3479. return -ENOMEM;
  3480. cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
  3481. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3482. cmd->action = cpu_to_le32(MWL8K_STA_DB_DEL_ENTRY);
  3483. memcpy(cmd->peer_addr, addr, ETH_ALEN);
  3484. rc = mwl8k_post_cmd(hw, &cmd->header);
  3485. kfree(cmd);
  3486. return rc;
  3487. }
  3488. /*
  3489. * Interrupt handling.
  3490. */
  3491. static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
  3492. {
  3493. struct ieee80211_hw *hw = dev_id;
  3494. struct mwl8k_priv *priv = hw->priv;
  3495. u32 status;
  3496. status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  3497. if (!status)
  3498. return IRQ_NONE;
  3499. if (status & MWL8K_A2H_INT_TX_DONE) {
  3500. status &= ~MWL8K_A2H_INT_TX_DONE;
  3501. tasklet_schedule(&priv->poll_tx_task);
  3502. }
  3503. if (status & MWL8K_A2H_INT_RX_READY) {
  3504. status &= ~MWL8K_A2H_INT_RX_READY;
  3505. tasklet_schedule(&priv->poll_rx_task);
  3506. }
  3507. if (status & MWL8K_A2H_INT_BA_WATCHDOG) {
  3508. status &= ~MWL8K_A2H_INT_BA_WATCHDOG;
  3509. ieee80211_queue_work(hw, &priv->watchdog_ba_handle);
  3510. }
  3511. if (status)
  3512. iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  3513. if (status & MWL8K_A2H_INT_OPC_DONE) {
  3514. if (priv->hostcmd_wait != NULL)
  3515. complete(priv->hostcmd_wait);
  3516. }
  3517. if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
  3518. if (!mutex_is_locked(&priv->fw_mutex) &&
  3519. priv->radio_on && priv->pending_tx_pkts)
  3520. mwl8k_tx_start(priv);
  3521. }
  3522. return IRQ_HANDLED;
  3523. }
  3524. static void mwl8k_tx_poll(unsigned long data)
  3525. {
  3526. struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
  3527. struct mwl8k_priv *priv = hw->priv;
  3528. int limit;
  3529. int i;
  3530. limit = 32;
  3531. spin_lock_bh(&priv->tx_lock);
  3532. for (i = 0; i < mwl8k_tx_queues(priv); i++)
  3533. limit -= mwl8k_txq_reclaim(hw, i, limit, 0);
  3534. if (!priv->pending_tx_pkts && priv->tx_wait != NULL) {
  3535. complete(priv->tx_wait);
  3536. priv->tx_wait = NULL;
  3537. }
  3538. spin_unlock_bh(&priv->tx_lock);
  3539. if (limit) {
  3540. writel(~MWL8K_A2H_INT_TX_DONE,
  3541. priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  3542. } else {
  3543. tasklet_schedule(&priv->poll_tx_task);
  3544. }
  3545. }
  3546. static void mwl8k_rx_poll(unsigned long data)
  3547. {
  3548. struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
  3549. struct mwl8k_priv *priv = hw->priv;
  3550. int limit;
  3551. limit = 32;
  3552. limit -= rxq_process(hw, 0, limit);
  3553. limit -= rxq_refill(hw, 0, limit);
  3554. if (limit) {
  3555. writel(~MWL8K_A2H_INT_RX_READY,
  3556. priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  3557. } else {
  3558. tasklet_schedule(&priv->poll_rx_task);
  3559. }
  3560. }
  3561. /*
  3562. * Core driver operations.
  3563. */
  3564. static void mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  3565. {
  3566. struct mwl8k_priv *priv = hw->priv;
  3567. int index = skb_get_queue_mapping(skb);
  3568. if (!priv->radio_on) {
  3569. wiphy_debug(hw->wiphy,
  3570. "dropped TX frame since radio disabled\n");
  3571. dev_kfree_skb(skb);
  3572. return;
  3573. }
  3574. mwl8k_txq_xmit(hw, index, skb);
  3575. }
  3576. static int mwl8k_start(struct ieee80211_hw *hw)
  3577. {
  3578. struct mwl8k_priv *priv = hw->priv;
  3579. int rc;
  3580. rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
  3581. IRQF_SHARED, MWL8K_NAME, hw);
  3582. if (rc) {
  3583. priv->irq = -1;
  3584. wiphy_err(hw->wiphy, "failed to register IRQ handler\n");
  3585. return -EIO;
  3586. }
  3587. priv->irq = priv->pdev->irq;
  3588. /* Enable TX reclaim and RX tasklets. */
  3589. tasklet_enable(&priv->poll_tx_task);
  3590. tasklet_enable(&priv->poll_rx_task);
  3591. /* Enable interrupts */
  3592. iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3593. iowrite32(MWL8K_A2H_EVENTS,
  3594. priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
  3595. rc = mwl8k_fw_lock(hw);
  3596. if (!rc) {
  3597. rc = mwl8k_cmd_radio_enable(hw);
  3598. if (!priv->ap_fw) {
  3599. if (!rc)
  3600. rc = mwl8k_cmd_enable_sniffer(hw, 0);
  3601. if (!rc)
  3602. rc = mwl8k_cmd_set_pre_scan(hw);
  3603. if (!rc)
  3604. rc = mwl8k_cmd_set_post_scan(hw,
  3605. "\x00\x00\x00\x00\x00\x00");
  3606. }
  3607. if (!rc)
  3608. rc = mwl8k_cmd_set_rateadapt_mode(hw, 0);
  3609. if (!rc)
  3610. rc = mwl8k_cmd_set_wmm_mode(hw, 0);
  3611. mwl8k_fw_unlock(hw);
  3612. }
  3613. if (rc) {
  3614. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3615. free_irq(priv->pdev->irq, hw);
  3616. priv->irq = -1;
  3617. tasklet_disable(&priv->poll_tx_task);
  3618. tasklet_disable(&priv->poll_rx_task);
  3619. }
  3620. return rc;
  3621. }
  3622. static void mwl8k_stop(struct ieee80211_hw *hw)
  3623. {
  3624. struct mwl8k_priv *priv = hw->priv;
  3625. int i;
  3626. mwl8k_cmd_radio_disable(hw);
  3627. ieee80211_stop_queues(hw);
  3628. /* Disable interrupts */
  3629. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3630. if (priv->irq != -1) {
  3631. free_irq(priv->pdev->irq, hw);
  3632. priv->irq = -1;
  3633. }
  3634. /* Stop finalize join worker */
  3635. cancel_work_sync(&priv->finalize_join_worker);
  3636. cancel_work_sync(&priv->watchdog_ba_handle);
  3637. if (priv->beacon_skb != NULL)
  3638. dev_kfree_skb(priv->beacon_skb);
  3639. /* Stop TX reclaim and RX tasklets. */
  3640. tasklet_disable(&priv->poll_tx_task);
  3641. tasklet_disable(&priv->poll_rx_task);
  3642. /* Return all skbs to mac80211 */
  3643. for (i = 0; i < mwl8k_tx_queues(priv); i++)
  3644. mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
  3645. }
  3646. static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image);
  3647. static int mwl8k_add_interface(struct ieee80211_hw *hw,
  3648. struct ieee80211_vif *vif)
  3649. {
  3650. struct mwl8k_priv *priv = hw->priv;
  3651. struct mwl8k_vif *mwl8k_vif;
  3652. u32 macids_supported;
  3653. int macid, rc;
  3654. struct mwl8k_device_info *di;
  3655. /*
  3656. * Reject interface creation if sniffer mode is active, as
  3657. * STA operation is mutually exclusive with hardware sniffer
  3658. * mode. (Sniffer mode is only used on STA firmware.)
  3659. */
  3660. if (priv->sniffer_enabled) {
  3661. wiphy_info(hw->wiphy,
  3662. "unable to create STA interface because sniffer mode is enabled\n");
  3663. return -EINVAL;
  3664. }
  3665. di = priv->device_info;
  3666. switch (vif->type) {
  3667. case NL80211_IFTYPE_AP:
  3668. if (!priv->ap_fw && di->fw_image_ap) {
  3669. /* we must load the ap fw to meet this request */
  3670. if (!list_empty(&priv->vif_list))
  3671. return -EBUSY;
  3672. rc = mwl8k_reload_firmware(hw, di->fw_image_ap);
  3673. if (rc)
  3674. return rc;
  3675. }
  3676. macids_supported = priv->ap_macids_supported;
  3677. break;
  3678. case NL80211_IFTYPE_STATION:
  3679. if (priv->ap_fw && di->fw_image_sta) {
  3680. /* we must load the sta fw to meet this request */
  3681. if (!list_empty(&priv->vif_list))
  3682. return -EBUSY;
  3683. rc = mwl8k_reload_firmware(hw, di->fw_image_sta);
  3684. if (rc)
  3685. return rc;
  3686. }
  3687. macids_supported = priv->sta_macids_supported;
  3688. break;
  3689. default:
  3690. return -EINVAL;
  3691. }
  3692. macid = ffs(macids_supported & ~priv->macids_used);
  3693. if (!macid--)
  3694. return -EBUSY;
  3695. /* Setup driver private area. */
  3696. mwl8k_vif = MWL8K_VIF(vif);
  3697. memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
  3698. mwl8k_vif->vif = vif;
  3699. mwl8k_vif->macid = macid;
  3700. mwl8k_vif->seqno = 0;
  3701. memcpy(mwl8k_vif->bssid, vif->addr, ETH_ALEN);
  3702. mwl8k_vif->is_hw_crypto_enabled = false;
  3703. /* Set the mac address. */
  3704. mwl8k_cmd_set_mac_addr(hw, vif, vif->addr);
  3705. if (priv->ap_fw)
  3706. mwl8k_cmd_set_new_stn_add_self(hw, vif);
  3707. priv->macids_used |= 1 << mwl8k_vif->macid;
  3708. list_add_tail(&mwl8k_vif->list, &priv->vif_list);
  3709. return 0;
  3710. }
  3711. static void mwl8k_remove_interface(struct ieee80211_hw *hw,
  3712. struct ieee80211_vif *vif)
  3713. {
  3714. struct mwl8k_priv *priv = hw->priv;
  3715. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  3716. if (priv->ap_fw)
  3717. mwl8k_cmd_set_new_stn_del(hw, vif, vif->addr);
  3718. mwl8k_cmd_set_mac_addr(hw, vif, "\x00\x00\x00\x00\x00\x00");
  3719. priv->macids_used &= ~(1 << mwl8k_vif->macid);
  3720. list_del(&mwl8k_vif->list);
  3721. }
  3722. static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
  3723. {
  3724. struct ieee80211_conf *conf = &hw->conf;
  3725. struct mwl8k_priv *priv = hw->priv;
  3726. int rc;
  3727. if (conf->flags & IEEE80211_CONF_IDLE) {
  3728. mwl8k_cmd_radio_disable(hw);
  3729. return 0;
  3730. }
  3731. rc = mwl8k_fw_lock(hw);
  3732. if (rc)
  3733. return rc;
  3734. rc = mwl8k_cmd_radio_enable(hw);
  3735. if (rc)
  3736. goto out;
  3737. rc = mwl8k_cmd_set_rf_channel(hw, conf);
  3738. if (rc)
  3739. goto out;
  3740. if (conf->power_level > 18)
  3741. conf->power_level = 18;
  3742. if (priv->ap_fw) {
  3743. if (conf->flags & IEEE80211_CONF_CHANGE_POWER) {
  3744. rc = mwl8k_cmd_tx_power(hw, conf, conf->power_level);
  3745. if (rc)
  3746. goto out;
  3747. }
  3748. rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x3);
  3749. if (rc)
  3750. wiphy_warn(hw->wiphy, "failed to set # of RX antennas");
  3751. rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7);
  3752. if (rc)
  3753. wiphy_warn(hw->wiphy, "failed to set # of TX antennas");
  3754. } else {
  3755. rc = mwl8k_cmd_rf_tx_power(hw, conf->power_level);
  3756. if (rc)
  3757. goto out;
  3758. rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7);
  3759. }
  3760. out:
  3761. mwl8k_fw_unlock(hw);
  3762. return rc;
  3763. }
  3764. static void
  3765. mwl8k_bss_info_changed_sta(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  3766. struct ieee80211_bss_conf *info, u32 changed)
  3767. {
  3768. struct mwl8k_priv *priv = hw->priv;
  3769. u32 ap_legacy_rates = 0;
  3770. u8 ap_mcs_rates[16];
  3771. int rc;
  3772. if (mwl8k_fw_lock(hw))
  3773. return;
  3774. /*
  3775. * No need to capture a beacon if we're no longer associated.
  3776. */
  3777. if ((changed & BSS_CHANGED_ASSOC) && !vif->bss_conf.assoc)
  3778. priv->capture_beacon = false;
  3779. /*
  3780. * Get the AP's legacy and MCS rates.
  3781. */
  3782. if (vif->bss_conf.assoc) {
  3783. struct ieee80211_sta *ap;
  3784. rcu_read_lock();
  3785. ap = ieee80211_find_sta(vif, vif->bss_conf.bssid);
  3786. if (ap == NULL) {
  3787. rcu_read_unlock();
  3788. goto out;
  3789. }
  3790. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) {
  3791. ap_legacy_rates = ap->supp_rates[IEEE80211_BAND_2GHZ];
  3792. } else {
  3793. ap_legacy_rates =
  3794. ap->supp_rates[IEEE80211_BAND_5GHZ] << 5;
  3795. }
  3796. memcpy(ap_mcs_rates, ap->ht_cap.mcs.rx_mask, 16);
  3797. rcu_read_unlock();
  3798. }
  3799. if ((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc) {
  3800. rc = mwl8k_cmd_set_rate(hw, vif, ap_legacy_rates, ap_mcs_rates);
  3801. if (rc)
  3802. goto out;
  3803. rc = mwl8k_cmd_use_fixed_rate_sta(hw);
  3804. if (rc)
  3805. goto out;
  3806. }
  3807. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  3808. rc = mwl8k_set_radio_preamble(hw,
  3809. vif->bss_conf.use_short_preamble);
  3810. if (rc)
  3811. goto out;
  3812. }
  3813. if (changed & BSS_CHANGED_ERP_SLOT) {
  3814. rc = mwl8k_cmd_set_slot(hw, vif->bss_conf.use_short_slot);
  3815. if (rc)
  3816. goto out;
  3817. }
  3818. if (vif->bss_conf.assoc &&
  3819. (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_ERP_CTS_PROT |
  3820. BSS_CHANGED_HT))) {
  3821. rc = mwl8k_cmd_set_aid(hw, vif, ap_legacy_rates);
  3822. if (rc)
  3823. goto out;
  3824. }
  3825. if (vif->bss_conf.assoc &&
  3826. (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INT))) {
  3827. /*
  3828. * Finalize the join. Tell rx handler to process
  3829. * next beacon from our BSSID.
  3830. */
  3831. memcpy(priv->capture_bssid, vif->bss_conf.bssid, ETH_ALEN);
  3832. priv->capture_beacon = true;
  3833. }
  3834. out:
  3835. mwl8k_fw_unlock(hw);
  3836. }
  3837. static void
  3838. mwl8k_bss_info_changed_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  3839. struct ieee80211_bss_conf *info, u32 changed)
  3840. {
  3841. int rc;
  3842. if (mwl8k_fw_lock(hw))
  3843. return;
  3844. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  3845. rc = mwl8k_set_radio_preamble(hw,
  3846. vif->bss_conf.use_short_preamble);
  3847. if (rc)
  3848. goto out;
  3849. }
  3850. if (changed & BSS_CHANGED_BASIC_RATES) {
  3851. int idx;
  3852. int rate;
  3853. /*
  3854. * Use lowest supported basic rate for multicasts
  3855. * and management frames (such as probe responses --
  3856. * beacons will always go out at 1 Mb/s).
  3857. */
  3858. idx = ffs(vif->bss_conf.basic_rates);
  3859. if (idx)
  3860. idx--;
  3861. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
  3862. rate = mwl8k_rates_24[idx].hw_value;
  3863. else
  3864. rate = mwl8k_rates_50[idx].hw_value;
  3865. mwl8k_cmd_use_fixed_rate_ap(hw, rate, rate);
  3866. }
  3867. if (changed & (BSS_CHANGED_BEACON_INT | BSS_CHANGED_BEACON)) {
  3868. struct sk_buff *skb;
  3869. skb = ieee80211_beacon_get(hw, vif);
  3870. if (skb != NULL) {
  3871. mwl8k_cmd_set_beacon(hw, vif, skb->data, skb->len);
  3872. kfree_skb(skb);
  3873. }
  3874. }
  3875. if (changed & BSS_CHANGED_BEACON_ENABLED)
  3876. mwl8k_cmd_bss_start(hw, vif, info->enable_beacon);
  3877. out:
  3878. mwl8k_fw_unlock(hw);
  3879. }
  3880. static void
  3881. mwl8k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  3882. struct ieee80211_bss_conf *info, u32 changed)
  3883. {
  3884. struct mwl8k_priv *priv = hw->priv;
  3885. if (!priv->ap_fw)
  3886. mwl8k_bss_info_changed_sta(hw, vif, info, changed);
  3887. else
  3888. mwl8k_bss_info_changed_ap(hw, vif, info, changed);
  3889. }
  3890. static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
  3891. struct netdev_hw_addr_list *mc_list)
  3892. {
  3893. struct mwl8k_cmd_pkt *cmd;
  3894. /*
  3895. * Synthesize and return a command packet that programs the
  3896. * hardware multicast address filter. At this point we don't
  3897. * know whether FIF_ALLMULTI is being requested, but if it is,
  3898. * we'll end up throwing this packet away and creating a new
  3899. * one in mwl8k_configure_filter().
  3900. */
  3901. cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_list);
  3902. return (unsigned long)cmd;
  3903. }
  3904. static int
  3905. mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw,
  3906. unsigned int changed_flags,
  3907. unsigned int *total_flags)
  3908. {
  3909. struct mwl8k_priv *priv = hw->priv;
  3910. /*
  3911. * Hardware sniffer mode is mutually exclusive with STA
  3912. * operation, so refuse to enable sniffer mode if a STA
  3913. * interface is active.
  3914. */
  3915. if (!list_empty(&priv->vif_list)) {
  3916. if (net_ratelimit())
  3917. wiphy_info(hw->wiphy,
  3918. "not enabling sniffer mode because STA interface is active\n");
  3919. return 0;
  3920. }
  3921. if (!priv->sniffer_enabled) {
  3922. if (mwl8k_cmd_enable_sniffer(hw, 1))
  3923. return 0;
  3924. priv->sniffer_enabled = true;
  3925. }
  3926. *total_flags &= FIF_PROMISC_IN_BSS | FIF_ALLMULTI |
  3927. FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL |
  3928. FIF_OTHER_BSS;
  3929. return 1;
  3930. }
  3931. static struct mwl8k_vif *mwl8k_first_vif(struct mwl8k_priv *priv)
  3932. {
  3933. if (!list_empty(&priv->vif_list))
  3934. return list_entry(priv->vif_list.next, struct mwl8k_vif, list);
  3935. return NULL;
  3936. }
  3937. static void mwl8k_configure_filter(struct ieee80211_hw *hw,
  3938. unsigned int changed_flags,
  3939. unsigned int *total_flags,
  3940. u64 multicast)
  3941. {
  3942. struct mwl8k_priv *priv = hw->priv;
  3943. struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast;
  3944. /*
  3945. * AP firmware doesn't allow fine-grained control over
  3946. * the receive filter.
  3947. */
  3948. if (priv->ap_fw) {
  3949. *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
  3950. kfree(cmd);
  3951. return;
  3952. }
  3953. /*
  3954. * Enable hardware sniffer mode if FIF_CONTROL or
  3955. * FIF_OTHER_BSS is requested.
  3956. */
  3957. if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) &&
  3958. mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) {
  3959. kfree(cmd);
  3960. return;
  3961. }
  3962. /* Clear unsupported feature flags */
  3963. *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
  3964. if (mwl8k_fw_lock(hw)) {
  3965. kfree(cmd);
  3966. return;
  3967. }
  3968. if (priv->sniffer_enabled) {
  3969. mwl8k_cmd_enable_sniffer(hw, 0);
  3970. priv->sniffer_enabled = false;
  3971. }
  3972. if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
  3973. if (*total_flags & FIF_BCN_PRBRESP_PROMISC) {
  3974. /*
  3975. * Disable the BSS filter.
  3976. */
  3977. mwl8k_cmd_set_pre_scan(hw);
  3978. } else {
  3979. struct mwl8k_vif *mwl8k_vif;
  3980. const u8 *bssid;
  3981. /*
  3982. * Enable the BSS filter.
  3983. *
  3984. * If there is an active STA interface, use that
  3985. * interface's BSSID, otherwise use a dummy one
  3986. * (where the OUI part needs to be nonzero for
  3987. * the BSSID to be accepted by POST_SCAN).
  3988. */
  3989. mwl8k_vif = mwl8k_first_vif(priv);
  3990. if (mwl8k_vif != NULL)
  3991. bssid = mwl8k_vif->vif->bss_conf.bssid;
  3992. else
  3993. bssid = "\x01\x00\x00\x00\x00\x00";
  3994. mwl8k_cmd_set_post_scan(hw, bssid);
  3995. }
  3996. }
  3997. /*
  3998. * If FIF_ALLMULTI is being requested, throw away the command
  3999. * packet that ->prepare_multicast() built and replace it with
  4000. * a command packet that enables reception of all multicast
  4001. * packets.
  4002. */
  4003. if (*total_flags & FIF_ALLMULTI) {
  4004. kfree(cmd);
  4005. cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, NULL);
  4006. }
  4007. if (cmd != NULL) {
  4008. mwl8k_post_cmd(hw, cmd);
  4009. kfree(cmd);
  4010. }
  4011. mwl8k_fw_unlock(hw);
  4012. }
  4013. static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
  4014. {
  4015. return mwl8k_cmd_set_rts_threshold(hw, value);
  4016. }
  4017. static int mwl8k_sta_remove(struct ieee80211_hw *hw,
  4018. struct ieee80211_vif *vif,
  4019. struct ieee80211_sta *sta)
  4020. {
  4021. struct mwl8k_priv *priv = hw->priv;
  4022. if (priv->ap_fw)
  4023. return mwl8k_cmd_set_new_stn_del(hw, vif, sta->addr);
  4024. else
  4025. return mwl8k_cmd_update_stadb_del(hw, vif, sta->addr);
  4026. }
  4027. static int mwl8k_sta_add(struct ieee80211_hw *hw,
  4028. struct ieee80211_vif *vif,
  4029. struct ieee80211_sta *sta)
  4030. {
  4031. struct mwl8k_priv *priv = hw->priv;
  4032. int ret;
  4033. int i;
  4034. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  4035. struct ieee80211_key_conf *key;
  4036. if (!priv->ap_fw) {
  4037. ret = mwl8k_cmd_update_stadb_add(hw, vif, sta);
  4038. if (ret >= 0) {
  4039. MWL8K_STA(sta)->peer_id = ret;
  4040. if (sta->ht_cap.ht_supported)
  4041. MWL8K_STA(sta)->is_ampdu_allowed = true;
  4042. ret = 0;
  4043. }
  4044. } else {
  4045. ret = mwl8k_cmd_set_new_stn_add(hw, vif, sta);
  4046. }
  4047. for (i = 0; i < NUM_WEP_KEYS; i++) {
  4048. key = IEEE80211_KEY_CONF(mwl8k_vif->wep_key_conf[i].key);
  4049. if (mwl8k_vif->wep_key_conf[i].enabled)
  4050. mwl8k_set_key(hw, SET_KEY, vif, sta, key);
  4051. }
  4052. return ret;
  4053. }
  4054. static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
  4055. const struct ieee80211_tx_queue_params *params)
  4056. {
  4057. struct mwl8k_priv *priv = hw->priv;
  4058. int rc;
  4059. rc = mwl8k_fw_lock(hw);
  4060. if (!rc) {
  4061. BUG_ON(queue > MWL8K_TX_WMM_QUEUES - 1);
  4062. memcpy(&priv->wmm_params[queue], params, sizeof(*params));
  4063. if (!priv->wmm_enabled)
  4064. rc = mwl8k_cmd_set_wmm_mode(hw, 1);
  4065. if (!rc) {
  4066. int q = MWL8K_TX_WMM_QUEUES - 1 - queue;
  4067. rc = mwl8k_cmd_set_edca_params(hw, q,
  4068. params->cw_min,
  4069. params->cw_max,
  4070. params->aifs,
  4071. params->txop);
  4072. }
  4073. mwl8k_fw_unlock(hw);
  4074. }
  4075. return rc;
  4076. }
  4077. static int mwl8k_get_stats(struct ieee80211_hw *hw,
  4078. struct ieee80211_low_level_stats *stats)
  4079. {
  4080. return mwl8k_cmd_get_stat(hw, stats);
  4081. }
  4082. static int mwl8k_get_survey(struct ieee80211_hw *hw, int idx,
  4083. struct survey_info *survey)
  4084. {
  4085. struct mwl8k_priv *priv = hw->priv;
  4086. struct ieee80211_conf *conf = &hw->conf;
  4087. if (idx != 0)
  4088. return -ENOENT;
  4089. survey->channel = conf->channel;
  4090. survey->filled = SURVEY_INFO_NOISE_DBM;
  4091. survey->noise = priv->noise;
  4092. return 0;
  4093. }
  4094. #define MAX_AMPDU_ATTEMPTS 5
  4095. static int
  4096. mwl8k_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  4097. enum ieee80211_ampdu_mlme_action action,
  4098. struct ieee80211_sta *sta, u16 tid, u16 *ssn,
  4099. u8 buf_size)
  4100. {
  4101. int i, rc = 0;
  4102. struct mwl8k_priv *priv = hw->priv;
  4103. struct mwl8k_ampdu_stream *stream;
  4104. u8 *addr = sta->addr;
  4105. if (!(hw->flags & IEEE80211_HW_AMPDU_AGGREGATION))
  4106. return -ENOTSUPP;
  4107. spin_lock(&priv->stream_lock);
  4108. stream = mwl8k_lookup_stream(hw, addr, tid);
  4109. switch (action) {
  4110. case IEEE80211_AMPDU_RX_START:
  4111. case IEEE80211_AMPDU_RX_STOP:
  4112. break;
  4113. case IEEE80211_AMPDU_TX_START:
  4114. /* By the time we get here the hw queues may contain outgoing
  4115. * packets for this RA/TID that are not part of this BA
  4116. * session. The hw will assign sequence numbers to these
  4117. * packets as they go out. So if we query the hw for its next
  4118. * sequence number and use that for the SSN here, it may end up
  4119. * being wrong, which will lead to sequence number mismatch at
  4120. * the recipient. To avoid this, we reset the sequence number
  4121. * to O for the first MPDU in this BA stream.
  4122. */
  4123. *ssn = 0;
  4124. if (stream == NULL) {
  4125. /* This means that somebody outside this driver called
  4126. * ieee80211_start_tx_ba_session. This is unexpected
  4127. * because we do our own rate control. Just warn and
  4128. * move on.
  4129. */
  4130. wiphy_warn(hw->wiphy, "Unexpected call to %s. "
  4131. "Proceeding anyway.\n", __func__);
  4132. stream = mwl8k_add_stream(hw, sta, tid);
  4133. }
  4134. if (stream == NULL) {
  4135. wiphy_debug(hw->wiphy, "no free AMPDU streams\n");
  4136. rc = -EBUSY;
  4137. break;
  4138. }
  4139. stream->state = AMPDU_STREAM_IN_PROGRESS;
  4140. /* Release the lock before we do the time consuming stuff */
  4141. spin_unlock(&priv->stream_lock);
  4142. for (i = 0; i < MAX_AMPDU_ATTEMPTS; i++) {
  4143. rc = mwl8k_check_ba(hw, stream);
  4144. if (!rc)
  4145. break;
  4146. /*
  4147. * HW queues take time to be flushed, give them
  4148. * sufficient time
  4149. */
  4150. msleep(1000);
  4151. }
  4152. spin_lock(&priv->stream_lock);
  4153. if (rc) {
  4154. wiphy_err(hw->wiphy, "Stream for tid %d busy after %d"
  4155. " attempts\n", tid, MAX_AMPDU_ATTEMPTS);
  4156. mwl8k_remove_stream(hw, stream);
  4157. rc = -EBUSY;
  4158. break;
  4159. }
  4160. ieee80211_start_tx_ba_cb_irqsafe(vif, addr, tid);
  4161. break;
  4162. case IEEE80211_AMPDU_TX_STOP:
  4163. if (stream == NULL)
  4164. break;
  4165. if (stream->state == AMPDU_STREAM_ACTIVE) {
  4166. spin_unlock(&priv->stream_lock);
  4167. mwl8k_destroy_ba(hw, stream);
  4168. spin_lock(&priv->stream_lock);
  4169. }
  4170. mwl8k_remove_stream(hw, stream);
  4171. ieee80211_stop_tx_ba_cb_irqsafe(vif, addr, tid);
  4172. break;
  4173. case IEEE80211_AMPDU_TX_OPERATIONAL:
  4174. BUG_ON(stream == NULL);
  4175. BUG_ON(stream->state != AMPDU_STREAM_IN_PROGRESS);
  4176. spin_unlock(&priv->stream_lock);
  4177. rc = mwl8k_create_ba(hw, stream, buf_size);
  4178. spin_lock(&priv->stream_lock);
  4179. if (!rc)
  4180. stream->state = AMPDU_STREAM_ACTIVE;
  4181. else {
  4182. spin_unlock(&priv->stream_lock);
  4183. mwl8k_destroy_ba(hw, stream);
  4184. spin_lock(&priv->stream_lock);
  4185. wiphy_debug(hw->wiphy,
  4186. "Failed adding stream for sta %pM tid %d\n",
  4187. addr, tid);
  4188. mwl8k_remove_stream(hw, stream);
  4189. }
  4190. break;
  4191. default:
  4192. rc = -ENOTSUPP;
  4193. }
  4194. spin_unlock(&priv->stream_lock);
  4195. return rc;
  4196. }
  4197. static const struct ieee80211_ops mwl8k_ops = {
  4198. .tx = mwl8k_tx,
  4199. .start = mwl8k_start,
  4200. .stop = mwl8k_stop,
  4201. .add_interface = mwl8k_add_interface,
  4202. .remove_interface = mwl8k_remove_interface,
  4203. .config = mwl8k_config,
  4204. .bss_info_changed = mwl8k_bss_info_changed,
  4205. .prepare_multicast = mwl8k_prepare_multicast,
  4206. .configure_filter = mwl8k_configure_filter,
  4207. .set_key = mwl8k_set_key,
  4208. .set_rts_threshold = mwl8k_set_rts_threshold,
  4209. .sta_add = mwl8k_sta_add,
  4210. .sta_remove = mwl8k_sta_remove,
  4211. .conf_tx = mwl8k_conf_tx,
  4212. .get_stats = mwl8k_get_stats,
  4213. .get_survey = mwl8k_get_survey,
  4214. .ampdu_action = mwl8k_ampdu_action,
  4215. };
  4216. static void mwl8k_finalize_join_worker(struct work_struct *work)
  4217. {
  4218. struct mwl8k_priv *priv =
  4219. container_of(work, struct mwl8k_priv, finalize_join_worker);
  4220. struct sk_buff *skb = priv->beacon_skb;
  4221. struct ieee80211_mgmt *mgmt = (void *)skb->data;
  4222. int len = skb->len - offsetof(struct ieee80211_mgmt, u.beacon.variable);
  4223. const u8 *tim = cfg80211_find_ie(WLAN_EID_TIM,
  4224. mgmt->u.beacon.variable, len);
  4225. int dtim_period = 1;
  4226. if (tim && tim[1] >= 2)
  4227. dtim_period = tim[3];
  4228. mwl8k_cmd_finalize_join(priv->hw, skb->data, skb->len, dtim_period);
  4229. dev_kfree_skb(skb);
  4230. priv->beacon_skb = NULL;
  4231. }
  4232. enum {
  4233. MWL8363 = 0,
  4234. MWL8687,
  4235. MWL8366,
  4236. };
  4237. #define MWL8K_8366_AP_FW_API 2
  4238. #define _MWL8K_8366_AP_FW(api) "mwl8k/fmimage_8366_ap-" #api ".fw"
  4239. #define MWL8K_8366_AP_FW(api) _MWL8K_8366_AP_FW(api)
  4240. static struct mwl8k_device_info mwl8k_info_tbl[] __devinitdata = {
  4241. [MWL8363] = {
  4242. .part_name = "88w8363",
  4243. .helper_image = "mwl8k/helper_8363.fw",
  4244. .fw_image_sta = "mwl8k/fmimage_8363.fw",
  4245. },
  4246. [MWL8687] = {
  4247. .part_name = "88w8687",
  4248. .helper_image = "mwl8k/helper_8687.fw",
  4249. .fw_image_sta = "mwl8k/fmimage_8687.fw",
  4250. },
  4251. [MWL8366] = {
  4252. .part_name = "88w8366",
  4253. .helper_image = "mwl8k/helper_8366.fw",
  4254. .fw_image_sta = "mwl8k/fmimage_8366.fw",
  4255. .fw_image_ap = MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API),
  4256. .fw_api_ap = MWL8K_8366_AP_FW_API,
  4257. .ap_rxd_ops = &rxd_8366_ap_ops,
  4258. },
  4259. };
  4260. MODULE_FIRMWARE("mwl8k/helper_8363.fw");
  4261. MODULE_FIRMWARE("mwl8k/fmimage_8363.fw");
  4262. MODULE_FIRMWARE("mwl8k/helper_8687.fw");
  4263. MODULE_FIRMWARE("mwl8k/fmimage_8687.fw");
  4264. MODULE_FIRMWARE("mwl8k/helper_8366.fw");
  4265. MODULE_FIRMWARE("mwl8k/fmimage_8366.fw");
  4266. MODULE_FIRMWARE(MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API));
  4267. static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = {
  4268. { PCI_VDEVICE(MARVELL, 0x2a0a), .driver_data = MWL8363, },
  4269. { PCI_VDEVICE(MARVELL, 0x2a0c), .driver_data = MWL8363, },
  4270. { PCI_VDEVICE(MARVELL, 0x2a24), .driver_data = MWL8363, },
  4271. { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = MWL8687, },
  4272. { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = MWL8687, },
  4273. { PCI_VDEVICE(MARVELL, 0x2a40), .driver_data = MWL8366, },
  4274. { PCI_VDEVICE(MARVELL, 0x2a43), .driver_data = MWL8366, },
  4275. { },
  4276. };
  4277. MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table);
  4278. static int mwl8k_request_alt_fw(struct mwl8k_priv *priv)
  4279. {
  4280. int rc;
  4281. printk(KERN_ERR "%s: Error requesting preferred fw %s.\n"
  4282. "Trying alternative firmware %s\n", pci_name(priv->pdev),
  4283. priv->fw_pref, priv->fw_alt);
  4284. rc = mwl8k_request_fw(priv, priv->fw_alt, &priv->fw_ucode, true);
  4285. if (rc) {
  4286. printk(KERN_ERR "%s: Error requesting alt fw %s\n",
  4287. pci_name(priv->pdev), priv->fw_alt);
  4288. return rc;
  4289. }
  4290. return 0;
  4291. }
  4292. static int mwl8k_firmware_load_success(struct mwl8k_priv *priv);
  4293. static void mwl8k_fw_state_machine(const struct firmware *fw, void *context)
  4294. {
  4295. struct mwl8k_priv *priv = context;
  4296. struct mwl8k_device_info *di = priv->device_info;
  4297. int rc;
  4298. switch (priv->fw_state) {
  4299. case FW_STATE_INIT:
  4300. if (!fw) {
  4301. printk(KERN_ERR "%s: Error requesting helper fw %s\n",
  4302. pci_name(priv->pdev), di->helper_image);
  4303. goto fail;
  4304. }
  4305. priv->fw_helper = fw;
  4306. rc = mwl8k_request_fw(priv, priv->fw_pref, &priv->fw_ucode,
  4307. true);
  4308. if (rc && priv->fw_alt) {
  4309. rc = mwl8k_request_alt_fw(priv);
  4310. if (rc)
  4311. goto fail;
  4312. priv->fw_state = FW_STATE_LOADING_ALT;
  4313. } else if (rc)
  4314. goto fail;
  4315. else
  4316. priv->fw_state = FW_STATE_LOADING_PREF;
  4317. break;
  4318. case FW_STATE_LOADING_PREF:
  4319. if (!fw) {
  4320. if (priv->fw_alt) {
  4321. rc = mwl8k_request_alt_fw(priv);
  4322. if (rc)
  4323. goto fail;
  4324. priv->fw_state = FW_STATE_LOADING_ALT;
  4325. } else
  4326. goto fail;
  4327. } else {
  4328. priv->fw_ucode = fw;
  4329. rc = mwl8k_firmware_load_success(priv);
  4330. if (rc)
  4331. goto fail;
  4332. else
  4333. complete(&priv->firmware_loading_complete);
  4334. }
  4335. break;
  4336. case FW_STATE_LOADING_ALT:
  4337. if (!fw) {
  4338. printk(KERN_ERR "%s: Error requesting alt fw %s\n",
  4339. pci_name(priv->pdev), di->helper_image);
  4340. goto fail;
  4341. }
  4342. priv->fw_ucode = fw;
  4343. rc = mwl8k_firmware_load_success(priv);
  4344. if (rc)
  4345. goto fail;
  4346. else
  4347. complete(&priv->firmware_loading_complete);
  4348. break;
  4349. default:
  4350. printk(KERN_ERR "%s: Unexpected firmware loading state: %d\n",
  4351. MWL8K_NAME, priv->fw_state);
  4352. BUG_ON(1);
  4353. }
  4354. return;
  4355. fail:
  4356. priv->fw_state = FW_STATE_ERROR;
  4357. complete(&priv->firmware_loading_complete);
  4358. device_release_driver(&priv->pdev->dev);
  4359. mwl8k_release_firmware(priv);
  4360. }
  4361. static int mwl8k_init_firmware(struct ieee80211_hw *hw, char *fw_image,
  4362. bool nowait)
  4363. {
  4364. struct mwl8k_priv *priv = hw->priv;
  4365. int rc;
  4366. /* Reset firmware and hardware */
  4367. mwl8k_hw_reset(priv);
  4368. /* Ask userland hotplug daemon for the device firmware */
  4369. rc = mwl8k_request_firmware(priv, fw_image, nowait);
  4370. if (rc) {
  4371. wiphy_err(hw->wiphy, "Firmware files not found\n");
  4372. return rc;
  4373. }
  4374. if (nowait)
  4375. return rc;
  4376. /* Load firmware into hardware */
  4377. rc = mwl8k_load_firmware(hw);
  4378. if (rc)
  4379. wiphy_err(hw->wiphy, "Cannot start firmware\n");
  4380. /* Reclaim memory once firmware is successfully loaded */
  4381. mwl8k_release_firmware(priv);
  4382. return rc;
  4383. }
  4384. static int mwl8k_init_txqs(struct ieee80211_hw *hw)
  4385. {
  4386. struct mwl8k_priv *priv = hw->priv;
  4387. int rc = 0;
  4388. int i;
  4389. for (i = 0; i < mwl8k_tx_queues(priv); i++) {
  4390. rc = mwl8k_txq_init(hw, i);
  4391. if (rc)
  4392. break;
  4393. if (priv->ap_fw)
  4394. iowrite32(priv->txq[i].txd_dma,
  4395. priv->sram + priv->txq_offset[i]);
  4396. }
  4397. return rc;
  4398. }
  4399. /* initialize hw after successfully loading a firmware image */
  4400. static int mwl8k_probe_hw(struct ieee80211_hw *hw)
  4401. {
  4402. struct mwl8k_priv *priv = hw->priv;
  4403. int rc = 0;
  4404. int i;
  4405. if (priv->ap_fw) {
  4406. priv->rxd_ops = priv->device_info->ap_rxd_ops;
  4407. if (priv->rxd_ops == NULL) {
  4408. wiphy_err(hw->wiphy,
  4409. "Driver does not have AP firmware image support for this hardware\n");
  4410. goto err_stop_firmware;
  4411. }
  4412. } else {
  4413. priv->rxd_ops = &rxd_sta_ops;
  4414. }
  4415. priv->sniffer_enabled = false;
  4416. priv->wmm_enabled = false;
  4417. priv->pending_tx_pkts = 0;
  4418. rc = mwl8k_rxq_init(hw, 0);
  4419. if (rc)
  4420. goto err_stop_firmware;
  4421. rxq_refill(hw, 0, INT_MAX);
  4422. /* For the sta firmware, we need to know the dma addresses of tx queues
  4423. * before sending MWL8K_CMD_GET_HW_SPEC. So we must initialize them
  4424. * prior to issuing this command. But for the AP case, we learn the
  4425. * total number of queues from the result CMD_GET_HW_SPEC, so for this
  4426. * case we must initialize the tx queues after.
  4427. */
  4428. priv->num_ampdu_queues = 0;
  4429. if (!priv->ap_fw) {
  4430. rc = mwl8k_init_txqs(hw);
  4431. if (rc)
  4432. goto err_free_queues;
  4433. }
  4434. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  4435. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  4436. iowrite32(MWL8K_A2H_INT_TX_DONE|MWL8K_A2H_INT_RX_READY|
  4437. MWL8K_A2H_INT_BA_WATCHDOG,
  4438. priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
  4439. iowrite32(MWL8K_A2H_INT_OPC_DONE,
  4440. priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
  4441. rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
  4442. IRQF_SHARED, MWL8K_NAME, hw);
  4443. if (rc) {
  4444. wiphy_err(hw->wiphy, "failed to register IRQ handler\n");
  4445. goto err_free_queues;
  4446. }
  4447. memset(priv->ampdu, 0, sizeof(priv->ampdu));
  4448. /*
  4449. * Temporarily enable interrupts. Initial firmware host
  4450. * commands use interrupts and avoid polling. Disable
  4451. * interrupts when done.
  4452. */
  4453. iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  4454. /* Get config data, mac addrs etc */
  4455. if (priv->ap_fw) {
  4456. rc = mwl8k_cmd_get_hw_spec_ap(hw);
  4457. if (!rc)
  4458. rc = mwl8k_init_txqs(hw);
  4459. if (!rc)
  4460. rc = mwl8k_cmd_set_hw_spec(hw);
  4461. } else {
  4462. rc = mwl8k_cmd_get_hw_spec_sta(hw);
  4463. }
  4464. if (rc) {
  4465. wiphy_err(hw->wiphy, "Cannot initialise firmware\n");
  4466. goto err_free_irq;
  4467. }
  4468. /* Turn radio off */
  4469. rc = mwl8k_cmd_radio_disable(hw);
  4470. if (rc) {
  4471. wiphy_err(hw->wiphy, "Cannot disable\n");
  4472. goto err_free_irq;
  4473. }
  4474. /* Clear MAC address */
  4475. rc = mwl8k_cmd_set_mac_addr(hw, NULL, "\x00\x00\x00\x00\x00\x00");
  4476. if (rc) {
  4477. wiphy_err(hw->wiphy, "Cannot clear MAC address\n");
  4478. goto err_free_irq;
  4479. }
  4480. /* Disable interrupts */
  4481. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  4482. free_irq(priv->pdev->irq, hw);
  4483. wiphy_info(hw->wiphy, "%s v%d, %pm, %s firmware %u.%u.%u.%u\n",
  4484. priv->device_info->part_name,
  4485. priv->hw_rev, hw->wiphy->perm_addr,
  4486. priv->ap_fw ? "AP" : "STA",
  4487. (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff,
  4488. (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff);
  4489. return 0;
  4490. err_free_irq:
  4491. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  4492. free_irq(priv->pdev->irq, hw);
  4493. err_free_queues:
  4494. for (i = 0; i < mwl8k_tx_queues(priv); i++)
  4495. mwl8k_txq_deinit(hw, i);
  4496. mwl8k_rxq_deinit(hw, 0);
  4497. err_stop_firmware:
  4498. mwl8k_hw_reset(priv);
  4499. return rc;
  4500. }
  4501. /*
  4502. * invoke mwl8k_reload_firmware to change the firmware image after the device
  4503. * has already been registered
  4504. */
  4505. static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image)
  4506. {
  4507. int i, rc = 0;
  4508. struct mwl8k_priv *priv = hw->priv;
  4509. mwl8k_stop(hw);
  4510. mwl8k_rxq_deinit(hw, 0);
  4511. for (i = 0; i < mwl8k_tx_queues(priv); i++)
  4512. mwl8k_txq_deinit(hw, i);
  4513. rc = mwl8k_init_firmware(hw, fw_image, false);
  4514. if (rc)
  4515. goto fail;
  4516. rc = mwl8k_probe_hw(hw);
  4517. if (rc)
  4518. goto fail;
  4519. rc = mwl8k_start(hw);
  4520. if (rc)
  4521. goto fail;
  4522. rc = mwl8k_config(hw, ~0);
  4523. if (rc)
  4524. goto fail;
  4525. for (i = 0; i < MWL8K_TX_WMM_QUEUES; i++) {
  4526. rc = mwl8k_conf_tx(hw, i, &priv->wmm_params[i]);
  4527. if (rc)
  4528. goto fail;
  4529. }
  4530. return rc;
  4531. fail:
  4532. printk(KERN_WARNING "mwl8k: Failed to reload firmware image.\n");
  4533. return rc;
  4534. }
  4535. static int mwl8k_firmware_load_success(struct mwl8k_priv *priv)
  4536. {
  4537. struct ieee80211_hw *hw = priv->hw;
  4538. int i, rc;
  4539. rc = mwl8k_load_firmware(hw);
  4540. mwl8k_release_firmware(priv);
  4541. if (rc) {
  4542. wiphy_err(hw->wiphy, "Cannot start firmware\n");
  4543. return rc;
  4544. }
  4545. /*
  4546. * Extra headroom is the size of the required DMA header
  4547. * minus the size of the smallest 802.11 frame (CTS frame).
  4548. */
  4549. hw->extra_tx_headroom =
  4550. sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
  4551. hw->extra_tx_headroom -= priv->ap_fw ? REDUCED_TX_HEADROOM : 0;
  4552. hw->channel_change_time = 10;
  4553. hw->queues = MWL8K_TX_WMM_QUEUES;
  4554. /* Set rssi values to dBm */
  4555. hw->flags |= IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_HAS_RATE_CONTROL;
  4556. hw->vif_data_size = sizeof(struct mwl8k_vif);
  4557. hw->sta_data_size = sizeof(struct mwl8k_sta);
  4558. priv->macids_used = 0;
  4559. INIT_LIST_HEAD(&priv->vif_list);
  4560. /* Set default radio state and preamble */
  4561. priv->radio_on = 0;
  4562. priv->radio_short_preamble = 0;
  4563. /* Finalize join worker */
  4564. INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
  4565. /* Handle watchdog ba events */
  4566. INIT_WORK(&priv->watchdog_ba_handle, mwl8k_watchdog_ba_events);
  4567. /* TX reclaim and RX tasklets. */
  4568. tasklet_init(&priv->poll_tx_task, mwl8k_tx_poll, (unsigned long)hw);
  4569. tasklet_disable(&priv->poll_tx_task);
  4570. tasklet_init(&priv->poll_rx_task, mwl8k_rx_poll, (unsigned long)hw);
  4571. tasklet_disable(&priv->poll_rx_task);
  4572. /* Power management cookie */
  4573. priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
  4574. if (priv->cookie == NULL)
  4575. return -ENOMEM;
  4576. mutex_init(&priv->fw_mutex);
  4577. priv->fw_mutex_owner = NULL;
  4578. priv->fw_mutex_depth = 0;
  4579. priv->hostcmd_wait = NULL;
  4580. spin_lock_init(&priv->tx_lock);
  4581. spin_lock_init(&priv->stream_lock);
  4582. priv->tx_wait = NULL;
  4583. rc = mwl8k_probe_hw(hw);
  4584. if (rc)
  4585. goto err_free_cookie;
  4586. hw->wiphy->interface_modes = 0;
  4587. if (priv->ap_macids_supported || priv->device_info->fw_image_ap)
  4588. hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_AP);
  4589. if (priv->sta_macids_supported || priv->device_info->fw_image_sta)
  4590. hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_STATION);
  4591. rc = ieee80211_register_hw(hw);
  4592. if (rc) {
  4593. wiphy_err(hw->wiphy, "Cannot register device\n");
  4594. goto err_unprobe_hw;
  4595. }
  4596. return 0;
  4597. err_unprobe_hw:
  4598. for (i = 0; i < mwl8k_tx_queues(priv); i++)
  4599. mwl8k_txq_deinit(hw, i);
  4600. mwl8k_rxq_deinit(hw, 0);
  4601. err_free_cookie:
  4602. if (priv->cookie != NULL)
  4603. pci_free_consistent(priv->pdev, 4,
  4604. priv->cookie, priv->cookie_dma);
  4605. return rc;
  4606. }
  4607. static int __devinit mwl8k_probe(struct pci_dev *pdev,
  4608. const struct pci_device_id *id)
  4609. {
  4610. static int printed_version;
  4611. struct ieee80211_hw *hw;
  4612. struct mwl8k_priv *priv;
  4613. struct mwl8k_device_info *di;
  4614. int rc;
  4615. if (!printed_version) {
  4616. printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION);
  4617. printed_version = 1;
  4618. }
  4619. rc = pci_enable_device(pdev);
  4620. if (rc) {
  4621. printk(KERN_ERR "%s: Cannot enable new PCI device\n",
  4622. MWL8K_NAME);
  4623. return rc;
  4624. }
  4625. rc = pci_request_regions(pdev, MWL8K_NAME);
  4626. if (rc) {
  4627. printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
  4628. MWL8K_NAME);
  4629. goto err_disable_device;
  4630. }
  4631. pci_set_master(pdev);
  4632. hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
  4633. if (hw == NULL) {
  4634. printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
  4635. rc = -ENOMEM;
  4636. goto err_free_reg;
  4637. }
  4638. SET_IEEE80211_DEV(hw, &pdev->dev);
  4639. pci_set_drvdata(pdev, hw);
  4640. priv = hw->priv;
  4641. priv->hw = hw;
  4642. priv->pdev = pdev;
  4643. priv->device_info = &mwl8k_info_tbl[id->driver_data];
  4644. priv->sram = pci_iomap(pdev, 0, 0x10000);
  4645. if (priv->sram == NULL) {
  4646. wiphy_err(hw->wiphy, "Cannot map device SRAM\n");
  4647. goto err_iounmap;
  4648. }
  4649. /*
  4650. * If BAR0 is a 32 bit BAR, the register BAR will be BAR1.
  4651. * If BAR0 is a 64 bit BAR, the register BAR will be BAR2.
  4652. */
  4653. priv->regs = pci_iomap(pdev, 1, 0x10000);
  4654. if (priv->regs == NULL) {
  4655. priv->regs = pci_iomap(pdev, 2, 0x10000);
  4656. if (priv->regs == NULL) {
  4657. wiphy_err(hw->wiphy, "Cannot map device registers\n");
  4658. goto err_iounmap;
  4659. }
  4660. }
  4661. /*
  4662. * Choose the initial fw image depending on user input. If a second
  4663. * image is available, make it the alternative image that will be
  4664. * loaded if the first one fails.
  4665. */
  4666. init_completion(&priv->firmware_loading_complete);
  4667. di = priv->device_info;
  4668. if (ap_mode_default && di->fw_image_ap) {
  4669. priv->fw_pref = di->fw_image_ap;
  4670. priv->fw_alt = di->fw_image_sta;
  4671. } else if (!ap_mode_default && di->fw_image_sta) {
  4672. priv->fw_pref = di->fw_image_sta;
  4673. priv->fw_alt = di->fw_image_ap;
  4674. } else if (ap_mode_default && !di->fw_image_ap && di->fw_image_sta) {
  4675. printk(KERN_WARNING "AP fw is unavailable. Using STA fw.");
  4676. priv->fw_pref = di->fw_image_sta;
  4677. } else if (!ap_mode_default && !di->fw_image_sta && di->fw_image_ap) {
  4678. printk(KERN_WARNING "STA fw is unavailable. Using AP fw.");
  4679. priv->fw_pref = di->fw_image_ap;
  4680. }
  4681. rc = mwl8k_init_firmware(hw, priv->fw_pref, true);
  4682. if (rc)
  4683. goto err_stop_firmware;
  4684. return rc;
  4685. err_stop_firmware:
  4686. mwl8k_hw_reset(priv);
  4687. err_iounmap:
  4688. if (priv->regs != NULL)
  4689. pci_iounmap(pdev, priv->regs);
  4690. if (priv->sram != NULL)
  4691. pci_iounmap(pdev, priv->sram);
  4692. pci_set_drvdata(pdev, NULL);
  4693. ieee80211_free_hw(hw);
  4694. err_free_reg:
  4695. pci_release_regions(pdev);
  4696. err_disable_device:
  4697. pci_disable_device(pdev);
  4698. return rc;
  4699. }
  4700. static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
  4701. {
  4702. printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
  4703. }
  4704. static void __devexit mwl8k_remove(struct pci_dev *pdev)
  4705. {
  4706. struct ieee80211_hw *hw = pci_get_drvdata(pdev);
  4707. struct mwl8k_priv *priv;
  4708. int i;
  4709. if (hw == NULL)
  4710. return;
  4711. priv = hw->priv;
  4712. wait_for_completion(&priv->firmware_loading_complete);
  4713. if (priv->fw_state == FW_STATE_ERROR) {
  4714. mwl8k_hw_reset(priv);
  4715. goto unmap;
  4716. }
  4717. ieee80211_stop_queues(hw);
  4718. ieee80211_unregister_hw(hw);
  4719. /* Remove TX reclaim and RX tasklets. */
  4720. tasklet_kill(&priv->poll_tx_task);
  4721. tasklet_kill(&priv->poll_rx_task);
  4722. /* Stop hardware */
  4723. mwl8k_hw_reset(priv);
  4724. /* Return all skbs to mac80211 */
  4725. for (i = 0; i < mwl8k_tx_queues(priv); i++)
  4726. mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
  4727. for (i = 0; i < mwl8k_tx_queues(priv); i++)
  4728. mwl8k_txq_deinit(hw, i);
  4729. mwl8k_rxq_deinit(hw, 0);
  4730. pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma);
  4731. unmap:
  4732. pci_iounmap(pdev, priv->regs);
  4733. pci_iounmap(pdev, priv->sram);
  4734. pci_set_drvdata(pdev, NULL);
  4735. ieee80211_free_hw(hw);
  4736. pci_release_regions(pdev);
  4737. pci_disable_device(pdev);
  4738. }
  4739. static struct pci_driver mwl8k_driver = {
  4740. .name = MWL8K_NAME,
  4741. .id_table = mwl8k_pci_id_table,
  4742. .probe = mwl8k_probe,
  4743. .remove = __devexit_p(mwl8k_remove),
  4744. .shutdown = __devexit_p(mwl8k_shutdown),
  4745. };
  4746. static int __init mwl8k_init(void)
  4747. {
  4748. return pci_register_driver(&mwl8k_driver);
  4749. }
  4750. static void __exit mwl8k_exit(void)
  4751. {
  4752. pci_unregister_driver(&mwl8k_driver);
  4753. }
  4754. module_init(mwl8k_init);
  4755. module_exit(mwl8k_exit);
  4756. MODULE_DESCRIPTION(MWL8K_DESC);
  4757. MODULE_VERSION(MWL8K_VERSION);
  4758. MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
  4759. MODULE_LICENSE("GPL");