ixgbe_mbx.c 12 KB

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  1. /*******************************************************************************
  2. Intel 10 Gigabit PCI Express Linux driver
  3. Copyright(c) 1999 - 2011 Intel Corporation.
  4. This program is free software; you can redistribute it and/or modify it
  5. under the terms and conditions of the GNU General Public License,
  6. version 2, as published by the Free Software Foundation.
  7. This program is distributed in the hope it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc.,
  13. 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  14. The full GNU General Public License is included in this distribution in
  15. the file called "COPYING".
  16. Contact Information:
  17. e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  18. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  19. *******************************************************************************/
  20. #include <linux/pci.h>
  21. #include <linux/delay.h>
  22. #include "ixgbe_type.h"
  23. #include "ixgbe_common.h"
  24. #include "ixgbe_mbx.h"
  25. /**
  26. * ixgbe_read_mbx - Reads a message from the mailbox
  27. * @hw: pointer to the HW structure
  28. * @msg: The message buffer
  29. * @size: Length of buffer
  30. * @mbx_id: id of mailbox to read
  31. *
  32. * returns SUCCESS if it successfuly read message from buffer
  33. **/
  34. s32 ixgbe_read_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id)
  35. {
  36. struct ixgbe_mbx_info *mbx = &hw->mbx;
  37. s32 ret_val = IXGBE_ERR_MBX;
  38. /* limit read to size of mailbox */
  39. if (size > mbx->size)
  40. size = mbx->size;
  41. if (mbx->ops.read)
  42. ret_val = mbx->ops.read(hw, msg, size, mbx_id);
  43. return ret_val;
  44. }
  45. /**
  46. * ixgbe_write_mbx - Write a message to the mailbox
  47. * @hw: pointer to the HW structure
  48. * @msg: The message buffer
  49. * @size: Length of buffer
  50. * @mbx_id: id of mailbox to write
  51. *
  52. * returns SUCCESS if it successfully copied message into the buffer
  53. **/
  54. s32 ixgbe_write_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id)
  55. {
  56. struct ixgbe_mbx_info *mbx = &hw->mbx;
  57. s32 ret_val = 0;
  58. if (size > mbx->size)
  59. ret_val = IXGBE_ERR_MBX;
  60. else if (mbx->ops.write)
  61. ret_val = mbx->ops.write(hw, msg, size, mbx_id);
  62. return ret_val;
  63. }
  64. /**
  65. * ixgbe_check_for_msg - checks to see if someone sent us mail
  66. * @hw: pointer to the HW structure
  67. * @mbx_id: id of mailbox to check
  68. *
  69. * returns SUCCESS if the Status bit was found or else ERR_MBX
  70. **/
  71. s32 ixgbe_check_for_msg(struct ixgbe_hw *hw, u16 mbx_id)
  72. {
  73. struct ixgbe_mbx_info *mbx = &hw->mbx;
  74. s32 ret_val = IXGBE_ERR_MBX;
  75. if (mbx->ops.check_for_msg)
  76. ret_val = mbx->ops.check_for_msg(hw, mbx_id);
  77. return ret_val;
  78. }
  79. /**
  80. * ixgbe_check_for_ack - checks to see if someone sent us ACK
  81. * @hw: pointer to the HW structure
  82. * @mbx_id: id of mailbox to check
  83. *
  84. * returns SUCCESS if the Status bit was found or else ERR_MBX
  85. **/
  86. s32 ixgbe_check_for_ack(struct ixgbe_hw *hw, u16 mbx_id)
  87. {
  88. struct ixgbe_mbx_info *mbx = &hw->mbx;
  89. s32 ret_val = IXGBE_ERR_MBX;
  90. if (mbx->ops.check_for_ack)
  91. ret_val = mbx->ops.check_for_ack(hw, mbx_id);
  92. return ret_val;
  93. }
  94. /**
  95. * ixgbe_check_for_rst - checks to see if other side has reset
  96. * @hw: pointer to the HW structure
  97. * @mbx_id: id of mailbox to check
  98. *
  99. * returns SUCCESS if the Status bit was found or else ERR_MBX
  100. **/
  101. s32 ixgbe_check_for_rst(struct ixgbe_hw *hw, u16 mbx_id)
  102. {
  103. struct ixgbe_mbx_info *mbx = &hw->mbx;
  104. s32 ret_val = IXGBE_ERR_MBX;
  105. if (mbx->ops.check_for_rst)
  106. ret_val = mbx->ops.check_for_rst(hw, mbx_id);
  107. return ret_val;
  108. }
  109. /**
  110. * ixgbe_poll_for_msg - Wait for message notification
  111. * @hw: pointer to the HW structure
  112. * @mbx_id: id of mailbox to write
  113. *
  114. * returns SUCCESS if it successfully received a message notification
  115. **/
  116. static s32 ixgbe_poll_for_msg(struct ixgbe_hw *hw, u16 mbx_id)
  117. {
  118. struct ixgbe_mbx_info *mbx = &hw->mbx;
  119. int countdown = mbx->timeout;
  120. if (!countdown || !mbx->ops.check_for_msg)
  121. goto out;
  122. while (countdown && mbx->ops.check_for_msg(hw, mbx_id)) {
  123. countdown--;
  124. if (!countdown)
  125. break;
  126. udelay(mbx->usec_delay);
  127. }
  128. out:
  129. return countdown ? 0 : IXGBE_ERR_MBX;
  130. }
  131. /**
  132. * ixgbe_poll_for_ack - Wait for message acknowledgement
  133. * @hw: pointer to the HW structure
  134. * @mbx_id: id of mailbox to write
  135. *
  136. * returns SUCCESS if it successfully received a message acknowledgement
  137. **/
  138. static s32 ixgbe_poll_for_ack(struct ixgbe_hw *hw, u16 mbx_id)
  139. {
  140. struct ixgbe_mbx_info *mbx = &hw->mbx;
  141. int countdown = mbx->timeout;
  142. if (!countdown || !mbx->ops.check_for_ack)
  143. goto out;
  144. while (countdown && mbx->ops.check_for_ack(hw, mbx_id)) {
  145. countdown--;
  146. if (!countdown)
  147. break;
  148. udelay(mbx->usec_delay);
  149. }
  150. out:
  151. return countdown ? 0 : IXGBE_ERR_MBX;
  152. }
  153. /**
  154. * ixgbe_read_posted_mbx - Wait for message notification and receive message
  155. * @hw: pointer to the HW structure
  156. * @msg: The message buffer
  157. * @size: Length of buffer
  158. * @mbx_id: id of mailbox to write
  159. *
  160. * returns SUCCESS if it successfully received a message notification and
  161. * copied it into the receive buffer.
  162. **/
  163. static s32 ixgbe_read_posted_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size,
  164. u16 mbx_id)
  165. {
  166. struct ixgbe_mbx_info *mbx = &hw->mbx;
  167. s32 ret_val = IXGBE_ERR_MBX;
  168. if (!mbx->ops.read)
  169. goto out;
  170. ret_val = ixgbe_poll_for_msg(hw, mbx_id);
  171. /* if ack received read message, otherwise we timed out */
  172. if (!ret_val)
  173. ret_val = mbx->ops.read(hw, msg, size, mbx_id);
  174. out:
  175. return ret_val;
  176. }
  177. /**
  178. * ixgbe_write_posted_mbx - Write a message to the mailbox, wait for ack
  179. * @hw: pointer to the HW structure
  180. * @msg: The message buffer
  181. * @size: Length of buffer
  182. * @mbx_id: id of mailbox to write
  183. *
  184. * returns SUCCESS if it successfully copied message into the buffer and
  185. * received an ack to that message within delay * timeout period
  186. **/
  187. static s32 ixgbe_write_posted_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size,
  188. u16 mbx_id)
  189. {
  190. struct ixgbe_mbx_info *mbx = &hw->mbx;
  191. s32 ret_val = IXGBE_ERR_MBX;
  192. /* exit if either we can't write or there isn't a defined timeout */
  193. if (!mbx->ops.write || !mbx->timeout)
  194. goto out;
  195. /* send msg */
  196. ret_val = mbx->ops.write(hw, msg, size, mbx_id);
  197. /* if msg sent wait until we receive an ack */
  198. if (!ret_val)
  199. ret_val = ixgbe_poll_for_ack(hw, mbx_id);
  200. out:
  201. return ret_val;
  202. }
  203. static s32 ixgbe_check_for_bit_pf(struct ixgbe_hw *hw, u32 mask, s32 index)
  204. {
  205. u32 mbvficr = IXGBE_READ_REG(hw, IXGBE_MBVFICR(index));
  206. s32 ret_val = IXGBE_ERR_MBX;
  207. if (mbvficr & mask) {
  208. ret_val = 0;
  209. IXGBE_WRITE_REG(hw, IXGBE_MBVFICR(index), mask);
  210. }
  211. return ret_val;
  212. }
  213. /**
  214. * ixgbe_check_for_msg_pf - checks to see if the VF has sent mail
  215. * @hw: pointer to the HW structure
  216. * @vf_number: the VF index
  217. *
  218. * returns SUCCESS if the VF has set the Status bit or else ERR_MBX
  219. **/
  220. static s32 ixgbe_check_for_msg_pf(struct ixgbe_hw *hw, u16 vf_number)
  221. {
  222. s32 ret_val = IXGBE_ERR_MBX;
  223. s32 index = IXGBE_MBVFICR_INDEX(vf_number);
  224. u32 vf_bit = vf_number % 16;
  225. if (!ixgbe_check_for_bit_pf(hw, IXGBE_MBVFICR_VFREQ_VF1 << vf_bit,
  226. index)) {
  227. ret_val = 0;
  228. hw->mbx.stats.reqs++;
  229. }
  230. return ret_val;
  231. }
  232. /**
  233. * ixgbe_check_for_ack_pf - checks to see if the VF has ACKed
  234. * @hw: pointer to the HW structure
  235. * @vf_number: the VF index
  236. *
  237. * returns SUCCESS if the VF has set the Status bit or else ERR_MBX
  238. **/
  239. static s32 ixgbe_check_for_ack_pf(struct ixgbe_hw *hw, u16 vf_number)
  240. {
  241. s32 ret_val = IXGBE_ERR_MBX;
  242. s32 index = IXGBE_MBVFICR_INDEX(vf_number);
  243. u32 vf_bit = vf_number % 16;
  244. if (!ixgbe_check_for_bit_pf(hw, IXGBE_MBVFICR_VFACK_VF1 << vf_bit,
  245. index)) {
  246. ret_val = 0;
  247. hw->mbx.stats.acks++;
  248. }
  249. return ret_val;
  250. }
  251. /**
  252. * ixgbe_check_for_rst_pf - checks to see if the VF has reset
  253. * @hw: pointer to the HW structure
  254. * @vf_number: the VF index
  255. *
  256. * returns SUCCESS if the VF has set the Status bit or else ERR_MBX
  257. **/
  258. static s32 ixgbe_check_for_rst_pf(struct ixgbe_hw *hw, u16 vf_number)
  259. {
  260. u32 reg_offset = (vf_number < 32) ? 0 : 1;
  261. u32 vf_shift = vf_number % 32;
  262. u32 vflre = 0;
  263. s32 ret_val = IXGBE_ERR_MBX;
  264. switch (hw->mac.type) {
  265. case ixgbe_mac_82599EB:
  266. vflre = IXGBE_READ_REG(hw, IXGBE_VFLRE(reg_offset));
  267. break;
  268. case ixgbe_mac_X540:
  269. vflre = IXGBE_READ_REG(hw, IXGBE_VFLREC(reg_offset));
  270. break;
  271. default:
  272. break;
  273. }
  274. if (vflre & (1 << vf_shift)) {
  275. ret_val = 0;
  276. IXGBE_WRITE_REG(hw, IXGBE_VFLREC(reg_offset), (1 << vf_shift));
  277. hw->mbx.stats.rsts++;
  278. }
  279. return ret_val;
  280. }
  281. /**
  282. * ixgbe_obtain_mbx_lock_pf - obtain mailbox lock
  283. * @hw: pointer to the HW structure
  284. * @vf_number: the VF index
  285. *
  286. * return SUCCESS if we obtained the mailbox lock
  287. **/
  288. static s32 ixgbe_obtain_mbx_lock_pf(struct ixgbe_hw *hw, u16 vf_number)
  289. {
  290. s32 ret_val = IXGBE_ERR_MBX;
  291. u32 p2v_mailbox;
  292. /* Take ownership of the buffer */
  293. IXGBE_WRITE_REG(hw, IXGBE_PFMAILBOX(vf_number), IXGBE_PFMAILBOX_PFU);
  294. /* reserve mailbox for vf use */
  295. p2v_mailbox = IXGBE_READ_REG(hw, IXGBE_PFMAILBOX(vf_number));
  296. if (p2v_mailbox & IXGBE_PFMAILBOX_PFU)
  297. ret_val = 0;
  298. return ret_val;
  299. }
  300. /**
  301. * ixgbe_write_mbx_pf - Places a message in the mailbox
  302. * @hw: pointer to the HW structure
  303. * @msg: The message buffer
  304. * @size: Length of buffer
  305. * @vf_number: the VF index
  306. *
  307. * returns SUCCESS if it successfully copied message into the buffer
  308. **/
  309. static s32 ixgbe_write_mbx_pf(struct ixgbe_hw *hw, u32 *msg, u16 size,
  310. u16 vf_number)
  311. {
  312. s32 ret_val;
  313. u16 i;
  314. /* lock the mailbox to prevent pf/vf race condition */
  315. ret_val = ixgbe_obtain_mbx_lock_pf(hw, vf_number);
  316. if (ret_val)
  317. goto out_no_write;
  318. /* flush msg and acks as we are overwriting the message buffer */
  319. ixgbe_check_for_msg_pf(hw, vf_number);
  320. ixgbe_check_for_ack_pf(hw, vf_number);
  321. /* copy the caller specified message to the mailbox memory buffer */
  322. for (i = 0; i < size; i++)
  323. IXGBE_WRITE_REG_ARRAY(hw, IXGBE_PFMBMEM(vf_number), i, msg[i]);
  324. /* Interrupt VF to tell it a message has been sent and release buffer*/
  325. IXGBE_WRITE_REG(hw, IXGBE_PFMAILBOX(vf_number), IXGBE_PFMAILBOX_STS);
  326. /* update stats */
  327. hw->mbx.stats.msgs_tx++;
  328. out_no_write:
  329. return ret_val;
  330. }
  331. /**
  332. * ixgbe_read_mbx_pf - Read a message from the mailbox
  333. * @hw: pointer to the HW structure
  334. * @msg: The message buffer
  335. * @size: Length of buffer
  336. * @vf_number: the VF index
  337. *
  338. * This function copies a message from the mailbox buffer to the caller's
  339. * memory buffer. The presumption is that the caller knows that there was
  340. * a message due to a VF request so no polling for message is needed.
  341. **/
  342. static s32 ixgbe_read_mbx_pf(struct ixgbe_hw *hw, u32 *msg, u16 size,
  343. u16 vf_number)
  344. {
  345. s32 ret_val;
  346. u16 i;
  347. /* lock the mailbox to prevent pf/vf race condition */
  348. ret_val = ixgbe_obtain_mbx_lock_pf(hw, vf_number);
  349. if (ret_val)
  350. goto out_no_read;
  351. /* copy the message to the mailbox memory buffer */
  352. for (i = 0; i < size; i++)
  353. msg[i] = IXGBE_READ_REG_ARRAY(hw, IXGBE_PFMBMEM(vf_number), i);
  354. /* Acknowledge the message and release buffer */
  355. IXGBE_WRITE_REG(hw, IXGBE_PFMAILBOX(vf_number), IXGBE_PFMAILBOX_ACK);
  356. /* update stats */
  357. hw->mbx.stats.msgs_rx++;
  358. out_no_read:
  359. return ret_val;
  360. }
  361. #ifdef CONFIG_PCI_IOV
  362. /**
  363. * ixgbe_init_mbx_params_pf - set initial values for pf mailbox
  364. * @hw: pointer to the HW structure
  365. *
  366. * Initializes the hw->mbx struct to correct values for pf mailbox
  367. */
  368. void ixgbe_init_mbx_params_pf(struct ixgbe_hw *hw)
  369. {
  370. struct ixgbe_mbx_info *mbx = &hw->mbx;
  371. if (hw->mac.type != ixgbe_mac_82599EB &&
  372. hw->mac.type != ixgbe_mac_X540)
  373. return;
  374. mbx->timeout = 0;
  375. mbx->usec_delay = 0;
  376. mbx->stats.msgs_tx = 0;
  377. mbx->stats.msgs_rx = 0;
  378. mbx->stats.reqs = 0;
  379. mbx->stats.acks = 0;
  380. mbx->stats.rsts = 0;
  381. mbx->size = IXGBE_VFMAILBOX_SIZE;
  382. }
  383. #endif /* CONFIG_PCI_IOV */
  384. struct ixgbe_mbx_operations mbx_ops_generic = {
  385. .read = ixgbe_read_mbx_pf,
  386. .write = ixgbe_write_mbx_pf,
  387. .read_posted = ixgbe_read_posted_mbx,
  388. .write_posted = ixgbe_write_posted_mbx,
  389. .check_for_msg = ixgbe_check_for_msg_pf,
  390. .check_for_ack = ixgbe_check_for_ack_pf,
  391. .check_for_rst = ixgbe_check_for_rst_pf,
  392. };