enic_res.c 9.3 KB

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  1. /*
  2. * Copyright 2008-2010 Cisco Systems, Inc. All rights reserved.
  3. * Copyright 2007 Nuova Systems, Inc. All rights reserved.
  4. *
  5. * This program is free software; you may redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; version 2 of the License.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  10. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  11. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  12. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  13. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  14. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  15. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  16. * SOFTWARE.
  17. *
  18. */
  19. #include <linux/kernel.h>
  20. #include <linux/errno.h>
  21. #include <linux/types.h>
  22. #include <linux/pci.h>
  23. #include <linux/netdevice.h>
  24. #include "wq_enet_desc.h"
  25. #include "rq_enet_desc.h"
  26. #include "cq_enet_desc.h"
  27. #include "vnic_resource.h"
  28. #include "vnic_enet.h"
  29. #include "vnic_dev.h"
  30. #include "vnic_wq.h"
  31. #include "vnic_rq.h"
  32. #include "vnic_cq.h"
  33. #include "vnic_intr.h"
  34. #include "vnic_stats.h"
  35. #include "vnic_nic.h"
  36. #include "vnic_rss.h"
  37. #include "enic_res.h"
  38. #include "enic.h"
  39. int enic_get_vnic_config(struct enic *enic)
  40. {
  41. struct vnic_enet_config *c = &enic->config;
  42. int err;
  43. err = vnic_dev_mac_addr(enic->vdev, enic->mac_addr);
  44. if (err) {
  45. dev_err(enic_get_dev(enic),
  46. "Error getting MAC addr, %d\n", err);
  47. return err;
  48. }
  49. #define GET_CONFIG(m) \
  50. do { \
  51. err = vnic_dev_spec(enic->vdev, \
  52. offsetof(struct vnic_enet_config, m), \
  53. sizeof(c->m), &c->m); \
  54. if (err) { \
  55. dev_err(enic_get_dev(enic), \
  56. "Error getting %s, %d\n", #m, err); \
  57. return err; \
  58. } \
  59. } while (0)
  60. GET_CONFIG(flags);
  61. GET_CONFIG(wq_desc_count);
  62. GET_CONFIG(rq_desc_count);
  63. GET_CONFIG(mtu);
  64. GET_CONFIG(intr_timer_type);
  65. GET_CONFIG(intr_mode);
  66. GET_CONFIG(intr_timer_usec);
  67. GET_CONFIG(loop_tag);
  68. c->wq_desc_count =
  69. min_t(u32, ENIC_MAX_WQ_DESCS,
  70. max_t(u32, ENIC_MIN_WQ_DESCS,
  71. c->wq_desc_count));
  72. c->wq_desc_count &= 0xffffffe0; /* must be aligned to groups of 32 */
  73. c->rq_desc_count =
  74. min_t(u32, ENIC_MAX_RQ_DESCS,
  75. max_t(u32, ENIC_MIN_RQ_DESCS,
  76. c->rq_desc_count));
  77. c->rq_desc_count &= 0xffffffe0; /* must be aligned to groups of 32 */
  78. if (c->mtu == 0)
  79. c->mtu = 1500;
  80. c->mtu = min_t(u16, ENIC_MAX_MTU,
  81. max_t(u16, ENIC_MIN_MTU,
  82. c->mtu));
  83. c->intr_timer_usec = min_t(u32, c->intr_timer_usec,
  84. vnic_dev_get_intr_coal_timer_max(enic->vdev));
  85. dev_info(enic_get_dev(enic),
  86. "vNIC MAC addr %pM wq/rq %d/%d mtu %d\n",
  87. enic->mac_addr, c->wq_desc_count, c->rq_desc_count, c->mtu);
  88. dev_info(enic_get_dev(enic), "vNIC csum tx/rx %s/%s "
  89. "tso/lro %s/%s rss %s intr mode %s type %s timer %d usec "
  90. "loopback tag 0x%04x\n",
  91. ENIC_SETTING(enic, TXCSUM) ? "yes" : "no",
  92. ENIC_SETTING(enic, RXCSUM) ? "yes" : "no",
  93. ENIC_SETTING(enic, TSO) ? "yes" : "no",
  94. ENIC_SETTING(enic, LRO) ? "yes" : "no",
  95. ENIC_SETTING(enic, RSS) ? "yes" : "no",
  96. c->intr_mode == VENET_INTR_MODE_INTX ? "INTx" :
  97. c->intr_mode == VENET_INTR_MODE_MSI ? "MSI" :
  98. c->intr_mode == VENET_INTR_MODE_ANY ? "any" :
  99. "unknown",
  100. c->intr_timer_type == VENET_INTR_TYPE_MIN ? "min" :
  101. c->intr_timer_type == VENET_INTR_TYPE_IDLE ? "idle" :
  102. "unknown",
  103. c->intr_timer_usec,
  104. c->loop_tag);
  105. return 0;
  106. }
  107. int enic_add_vlan(struct enic *enic, u16 vlanid)
  108. {
  109. u64 a0 = vlanid, a1 = 0;
  110. int wait = 1000;
  111. int err;
  112. err = vnic_dev_cmd(enic->vdev, CMD_VLAN_ADD, &a0, &a1, wait);
  113. if (err)
  114. dev_err(enic_get_dev(enic), "Can't add vlan id, %d\n", err);
  115. return err;
  116. }
  117. int enic_del_vlan(struct enic *enic, u16 vlanid)
  118. {
  119. u64 a0 = vlanid, a1 = 0;
  120. int wait = 1000;
  121. int err;
  122. err = vnic_dev_cmd(enic->vdev, CMD_VLAN_DEL, &a0, &a1, wait);
  123. if (err)
  124. dev_err(enic_get_dev(enic), "Can't delete vlan id, %d\n", err);
  125. return err;
  126. }
  127. int enic_set_nic_cfg(struct enic *enic, u8 rss_default_cpu, u8 rss_hash_type,
  128. u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable, u8 tso_ipid_split_en,
  129. u8 ig_vlan_strip_en)
  130. {
  131. u64 a0, a1;
  132. u32 nic_cfg;
  133. int wait = 1000;
  134. vnic_set_nic_cfg(&nic_cfg, rss_default_cpu,
  135. rss_hash_type, rss_hash_bits, rss_base_cpu,
  136. rss_enable, tso_ipid_split_en, ig_vlan_strip_en);
  137. a0 = nic_cfg;
  138. a1 = 0;
  139. return vnic_dev_cmd(enic->vdev, CMD_NIC_CFG, &a0, &a1, wait);
  140. }
  141. int enic_set_rss_key(struct enic *enic, dma_addr_t key_pa, u64 len)
  142. {
  143. u64 a0 = (u64)key_pa, a1 = len;
  144. int wait = 1000;
  145. return vnic_dev_cmd(enic->vdev, CMD_RSS_KEY, &a0, &a1, wait);
  146. }
  147. int enic_set_rss_cpu(struct enic *enic, dma_addr_t cpu_pa, u64 len)
  148. {
  149. u64 a0 = (u64)cpu_pa, a1 = len;
  150. int wait = 1000;
  151. return vnic_dev_cmd(enic->vdev, CMD_RSS_CPU, &a0, &a1, wait);
  152. }
  153. void enic_free_vnic_resources(struct enic *enic)
  154. {
  155. unsigned int i;
  156. for (i = 0; i < enic->wq_count; i++)
  157. vnic_wq_free(&enic->wq[i]);
  158. for (i = 0; i < enic->rq_count; i++)
  159. vnic_rq_free(&enic->rq[i]);
  160. for (i = 0; i < enic->cq_count; i++)
  161. vnic_cq_free(&enic->cq[i]);
  162. for (i = 0; i < enic->intr_count; i++)
  163. vnic_intr_free(&enic->intr[i]);
  164. }
  165. void enic_get_res_counts(struct enic *enic)
  166. {
  167. enic->wq_count = vnic_dev_get_res_count(enic->vdev, RES_TYPE_WQ);
  168. enic->rq_count = vnic_dev_get_res_count(enic->vdev, RES_TYPE_RQ);
  169. enic->cq_count = vnic_dev_get_res_count(enic->vdev, RES_TYPE_CQ);
  170. enic->intr_count = vnic_dev_get_res_count(enic->vdev,
  171. RES_TYPE_INTR_CTRL);
  172. dev_info(enic_get_dev(enic),
  173. "vNIC resources avail: wq %d rq %d cq %d intr %d\n",
  174. enic->wq_count, enic->rq_count,
  175. enic->cq_count, enic->intr_count);
  176. }
  177. void enic_init_vnic_resources(struct enic *enic)
  178. {
  179. enum vnic_dev_intr_mode intr_mode;
  180. unsigned int mask_on_assertion;
  181. unsigned int interrupt_offset;
  182. unsigned int error_interrupt_enable;
  183. unsigned int error_interrupt_offset;
  184. unsigned int cq_index;
  185. unsigned int i;
  186. intr_mode = vnic_dev_get_intr_mode(enic->vdev);
  187. /* Init RQ/WQ resources.
  188. *
  189. * RQ[0 - n-1] point to CQ[0 - n-1]
  190. * WQ[0 - m-1] point to CQ[n - n+m-1]
  191. *
  192. * Error interrupt is not enabled for MSI.
  193. */
  194. switch (intr_mode) {
  195. case VNIC_DEV_INTR_MODE_INTX:
  196. case VNIC_DEV_INTR_MODE_MSIX:
  197. error_interrupt_enable = 1;
  198. error_interrupt_offset = enic->intr_count - 2;
  199. break;
  200. default:
  201. error_interrupt_enable = 0;
  202. error_interrupt_offset = 0;
  203. break;
  204. }
  205. for (i = 0; i < enic->rq_count; i++) {
  206. cq_index = i;
  207. vnic_rq_init(&enic->rq[i],
  208. cq_index,
  209. error_interrupt_enable,
  210. error_interrupt_offset);
  211. }
  212. for (i = 0; i < enic->wq_count; i++) {
  213. cq_index = enic->rq_count + i;
  214. vnic_wq_init(&enic->wq[i],
  215. cq_index,
  216. error_interrupt_enable,
  217. error_interrupt_offset);
  218. }
  219. /* Init CQ resources
  220. *
  221. * CQ[0 - n+m-1] point to INTR[0] for INTx, MSI
  222. * CQ[0 - n+m-1] point to INTR[0 - n+m-1] for MSI-X
  223. */
  224. for (i = 0; i < enic->cq_count; i++) {
  225. switch (intr_mode) {
  226. case VNIC_DEV_INTR_MODE_MSIX:
  227. interrupt_offset = i;
  228. break;
  229. default:
  230. interrupt_offset = 0;
  231. break;
  232. }
  233. vnic_cq_init(&enic->cq[i],
  234. 0 /* flow_control_enable */,
  235. 1 /* color_enable */,
  236. 0 /* cq_head */,
  237. 0 /* cq_tail */,
  238. 1 /* cq_tail_color */,
  239. 1 /* interrupt_enable */,
  240. 1 /* cq_entry_enable */,
  241. 0 /* cq_message_enable */,
  242. interrupt_offset,
  243. 0 /* cq_message_addr */);
  244. }
  245. /* Init INTR resources
  246. *
  247. * mask_on_assertion is not used for INTx due to the level-
  248. * triggered nature of INTx
  249. */
  250. switch (intr_mode) {
  251. case VNIC_DEV_INTR_MODE_MSI:
  252. case VNIC_DEV_INTR_MODE_MSIX:
  253. mask_on_assertion = 1;
  254. break;
  255. default:
  256. mask_on_assertion = 0;
  257. break;
  258. }
  259. for (i = 0; i < enic->intr_count; i++) {
  260. vnic_intr_init(&enic->intr[i],
  261. enic->config.intr_timer_usec,
  262. enic->config.intr_timer_type,
  263. mask_on_assertion);
  264. }
  265. }
  266. int enic_alloc_vnic_resources(struct enic *enic)
  267. {
  268. enum vnic_dev_intr_mode intr_mode;
  269. unsigned int i;
  270. int err;
  271. intr_mode = vnic_dev_get_intr_mode(enic->vdev);
  272. dev_info(enic_get_dev(enic), "vNIC resources used: "
  273. "wq %d rq %d cq %d intr %d intr mode %s\n",
  274. enic->wq_count, enic->rq_count,
  275. enic->cq_count, enic->intr_count,
  276. intr_mode == VNIC_DEV_INTR_MODE_INTX ? "legacy PCI INTx" :
  277. intr_mode == VNIC_DEV_INTR_MODE_MSI ? "MSI" :
  278. intr_mode == VNIC_DEV_INTR_MODE_MSIX ? "MSI-X" :
  279. "unknown");
  280. /* Allocate queue resources
  281. */
  282. for (i = 0; i < enic->wq_count; i++) {
  283. err = vnic_wq_alloc(enic->vdev, &enic->wq[i], i,
  284. enic->config.wq_desc_count,
  285. sizeof(struct wq_enet_desc));
  286. if (err)
  287. goto err_out_cleanup;
  288. }
  289. for (i = 0; i < enic->rq_count; i++) {
  290. err = vnic_rq_alloc(enic->vdev, &enic->rq[i], i,
  291. enic->config.rq_desc_count,
  292. sizeof(struct rq_enet_desc));
  293. if (err)
  294. goto err_out_cleanup;
  295. }
  296. for (i = 0; i < enic->cq_count; i++) {
  297. if (i < enic->rq_count)
  298. err = vnic_cq_alloc(enic->vdev, &enic->cq[i], i,
  299. enic->config.rq_desc_count,
  300. sizeof(struct cq_enet_rq_desc));
  301. else
  302. err = vnic_cq_alloc(enic->vdev, &enic->cq[i], i,
  303. enic->config.wq_desc_count,
  304. sizeof(struct cq_enet_wq_desc));
  305. if (err)
  306. goto err_out_cleanup;
  307. }
  308. for (i = 0; i < enic->intr_count; i++) {
  309. err = vnic_intr_alloc(enic->vdev, &enic->intr[i], i);
  310. if (err)
  311. goto err_out_cleanup;
  312. }
  313. /* Hook remaining resource
  314. */
  315. enic->legacy_pba = vnic_dev_get_res(enic->vdev,
  316. RES_TYPE_INTR_PBA_LEGACY, 0);
  317. if (!enic->legacy_pba && intr_mode == VNIC_DEV_INTR_MODE_INTX) {
  318. dev_err(enic_get_dev(enic),
  319. "Failed to hook legacy pba resource\n");
  320. err = -ENODEV;
  321. goto err_out_cleanup;
  322. }
  323. return 0;
  324. err_out_cleanup:
  325. enic_free_vnic_resources(enic);
  326. return err;
  327. }