bnad_ethtool.c 32 KB

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  1. /*
  2. * Linux network driver for Brocade Converged Network Adapter.
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms of the GNU General Public License (GPL) Version 2 as
  6. * published by the Free Software Foundation
  7. *
  8. * This program is distributed in the hope that it will be useful, but
  9. * WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  11. * General Public License for more details.
  12. */
  13. /*
  14. * Copyright (c) 2005-2010 Brocade Communications Systems, Inc.
  15. * All rights reserved
  16. * www.brocade.com
  17. */
  18. #include "cna.h"
  19. #include <linux/netdevice.h>
  20. #include <linux/skbuff.h>
  21. #include <linux/ethtool.h>
  22. #include <linux/rtnetlink.h>
  23. #include "bna.h"
  24. #include "bnad.h"
  25. #define BNAD_NUM_TXF_COUNTERS 12
  26. #define BNAD_NUM_RXF_COUNTERS 10
  27. #define BNAD_NUM_CQ_COUNTERS 3
  28. #define BNAD_NUM_RXQ_COUNTERS 6
  29. #define BNAD_NUM_TXQ_COUNTERS 5
  30. #define BNAD_ETHTOOL_STATS_NUM \
  31. (sizeof(struct rtnl_link_stats64) / sizeof(u64) + \
  32. sizeof(struct bnad_drv_stats) / sizeof(u64) + \
  33. offsetof(struct bfi_ll_stats, rxf_stats[0]) / sizeof(u64))
  34. static char *bnad_net_stats_strings[BNAD_ETHTOOL_STATS_NUM] = {
  35. "rx_packets",
  36. "tx_packets",
  37. "rx_bytes",
  38. "tx_bytes",
  39. "rx_errors",
  40. "tx_errors",
  41. "rx_dropped",
  42. "tx_dropped",
  43. "multicast",
  44. "collisions",
  45. "rx_length_errors",
  46. "rx_over_errors",
  47. "rx_crc_errors",
  48. "rx_frame_errors",
  49. "rx_fifo_errors",
  50. "rx_missed_errors",
  51. "tx_aborted_errors",
  52. "tx_carrier_errors",
  53. "tx_fifo_errors",
  54. "tx_heartbeat_errors",
  55. "tx_window_errors",
  56. "rx_compressed",
  57. "tx_compressed",
  58. "netif_queue_stop",
  59. "netif_queue_wakeup",
  60. "netif_queue_stopped",
  61. "tso4",
  62. "tso6",
  63. "tso_err",
  64. "tcpcsum_offload",
  65. "udpcsum_offload",
  66. "csum_help",
  67. "csum_help_err",
  68. "hw_stats_updates",
  69. "netif_rx_schedule",
  70. "netif_rx_complete",
  71. "netif_rx_dropped",
  72. "link_toggle",
  73. "cee_up",
  74. "rxp_info_alloc_failed",
  75. "mbox_intr_disabled",
  76. "mbox_intr_enabled",
  77. "tx_unmap_q_alloc_failed",
  78. "rx_unmap_q_alloc_failed",
  79. "rxbuf_alloc_failed",
  80. "mac_frame_64",
  81. "mac_frame_65_127",
  82. "mac_frame_128_255",
  83. "mac_frame_256_511",
  84. "mac_frame_512_1023",
  85. "mac_frame_1024_1518",
  86. "mac_frame_1518_1522",
  87. "mac_rx_bytes",
  88. "mac_rx_packets",
  89. "mac_rx_fcs_error",
  90. "mac_rx_multicast",
  91. "mac_rx_broadcast",
  92. "mac_rx_control_frames",
  93. "mac_rx_pause",
  94. "mac_rx_unknown_opcode",
  95. "mac_rx_alignment_error",
  96. "mac_rx_frame_length_error",
  97. "mac_rx_code_error",
  98. "mac_rx_carrier_sense_error",
  99. "mac_rx_undersize",
  100. "mac_rx_oversize",
  101. "mac_rx_fragments",
  102. "mac_rx_jabber",
  103. "mac_rx_drop",
  104. "mac_tx_bytes",
  105. "mac_tx_packets",
  106. "mac_tx_multicast",
  107. "mac_tx_broadcast",
  108. "mac_tx_pause",
  109. "mac_tx_deferral",
  110. "mac_tx_excessive_deferral",
  111. "mac_tx_single_collision",
  112. "mac_tx_muliple_collision",
  113. "mac_tx_late_collision",
  114. "mac_tx_excessive_collision",
  115. "mac_tx_total_collision",
  116. "mac_tx_pause_honored",
  117. "mac_tx_drop",
  118. "mac_tx_jabber",
  119. "mac_tx_fcs_error",
  120. "mac_tx_control_frame",
  121. "mac_tx_oversize",
  122. "mac_tx_undersize",
  123. "mac_tx_fragments",
  124. "bpc_tx_pause_0",
  125. "bpc_tx_pause_1",
  126. "bpc_tx_pause_2",
  127. "bpc_tx_pause_3",
  128. "bpc_tx_pause_4",
  129. "bpc_tx_pause_5",
  130. "bpc_tx_pause_6",
  131. "bpc_tx_pause_7",
  132. "bpc_tx_zero_pause_0",
  133. "bpc_tx_zero_pause_1",
  134. "bpc_tx_zero_pause_2",
  135. "bpc_tx_zero_pause_3",
  136. "bpc_tx_zero_pause_4",
  137. "bpc_tx_zero_pause_5",
  138. "bpc_tx_zero_pause_6",
  139. "bpc_tx_zero_pause_7",
  140. "bpc_tx_first_pause_0",
  141. "bpc_tx_first_pause_1",
  142. "bpc_tx_first_pause_2",
  143. "bpc_tx_first_pause_3",
  144. "bpc_tx_first_pause_4",
  145. "bpc_tx_first_pause_5",
  146. "bpc_tx_first_pause_6",
  147. "bpc_tx_first_pause_7",
  148. "bpc_rx_pause_0",
  149. "bpc_rx_pause_1",
  150. "bpc_rx_pause_2",
  151. "bpc_rx_pause_3",
  152. "bpc_rx_pause_4",
  153. "bpc_rx_pause_5",
  154. "bpc_rx_pause_6",
  155. "bpc_rx_pause_7",
  156. "bpc_rx_zero_pause_0",
  157. "bpc_rx_zero_pause_1",
  158. "bpc_rx_zero_pause_2",
  159. "bpc_rx_zero_pause_3",
  160. "bpc_rx_zero_pause_4",
  161. "bpc_rx_zero_pause_5",
  162. "bpc_rx_zero_pause_6",
  163. "bpc_rx_zero_pause_7",
  164. "bpc_rx_first_pause_0",
  165. "bpc_rx_first_pause_1",
  166. "bpc_rx_first_pause_2",
  167. "bpc_rx_first_pause_3",
  168. "bpc_rx_first_pause_4",
  169. "bpc_rx_first_pause_5",
  170. "bpc_rx_first_pause_6",
  171. "bpc_rx_first_pause_7",
  172. "rad_rx_frames",
  173. "rad_rx_octets",
  174. "rad_rx_vlan_frames",
  175. "rad_rx_ucast",
  176. "rad_rx_ucast_octets",
  177. "rad_rx_ucast_vlan",
  178. "rad_rx_mcast",
  179. "rad_rx_mcast_octets",
  180. "rad_rx_mcast_vlan",
  181. "rad_rx_bcast",
  182. "rad_rx_bcast_octets",
  183. "rad_rx_bcast_vlan",
  184. "rad_rx_drops",
  185. "fc_rx_ucast_octets",
  186. "fc_rx_ucast",
  187. "fc_rx_ucast_vlan",
  188. "fc_rx_mcast_octets",
  189. "fc_rx_mcast",
  190. "fc_rx_mcast_vlan",
  191. "fc_rx_bcast_octets",
  192. "fc_rx_bcast",
  193. "fc_rx_bcast_vlan",
  194. "fc_tx_ucast_octets",
  195. "fc_tx_ucast",
  196. "fc_tx_ucast_vlan",
  197. "fc_tx_mcast_octets",
  198. "fc_tx_mcast",
  199. "fc_tx_mcast_vlan",
  200. "fc_tx_bcast_octets",
  201. "fc_tx_bcast",
  202. "fc_tx_bcast_vlan",
  203. "fc_tx_parity_errors",
  204. "fc_tx_timeout",
  205. "fc_tx_fid_parity_errors",
  206. };
  207. static int
  208. bnad_get_settings(struct net_device *netdev, struct ethtool_cmd *cmd)
  209. {
  210. cmd->supported = SUPPORTED_10000baseT_Full;
  211. cmd->advertising = ADVERTISED_10000baseT_Full;
  212. cmd->autoneg = AUTONEG_DISABLE;
  213. cmd->supported |= SUPPORTED_FIBRE;
  214. cmd->advertising |= ADVERTISED_FIBRE;
  215. cmd->port = PORT_FIBRE;
  216. cmd->phy_address = 0;
  217. if (netif_carrier_ok(netdev)) {
  218. ethtool_cmd_speed_set(cmd, SPEED_10000);
  219. cmd->duplex = DUPLEX_FULL;
  220. } else {
  221. ethtool_cmd_speed_set(cmd, -1);
  222. cmd->duplex = -1;
  223. }
  224. cmd->transceiver = XCVR_EXTERNAL;
  225. cmd->maxtxpkt = 0;
  226. cmd->maxrxpkt = 0;
  227. return 0;
  228. }
  229. static int
  230. bnad_set_settings(struct net_device *netdev, struct ethtool_cmd *cmd)
  231. {
  232. /* 10G full duplex setting supported only */
  233. if (cmd->autoneg == AUTONEG_ENABLE)
  234. return -EOPNOTSUPP; else {
  235. if ((ethtool_cmd_speed(cmd) == SPEED_10000)
  236. && (cmd->duplex == DUPLEX_FULL))
  237. return 0;
  238. }
  239. return -EOPNOTSUPP;
  240. }
  241. static void
  242. bnad_get_drvinfo(struct net_device *netdev, struct ethtool_drvinfo *drvinfo)
  243. {
  244. struct bnad *bnad = netdev_priv(netdev);
  245. struct bfa_ioc_attr *ioc_attr;
  246. unsigned long flags;
  247. strcpy(drvinfo->driver, BNAD_NAME);
  248. strcpy(drvinfo->version, BNAD_VERSION);
  249. ioc_attr = kzalloc(sizeof(*ioc_attr), GFP_KERNEL);
  250. if (ioc_attr) {
  251. spin_lock_irqsave(&bnad->bna_lock, flags);
  252. bfa_nw_ioc_get_attr(&bnad->bna.device.ioc, ioc_attr);
  253. spin_unlock_irqrestore(&bnad->bna_lock, flags);
  254. strncpy(drvinfo->fw_version, ioc_attr->adapter_attr.fw_ver,
  255. sizeof(drvinfo->fw_version) - 1);
  256. kfree(ioc_attr);
  257. }
  258. strncpy(drvinfo->bus_info, pci_name(bnad->pcidev), ETHTOOL_BUSINFO_LEN);
  259. }
  260. static int
  261. get_regs(struct bnad *bnad, u32 * regs)
  262. {
  263. int num = 0, i;
  264. u32 reg_addr;
  265. unsigned long flags;
  266. #define BNAD_GET_REG(addr) \
  267. do { \
  268. if (regs) \
  269. regs[num++] = readl(bnad->bar0 + (addr)); \
  270. else \
  271. num++; \
  272. } while (0)
  273. spin_lock_irqsave(&bnad->bna_lock, flags);
  274. /* DMA Block Internal Registers */
  275. BNAD_GET_REG(DMA_CTRL_REG0);
  276. BNAD_GET_REG(DMA_CTRL_REG1);
  277. BNAD_GET_REG(DMA_ERR_INT_STATUS);
  278. BNAD_GET_REG(DMA_ERR_INT_ENABLE);
  279. BNAD_GET_REG(DMA_ERR_INT_STATUS_SET);
  280. /* APP Block Register Address Offset from BAR0 */
  281. BNAD_GET_REG(HOSTFN0_INT_STATUS);
  282. BNAD_GET_REG(HOSTFN0_INT_MASK);
  283. BNAD_GET_REG(HOST_PAGE_NUM_FN0);
  284. BNAD_GET_REG(HOST_MSIX_ERR_INDEX_FN0);
  285. BNAD_GET_REG(FN0_PCIE_ERR_REG);
  286. BNAD_GET_REG(FN0_ERR_TYPE_STATUS_REG);
  287. BNAD_GET_REG(FN0_ERR_TYPE_MSK_STATUS_REG);
  288. BNAD_GET_REG(HOSTFN1_INT_STATUS);
  289. BNAD_GET_REG(HOSTFN1_INT_MASK);
  290. BNAD_GET_REG(HOST_PAGE_NUM_FN1);
  291. BNAD_GET_REG(HOST_MSIX_ERR_INDEX_FN1);
  292. BNAD_GET_REG(FN1_PCIE_ERR_REG);
  293. BNAD_GET_REG(FN1_ERR_TYPE_STATUS_REG);
  294. BNAD_GET_REG(FN1_ERR_TYPE_MSK_STATUS_REG);
  295. BNAD_GET_REG(PCIE_MISC_REG);
  296. BNAD_GET_REG(HOST_SEM0_INFO_REG);
  297. BNAD_GET_REG(HOST_SEM1_INFO_REG);
  298. BNAD_GET_REG(HOST_SEM2_INFO_REG);
  299. BNAD_GET_REG(HOST_SEM3_INFO_REG);
  300. BNAD_GET_REG(TEMPSENSE_CNTL_REG);
  301. BNAD_GET_REG(TEMPSENSE_STAT_REG);
  302. BNAD_GET_REG(APP_LOCAL_ERR_STAT);
  303. BNAD_GET_REG(APP_LOCAL_ERR_MSK);
  304. BNAD_GET_REG(PCIE_LNK_ERR_STAT);
  305. BNAD_GET_REG(PCIE_LNK_ERR_MSK);
  306. BNAD_GET_REG(FCOE_FIP_ETH_TYPE);
  307. BNAD_GET_REG(RESV_ETH_TYPE);
  308. BNAD_GET_REG(HOSTFN2_INT_STATUS);
  309. BNAD_GET_REG(HOSTFN2_INT_MASK);
  310. BNAD_GET_REG(HOST_PAGE_NUM_FN2);
  311. BNAD_GET_REG(HOST_MSIX_ERR_INDEX_FN2);
  312. BNAD_GET_REG(FN2_PCIE_ERR_REG);
  313. BNAD_GET_REG(FN2_ERR_TYPE_STATUS_REG);
  314. BNAD_GET_REG(FN2_ERR_TYPE_MSK_STATUS_REG);
  315. BNAD_GET_REG(HOSTFN3_INT_STATUS);
  316. BNAD_GET_REG(HOSTFN3_INT_MASK);
  317. BNAD_GET_REG(HOST_PAGE_NUM_FN3);
  318. BNAD_GET_REG(HOST_MSIX_ERR_INDEX_FN3);
  319. BNAD_GET_REG(FN3_PCIE_ERR_REG);
  320. BNAD_GET_REG(FN3_ERR_TYPE_STATUS_REG);
  321. BNAD_GET_REG(FN3_ERR_TYPE_MSK_STATUS_REG);
  322. /* Host Command Status Registers */
  323. reg_addr = HOST_CMDSTS0_CLR_REG;
  324. for (i = 0; i < 16; i++) {
  325. BNAD_GET_REG(reg_addr);
  326. BNAD_GET_REG(reg_addr + 4);
  327. BNAD_GET_REG(reg_addr + 8);
  328. reg_addr += 0x10;
  329. }
  330. /* Function ID register */
  331. BNAD_GET_REG(FNC_ID_REG);
  332. /* Function personality register */
  333. BNAD_GET_REG(FNC_PERS_REG);
  334. /* Operation mode register */
  335. BNAD_GET_REG(OP_MODE);
  336. /* LPU0 Registers */
  337. BNAD_GET_REG(LPU0_MBOX_CTL_REG);
  338. BNAD_GET_REG(LPU0_MBOX_CMD_REG);
  339. BNAD_GET_REG(LPU0_MBOX_LINK_0REG);
  340. BNAD_GET_REG(LPU1_MBOX_LINK_0REG);
  341. BNAD_GET_REG(LPU0_MBOX_STATUS_0REG);
  342. BNAD_GET_REG(LPU1_MBOX_STATUS_0REG);
  343. BNAD_GET_REG(LPU0_ERR_STATUS_REG);
  344. BNAD_GET_REG(LPU0_ERR_SET_REG);
  345. /* LPU1 Registers */
  346. BNAD_GET_REG(LPU1_MBOX_CTL_REG);
  347. BNAD_GET_REG(LPU1_MBOX_CMD_REG);
  348. BNAD_GET_REG(LPU0_MBOX_LINK_1REG);
  349. BNAD_GET_REG(LPU1_MBOX_LINK_1REG);
  350. BNAD_GET_REG(LPU0_MBOX_STATUS_1REG);
  351. BNAD_GET_REG(LPU1_MBOX_STATUS_1REG);
  352. BNAD_GET_REG(LPU1_ERR_STATUS_REG);
  353. BNAD_GET_REG(LPU1_ERR_SET_REG);
  354. /* PSS Registers */
  355. BNAD_GET_REG(PSS_CTL_REG);
  356. BNAD_GET_REG(PSS_ERR_STATUS_REG);
  357. BNAD_GET_REG(ERR_STATUS_SET);
  358. BNAD_GET_REG(PSS_RAM_ERR_STATUS_REG);
  359. /* Catapult CPQ Registers */
  360. BNAD_GET_REG(HOSTFN0_LPU0_MBOX0_CMD_STAT);
  361. BNAD_GET_REG(HOSTFN0_LPU1_MBOX0_CMD_STAT);
  362. BNAD_GET_REG(LPU0_HOSTFN0_MBOX0_CMD_STAT);
  363. BNAD_GET_REG(LPU1_HOSTFN0_MBOX0_CMD_STAT);
  364. BNAD_GET_REG(HOSTFN0_LPU0_MBOX1_CMD_STAT);
  365. BNAD_GET_REG(HOSTFN0_LPU1_MBOX1_CMD_STAT);
  366. BNAD_GET_REG(LPU0_HOSTFN0_MBOX1_CMD_STAT);
  367. BNAD_GET_REG(LPU1_HOSTFN0_MBOX1_CMD_STAT);
  368. BNAD_GET_REG(HOSTFN1_LPU0_MBOX0_CMD_STAT);
  369. BNAD_GET_REG(HOSTFN1_LPU1_MBOX0_CMD_STAT);
  370. BNAD_GET_REG(LPU0_HOSTFN1_MBOX0_CMD_STAT);
  371. BNAD_GET_REG(LPU1_HOSTFN1_MBOX0_CMD_STAT);
  372. BNAD_GET_REG(HOSTFN1_LPU0_MBOX1_CMD_STAT);
  373. BNAD_GET_REG(HOSTFN1_LPU1_MBOX1_CMD_STAT);
  374. BNAD_GET_REG(LPU0_HOSTFN1_MBOX1_CMD_STAT);
  375. BNAD_GET_REG(LPU1_HOSTFN1_MBOX1_CMD_STAT);
  376. BNAD_GET_REG(HOSTFN2_LPU0_MBOX0_CMD_STAT);
  377. BNAD_GET_REG(HOSTFN2_LPU1_MBOX0_CMD_STAT);
  378. BNAD_GET_REG(LPU0_HOSTFN2_MBOX0_CMD_STAT);
  379. BNAD_GET_REG(LPU1_HOSTFN2_MBOX0_CMD_STAT);
  380. BNAD_GET_REG(HOSTFN2_LPU0_MBOX1_CMD_STAT);
  381. BNAD_GET_REG(HOSTFN2_LPU1_MBOX1_CMD_STAT);
  382. BNAD_GET_REG(LPU0_HOSTFN2_MBOX1_CMD_STAT);
  383. BNAD_GET_REG(LPU1_HOSTFN2_MBOX1_CMD_STAT);
  384. BNAD_GET_REG(HOSTFN3_LPU0_MBOX0_CMD_STAT);
  385. BNAD_GET_REG(HOSTFN3_LPU1_MBOX0_CMD_STAT);
  386. BNAD_GET_REG(LPU0_HOSTFN3_MBOX0_CMD_STAT);
  387. BNAD_GET_REG(LPU1_HOSTFN3_MBOX0_CMD_STAT);
  388. BNAD_GET_REG(HOSTFN3_LPU0_MBOX1_CMD_STAT);
  389. BNAD_GET_REG(HOSTFN3_LPU1_MBOX1_CMD_STAT);
  390. BNAD_GET_REG(LPU0_HOSTFN3_MBOX1_CMD_STAT);
  391. BNAD_GET_REG(LPU1_HOSTFN3_MBOX1_CMD_STAT);
  392. /* Host Function Force Parity Error Registers */
  393. BNAD_GET_REG(HOSTFN0_LPU_FORCE_PERR);
  394. BNAD_GET_REG(HOSTFN1_LPU_FORCE_PERR);
  395. BNAD_GET_REG(HOSTFN2_LPU_FORCE_PERR);
  396. BNAD_GET_REG(HOSTFN3_LPU_FORCE_PERR);
  397. /* LL Port[0|1] Halt Mask Registers */
  398. BNAD_GET_REG(LL_HALT_MSK_P0);
  399. BNAD_GET_REG(LL_HALT_MSK_P1);
  400. /* LL Port[0|1] Error Mask Registers */
  401. BNAD_GET_REG(LL_ERR_MSK_P0);
  402. BNAD_GET_REG(LL_ERR_MSK_P1);
  403. /* EMC FLI Registers */
  404. BNAD_GET_REG(FLI_CMD_REG);
  405. BNAD_GET_REG(FLI_ADDR_REG);
  406. BNAD_GET_REG(FLI_CTL_REG);
  407. BNAD_GET_REG(FLI_WRDATA_REG);
  408. BNAD_GET_REG(FLI_RDDATA_REG);
  409. BNAD_GET_REG(FLI_DEV_STATUS_REG);
  410. BNAD_GET_REG(FLI_SIG_WD_REG);
  411. BNAD_GET_REG(FLI_DEV_VENDOR_REG);
  412. BNAD_GET_REG(FLI_ERR_STATUS_REG);
  413. /* RxAdm 0 Registers */
  414. BNAD_GET_REG(RAD0_CTL_REG);
  415. BNAD_GET_REG(RAD0_PE_PARM_REG);
  416. BNAD_GET_REG(RAD0_BCN_REG);
  417. BNAD_GET_REG(RAD0_DEFAULT_REG);
  418. BNAD_GET_REG(RAD0_PROMISC_REG);
  419. BNAD_GET_REG(RAD0_BCNQ_REG);
  420. BNAD_GET_REG(RAD0_DEFAULTQ_REG);
  421. BNAD_GET_REG(RAD0_ERR_STS);
  422. BNAD_GET_REG(RAD0_SET_ERR_STS);
  423. BNAD_GET_REG(RAD0_ERR_INT_EN);
  424. BNAD_GET_REG(RAD0_FIRST_ERR);
  425. BNAD_GET_REG(RAD0_FORCE_ERR);
  426. BNAD_GET_REG(RAD0_MAC_MAN_1H);
  427. BNAD_GET_REG(RAD0_MAC_MAN_1L);
  428. BNAD_GET_REG(RAD0_MAC_MAN_2H);
  429. BNAD_GET_REG(RAD0_MAC_MAN_2L);
  430. BNAD_GET_REG(RAD0_MAC_MAN_3H);
  431. BNAD_GET_REG(RAD0_MAC_MAN_3L);
  432. BNAD_GET_REG(RAD0_MAC_MAN_4H);
  433. BNAD_GET_REG(RAD0_MAC_MAN_4L);
  434. BNAD_GET_REG(RAD0_LAST4_IP);
  435. /* RxAdm 1 Registers */
  436. BNAD_GET_REG(RAD1_CTL_REG);
  437. BNAD_GET_REG(RAD1_PE_PARM_REG);
  438. BNAD_GET_REG(RAD1_BCN_REG);
  439. BNAD_GET_REG(RAD1_DEFAULT_REG);
  440. BNAD_GET_REG(RAD1_PROMISC_REG);
  441. BNAD_GET_REG(RAD1_BCNQ_REG);
  442. BNAD_GET_REG(RAD1_DEFAULTQ_REG);
  443. BNAD_GET_REG(RAD1_ERR_STS);
  444. BNAD_GET_REG(RAD1_SET_ERR_STS);
  445. BNAD_GET_REG(RAD1_ERR_INT_EN);
  446. /* TxA0 Registers */
  447. BNAD_GET_REG(TXA0_CTRL_REG);
  448. /* TxA0 TSO Sequence # Registers (RO) */
  449. for (i = 0; i < 8; i++) {
  450. BNAD_GET_REG(TXA0_TSO_TCP_SEQ_REG(i));
  451. BNAD_GET_REG(TXA0_TSO_IP_INFO_REG(i));
  452. }
  453. /* TxA1 Registers */
  454. BNAD_GET_REG(TXA1_CTRL_REG);
  455. /* TxA1 TSO Sequence # Registers (RO) */
  456. for (i = 0; i < 8; i++) {
  457. BNAD_GET_REG(TXA1_TSO_TCP_SEQ_REG(i));
  458. BNAD_GET_REG(TXA1_TSO_IP_INFO_REG(i));
  459. }
  460. /* RxA Registers */
  461. BNAD_GET_REG(RXA0_CTL_REG);
  462. BNAD_GET_REG(RXA1_CTL_REG);
  463. /* PLB0 Registers */
  464. BNAD_GET_REG(PLB0_ECM_TIMER_REG);
  465. BNAD_GET_REG(PLB0_RL_CTL);
  466. for (i = 0; i < 8; i++)
  467. BNAD_GET_REG(PLB0_RL_MAX_BC(i));
  468. BNAD_GET_REG(PLB0_RL_TU_PRIO);
  469. for (i = 0; i < 8; i++)
  470. BNAD_GET_REG(PLB0_RL_BYTE_CNT(i));
  471. BNAD_GET_REG(PLB0_RL_MIN_REG);
  472. BNAD_GET_REG(PLB0_RL_MAX_REG);
  473. BNAD_GET_REG(PLB0_EMS_ADD_REG);
  474. /* PLB1 Registers */
  475. BNAD_GET_REG(PLB1_ECM_TIMER_REG);
  476. BNAD_GET_REG(PLB1_RL_CTL);
  477. for (i = 0; i < 8; i++)
  478. BNAD_GET_REG(PLB1_RL_MAX_BC(i));
  479. BNAD_GET_REG(PLB1_RL_TU_PRIO);
  480. for (i = 0; i < 8; i++)
  481. BNAD_GET_REG(PLB1_RL_BYTE_CNT(i));
  482. BNAD_GET_REG(PLB1_RL_MIN_REG);
  483. BNAD_GET_REG(PLB1_RL_MAX_REG);
  484. BNAD_GET_REG(PLB1_EMS_ADD_REG);
  485. /* HQM Control Register */
  486. BNAD_GET_REG(HQM0_CTL_REG);
  487. BNAD_GET_REG(HQM0_RXQ_STOP_SEM);
  488. BNAD_GET_REG(HQM0_TXQ_STOP_SEM);
  489. BNAD_GET_REG(HQM1_CTL_REG);
  490. BNAD_GET_REG(HQM1_RXQ_STOP_SEM);
  491. BNAD_GET_REG(HQM1_TXQ_STOP_SEM);
  492. /* LUT Registers */
  493. BNAD_GET_REG(LUT0_ERR_STS);
  494. BNAD_GET_REG(LUT0_SET_ERR_STS);
  495. BNAD_GET_REG(LUT1_ERR_STS);
  496. BNAD_GET_REG(LUT1_SET_ERR_STS);
  497. /* TRC Registers */
  498. BNAD_GET_REG(TRC_CTL_REG);
  499. BNAD_GET_REG(TRC_MODS_REG);
  500. BNAD_GET_REG(TRC_TRGC_REG);
  501. BNAD_GET_REG(TRC_CNT1_REG);
  502. BNAD_GET_REG(TRC_CNT2_REG);
  503. BNAD_GET_REG(TRC_NXTS_REG);
  504. BNAD_GET_REG(TRC_DIRR_REG);
  505. for (i = 0; i < 10; i++)
  506. BNAD_GET_REG(TRC_TRGM_REG(i));
  507. for (i = 0; i < 10; i++)
  508. BNAD_GET_REG(TRC_NXTM_REG(i));
  509. for (i = 0; i < 10; i++)
  510. BNAD_GET_REG(TRC_STRM_REG(i));
  511. spin_unlock_irqrestore(&bnad->bna_lock, flags);
  512. #undef BNAD_GET_REG
  513. return num;
  514. }
  515. static int
  516. bnad_get_regs_len(struct net_device *netdev)
  517. {
  518. int ret = get_regs(netdev_priv(netdev), NULL) * sizeof(u32);
  519. return ret;
  520. }
  521. static void
  522. bnad_get_regs(struct net_device *netdev, struct ethtool_regs *regs, void *buf)
  523. {
  524. memset(buf, 0, bnad_get_regs_len(netdev));
  525. get_regs(netdev_priv(netdev), buf);
  526. }
  527. static void
  528. bnad_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wolinfo)
  529. {
  530. wolinfo->supported = 0;
  531. wolinfo->wolopts = 0;
  532. }
  533. static int
  534. bnad_get_coalesce(struct net_device *netdev, struct ethtool_coalesce *coalesce)
  535. {
  536. struct bnad *bnad = netdev_priv(netdev);
  537. unsigned long flags;
  538. /* Lock rqd. to access bnad->bna_lock */
  539. spin_lock_irqsave(&bnad->bna_lock, flags);
  540. coalesce->use_adaptive_rx_coalesce =
  541. (bnad->cfg_flags & BNAD_CF_DIM_ENABLED) ? true : false;
  542. spin_unlock_irqrestore(&bnad->bna_lock, flags);
  543. coalesce->rx_coalesce_usecs = bnad->rx_coalescing_timeo *
  544. BFI_COALESCING_TIMER_UNIT;
  545. coalesce->tx_coalesce_usecs = bnad->tx_coalescing_timeo *
  546. BFI_COALESCING_TIMER_UNIT;
  547. coalesce->tx_max_coalesced_frames = BFI_TX_INTERPKT_COUNT;
  548. return 0;
  549. }
  550. static int
  551. bnad_set_coalesce(struct net_device *netdev, struct ethtool_coalesce *coalesce)
  552. {
  553. struct bnad *bnad = netdev_priv(netdev);
  554. unsigned long flags;
  555. int dim_timer_del = 0;
  556. if (coalesce->rx_coalesce_usecs == 0 ||
  557. coalesce->rx_coalesce_usecs >
  558. BFI_MAX_COALESCING_TIMEO * BFI_COALESCING_TIMER_UNIT)
  559. return -EINVAL;
  560. if (coalesce->tx_coalesce_usecs == 0 ||
  561. coalesce->tx_coalesce_usecs >
  562. BFI_MAX_COALESCING_TIMEO * BFI_COALESCING_TIMER_UNIT)
  563. return -EINVAL;
  564. mutex_lock(&bnad->conf_mutex);
  565. /*
  566. * Do not need to store rx_coalesce_usecs here
  567. * Every time DIM is disabled, we can get it from the
  568. * stack.
  569. */
  570. spin_lock_irqsave(&bnad->bna_lock, flags);
  571. if (coalesce->use_adaptive_rx_coalesce) {
  572. if (!(bnad->cfg_flags & BNAD_CF_DIM_ENABLED)) {
  573. bnad->cfg_flags |= BNAD_CF_DIM_ENABLED;
  574. bnad_dim_timer_start(bnad);
  575. }
  576. } else {
  577. if (bnad->cfg_flags & BNAD_CF_DIM_ENABLED) {
  578. bnad->cfg_flags &= ~BNAD_CF_DIM_ENABLED;
  579. dim_timer_del = bnad_dim_timer_running(bnad);
  580. if (dim_timer_del) {
  581. clear_bit(BNAD_RF_DIM_TIMER_RUNNING,
  582. &bnad->run_flags);
  583. spin_unlock_irqrestore(&bnad->bna_lock, flags);
  584. del_timer_sync(&bnad->dim_timer);
  585. spin_lock_irqsave(&bnad->bna_lock, flags);
  586. }
  587. bnad_rx_coalescing_timeo_set(bnad);
  588. }
  589. }
  590. if (bnad->tx_coalescing_timeo != coalesce->tx_coalesce_usecs /
  591. BFI_COALESCING_TIMER_UNIT) {
  592. bnad->tx_coalescing_timeo = coalesce->tx_coalesce_usecs /
  593. BFI_COALESCING_TIMER_UNIT;
  594. bnad_tx_coalescing_timeo_set(bnad);
  595. }
  596. if (bnad->rx_coalescing_timeo != coalesce->rx_coalesce_usecs /
  597. BFI_COALESCING_TIMER_UNIT) {
  598. bnad->rx_coalescing_timeo = coalesce->rx_coalesce_usecs /
  599. BFI_COALESCING_TIMER_UNIT;
  600. if (!(bnad->cfg_flags & BNAD_CF_DIM_ENABLED))
  601. bnad_rx_coalescing_timeo_set(bnad);
  602. }
  603. /* Add Tx Inter-pkt DMA count? */
  604. spin_unlock_irqrestore(&bnad->bna_lock, flags);
  605. mutex_unlock(&bnad->conf_mutex);
  606. return 0;
  607. }
  608. static void
  609. bnad_get_ringparam(struct net_device *netdev,
  610. struct ethtool_ringparam *ringparam)
  611. {
  612. struct bnad *bnad = netdev_priv(netdev);
  613. ringparam->rx_max_pending = BNAD_MAX_Q_DEPTH / bnad_rxqs_per_cq;
  614. ringparam->rx_mini_max_pending = 0;
  615. ringparam->rx_jumbo_max_pending = 0;
  616. ringparam->tx_max_pending = BNAD_MAX_Q_DEPTH;
  617. ringparam->rx_pending = bnad->rxq_depth;
  618. ringparam->rx_mini_max_pending = 0;
  619. ringparam->rx_jumbo_max_pending = 0;
  620. ringparam->tx_pending = bnad->txq_depth;
  621. }
  622. static int
  623. bnad_set_ringparam(struct net_device *netdev,
  624. struct ethtool_ringparam *ringparam)
  625. {
  626. int i, current_err, err = 0;
  627. struct bnad *bnad = netdev_priv(netdev);
  628. mutex_lock(&bnad->conf_mutex);
  629. if (ringparam->rx_pending == bnad->rxq_depth &&
  630. ringparam->tx_pending == bnad->txq_depth) {
  631. mutex_unlock(&bnad->conf_mutex);
  632. return 0;
  633. }
  634. if (ringparam->rx_pending < BNAD_MIN_Q_DEPTH ||
  635. ringparam->rx_pending > BNAD_MAX_Q_DEPTH / bnad_rxqs_per_cq ||
  636. !BNA_POWER_OF_2(ringparam->rx_pending)) {
  637. mutex_unlock(&bnad->conf_mutex);
  638. return -EINVAL;
  639. }
  640. if (ringparam->tx_pending < BNAD_MIN_Q_DEPTH ||
  641. ringparam->tx_pending > BNAD_MAX_Q_DEPTH ||
  642. !BNA_POWER_OF_2(ringparam->tx_pending)) {
  643. mutex_unlock(&bnad->conf_mutex);
  644. return -EINVAL;
  645. }
  646. if (ringparam->rx_pending != bnad->rxq_depth) {
  647. bnad->rxq_depth = ringparam->rx_pending;
  648. for (i = 0; i < bnad->num_rx; i++) {
  649. if (!bnad->rx_info[i].rx)
  650. continue;
  651. bnad_cleanup_rx(bnad, i);
  652. current_err = bnad_setup_rx(bnad, i);
  653. if (current_err && !err)
  654. err = current_err;
  655. }
  656. }
  657. if (ringparam->tx_pending != bnad->txq_depth) {
  658. bnad->txq_depth = ringparam->tx_pending;
  659. for (i = 0; i < bnad->num_tx; i++) {
  660. if (!bnad->tx_info[i].tx)
  661. continue;
  662. bnad_cleanup_tx(bnad, i);
  663. current_err = bnad_setup_tx(bnad, i);
  664. if (current_err && !err)
  665. err = current_err;
  666. }
  667. }
  668. mutex_unlock(&bnad->conf_mutex);
  669. return err;
  670. }
  671. static void
  672. bnad_get_pauseparam(struct net_device *netdev,
  673. struct ethtool_pauseparam *pauseparam)
  674. {
  675. struct bnad *bnad = netdev_priv(netdev);
  676. pauseparam->autoneg = 0;
  677. pauseparam->rx_pause = bnad->bna.port.pause_config.rx_pause;
  678. pauseparam->tx_pause = bnad->bna.port.pause_config.tx_pause;
  679. }
  680. static int
  681. bnad_set_pauseparam(struct net_device *netdev,
  682. struct ethtool_pauseparam *pauseparam)
  683. {
  684. struct bnad *bnad = netdev_priv(netdev);
  685. struct bna_pause_config pause_config;
  686. unsigned long flags;
  687. if (pauseparam->autoneg == AUTONEG_ENABLE)
  688. return -EINVAL;
  689. mutex_lock(&bnad->conf_mutex);
  690. if (pauseparam->rx_pause != bnad->bna.port.pause_config.rx_pause ||
  691. pauseparam->tx_pause != bnad->bna.port.pause_config.tx_pause) {
  692. pause_config.rx_pause = pauseparam->rx_pause;
  693. pause_config.tx_pause = pauseparam->tx_pause;
  694. spin_lock_irqsave(&bnad->bna_lock, flags);
  695. bna_port_pause_config(&bnad->bna.port, &pause_config, NULL);
  696. spin_unlock_irqrestore(&bnad->bna_lock, flags);
  697. }
  698. mutex_unlock(&bnad->conf_mutex);
  699. return 0;
  700. }
  701. static void
  702. bnad_get_strings(struct net_device *netdev, u32 stringset, u8 * string)
  703. {
  704. struct bnad *bnad = netdev_priv(netdev);
  705. int i, j, q_num;
  706. u64 bmap;
  707. mutex_lock(&bnad->conf_mutex);
  708. switch (stringset) {
  709. case ETH_SS_STATS:
  710. for (i = 0; i < BNAD_ETHTOOL_STATS_NUM; i++) {
  711. BUG_ON(!(strlen(bnad_net_stats_strings[i]) <
  712. ETH_GSTRING_LEN));
  713. memcpy(string, bnad_net_stats_strings[i],
  714. ETH_GSTRING_LEN);
  715. string += ETH_GSTRING_LEN;
  716. }
  717. bmap = (u64)bnad->bna.tx_mod.txf_bmap[0] |
  718. ((u64)bnad->bna.tx_mod.txf_bmap[1] << 32);
  719. for (i = 0; bmap && (i < BFI_LL_TXF_ID_MAX); i++) {
  720. if (bmap & 1) {
  721. sprintf(string, "txf%d_ucast_octets", i);
  722. string += ETH_GSTRING_LEN;
  723. sprintf(string, "txf%d_ucast", i);
  724. string += ETH_GSTRING_LEN;
  725. sprintf(string, "txf%d_ucast_vlan", i);
  726. string += ETH_GSTRING_LEN;
  727. sprintf(string, "txf%d_mcast_octets", i);
  728. string += ETH_GSTRING_LEN;
  729. sprintf(string, "txf%d_mcast", i);
  730. string += ETH_GSTRING_LEN;
  731. sprintf(string, "txf%d_mcast_vlan", i);
  732. string += ETH_GSTRING_LEN;
  733. sprintf(string, "txf%d_bcast_octets", i);
  734. string += ETH_GSTRING_LEN;
  735. sprintf(string, "txf%d_bcast", i);
  736. string += ETH_GSTRING_LEN;
  737. sprintf(string, "txf%d_bcast_vlan", i);
  738. string += ETH_GSTRING_LEN;
  739. sprintf(string, "txf%d_errors", i);
  740. string += ETH_GSTRING_LEN;
  741. sprintf(string, "txf%d_filter_vlan", i);
  742. string += ETH_GSTRING_LEN;
  743. sprintf(string, "txf%d_filter_mac_sa", i);
  744. string += ETH_GSTRING_LEN;
  745. }
  746. bmap >>= 1;
  747. }
  748. bmap = (u64)bnad->bna.rx_mod.rxf_bmap[0] |
  749. ((u64)bnad->bna.rx_mod.rxf_bmap[1] << 32);
  750. for (i = 0; bmap && (i < BFI_LL_RXF_ID_MAX); i++) {
  751. if (bmap & 1) {
  752. sprintf(string, "rxf%d_ucast_octets", i);
  753. string += ETH_GSTRING_LEN;
  754. sprintf(string, "rxf%d_ucast", i);
  755. string += ETH_GSTRING_LEN;
  756. sprintf(string, "rxf%d_ucast_vlan", i);
  757. string += ETH_GSTRING_LEN;
  758. sprintf(string, "rxf%d_mcast_octets", i);
  759. string += ETH_GSTRING_LEN;
  760. sprintf(string, "rxf%d_mcast", i);
  761. string += ETH_GSTRING_LEN;
  762. sprintf(string, "rxf%d_mcast_vlan", i);
  763. string += ETH_GSTRING_LEN;
  764. sprintf(string, "rxf%d_bcast_octets", i);
  765. string += ETH_GSTRING_LEN;
  766. sprintf(string, "rxf%d_bcast", i);
  767. string += ETH_GSTRING_LEN;
  768. sprintf(string, "rxf%d_bcast_vlan", i);
  769. string += ETH_GSTRING_LEN;
  770. sprintf(string, "rxf%d_frame_drops", i);
  771. string += ETH_GSTRING_LEN;
  772. }
  773. bmap >>= 1;
  774. }
  775. q_num = 0;
  776. for (i = 0; i < bnad->num_rx; i++) {
  777. if (!bnad->rx_info[i].rx)
  778. continue;
  779. for (j = 0; j < bnad->num_rxp_per_rx; j++) {
  780. sprintf(string, "cq%d_producer_index", q_num);
  781. string += ETH_GSTRING_LEN;
  782. sprintf(string, "cq%d_consumer_index", q_num);
  783. string += ETH_GSTRING_LEN;
  784. sprintf(string, "cq%d_hw_producer_index",
  785. q_num);
  786. string += ETH_GSTRING_LEN;
  787. q_num++;
  788. }
  789. }
  790. q_num = 0;
  791. for (i = 0; i < bnad->num_rx; i++) {
  792. if (!bnad->rx_info[i].rx)
  793. continue;
  794. for (j = 0; j < bnad->num_rxp_per_rx; j++) {
  795. sprintf(string, "rxq%d_packets", q_num);
  796. string += ETH_GSTRING_LEN;
  797. sprintf(string, "rxq%d_bytes", q_num);
  798. string += ETH_GSTRING_LEN;
  799. sprintf(string, "rxq%d_packets_with_error",
  800. q_num);
  801. string += ETH_GSTRING_LEN;
  802. sprintf(string, "rxq%d_allocbuf_failed", q_num);
  803. string += ETH_GSTRING_LEN;
  804. sprintf(string, "rxq%d_producer_index", q_num);
  805. string += ETH_GSTRING_LEN;
  806. sprintf(string, "rxq%d_consumer_index", q_num);
  807. string += ETH_GSTRING_LEN;
  808. q_num++;
  809. if (bnad->rx_info[i].rx_ctrl[j].ccb &&
  810. bnad->rx_info[i].rx_ctrl[j].ccb->
  811. rcb[1] &&
  812. bnad->rx_info[i].rx_ctrl[j].ccb->
  813. rcb[1]->rxq) {
  814. sprintf(string, "rxq%d_packets", q_num);
  815. string += ETH_GSTRING_LEN;
  816. sprintf(string, "rxq%d_bytes", q_num);
  817. string += ETH_GSTRING_LEN;
  818. sprintf(string,
  819. "rxq%d_packets_with_error", q_num);
  820. string += ETH_GSTRING_LEN;
  821. sprintf(string, "rxq%d_allocbuf_failed",
  822. q_num);
  823. string += ETH_GSTRING_LEN;
  824. sprintf(string, "rxq%d_producer_index",
  825. q_num);
  826. string += ETH_GSTRING_LEN;
  827. sprintf(string, "rxq%d_consumer_index",
  828. q_num);
  829. string += ETH_GSTRING_LEN;
  830. q_num++;
  831. }
  832. }
  833. }
  834. q_num = 0;
  835. for (i = 0; i < bnad->num_tx; i++) {
  836. if (!bnad->tx_info[i].tx)
  837. continue;
  838. for (j = 0; j < bnad->num_txq_per_tx; j++) {
  839. sprintf(string, "txq%d_packets", q_num);
  840. string += ETH_GSTRING_LEN;
  841. sprintf(string, "txq%d_bytes", q_num);
  842. string += ETH_GSTRING_LEN;
  843. sprintf(string, "txq%d_producer_index", q_num);
  844. string += ETH_GSTRING_LEN;
  845. sprintf(string, "txq%d_consumer_index", q_num);
  846. string += ETH_GSTRING_LEN;
  847. sprintf(string, "txq%d_hw_consumer_index",
  848. q_num);
  849. string += ETH_GSTRING_LEN;
  850. q_num++;
  851. }
  852. }
  853. break;
  854. default:
  855. break;
  856. }
  857. mutex_unlock(&bnad->conf_mutex);
  858. }
  859. static int
  860. bnad_get_stats_count_locked(struct net_device *netdev)
  861. {
  862. struct bnad *bnad = netdev_priv(netdev);
  863. int i, j, count, rxf_active_num = 0, txf_active_num = 0;
  864. u64 bmap;
  865. bmap = (u64)bnad->bna.tx_mod.txf_bmap[0] |
  866. ((u64)bnad->bna.tx_mod.txf_bmap[1] << 32);
  867. for (i = 0; bmap && (i < BFI_LL_TXF_ID_MAX); i++) {
  868. if (bmap & 1)
  869. txf_active_num++;
  870. bmap >>= 1;
  871. }
  872. bmap = (u64)bnad->bna.rx_mod.rxf_bmap[0] |
  873. ((u64)bnad->bna.rx_mod.rxf_bmap[1] << 32);
  874. for (i = 0; bmap && (i < BFI_LL_RXF_ID_MAX); i++) {
  875. if (bmap & 1)
  876. rxf_active_num++;
  877. bmap >>= 1;
  878. }
  879. count = BNAD_ETHTOOL_STATS_NUM +
  880. txf_active_num * BNAD_NUM_TXF_COUNTERS +
  881. rxf_active_num * BNAD_NUM_RXF_COUNTERS;
  882. for (i = 0; i < bnad->num_rx; i++) {
  883. if (!bnad->rx_info[i].rx)
  884. continue;
  885. count += bnad->num_rxp_per_rx * BNAD_NUM_CQ_COUNTERS;
  886. count += bnad->num_rxp_per_rx * BNAD_NUM_RXQ_COUNTERS;
  887. for (j = 0; j < bnad->num_rxp_per_rx; j++)
  888. if (bnad->rx_info[i].rx_ctrl[j].ccb &&
  889. bnad->rx_info[i].rx_ctrl[j].ccb->rcb[1] &&
  890. bnad->rx_info[i].rx_ctrl[j].ccb->rcb[1]->rxq)
  891. count += BNAD_NUM_RXQ_COUNTERS;
  892. }
  893. for (i = 0; i < bnad->num_tx; i++) {
  894. if (!bnad->tx_info[i].tx)
  895. continue;
  896. count += bnad->num_txq_per_tx * BNAD_NUM_TXQ_COUNTERS;
  897. }
  898. return count;
  899. }
  900. static int
  901. bnad_per_q_stats_fill(struct bnad *bnad, u64 *buf, int bi)
  902. {
  903. int i, j;
  904. struct bna_rcb *rcb = NULL;
  905. struct bna_tcb *tcb = NULL;
  906. for (i = 0; i < bnad->num_rx; i++) {
  907. if (!bnad->rx_info[i].rx)
  908. continue;
  909. for (j = 0; j < bnad->num_rxp_per_rx; j++)
  910. if (bnad->rx_info[i].rx_ctrl[j].ccb &&
  911. bnad->rx_info[i].rx_ctrl[j].ccb->rcb[0] &&
  912. bnad->rx_info[i].rx_ctrl[j].ccb->rcb[0]->rxq) {
  913. buf[bi++] = bnad->rx_info[i].rx_ctrl[j].
  914. ccb->producer_index;
  915. buf[bi++] = 0; /* ccb->consumer_index */
  916. buf[bi++] = *(bnad->rx_info[i].rx_ctrl[j].
  917. ccb->hw_producer_index);
  918. }
  919. }
  920. for (i = 0; i < bnad->num_rx; i++) {
  921. if (!bnad->rx_info[i].rx)
  922. continue;
  923. for (j = 0; j < bnad->num_rxp_per_rx; j++)
  924. if (bnad->rx_info[i].rx_ctrl[j].ccb) {
  925. if (bnad->rx_info[i].rx_ctrl[j].ccb->rcb[0] &&
  926. bnad->rx_info[i].rx_ctrl[j].ccb->
  927. rcb[0]->rxq) {
  928. rcb = bnad->rx_info[i].rx_ctrl[j].
  929. ccb->rcb[0];
  930. buf[bi++] = rcb->rxq->rx_packets;
  931. buf[bi++] = rcb->rxq->rx_bytes;
  932. buf[bi++] = rcb->rxq->
  933. rx_packets_with_error;
  934. buf[bi++] = rcb->rxq->
  935. rxbuf_alloc_failed;
  936. buf[bi++] = rcb->producer_index;
  937. buf[bi++] = rcb->consumer_index;
  938. }
  939. if (bnad->rx_info[i].rx_ctrl[j].ccb->rcb[1] &&
  940. bnad->rx_info[i].rx_ctrl[j].ccb->
  941. rcb[1]->rxq) {
  942. rcb = bnad->rx_info[i].rx_ctrl[j].
  943. ccb->rcb[1];
  944. buf[bi++] = rcb->rxq->rx_packets;
  945. buf[bi++] = rcb->rxq->rx_bytes;
  946. buf[bi++] = rcb->rxq->
  947. rx_packets_with_error;
  948. buf[bi++] = rcb->rxq->
  949. rxbuf_alloc_failed;
  950. buf[bi++] = rcb->producer_index;
  951. buf[bi++] = rcb->consumer_index;
  952. }
  953. }
  954. }
  955. for (i = 0; i < bnad->num_tx; i++) {
  956. if (!bnad->tx_info[i].tx)
  957. continue;
  958. for (j = 0; j < bnad->num_txq_per_tx; j++)
  959. if (bnad->tx_info[i].tcb[j] &&
  960. bnad->tx_info[i].tcb[j]->txq) {
  961. tcb = bnad->tx_info[i].tcb[j];
  962. buf[bi++] = tcb->txq->tx_packets;
  963. buf[bi++] = tcb->txq->tx_bytes;
  964. buf[bi++] = tcb->producer_index;
  965. buf[bi++] = tcb->consumer_index;
  966. buf[bi++] = *(tcb->hw_consumer_index);
  967. }
  968. }
  969. return bi;
  970. }
  971. static void
  972. bnad_get_ethtool_stats(struct net_device *netdev, struct ethtool_stats *stats,
  973. u64 *buf)
  974. {
  975. struct bnad *bnad = netdev_priv(netdev);
  976. int i, j, bi;
  977. unsigned long flags;
  978. struct rtnl_link_stats64 *net_stats64;
  979. u64 *stats64;
  980. u64 bmap;
  981. mutex_lock(&bnad->conf_mutex);
  982. if (bnad_get_stats_count_locked(netdev) != stats->n_stats) {
  983. mutex_unlock(&bnad->conf_mutex);
  984. return;
  985. }
  986. /*
  987. * Used bna_lock to sync reads from bna_stats, which is written
  988. * under the same lock
  989. */
  990. spin_lock_irqsave(&bnad->bna_lock, flags);
  991. bi = 0;
  992. memset(buf, 0, stats->n_stats * sizeof(u64));
  993. net_stats64 = (struct rtnl_link_stats64 *)buf;
  994. bnad_netdev_qstats_fill(bnad, net_stats64);
  995. bnad_netdev_hwstats_fill(bnad, net_stats64);
  996. bi = sizeof(*net_stats64) / sizeof(u64);
  997. /* Get netif_queue_stopped from stack */
  998. bnad->stats.drv_stats.netif_queue_stopped = netif_queue_stopped(netdev);
  999. /* Fill driver stats into ethtool buffers */
  1000. stats64 = (u64 *)&bnad->stats.drv_stats;
  1001. for (i = 0; i < sizeof(struct bnad_drv_stats) / sizeof(u64); i++)
  1002. buf[bi++] = stats64[i];
  1003. /* Fill hardware stats excluding the rxf/txf into ethtool bufs */
  1004. stats64 = (u64 *) bnad->stats.bna_stats->hw_stats;
  1005. for (i = 0;
  1006. i < offsetof(struct bfi_ll_stats, rxf_stats[0]) / sizeof(u64);
  1007. i++)
  1008. buf[bi++] = stats64[i];
  1009. /* Fill txf stats into ethtool buffers */
  1010. bmap = (u64)bnad->bna.tx_mod.txf_bmap[0] |
  1011. ((u64)bnad->bna.tx_mod.txf_bmap[1] << 32);
  1012. for (i = 0; bmap && (i < BFI_LL_TXF_ID_MAX); i++) {
  1013. if (bmap & 1) {
  1014. stats64 = (u64 *)&bnad->stats.bna_stats->
  1015. hw_stats->txf_stats[i];
  1016. for (j = 0; j < sizeof(struct bfi_ll_stats_txf) /
  1017. sizeof(u64); j++)
  1018. buf[bi++] = stats64[j];
  1019. }
  1020. bmap >>= 1;
  1021. }
  1022. /* Fill rxf stats into ethtool buffers */
  1023. bmap = (u64)bnad->bna.rx_mod.rxf_bmap[0] |
  1024. ((u64)bnad->bna.rx_mod.rxf_bmap[1] << 32);
  1025. for (i = 0; bmap && (i < BFI_LL_RXF_ID_MAX); i++) {
  1026. if (bmap & 1) {
  1027. stats64 = (u64 *)&bnad->stats.bna_stats->
  1028. hw_stats->rxf_stats[i];
  1029. for (j = 0; j < sizeof(struct bfi_ll_stats_rxf) /
  1030. sizeof(u64); j++)
  1031. buf[bi++] = stats64[j];
  1032. }
  1033. bmap >>= 1;
  1034. }
  1035. /* Fill per Q stats into ethtool buffers */
  1036. bi = bnad_per_q_stats_fill(bnad, buf, bi);
  1037. spin_unlock_irqrestore(&bnad->bna_lock, flags);
  1038. mutex_unlock(&bnad->conf_mutex);
  1039. }
  1040. static int
  1041. bnad_get_sset_count(struct net_device *netdev, int sset)
  1042. {
  1043. switch (sset) {
  1044. case ETH_SS_STATS:
  1045. return bnad_get_stats_count_locked(netdev);
  1046. default:
  1047. return -EOPNOTSUPP;
  1048. }
  1049. }
  1050. static struct ethtool_ops bnad_ethtool_ops = {
  1051. .get_settings = bnad_get_settings,
  1052. .set_settings = bnad_set_settings,
  1053. .get_drvinfo = bnad_get_drvinfo,
  1054. .get_regs_len = bnad_get_regs_len,
  1055. .get_regs = bnad_get_regs,
  1056. .get_wol = bnad_get_wol,
  1057. .get_link = ethtool_op_get_link,
  1058. .get_coalesce = bnad_get_coalesce,
  1059. .set_coalesce = bnad_set_coalesce,
  1060. .get_ringparam = bnad_get_ringparam,
  1061. .set_ringparam = bnad_set_ringparam,
  1062. .get_pauseparam = bnad_get_pauseparam,
  1063. .set_pauseparam = bnad_set_pauseparam,
  1064. .get_strings = bnad_get_strings,
  1065. .get_ethtool_stats = bnad_get_ethtool_stats,
  1066. .get_sset_count = bnad_get_sset_count
  1067. };
  1068. void
  1069. bnad_set_ethtool_ops(struct net_device *netdev)
  1070. {
  1071. SET_ETHTOOL_OPS(netdev, &bnad_ethtool_ops);
  1072. }