be.h 13 KB

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  1. /*
  2. * Copyright (C) 2005 - 2011 Emulex
  3. * All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License version 2
  7. * as published by the Free Software Foundation. The full GNU General
  8. * Public License is included in this distribution in the file called COPYING.
  9. *
  10. * Contact Information:
  11. * linux-drivers@emulex.com
  12. *
  13. * Emulex
  14. * 3333 Susan Street
  15. * Costa Mesa, CA 92626
  16. */
  17. #ifndef BE_H
  18. #define BE_H
  19. #include <linux/pci.h>
  20. #include <linux/etherdevice.h>
  21. #include <linux/delay.h>
  22. #include <net/tcp.h>
  23. #include <net/ip.h>
  24. #include <net/ipv6.h>
  25. #include <linux/if_vlan.h>
  26. #include <linux/workqueue.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/firmware.h>
  29. #include <linux/slab.h>
  30. #include "be_hw.h"
  31. #define DRV_VER "4.0.100u"
  32. #define DRV_NAME "be2net"
  33. #define BE_NAME "ServerEngines BladeEngine2 10Gbps NIC"
  34. #define BE3_NAME "ServerEngines BladeEngine3 10Gbps NIC"
  35. #define OC_NAME "Emulex OneConnect 10Gbps NIC"
  36. #define OC_NAME_BE OC_NAME "(be3)"
  37. #define OC_NAME_LANCER OC_NAME "(Lancer)"
  38. #define DRV_DESC "ServerEngines BladeEngine 10Gbps NIC Driver"
  39. #define BE_VENDOR_ID 0x19a2
  40. #define EMULEX_VENDOR_ID 0x10df
  41. #define BE_DEVICE_ID1 0x211
  42. #define BE_DEVICE_ID2 0x221
  43. #define OC_DEVICE_ID1 0x700 /* Device Id for BE2 cards */
  44. #define OC_DEVICE_ID2 0x710 /* Device Id for BE3 cards */
  45. #define OC_DEVICE_ID3 0xe220 /* Device id for Lancer cards */
  46. #define OC_DEVICE_ID4 0xe228 /* Device id for VF in Lancer */
  47. static inline char *nic_name(struct pci_dev *pdev)
  48. {
  49. switch (pdev->device) {
  50. case OC_DEVICE_ID1:
  51. return OC_NAME;
  52. case OC_DEVICE_ID2:
  53. return OC_NAME_BE;
  54. case OC_DEVICE_ID3:
  55. case OC_DEVICE_ID4:
  56. return OC_NAME_LANCER;
  57. case BE_DEVICE_ID2:
  58. return BE3_NAME;
  59. default:
  60. return BE_NAME;
  61. }
  62. }
  63. /* Number of bytes of an RX frame that are copied to skb->data */
  64. #define BE_HDR_LEN ((u16) 64)
  65. #define BE_MAX_JUMBO_FRAME_SIZE 9018
  66. #define BE_MIN_MTU 256
  67. #define BE_NUM_VLANS_SUPPORTED 64
  68. #define BE_MAX_EQD 96
  69. #define BE_MAX_TX_FRAG_COUNT 30
  70. #define EVNT_Q_LEN 1024
  71. #define TX_Q_LEN 2048
  72. #define TX_CQ_LEN 1024
  73. #define RX_Q_LEN 1024 /* Does not support any other value */
  74. #define RX_CQ_LEN 1024
  75. #define MCC_Q_LEN 128 /* total size not to exceed 8 pages */
  76. #define MCC_CQ_LEN 256
  77. #define MAX_RSS_QS 4 /* BE limit is 4 queues/port */
  78. #define MAX_RX_QS (MAX_RSS_QS + 1) /* RSS qs + 1 def Rx */
  79. #define MAX_TX_QS 8
  80. #define BE_MAX_MSIX_VECTORS (MAX_RX_QS + 1)/* RX + TX */
  81. #define BE_NAPI_WEIGHT 64
  82. #define MAX_RX_POST BE_NAPI_WEIGHT /* Frags posted at a time */
  83. #define RX_FRAGS_REFILL_WM (RX_Q_LEN - MAX_RX_POST)
  84. #define FW_VER_LEN 32
  85. struct be_dma_mem {
  86. void *va;
  87. dma_addr_t dma;
  88. u32 size;
  89. };
  90. struct be_queue_info {
  91. struct be_dma_mem dma_mem;
  92. u16 len;
  93. u16 entry_size; /* Size of an element in the queue */
  94. u16 id;
  95. u16 tail, head;
  96. bool created;
  97. atomic_t used; /* Number of valid elements in the queue */
  98. };
  99. static inline u32 MODULO(u16 val, u16 limit)
  100. {
  101. BUG_ON(limit & (limit - 1));
  102. return val & (limit - 1);
  103. }
  104. static inline void index_adv(u16 *index, u16 val, u16 limit)
  105. {
  106. *index = MODULO((*index + val), limit);
  107. }
  108. static inline void index_inc(u16 *index, u16 limit)
  109. {
  110. *index = MODULO((*index + 1), limit);
  111. }
  112. static inline void *queue_head_node(struct be_queue_info *q)
  113. {
  114. return q->dma_mem.va + q->head * q->entry_size;
  115. }
  116. static inline void *queue_tail_node(struct be_queue_info *q)
  117. {
  118. return q->dma_mem.va + q->tail * q->entry_size;
  119. }
  120. static inline void queue_head_inc(struct be_queue_info *q)
  121. {
  122. index_inc(&q->head, q->len);
  123. }
  124. static inline void queue_tail_inc(struct be_queue_info *q)
  125. {
  126. index_inc(&q->tail, q->len);
  127. }
  128. struct be_eq_obj {
  129. struct be_queue_info q;
  130. char desc[32];
  131. /* Adaptive interrupt coalescing (AIC) info */
  132. bool enable_aic;
  133. u16 min_eqd; /* in usecs */
  134. u16 max_eqd; /* in usecs */
  135. u16 cur_eqd; /* in usecs */
  136. u8 eq_idx;
  137. struct napi_struct napi;
  138. };
  139. struct be_mcc_obj {
  140. struct be_queue_info q;
  141. struct be_queue_info cq;
  142. bool rearm_cq;
  143. };
  144. struct be_tx_stats {
  145. u32 be_tx_reqs; /* number of TX requests initiated */
  146. u32 be_tx_stops; /* number of times TX Q was stopped */
  147. u32 be_tx_wrbs; /* number of tx WRBs used */
  148. u32 be_tx_compl; /* number of tx completion entries processed */
  149. ulong be_tx_jiffies;
  150. u64 be_tx_bytes;
  151. u64 be_tx_bytes_prev;
  152. u64 be_tx_pkts;
  153. u32 be_tx_rate;
  154. };
  155. struct be_tx_obj {
  156. struct be_queue_info q;
  157. struct be_queue_info cq;
  158. /* Remember the skbs that were transmitted */
  159. struct sk_buff *sent_skb_list[TX_Q_LEN];
  160. struct be_tx_stats stats;
  161. };
  162. /* Struct to remember the pages posted for rx frags */
  163. struct be_rx_page_info {
  164. struct page *page;
  165. DEFINE_DMA_UNMAP_ADDR(bus);
  166. u16 page_offset;
  167. bool last_page_user;
  168. };
  169. struct be_rx_stats {
  170. u32 rx_post_fail;/* number of ethrx buffer alloc failures */
  171. u32 rx_polls; /* number of times NAPI called poll function */
  172. u32 rx_events; /* number of ucast rx completion events */
  173. u32 rx_compl; /* number of rx completion entries processed */
  174. ulong rx_dropped; /* number of skb allocation errors */
  175. ulong rx_jiffies;
  176. u64 rx_bytes;
  177. u64 rx_bytes_prev;
  178. u64 rx_pkts;
  179. u32 rx_rate;
  180. u32 rx_mcast_pkts;
  181. u32 rxcp_err; /* Num rx completion entries w/ err set. */
  182. ulong rx_fps_jiffies; /* jiffies at last FPS calc */
  183. u32 rx_frags;
  184. u32 prev_rx_frags;
  185. u32 rx_fps; /* Rx frags per second */
  186. };
  187. struct be_rx_compl_info {
  188. u32 rss_hash;
  189. u16 vlan_tag;
  190. u16 pkt_size;
  191. u16 rxq_idx;
  192. u16 mac_id;
  193. u8 vlanf;
  194. u8 num_rcvd;
  195. u8 err;
  196. u8 ipf;
  197. u8 tcpf;
  198. u8 udpf;
  199. u8 ip_csum;
  200. u8 l4_csum;
  201. u8 ipv6;
  202. u8 vtm;
  203. u8 pkt_type;
  204. };
  205. struct be_rx_obj {
  206. struct be_adapter *adapter;
  207. struct be_queue_info q;
  208. struct be_queue_info cq;
  209. struct be_rx_compl_info rxcp;
  210. struct be_rx_page_info page_info_tbl[RX_Q_LEN];
  211. struct be_eq_obj rx_eq;
  212. struct be_rx_stats stats;
  213. u8 rss_id;
  214. bool rx_post_starved; /* Zero rx frags have been posted to BE */
  215. u32 cache_line_barrier[16];
  216. };
  217. struct be_drv_stats {
  218. u8 be_on_die_temperature;
  219. u64 be_tx_events;
  220. u64 eth_red_drops;
  221. u64 rx_drops_no_pbuf;
  222. u64 rx_drops_no_txpb;
  223. u64 rx_drops_no_erx_descr;
  224. u64 rx_drops_no_tpre_descr;
  225. u64 rx_drops_too_many_frags;
  226. u64 rx_drops_invalid_ring;
  227. u64 forwarded_packets;
  228. u64 rx_drops_mtu;
  229. u64 rx_crc_errors;
  230. u64 rx_alignment_symbol_errors;
  231. u64 rx_pause_frames;
  232. u64 rx_priority_pause_frames;
  233. u64 rx_control_frames;
  234. u64 rx_in_range_errors;
  235. u64 rx_out_range_errors;
  236. u64 rx_frame_too_long;
  237. u64 rx_address_match_errors;
  238. u64 rx_dropped_too_small;
  239. u64 rx_dropped_too_short;
  240. u64 rx_dropped_header_too_small;
  241. u64 rx_dropped_tcp_length;
  242. u64 rx_dropped_runt;
  243. u64 rx_ip_checksum_errs;
  244. u64 rx_tcp_checksum_errs;
  245. u64 rx_udp_checksum_errs;
  246. u64 rx_switched_unicast_packets;
  247. u64 rx_switched_multicast_packets;
  248. u64 rx_switched_broadcast_packets;
  249. u64 tx_pauseframes;
  250. u64 tx_priority_pauseframes;
  251. u64 tx_controlframes;
  252. u64 rxpp_fifo_overflow_drop;
  253. u64 rx_input_fifo_overflow_drop;
  254. u64 pmem_fifo_overflow_drop;
  255. u64 jabber_events;
  256. };
  257. struct be_vf_cfg {
  258. unsigned char vf_mac_addr[ETH_ALEN];
  259. u32 vf_if_handle;
  260. u32 vf_pmac_id;
  261. u16 vf_vlan_tag;
  262. u32 vf_tx_rate;
  263. };
  264. #define BE_INVALID_PMAC_ID 0xffffffff
  265. struct be_adapter {
  266. struct pci_dev *pdev;
  267. struct net_device *netdev;
  268. u8 __iomem *csr;
  269. u8 __iomem *db; /* Door Bell */
  270. u8 __iomem *pcicfg; /* PCI config space */
  271. struct mutex mbox_lock; /* For serializing mbox cmds to BE card */
  272. struct be_dma_mem mbox_mem;
  273. /* Mbox mem is adjusted to align to 16 bytes. The allocated addr
  274. * is stored for freeing purpose */
  275. struct be_dma_mem mbox_mem_alloced;
  276. struct be_mcc_obj mcc_obj;
  277. spinlock_t mcc_lock; /* For serializing mcc cmds to BE card */
  278. spinlock_t mcc_cq_lock;
  279. struct msix_entry msix_entries[BE_MAX_MSIX_VECTORS];
  280. u32 num_msix_vec;
  281. bool isr_registered;
  282. /* TX Rings */
  283. struct be_eq_obj tx_eq;
  284. struct be_tx_obj tx_obj[MAX_TX_QS];
  285. u8 num_tx_qs;
  286. u32 cache_line_break[8];
  287. /* Rx rings */
  288. struct be_rx_obj rx_obj[MAX_RX_QS];
  289. u32 num_rx_qs;
  290. u32 big_page_size; /* Compounded page size shared by rx wrbs */
  291. u8 eq_next_idx;
  292. struct be_drv_stats drv_stats;
  293. u16 vlans_added;
  294. u16 max_vlans; /* Number of vlans supported */
  295. u8 vlan_tag[VLAN_N_VID];
  296. u8 vlan_prio_bmap; /* Available Priority BitMap */
  297. u16 recommended_prio; /* Recommended Priority */
  298. struct be_dma_mem mc_cmd_mem;
  299. struct be_dma_mem stats_cmd;
  300. /* Work queue used to perform periodic tasks like getting statistics */
  301. struct delayed_work work;
  302. u16 work_counter;
  303. /* Ethtool knobs and info */
  304. char fw_ver[FW_VER_LEN];
  305. u32 if_handle; /* Used to configure filtering */
  306. u32 pmac_id; /* MAC addr handle used by BE card */
  307. u32 beacon_state; /* for set_phys_id */
  308. bool eeh_err;
  309. bool link_up;
  310. u32 port_num;
  311. bool promiscuous;
  312. bool wol;
  313. u32 function_mode;
  314. u32 function_caps;
  315. u32 rx_fc; /* Rx flow control */
  316. u32 tx_fc; /* Tx flow control */
  317. bool ue_detected;
  318. bool stats_cmd_sent;
  319. int link_speed;
  320. u8 port_type;
  321. u8 transceiver;
  322. u8 autoneg;
  323. u8 generation; /* BladeEngine ASIC generation */
  324. u32 flash_status;
  325. struct completion flash_compl;
  326. bool be3_native;
  327. bool sriov_enabled;
  328. struct be_vf_cfg *vf_cfg;
  329. u8 is_virtfn;
  330. u32 sli_family;
  331. u8 hba_port_num;
  332. u16 pvid;
  333. };
  334. #define be_physfn(adapter) (!adapter->is_virtfn)
  335. /* BladeEngine Generation numbers */
  336. #define BE_GEN2 2
  337. #define BE_GEN3 3
  338. #define lancer_chip(adapter) ((adapter->pdev->device == OC_DEVICE_ID3) || \
  339. (adapter->pdev->device == OC_DEVICE_ID4))
  340. extern const struct ethtool_ops be_ethtool_ops;
  341. #define msix_enabled(adapter) (adapter->num_msix_vec > 0)
  342. #define tx_stats(txo) (&txo->stats)
  343. #define rx_stats(rxo) (&rxo->stats)
  344. #define BE_SET_NETDEV_OPS(netdev, ops) (netdev->netdev_ops = ops)
  345. #define for_all_rx_queues(adapter, rxo, i) \
  346. for (i = 0, rxo = &adapter->rx_obj[i]; i < adapter->num_rx_qs; \
  347. i++, rxo++)
  348. /* Just skip the first default non-rss queue */
  349. #define for_all_rss_queues(adapter, rxo, i) \
  350. for (i = 0, rxo = &adapter->rx_obj[i+1]; i < (adapter->num_rx_qs - 1);\
  351. i++, rxo++)
  352. #define for_all_tx_queues(adapter, txo, i) \
  353. for (i = 0, txo = &adapter->tx_obj[i]; i < adapter->num_tx_qs; \
  354. i++, txo++)
  355. #define PAGE_SHIFT_4K 12
  356. #define PAGE_SIZE_4K (1 << PAGE_SHIFT_4K)
  357. /* Returns number of pages spanned by the data starting at the given addr */
  358. #define PAGES_4K_SPANNED(_address, size) \
  359. ((u32)((((size_t)(_address) & (PAGE_SIZE_4K - 1)) + \
  360. (size) + (PAGE_SIZE_4K - 1)) >> PAGE_SHIFT_4K))
  361. /* Byte offset into the page corresponding to given address */
  362. #define OFFSET_IN_PAGE(addr) \
  363. ((size_t)(addr) & (PAGE_SIZE_4K-1))
  364. /* Returns bit offset within a DWORD of a bitfield */
  365. #define AMAP_BIT_OFFSET(_struct, field) \
  366. (((size_t)&(((_struct *)0)->field))%32)
  367. /* Returns the bit mask of the field that is NOT shifted into location. */
  368. static inline u32 amap_mask(u32 bitsize)
  369. {
  370. return (bitsize == 32 ? 0xFFFFFFFF : (1 << bitsize) - 1);
  371. }
  372. static inline void
  373. amap_set(void *ptr, u32 dw_offset, u32 mask, u32 offset, u32 value)
  374. {
  375. u32 *dw = (u32 *) ptr + dw_offset;
  376. *dw &= ~(mask << offset);
  377. *dw |= (mask & value) << offset;
  378. }
  379. #define AMAP_SET_BITS(_struct, field, ptr, val) \
  380. amap_set(ptr, \
  381. offsetof(_struct, field)/32, \
  382. amap_mask(sizeof(((_struct *)0)->field)), \
  383. AMAP_BIT_OFFSET(_struct, field), \
  384. val)
  385. static inline u32 amap_get(void *ptr, u32 dw_offset, u32 mask, u32 offset)
  386. {
  387. u32 *dw = (u32 *) ptr;
  388. return mask & (*(dw + dw_offset) >> offset);
  389. }
  390. #define AMAP_GET_BITS(_struct, field, ptr) \
  391. amap_get(ptr, \
  392. offsetof(_struct, field)/32, \
  393. amap_mask(sizeof(((_struct *)0)->field)), \
  394. AMAP_BIT_OFFSET(_struct, field))
  395. #define be_dws_cpu_to_le(wrb, len) swap_dws(wrb, len)
  396. #define be_dws_le_to_cpu(wrb, len) swap_dws(wrb, len)
  397. static inline void swap_dws(void *wrb, int len)
  398. {
  399. #ifdef __BIG_ENDIAN
  400. u32 *dw = wrb;
  401. BUG_ON(len % 4);
  402. do {
  403. *dw = cpu_to_le32(*dw);
  404. dw++;
  405. len -= 4;
  406. } while (len);
  407. #endif /* __BIG_ENDIAN */
  408. }
  409. static inline u8 is_tcp_pkt(struct sk_buff *skb)
  410. {
  411. u8 val = 0;
  412. if (ip_hdr(skb)->version == 4)
  413. val = (ip_hdr(skb)->protocol == IPPROTO_TCP);
  414. else if (ip_hdr(skb)->version == 6)
  415. val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_TCP);
  416. return val;
  417. }
  418. static inline u8 is_udp_pkt(struct sk_buff *skb)
  419. {
  420. u8 val = 0;
  421. if (ip_hdr(skb)->version == 4)
  422. val = (ip_hdr(skb)->protocol == IPPROTO_UDP);
  423. else if (ip_hdr(skb)->version == 6)
  424. val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_UDP);
  425. return val;
  426. }
  427. static inline void be_check_sriov_fn_type(struct be_adapter *adapter)
  428. {
  429. u32 sli_intf;
  430. pci_read_config_dword(adapter->pdev, SLI_INTF_REG_OFFSET, &sli_intf);
  431. adapter->is_virtfn = (sli_intf & SLI_INTF_FT_MASK) ? 1 : 0;
  432. }
  433. static inline void be_vf_eth_addr_generate(struct be_adapter *adapter, u8 *mac)
  434. {
  435. u32 addr;
  436. addr = jhash(adapter->netdev->dev_addr, ETH_ALEN, 0);
  437. mac[5] = (u8)(addr & 0xFF);
  438. mac[4] = (u8)((addr >> 8) & 0xFF);
  439. mac[3] = (u8)((addr >> 16) & 0xFF);
  440. /* Use the OUI from the current MAC address */
  441. memcpy(mac, adapter->netdev->dev_addr, 3);
  442. }
  443. static inline bool be_multi_rxq(const struct be_adapter *adapter)
  444. {
  445. return adapter->num_rx_qs > 1;
  446. }
  447. extern void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm,
  448. u16 num_popped);
  449. extern void be_link_status_update(struct be_adapter *adapter, bool link_up);
  450. extern void netdev_stats_update(struct be_adapter *adapter);
  451. extern void be_parse_stats(struct be_adapter *adapter);
  452. extern int be_load_fw(struct be_adapter *adapter, u8 *func);
  453. #endif /* BE_H */