ether3.c 24 KB

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  1. /*
  2. * linux/drivers/acorn/net/ether3.c
  3. *
  4. * Copyright (C) 1995-2000 Russell King
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. * SEEQ nq8005 ethernet driver for Acorn/ANT Ether3 card
  11. * for Acorn machines
  12. *
  13. * By Russell King, with some suggestions from borris@ant.co.uk
  14. *
  15. * Changelog:
  16. * 1.04 RMK 29/02/1996 Won't pass packets that are from our ethernet
  17. * address up to the higher levels - they're
  18. * silently ignored. I/F can now be put into
  19. * multicast mode. Receiver routine optimised.
  20. * 1.05 RMK 30/02/1996 Now claims interrupt at open when part of
  21. * the kernel rather than when a module.
  22. * 1.06 RMK 02/03/1996 Various code cleanups
  23. * 1.07 RMK 13/10/1996 Optimised interrupt routine and transmit
  24. * routines.
  25. * 1.08 RMK 14/10/1996 Fixed problem with too many packets,
  26. * prevented the kernel message about dropped
  27. * packets appearing too many times a second.
  28. * Now does not disable all IRQs, only the IRQ
  29. * used by this card.
  30. * 1.09 RMK 10/11/1996 Only enables TX irq when buffer space is low,
  31. * but we still service the TX queue if we get a
  32. * RX interrupt.
  33. * 1.10 RMK 15/07/1997 Fixed autoprobing of NQ8004.
  34. * 1.11 RMK 16/11/1997 Fixed autoprobing of NQ8005A.
  35. * 1.12 RMK 31/12/1997 Removed reference to dev_tint for Linux 2.1.
  36. * RMK 27/06/1998 Changed asm/delay.h to linux/delay.h.
  37. * 1.13 RMK 29/06/1998 Fixed problem with transmission of packets.
  38. * Chip seems to have a bug in, whereby if the
  39. * packet starts two bytes from the end of the
  40. * buffer, it corrupts the receiver chain, and
  41. * never updates the transmit status correctly.
  42. * 1.14 RMK 07/01/1998 Added initial code for ETHERB addressing.
  43. * 1.15 RMK 30/04/1999 More fixes to the transmit routine for buggy
  44. * hardware.
  45. * 1.16 RMK 10/02/2000 Updated for 2.3.43
  46. * 1.17 RMK 13/05/2000 Updated for 2.3.99-pre8
  47. */
  48. #include <linux/module.h>
  49. #include <linux/kernel.h>
  50. #include <linux/types.h>
  51. #include <linux/fcntl.h>
  52. #include <linux/interrupt.h>
  53. #include <linux/ioport.h>
  54. #include <linux/in.h>
  55. #include <linux/slab.h>
  56. #include <linux/string.h>
  57. #include <linux/errno.h>
  58. #include <linux/netdevice.h>
  59. #include <linux/etherdevice.h>
  60. #include <linux/skbuff.h>
  61. #include <linux/device.h>
  62. #include <linux/init.h>
  63. #include <linux/delay.h>
  64. #include <linux/bitops.h>
  65. #include <asm/system.h>
  66. #include <asm/ecard.h>
  67. #include <asm/io.h>
  68. static char version[] __devinitdata = "ether3 ethernet driver (c) 1995-2000 R.M.King v1.17\n";
  69. #include "ether3.h"
  70. static unsigned int net_debug = NET_DEBUG;
  71. static void ether3_setmulticastlist(struct net_device *dev);
  72. static int ether3_rx(struct net_device *dev, unsigned int maxcnt);
  73. static void ether3_tx(struct net_device *dev);
  74. static int ether3_open (struct net_device *dev);
  75. static int ether3_sendpacket (struct sk_buff *skb, struct net_device *dev);
  76. static irqreturn_t ether3_interrupt (int irq, void *dev_id);
  77. static int ether3_close (struct net_device *dev);
  78. static void ether3_setmulticastlist (struct net_device *dev);
  79. static void ether3_timeout(struct net_device *dev);
  80. #define BUS_16 2
  81. #define BUS_8 1
  82. #define BUS_UNKNOWN 0
  83. /* --------------------------------------------------------------------------- */
  84. typedef enum {
  85. buffer_write,
  86. buffer_read
  87. } buffer_rw_t;
  88. /*
  89. * ether3 read/write. Slow things down a bit...
  90. * The SEEQ8005 doesn't like us writing to its registers
  91. * too quickly.
  92. */
  93. static inline void ether3_outb(int v, const void __iomem *r)
  94. {
  95. writeb(v, r);
  96. udelay(1);
  97. }
  98. static inline void ether3_outw(int v, const void __iomem *r)
  99. {
  100. writew(v, r);
  101. udelay(1);
  102. }
  103. #define ether3_inb(r) ({ unsigned int __v = readb((r)); udelay(1); __v; })
  104. #define ether3_inw(r) ({ unsigned int __v = readw((r)); udelay(1); __v; })
  105. static int
  106. ether3_setbuffer(struct net_device *dev, buffer_rw_t read, int start)
  107. {
  108. int timeout = 1000;
  109. ether3_outw(priv(dev)->regs.config1 | CFG1_LOCBUFMEM, REG_CONFIG1);
  110. ether3_outw(priv(dev)->regs.command | CMD_FIFOWRITE, REG_COMMAND);
  111. while ((ether3_inw(REG_STATUS) & STAT_FIFOEMPTY) == 0) {
  112. if (!timeout--) {
  113. printk("%s: setbuffer broken\n", dev->name);
  114. priv(dev)->broken = 1;
  115. return 1;
  116. }
  117. udelay(1);
  118. }
  119. if (read == buffer_read) {
  120. ether3_outw(start, REG_DMAADDR);
  121. ether3_outw(priv(dev)->regs.command | CMD_FIFOREAD, REG_COMMAND);
  122. } else {
  123. ether3_outw(priv(dev)->regs.command | CMD_FIFOWRITE, REG_COMMAND);
  124. ether3_outw(start, REG_DMAADDR);
  125. }
  126. return 0;
  127. }
  128. /*
  129. * write data to the buffer memory
  130. */
  131. #define ether3_writebuffer(dev,data,length) \
  132. writesw(REG_BUFWIN, (data), (length) >> 1)
  133. #define ether3_writeword(dev,data) \
  134. writew((data), REG_BUFWIN)
  135. #define ether3_writelong(dev,data) { \
  136. void __iomem *reg_bufwin = REG_BUFWIN; \
  137. writew((data), reg_bufwin); \
  138. writew((data) >> 16, reg_bufwin); \
  139. }
  140. /*
  141. * read data from the buffer memory
  142. */
  143. #define ether3_readbuffer(dev,data,length) \
  144. readsw(REG_BUFWIN, (data), (length) >> 1)
  145. #define ether3_readword(dev) \
  146. readw(REG_BUFWIN)
  147. #define ether3_readlong(dev) \
  148. readw(REG_BUFWIN) | (readw(REG_BUFWIN) << 16)
  149. /*
  150. * Switch LED off...
  151. */
  152. static void ether3_ledoff(unsigned long data)
  153. {
  154. struct net_device *dev = (struct net_device *)data;
  155. ether3_outw(priv(dev)->regs.config2 |= CFG2_CTRLO, REG_CONFIG2);
  156. }
  157. /*
  158. * switch LED on...
  159. */
  160. static inline void ether3_ledon(struct net_device *dev)
  161. {
  162. del_timer(&priv(dev)->timer);
  163. priv(dev)->timer.expires = jiffies + HZ / 50; /* leave on for 1/50th second */
  164. priv(dev)->timer.data = (unsigned long)dev;
  165. priv(dev)->timer.function = ether3_ledoff;
  166. add_timer(&priv(dev)->timer);
  167. if (priv(dev)->regs.config2 & CFG2_CTRLO)
  168. ether3_outw(priv(dev)->regs.config2 &= ~CFG2_CTRLO, REG_CONFIG2);
  169. }
  170. /*
  171. * Read the ethernet address string from the on board rom.
  172. * This is an ascii string!!!
  173. */
  174. static int __devinit
  175. ether3_addr(char *addr, struct expansion_card *ec)
  176. {
  177. struct in_chunk_dir cd;
  178. char *s;
  179. if (ecard_readchunk(&cd, ec, 0xf5, 0) && (s = strchr(cd.d.string, '('))) {
  180. int i;
  181. for (i = 0; i<6; i++) {
  182. addr[i] = simple_strtoul(s + 1, &s, 0x10);
  183. if (*s != (i==5?')' : ':' ))
  184. break;
  185. }
  186. if (i == 6)
  187. return 0;
  188. }
  189. /* I wonder if we should even let the user continue in this case
  190. * - no, it would be better to disable the device
  191. */
  192. printk(KERN_ERR "ether3: Couldn't read a valid MAC address from card.\n");
  193. return -ENODEV;
  194. }
  195. /* --------------------------------------------------------------------------- */
  196. static int __devinit
  197. ether3_ramtest(struct net_device *dev, unsigned char byte)
  198. {
  199. unsigned char *buffer = kmalloc(RX_END, GFP_KERNEL);
  200. int i,ret = 0;
  201. int max_errors = 4;
  202. int bad = -1;
  203. if (!buffer)
  204. return 1;
  205. memset(buffer, byte, RX_END);
  206. ether3_setbuffer(dev, buffer_write, 0);
  207. ether3_writebuffer(dev, buffer, TX_END);
  208. ether3_setbuffer(dev, buffer_write, RX_START);
  209. ether3_writebuffer(dev, buffer + RX_START, RX_LEN);
  210. memset(buffer, byte ^ 0xff, RX_END);
  211. ether3_setbuffer(dev, buffer_read, 0);
  212. ether3_readbuffer(dev, buffer, TX_END);
  213. ether3_setbuffer(dev, buffer_read, RX_START);
  214. ether3_readbuffer(dev, buffer + RX_START, RX_LEN);
  215. for (i = 0; i < RX_END; i++) {
  216. if (buffer[i] != byte) {
  217. if (max_errors > 0 && bad != buffer[i]) {
  218. printk("%s: RAM failed with (%02X instead of %02X) at 0x%04X",
  219. dev->name, buffer[i], byte, i);
  220. ret = 2;
  221. max_errors--;
  222. bad = i;
  223. }
  224. } else {
  225. if (bad != -1) {
  226. if (bad != i - 1)
  227. printk(" - 0x%04X\n", i - 1);
  228. printk("\n");
  229. bad = -1;
  230. }
  231. }
  232. }
  233. if (bad != -1)
  234. printk(" - 0xffff\n");
  235. kfree(buffer);
  236. return ret;
  237. }
  238. /* ------------------------------------------------------------------------------- */
  239. static int __devinit ether3_init_2(struct net_device *dev)
  240. {
  241. int i;
  242. priv(dev)->regs.config1 = CFG1_RECVCOMPSTAT0|CFG1_DMABURST8;
  243. priv(dev)->regs.config2 = CFG2_CTRLO|CFG2_RECVCRC|CFG2_ERRENCRC;
  244. priv(dev)->regs.command = 0;
  245. /*
  246. * Set up our hardware address
  247. */
  248. ether3_outw(priv(dev)->regs.config1 | CFG1_BUFSELSTAT0, REG_CONFIG1);
  249. for (i = 0; i < 6; i++)
  250. ether3_outb(dev->dev_addr[i], REG_BUFWIN);
  251. if (dev->flags & IFF_PROMISC)
  252. priv(dev)->regs.config1 |= CFG1_RECVPROMISC;
  253. else if (dev->flags & IFF_MULTICAST)
  254. priv(dev)->regs.config1 |= CFG1_RECVSPECBRMULTI;
  255. else
  256. priv(dev)->regs.config1 |= CFG1_RECVSPECBROAD;
  257. /*
  258. * There is a problem with the NQ8005 in that it occasionally loses the
  259. * last two bytes. To get round this problem, we receive the CRC as
  260. * well. That way, if we do lose the last two, then it doesn't matter.
  261. */
  262. ether3_outw(priv(dev)->regs.config1 | CFG1_TRANSEND, REG_CONFIG1);
  263. ether3_outw((TX_END>>8) - 1, REG_BUFWIN);
  264. ether3_outw(priv(dev)->rx_head, REG_RECVPTR);
  265. ether3_outw(0, REG_TRANSMITPTR);
  266. ether3_outw(priv(dev)->rx_head >> 8, REG_RECVEND);
  267. ether3_outw(priv(dev)->regs.config2, REG_CONFIG2);
  268. ether3_outw(priv(dev)->regs.config1 | CFG1_LOCBUFMEM, REG_CONFIG1);
  269. ether3_outw(priv(dev)->regs.command, REG_COMMAND);
  270. i = ether3_ramtest(dev, 0x5A);
  271. if(i)
  272. return i;
  273. i = ether3_ramtest(dev, 0x1E);
  274. if(i)
  275. return i;
  276. ether3_setbuffer(dev, buffer_write, 0);
  277. ether3_writelong(dev, 0);
  278. return 0;
  279. }
  280. static void
  281. ether3_init_for_open(struct net_device *dev)
  282. {
  283. int i;
  284. /* Reset the chip */
  285. ether3_outw(CFG2_RESET, REG_CONFIG2);
  286. udelay(4);
  287. priv(dev)->regs.command = 0;
  288. ether3_outw(CMD_RXOFF|CMD_TXOFF, REG_COMMAND);
  289. while (ether3_inw(REG_STATUS) & (STAT_RXON|STAT_TXON))
  290. barrier();
  291. ether3_outw(priv(dev)->regs.config1 | CFG1_BUFSELSTAT0, REG_CONFIG1);
  292. for (i = 0; i < 6; i++)
  293. ether3_outb(dev->dev_addr[i], REG_BUFWIN);
  294. priv(dev)->tx_head = 0;
  295. priv(dev)->tx_tail = 0;
  296. priv(dev)->regs.config2 |= CFG2_CTRLO;
  297. priv(dev)->rx_head = RX_START;
  298. ether3_outw(priv(dev)->regs.config1 | CFG1_TRANSEND, REG_CONFIG1);
  299. ether3_outw((TX_END>>8) - 1, REG_BUFWIN);
  300. ether3_outw(priv(dev)->rx_head, REG_RECVPTR);
  301. ether3_outw(priv(dev)->rx_head >> 8, REG_RECVEND);
  302. ether3_outw(0, REG_TRANSMITPTR);
  303. ether3_outw(priv(dev)->regs.config2, REG_CONFIG2);
  304. ether3_outw(priv(dev)->regs.config1 | CFG1_LOCBUFMEM, REG_CONFIG1);
  305. ether3_setbuffer(dev, buffer_write, 0);
  306. ether3_writelong(dev, 0);
  307. priv(dev)->regs.command = CMD_ENINTRX | CMD_ENINTTX;
  308. ether3_outw(priv(dev)->regs.command | CMD_RXON, REG_COMMAND);
  309. }
  310. static inline int
  311. ether3_probe_bus_8(struct net_device *dev, int val)
  312. {
  313. int write_low, write_high, read_low, read_high;
  314. write_low = val & 255;
  315. write_high = val >> 8;
  316. printk(KERN_DEBUG "ether3_probe: write8 [%02X:%02X]", write_high, write_low);
  317. ether3_outb(write_low, REG_RECVPTR);
  318. ether3_outb(write_high, REG_RECVPTR + 4);
  319. read_low = ether3_inb(REG_RECVPTR);
  320. read_high = ether3_inb(REG_RECVPTR + 4);
  321. printk(", read8 [%02X:%02X]\n", read_high, read_low);
  322. return read_low == write_low && read_high == write_high;
  323. }
  324. static inline int
  325. ether3_probe_bus_16(struct net_device *dev, int val)
  326. {
  327. int read_val;
  328. ether3_outw(val, REG_RECVPTR);
  329. read_val = ether3_inw(REG_RECVPTR);
  330. printk(KERN_DEBUG "ether3_probe: write16 [%04X], read16 [%04X]\n", val, read_val);
  331. return read_val == val;
  332. }
  333. /*
  334. * Open/initialize the board. This is called (in the current kernel)
  335. * sometime after booting when the 'ifconfig' program is run.
  336. *
  337. * This routine should set everything up anew at each open, even
  338. * registers that "should" only need to be set once at boot, so that
  339. * there is non-reboot way to recover if something goes wrong.
  340. */
  341. static int
  342. ether3_open(struct net_device *dev)
  343. {
  344. if (!is_valid_ether_addr(dev->dev_addr)) {
  345. printk(KERN_WARNING "%s: invalid ethernet MAC address\n",
  346. dev->name);
  347. return -EINVAL;
  348. }
  349. if (request_irq(dev->irq, ether3_interrupt, 0, "ether3", dev))
  350. return -EAGAIN;
  351. ether3_init_for_open(dev);
  352. netif_start_queue(dev);
  353. return 0;
  354. }
  355. /*
  356. * The inverse routine to ether3_open().
  357. */
  358. static int
  359. ether3_close(struct net_device *dev)
  360. {
  361. netif_stop_queue(dev);
  362. disable_irq(dev->irq);
  363. ether3_outw(CMD_RXOFF|CMD_TXOFF, REG_COMMAND);
  364. priv(dev)->regs.command = 0;
  365. while (ether3_inw(REG_STATUS) & (STAT_RXON|STAT_TXON))
  366. barrier();
  367. ether3_outb(0x80, REG_CONFIG2 + 4);
  368. ether3_outw(0, REG_COMMAND);
  369. free_irq(dev->irq, dev);
  370. return 0;
  371. }
  372. /*
  373. * Set or clear promiscuous/multicast mode filter for this adaptor.
  374. *
  375. * We don't attempt any packet filtering. The card may have a SEEQ 8004
  376. * in which does not have the other ethernet address registers present...
  377. */
  378. static void ether3_setmulticastlist(struct net_device *dev)
  379. {
  380. priv(dev)->regs.config1 &= ~CFG1_RECVPROMISC;
  381. if (dev->flags & IFF_PROMISC) {
  382. /* promiscuous mode */
  383. priv(dev)->regs.config1 |= CFG1_RECVPROMISC;
  384. } else if (dev->flags & IFF_ALLMULTI || !netdev_mc_empty(dev)) {
  385. priv(dev)->regs.config1 |= CFG1_RECVSPECBRMULTI;
  386. } else
  387. priv(dev)->regs.config1 |= CFG1_RECVSPECBROAD;
  388. ether3_outw(priv(dev)->regs.config1 | CFG1_LOCBUFMEM, REG_CONFIG1);
  389. }
  390. static void ether3_timeout(struct net_device *dev)
  391. {
  392. unsigned long flags;
  393. del_timer(&priv(dev)->timer);
  394. local_irq_save(flags);
  395. printk(KERN_ERR "%s: transmit timed out, network cable problem?\n", dev->name);
  396. printk(KERN_ERR "%s: state: { status=%04X cfg1=%04X cfg2=%04X }\n", dev->name,
  397. ether3_inw(REG_STATUS), ether3_inw(REG_CONFIG1), ether3_inw(REG_CONFIG2));
  398. printk(KERN_ERR "%s: { rpr=%04X rea=%04X tpr=%04X }\n", dev->name,
  399. ether3_inw(REG_RECVPTR), ether3_inw(REG_RECVEND), ether3_inw(REG_TRANSMITPTR));
  400. printk(KERN_ERR "%s: tx head=%X tx tail=%X\n", dev->name,
  401. priv(dev)->tx_head, priv(dev)->tx_tail);
  402. ether3_setbuffer(dev, buffer_read, priv(dev)->tx_tail);
  403. printk(KERN_ERR "%s: packet status = %08X\n", dev->name, ether3_readlong(dev));
  404. local_irq_restore(flags);
  405. priv(dev)->regs.config2 |= CFG2_CTRLO;
  406. dev->stats.tx_errors += 1;
  407. ether3_outw(priv(dev)->regs.config2, REG_CONFIG2);
  408. priv(dev)->tx_head = priv(dev)->tx_tail = 0;
  409. netif_wake_queue(dev);
  410. }
  411. /*
  412. * Transmit a packet
  413. */
  414. static int
  415. ether3_sendpacket(struct sk_buff *skb, struct net_device *dev)
  416. {
  417. unsigned long flags;
  418. unsigned int length = ETH_ZLEN < skb->len ? skb->len : ETH_ZLEN;
  419. unsigned int ptr, next_ptr;
  420. if (priv(dev)->broken) {
  421. dev_kfree_skb(skb);
  422. dev->stats.tx_dropped++;
  423. netif_start_queue(dev);
  424. return NETDEV_TX_OK;
  425. }
  426. length = (length + 1) & ~1;
  427. if (length != skb->len) {
  428. if (skb_padto(skb, length))
  429. goto out;
  430. }
  431. next_ptr = (priv(dev)->tx_head + 1) & 15;
  432. local_irq_save(flags);
  433. if (priv(dev)->tx_tail == next_ptr) {
  434. local_irq_restore(flags);
  435. return NETDEV_TX_BUSY; /* unable to queue */
  436. }
  437. ptr = 0x600 * priv(dev)->tx_head;
  438. priv(dev)->tx_head = next_ptr;
  439. next_ptr *= 0x600;
  440. #define TXHDR_FLAGS (TXHDR_TRANSMIT|TXHDR_CHAINCONTINUE|TXHDR_DATAFOLLOWS|TXHDR_ENSUCCESS)
  441. ether3_setbuffer(dev, buffer_write, next_ptr);
  442. ether3_writelong(dev, 0);
  443. ether3_setbuffer(dev, buffer_write, ptr);
  444. ether3_writelong(dev, 0);
  445. ether3_writebuffer(dev, skb->data, length);
  446. ether3_writeword(dev, htons(next_ptr));
  447. ether3_writeword(dev, TXHDR_CHAINCONTINUE >> 16);
  448. ether3_setbuffer(dev, buffer_write, ptr);
  449. ether3_writeword(dev, htons((ptr + length + 4)));
  450. ether3_writeword(dev, TXHDR_FLAGS >> 16);
  451. ether3_ledon(dev);
  452. if (!(ether3_inw(REG_STATUS) & STAT_TXON)) {
  453. ether3_outw(ptr, REG_TRANSMITPTR);
  454. ether3_outw(priv(dev)->regs.command | CMD_TXON, REG_COMMAND);
  455. }
  456. next_ptr = (priv(dev)->tx_head + 1) & 15;
  457. local_irq_restore(flags);
  458. dev_kfree_skb(skb);
  459. if (priv(dev)->tx_tail == next_ptr)
  460. netif_stop_queue(dev);
  461. out:
  462. return NETDEV_TX_OK;
  463. }
  464. static irqreturn_t
  465. ether3_interrupt(int irq, void *dev_id)
  466. {
  467. struct net_device *dev = (struct net_device *)dev_id;
  468. unsigned int status, handled = IRQ_NONE;
  469. #if NET_DEBUG > 1
  470. if(net_debug & DEBUG_INT)
  471. printk("eth3irq: %d ", irq);
  472. #endif
  473. status = ether3_inw(REG_STATUS);
  474. if (status & STAT_INTRX) {
  475. ether3_outw(CMD_ACKINTRX | priv(dev)->regs.command, REG_COMMAND);
  476. ether3_rx(dev, 12);
  477. handled = IRQ_HANDLED;
  478. }
  479. if (status & STAT_INTTX) {
  480. ether3_outw(CMD_ACKINTTX | priv(dev)->regs.command, REG_COMMAND);
  481. ether3_tx(dev);
  482. handled = IRQ_HANDLED;
  483. }
  484. #if NET_DEBUG > 1
  485. if(net_debug & DEBUG_INT)
  486. printk("done\n");
  487. #endif
  488. return handled;
  489. }
  490. /*
  491. * If we have a good packet(s), get it/them out of the buffers.
  492. */
  493. static int ether3_rx(struct net_device *dev, unsigned int maxcnt)
  494. {
  495. unsigned int next_ptr = priv(dev)->rx_head, received = 0;
  496. ether3_ledon(dev);
  497. do {
  498. unsigned int this_ptr, status;
  499. unsigned char addrs[16];
  500. /*
  501. * read the first 16 bytes from the buffer.
  502. * This contains the status bytes etc and ethernet addresses,
  503. * and we also check the source ethernet address to see if
  504. * it originated from us.
  505. */
  506. {
  507. unsigned int temp_ptr;
  508. ether3_setbuffer(dev, buffer_read, next_ptr);
  509. temp_ptr = ether3_readword(dev);
  510. status = ether3_readword(dev);
  511. if ((status & (RXSTAT_DONE | RXHDR_CHAINCONTINUE | RXHDR_RECEIVE)) !=
  512. (RXSTAT_DONE | RXHDR_CHAINCONTINUE) || !temp_ptr)
  513. break;
  514. this_ptr = next_ptr + 4;
  515. next_ptr = ntohs(temp_ptr);
  516. }
  517. ether3_setbuffer(dev, buffer_read, this_ptr);
  518. ether3_readbuffer(dev, addrs+2, 12);
  519. if (next_ptr < RX_START || next_ptr >= RX_END) {
  520. int i;
  521. printk("%s: bad next pointer @%04X: ", dev->name, priv(dev)->rx_head);
  522. printk("%02X %02X %02X %02X ", next_ptr >> 8, next_ptr & 255, status & 255, status >> 8);
  523. for (i = 2; i < 14; i++)
  524. printk("%02X ", addrs[i]);
  525. printk("\n");
  526. next_ptr = priv(dev)->rx_head;
  527. break;
  528. }
  529. /*
  530. * ignore our own packets...
  531. */
  532. if (!(*(unsigned long *)&dev->dev_addr[0] ^ *(unsigned long *)&addrs[2+6]) &&
  533. !(*(unsigned short *)&dev->dev_addr[4] ^ *(unsigned short *)&addrs[2+10])) {
  534. maxcnt ++; /* compensate for loopedback packet */
  535. ether3_outw(next_ptr >> 8, REG_RECVEND);
  536. } else
  537. if (!(status & (RXSTAT_OVERSIZE|RXSTAT_CRCERROR|RXSTAT_DRIBBLEERROR|RXSTAT_SHORTPACKET))) {
  538. unsigned int length = next_ptr - this_ptr;
  539. struct sk_buff *skb;
  540. if (next_ptr <= this_ptr)
  541. length += RX_END - RX_START;
  542. skb = dev_alloc_skb(length + 2);
  543. if (skb) {
  544. unsigned char *buf;
  545. skb_reserve(skb, 2);
  546. buf = skb_put(skb, length);
  547. ether3_readbuffer(dev, buf + 12, length - 12);
  548. ether3_outw(next_ptr >> 8, REG_RECVEND);
  549. *(unsigned short *)(buf + 0) = *(unsigned short *)(addrs + 2);
  550. *(unsigned long *)(buf + 2) = *(unsigned long *)(addrs + 4);
  551. *(unsigned long *)(buf + 6) = *(unsigned long *)(addrs + 8);
  552. *(unsigned short *)(buf + 10) = *(unsigned short *)(addrs + 12);
  553. skb->protocol = eth_type_trans(skb, dev);
  554. netif_rx(skb);
  555. received ++;
  556. } else
  557. goto dropping;
  558. } else {
  559. struct net_device_stats *stats = &dev->stats;
  560. ether3_outw(next_ptr >> 8, REG_RECVEND);
  561. if (status & RXSTAT_OVERSIZE) stats->rx_over_errors ++;
  562. if (status & RXSTAT_CRCERROR) stats->rx_crc_errors ++;
  563. if (status & RXSTAT_DRIBBLEERROR) stats->rx_fifo_errors ++;
  564. if (status & RXSTAT_SHORTPACKET) stats->rx_length_errors ++;
  565. stats->rx_errors++;
  566. }
  567. }
  568. while (-- maxcnt);
  569. done:
  570. dev->stats.rx_packets += received;
  571. priv(dev)->rx_head = next_ptr;
  572. /*
  573. * If rx went off line, then that means that the buffer may be full. We
  574. * have dropped at least one packet.
  575. */
  576. if (!(ether3_inw(REG_STATUS) & STAT_RXON)) {
  577. dev->stats.rx_dropped++;
  578. ether3_outw(next_ptr, REG_RECVPTR);
  579. ether3_outw(priv(dev)->regs.command | CMD_RXON, REG_COMMAND);
  580. }
  581. return maxcnt;
  582. dropping:{
  583. static unsigned long last_warned;
  584. ether3_outw(next_ptr >> 8, REG_RECVEND);
  585. /*
  586. * Don't print this message too many times...
  587. */
  588. if (time_after(jiffies, last_warned + 10 * HZ)) {
  589. last_warned = jiffies;
  590. printk("%s: memory squeeze, dropping packet.\n", dev->name);
  591. }
  592. dev->stats.rx_dropped++;
  593. goto done;
  594. }
  595. }
  596. /*
  597. * Update stats for the transmitted packet(s)
  598. */
  599. static void ether3_tx(struct net_device *dev)
  600. {
  601. unsigned int tx_tail = priv(dev)->tx_tail;
  602. int max_work = 14;
  603. do {
  604. unsigned long status;
  605. /*
  606. * Read the packet header
  607. */
  608. ether3_setbuffer(dev, buffer_read, tx_tail * 0x600);
  609. status = ether3_readlong(dev);
  610. /*
  611. * Check to see if this packet has been transmitted
  612. */
  613. if ((status & (TXSTAT_DONE | TXHDR_TRANSMIT)) !=
  614. (TXSTAT_DONE | TXHDR_TRANSMIT))
  615. break;
  616. /*
  617. * Update errors
  618. */
  619. if (!(status & (TXSTAT_BABBLED | TXSTAT_16COLLISIONS)))
  620. dev->stats.tx_packets++;
  621. else {
  622. dev->stats.tx_errors++;
  623. if (status & TXSTAT_16COLLISIONS)
  624. dev->stats.collisions += 16;
  625. if (status & TXSTAT_BABBLED)
  626. dev->stats.tx_fifo_errors++;
  627. }
  628. tx_tail = (tx_tail + 1) & 15;
  629. } while (--max_work);
  630. if (priv(dev)->tx_tail != tx_tail) {
  631. priv(dev)->tx_tail = tx_tail;
  632. netif_wake_queue(dev);
  633. }
  634. }
  635. static void __devinit ether3_banner(void)
  636. {
  637. static unsigned version_printed = 0;
  638. if (net_debug && version_printed++ == 0)
  639. printk(KERN_INFO "%s", version);
  640. }
  641. static const struct net_device_ops ether3_netdev_ops = {
  642. .ndo_open = ether3_open,
  643. .ndo_stop = ether3_close,
  644. .ndo_start_xmit = ether3_sendpacket,
  645. .ndo_set_multicast_list = ether3_setmulticastlist,
  646. .ndo_tx_timeout = ether3_timeout,
  647. .ndo_validate_addr = eth_validate_addr,
  648. .ndo_change_mtu = eth_change_mtu,
  649. .ndo_set_mac_address = eth_mac_addr,
  650. };
  651. static int __devinit
  652. ether3_probe(struct expansion_card *ec, const struct ecard_id *id)
  653. {
  654. const struct ether3_data *data = id->data;
  655. struct net_device *dev;
  656. int bus_type, ret;
  657. ether3_banner();
  658. ret = ecard_request_resources(ec);
  659. if (ret)
  660. goto out;
  661. dev = alloc_etherdev(sizeof(struct dev_priv));
  662. if (!dev) {
  663. ret = -ENOMEM;
  664. goto release;
  665. }
  666. SET_NETDEV_DEV(dev, &ec->dev);
  667. priv(dev)->base = ecardm_iomap(ec, ECARD_RES_MEMC, 0, 0);
  668. if (!priv(dev)->base) {
  669. ret = -ENOMEM;
  670. goto free;
  671. }
  672. ec->irqaddr = priv(dev)->base + data->base_offset;
  673. ec->irqmask = 0xf0;
  674. priv(dev)->seeq = priv(dev)->base + data->base_offset;
  675. dev->irq = ec->irq;
  676. ether3_addr(dev->dev_addr, ec);
  677. init_timer(&priv(dev)->timer);
  678. /* Reset card...
  679. */
  680. ether3_outb(0x80, REG_CONFIG2 + 4);
  681. bus_type = BUS_UNKNOWN;
  682. udelay(4);
  683. /* Test using Receive Pointer (16-bit register) to find out
  684. * how the ether3 is connected to the bus...
  685. */
  686. if (ether3_probe_bus_8(dev, 0x100) &&
  687. ether3_probe_bus_8(dev, 0x201))
  688. bus_type = BUS_8;
  689. if (bus_type == BUS_UNKNOWN &&
  690. ether3_probe_bus_16(dev, 0x101) &&
  691. ether3_probe_bus_16(dev, 0x201))
  692. bus_type = BUS_16;
  693. switch (bus_type) {
  694. case BUS_UNKNOWN:
  695. printk(KERN_ERR "%s: unable to identify bus width\n", dev->name);
  696. ret = -ENODEV;
  697. goto free;
  698. case BUS_8:
  699. printk(KERN_ERR "%s: %s found, but is an unsupported "
  700. "8-bit card\n", dev->name, data->name);
  701. ret = -ENODEV;
  702. goto free;
  703. default:
  704. break;
  705. }
  706. if (ether3_init_2(dev)) {
  707. ret = -ENODEV;
  708. goto free;
  709. }
  710. dev->netdev_ops = &ether3_netdev_ops;
  711. dev->watchdog_timeo = 5 * HZ / 100;
  712. ret = register_netdev(dev);
  713. if (ret)
  714. goto free;
  715. printk("%s: %s in slot %d, %pM\n",
  716. dev->name, data->name, ec->slot_no, dev->dev_addr);
  717. ecard_set_drvdata(ec, dev);
  718. return 0;
  719. free:
  720. free_netdev(dev);
  721. release:
  722. ecard_release_resources(ec);
  723. out:
  724. return ret;
  725. }
  726. static void __devexit ether3_remove(struct expansion_card *ec)
  727. {
  728. struct net_device *dev = ecard_get_drvdata(ec);
  729. ecard_set_drvdata(ec, NULL);
  730. unregister_netdev(dev);
  731. free_netdev(dev);
  732. ecard_release_resources(ec);
  733. }
  734. static struct ether3_data ether3 = {
  735. .name = "ether3",
  736. .base_offset = 0,
  737. };
  738. static struct ether3_data etherb = {
  739. .name = "etherb",
  740. .base_offset = 0x800,
  741. };
  742. static const struct ecard_id ether3_ids[] = {
  743. { MANU_ANT2, PROD_ANT_ETHER3, &ether3 },
  744. { MANU_ANT, PROD_ANT_ETHER3, &ether3 },
  745. { MANU_ANT, PROD_ANT_ETHERB, &etherb },
  746. { 0xffff, 0xffff }
  747. };
  748. static struct ecard_driver ether3_driver = {
  749. .probe = ether3_probe,
  750. .remove = __devexit_p(ether3_remove),
  751. .id_table = ether3_ids,
  752. .drv = {
  753. .name = "ether3",
  754. },
  755. };
  756. static int __init ether3_init(void)
  757. {
  758. return ecard_register_driver(&ether3_driver);
  759. }
  760. static void __exit ether3_exit(void)
  761. {
  762. ecard_remove_driver(&ether3_driver);
  763. }
  764. module_init(ether3_init);
  765. module_exit(ether3_exit);
  766. MODULE_LICENSE("GPL");