qib_qp.c 31 KB

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  1. /*
  2. * Copyright (c) 2006, 2007, 2008, 2009, 2010 QLogic Corporation.
  3. * All rights reserved.
  4. * Copyright (c) 2005, 2006 PathScale, Inc. All rights reserved.
  5. *
  6. * This software is available to you under a choice of one of two
  7. * licenses. You may choose to be licensed under the terms of the GNU
  8. * General Public License (GPL) Version 2, available from the file
  9. * COPYING in the main directory of this source tree, or the
  10. * OpenIB.org BSD license below:
  11. *
  12. * Redistribution and use in source and binary forms, with or
  13. * without modification, are permitted provided that the following
  14. * conditions are met:
  15. *
  16. * - Redistributions of source code must retain the above
  17. * copyright notice, this list of conditions and the following
  18. * disclaimer.
  19. *
  20. * - Redistributions in binary form must reproduce the above
  21. * copyright notice, this list of conditions and the following
  22. * disclaimer in the documentation and/or other materials
  23. * provided with the distribution.
  24. *
  25. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  26. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  27. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  28. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  29. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  30. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  31. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  32. * SOFTWARE.
  33. */
  34. #include <linux/err.h>
  35. #include <linux/vmalloc.h>
  36. #include "qib.h"
  37. #define BITS_PER_PAGE (PAGE_SIZE*BITS_PER_BYTE)
  38. #define BITS_PER_PAGE_MASK (BITS_PER_PAGE-1)
  39. static inline unsigned mk_qpn(struct qib_qpn_table *qpt,
  40. struct qpn_map *map, unsigned off)
  41. {
  42. return (map - qpt->map) * BITS_PER_PAGE + off;
  43. }
  44. static inline unsigned find_next_offset(struct qib_qpn_table *qpt,
  45. struct qpn_map *map, unsigned off,
  46. unsigned n)
  47. {
  48. if (qpt->mask) {
  49. off++;
  50. if (((off & qpt->mask) >> 1) >= n)
  51. off = (off | qpt->mask) + 2;
  52. } else
  53. off = find_next_zero_bit(map->page, BITS_PER_PAGE, off);
  54. return off;
  55. }
  56. /*
  57. * Convert the AETH credit code into the number of credits.
  58. */
  59. static u32 credit_table[31] = {
  60. 0, /* 0 */
  61. 1, /* 1 */
  62. 2, /* 2 */
  63. 3, /* 3 */
  64. 4, /* 4 */
  65. 6, /* 5 */
  66. 8, /* 6 */
  67. 12, /* 7 */
  68. 16, /* 8 */
  69. 24, /* 9 */
  70. 32, /* A */
  71. 48, /* B */
  72. 64, /* C */
  73. 96, /* D */
  74. 128, /* E */
  75. 192, /* F */
  76. 256, /* 10 */
  77. 384, /* 11 */
  78. 512, /* 12 */
  79. 768, /* 13 */
  80. 1024, /* 14 */
  81. 1536, /* 15 */
  82. 2048, /* 16 */
  83. 3072, /* 17 */
  84. 4096, /* 18 */
  85. 6144, /* 19 */
  86. 8192, /* 1A */
  87. 12288, /* 1B */
  88. 16384, /* 1C */
  89. 24576, /* 1D */
  90. 32768 /* 1E */
  91. };
  92. static void get_map_page(struct qib_qpn_table *qpt, struct qpn_map *map)
  93. {
  94. unsigned long page = get_zeroed_page(GFP_KERNEL);
  95. /*
  96. * Free the page if someone raced with us installing it.
  97. */
  98. spin_lock(&qpt->lock);
  99. if (map->page)
  100. free_page(page);
  101. else
  102. map->page = (void *)page;
  103. spin_unlock(&qpt->lock);
  104. }
  105. /*
  106. * Allocate the next available QPN or
  107. * zero/one for QP type IB_QPT_SMI/IB_QPT_GSI.
  108. */
  109. static int alloc_qpn(struct qib_devdata *dd, struct qib_qpn_table *qpt,
  110. enum ib_qp_type type, u8 port)
  111. {
  112. u32 i, offset, max_scan, qpn;
  113. struct qpn_map *map;
  114. u32 ret;
  115. if (type == IB_QPT_SMI || type == IB_QPT_GSI) {
  116. unsigned n;
  117. ret = type == IB_QPT_GSI;
  118. n = 1 << (ret + 2 * (port - 1));
  119. spin_lock(&qpt->lock);
  120. if (qpt->flags & n)
  121. ret = -EINVAL;
  122. else
  123. qpt->flags |= n;
  124. spin_unlock(&qpt->lock);
  125. goto bail;
  126. }
  127. qpn = qpt->last + 2;
  128. if (qpn >= QPN_MAX)
  129. qpn = 2;
  130. if (qpt->mask && ((qpn & qpt->mask) >> 1) >= dd->n_krcv_queues)
  131. qpn = (qpn | qpt->mask) + 2;
  132. offset = qpn & BITS_PER_PAGE_MASK;
  133. map = &qpt->map[qpn / BITS_PER_PAGE];
  134. max_scan = qpt->nmaps - !offset;
  135. for (i = 0;;) {
  136. if (unlikely(!map->page)) {
  137. get_map_page(qpt, map);
  138. if (unlikely(!map->page))
  139. break;
  140. }
  141. do {
  142. if (!test_and_set_bit(offset, map->page)) {
  143. qpt->last = qpn;
  144. ret = qpn;
  145. goto bail;
  146. }
  147. offset = find_next_offset(qpt, map, offset,
  148. dd->n_krcv_queues);
  149. qpn = mk_qpn(qpt, map, offset);
  150. /*
  151. * This test differs from alloc_pidmap().
  152. * If find_next_offset() does find a zero
  153. * bit, we don't need to check for QPN
  154. * wrapping around past our starting QPN.
  155. * We just need to be sure we don't loop
  156. * forever.
  157. */
  158. } while (offset < BITS_PER_PAGE && qpn < QPN_MAX);
  159. /*
  160. * In order to keep the number of pages allocated to a
  161. * minimum, we scan the all existing pages before increasing
  162. * the size of the bitmap table.
  163. */
  164. if (++i > max_scan) {
  165. if (qpt->nmaps == QPNMAP_ENTRIES)
  166. break;
  167. map = &qpt->map[qpt->nmaps++];
  168. offset = 0;
  169. } else if (map < &qpt->map[qpt->nmaps]) {
  170. ++map;
  171. offset = 0;
  172. } else {
  173. map = &qpt->map[0];
  174. offset = 2;
  175. }
  176. qpn = mk_qpn(qpt, map, offset);
  177. }
  178. ret = -ENOMEM;
  179. bail:
  180. return ret;
  181. }
  182. static void free_qpn(struct qib_qpn_table *qpt, u32 qpn)
  183. {
  184. struct qpn_map *map;
  185. map = qpt->map + qpn / BITS_PER_PAGE;
  186. if (map->page)
  187. clear_bit(qpn & BITS_PER_PAGE_MASK, map->page);
  188. }
  189. /*
  190. * Put the QP into the hash table.
  191. * The hash table holds a reference to the QP.
  192. */
  193. static void insert_qp(struct qib_ibdev *dev, struct qib_qp *qp)
  194. {
  195. struct qib_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num);
  196. unsigned n = qp->ibqp.qp_num % dev->qp_table_size;
  197. unsigned long flags;
  198. spin_lock_irqsave(&dev->qpt_lock, flags);
  199. if (qp->ibqp.qp_num == 0)
  200. ibp->qp0 = qp;
  201. else if (qp->ibqp.qp_num == 1)
  202. ibp->qp1 = qp;
  203. else {
  204. qp->next = dev->qp_table[n];
  205. dev->qp_table[n] = qp;
  206. }
  207. atomic_inc(&qp->refcount);
  208. spin_unlock_irqrestore(&dev->qpt_lock, flags);
  209. }
  210. /*
  211. * Remove the QP from the table so it can't be found asynchronously by
  212. * the receive interrupt routine.
  213. */
  214. static void remove_qp(struct qib_ibdev *dev, struct qib_qp *qp)
  215. {
  216. struct qib_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num);
  217. struct qib_qp *q, **qpp;
  218. unsigned long flags;
  219. qpp = &dev->qp_table[qp->ibqp.qp_num % dev->qp_table_size];
  220. spin_lock_irqsave(&dev->qpt_lock, flags);
  221. if (ibp->qp0 == qp) {
  222. ibp->qp0 = NULL;
  223. atomic_dec(&qp->refcount);
  224. } else if (ibp->qp1 == qp) {
  225. ibp->qp1 = NULL;
  226. atomic_dec(&qp->refcount);
  227. } else
  228. for (; (q = *qpp) != NULL; qpp = &q->next)
  229. if (q == qp) {
  230. *qpp = qp->next;
  231. qp->next = NULL;
  232. atomic_dec(&qp->refcount);
  233. break;
  234. }
  235. spin_unlock_irqrestore(&dev->qpt_lock, flags);
  236. }
  237. /**
  238. * qib_free_all_qps - check for QPs still in use
  239. * @qpt: the QP table to empty
  240. *
  241. * There should not be any QPs still in use.
  242. * Free memory for table.
  243. */
  244. unsigned qib_free_all_qps(struct qib_devdata *dd)
  245. {
  246. struct qib_ibdev *dev = &dd->verbs_dev;
  247. unsigned long flags;
  248. struct qib_qp *qp;
  249. unsigned n, qp_inuse = 0;
  250. for (n = 0; n < dd->num_pports; n++) {
  251. struct qib_ibport *ibp = &dd->pport[n].ibport_data;
  252. if (!qib_mcast_tree_empty(ibp))
  253. qp_inuse++;
  254. if (ibp->qp0)
  255. qp_inuse++;
  256. if (ibp->qp1)
  257. qp_inuse++;
  258. }
  259. spin_lock_irqsave(&dev->qpt_lock, flags);
  260. for (n = 0; n < dev->qp_table_size; n++) {
  261. qp = dev->qp_table[n];
  262. dev->qp_table[n] = NULL;
  263. for (; qp; qp = qp->next)
  264. qp_inuse++;
  265. }
  266. spin_unlock_irqrestore(&dev->qpt_lock, flags);
  267. return qp_inuse;
  268. }
  269. /**
  270. * qib_lookup_qpn - return the QP with the given QPN
  271. * @qpt: the QP table
  272. * @qpn: the QP number to look up
  273. *
  274. * The caller is responsible for decrementing the QP reference count
  275. * when done.
  276. */
  277. struct qib_qp *qib_lookup_qpn(struct qib_ibport *ibp, u32 qpn)
  278. {
  279. struct qib_ibdev *dev = &ppd_from_ibp(ibp)->dd->verbs_dev;
  280. unsigned long flags;
  281. struct qib_qp *qp;
  282. spin_lock_irqsave(&dev->qpt_lock, flags);
  283. if (qpn == 0)
  284. qp = ibp->qp0;
  285. else if (qpn == 1)
  286. qp = ibp->qp1;
  287. else
  288. for (qp = dev->qp_table[qpn % dev->qp_table_size]; qp;
  289. qp = qp->next)
  290. if (qp->ibqp.qp_num == qpn)
  291. break;
  292. if (qp)
  293. atomic_inc(&qp->refcount);
  294. spin_unlock_irqrestore(&dev->qpt_lock, flags);
  295. return qp;
  296. }
  297. /**
  298. * qib_reset_qp - initialize the QP state to the reset state
  299. * @qp: the QP to reset
  300. * @type: the QP type
  301. */
  302. static void qib_reset_qp(struct qib_qp *qp, enum ib_qp_type type)
  303. {
  304. qp->remote_qpn = 0;
  305. qp->qkey = 0;
  306. qp->qp_access_flags = 0;
  307. atomic_set(&qp->s_dma_busy, 0);
  308. qp->s_flags &= QIB_S_SIGNAL_REQ_WR;
  309. qp->s_hdrwords = 0;
  310. qp->s_wqe = NULL;
  311. qp->s_draining = 0;
  312. qp->s_next_psn = 0;
  313. qp->s_last_psn = 0;
  314. qp->s_sending_psn = 0;
  315. qp->s_sending_hpsn = 0;
  316. qp->s_psn = 0;
  317. qp->r_psn = 0;
  318. qp->r_msn = 0;
  319. if (type == IB_QPT_RC) {
  320. qp->s_state = IB_OPCODE_RC_SEND_LAST;
  321. qp->r_state = IB_OPCODE_RC_SEND_LAST;
  322. } else {
  323. qp->s_state = IB_OPCODE_UC_SEND_LAST;
  324. qp->r_state = IB_OPCODE_UC_SEND_LAST;
  325. }
  326. qp->s_ack_state = IB_OPCODE_RC_ACKNOWLEDGE;
  327. qp->r_nak_state = 0;
  328. qp->r_aflags = 0;
  329. qp->r_flags = 0;
  330. qp->s_head = 0;
  331. qp->s_tail = 0;
  332. qp->s_cur = 0;
  333. qp->s_acked = 0;
  334. qp->s_last = 0;
  335. qp->s_ssn = 1;
  336. qp->s_lsn = 0;
  337. qp->s_mig_state = IB_MIG_MIGRATED;
  338. memset(qp->s_ack_queue, 0, sizeof(qp->s_ack_queue));
  339. qp->r_head_ack_queue = 0;
  340. qp->s_tail_ack_queue = 0;
  341. qp->s_num_rd_atomic = 0;
  342. if (qp->r_rq.wq) {
  343. qp->r_rq.wq->head = 0;
  344. qp->r_rq.wq->tail = 0;
  345. }
  346. qp->r_sge.num_sge = 0;
  347. }
  348. static void clear_mr_refs(struct qib_qp *qp, int clr_sends)
  349. {
  350. unsigned n;
  351. if (test_and_clear_bit(QIB_R_REWIND_SGE, &qp->r_aflags))
  352. while (qp->s_rdma_read_sge.num_sge) {
  353. atomic_dec(&qp->s_rdma_read_sge.sge.mr->refcount);
  354. if (--qp->s_rdma_read_sge.num_sge)
  355. qp->s_rdma_read_sge.sge =
  356. *qp->s_rdma_read_sge.sg_list++;
  357. }
  358. while (qp->r_sge.num_sge) {
  359. atomic_dec(&qp->r_sge.sge.mr->refcount);
  360. if (--qp->r_sge.num_sge)
  361. qp->r_sge.sge = *qp->r_sge.sg_list++;
  362. }
  363. if (clr_sends) {
  364. while (qp->s_last != qp->s_head) {
  365. struct qib_swqe *wqe = get_swqe_ptr(qp, qp->s_last);
  366. unsigned i;
  367. for (i = 0; i < wqe->wr.num_sge; i++) {
  368. struct qib_sge *sge = &wqe->sg_list[i];
  369. atomic_dec(&sge->mr->refcount);
  370. }
  371. if (qp->ibqp.qp_type == IB_QPT_UD ||
  372. qp->ibqp.qp_type == IB_QPT_SMI ||
  373. qp->ibqp.qp_type == IB_QPT_GSI)
  374. atomic_dec(&to_iah(wqe->wr.wr.ud.ah)->refcount);
  375. if (++qp->s_last >= qp->s_size)
  376. qp->s_last = 0;
  377. }
  378. if (qp->s_rdma_mr) {
  379. atomic_dec(&qp->s_rdma_mr->refcount);
  380. qp->s_rdma_mr = NULL;
  381. }
  382. }
  383. if (qp->ibqp.qp_type != IB_QPT_RC)
  384. return;
  385. for (n = 0; n < ARRAY_SIZE(qp->s_ack_queue); n++) {
  386. struct qib_ack_entry *e = &qp->s_ack_queue[n];
  387. if (e->opcode == IB_OPCODE_RC_RDMA_READ_REQUEST &&
  388. e->rdma_sge.mr) {
  389. atomic_dec(&e->rdma_sge.mr->refcount);
  390. e->rdma_sge.mr = NULL;
  391. }
  392. }
  393. }
  394. /**
  395. * qib_error_qp - put a QP into the error state
  396. * @qp: the QP to put into the error state
  397. * @err: the receive completion error to signal if a RWQE is active
  398. *
  399. * Flushes both send and receive work queues.
  400. * Returns true if last WQE event should be generated.
  401. * The QP r_lock and s_lock should be held and interrupts disabled.
  402. * If we are already in error state, just return.
  403. */
  404. int qib_error_qp(struct qib_qp *qp, enum ib_wc_status err)
  405. {
  406. struct qib_ibdev *dev = to_idev(qp->ibqp.device);
  407. struct ib_wc wc;
  408. int ret = 0;
  409. if (qp->state == IB_QPS_ERR || qp->state == IB_QPS_RESET)
  410. goto bail;
  411. qp->state = IB_QPS_ERR;
  412. if (qp->s_flags & (QIB_S_TIMER | QIB_S_WAIT_RNR)) {
  413. qp->s_flags &= ~(QIB_S_TIMER | QIB_S_WAIT_RNR);
  414. del_timer(&qp->s_timer);
  415. }
  416. if (qp->s_flags & QIB_S_ANY_WAIT_SEND)
  417. qp->s_flags &= ~QIB_S_ANY_WAIT_SEND;
  418. spin_lock(&dev->pending_lock);
  419. if (!list_empty(&qp->iowait) && !(qp->s_flags & QIB_S_BUSY)) {
  420. qp->s_flags &= ~QIB_S_ANY_WAIT_IO;
  421. list_del_init(&qp->iowait);
  422. }
  423. spin_unlock(&dev->pending_lock);
  424. if (!(qp->s_flags & QIB_S_BUSY)) {
  425. qp->s_hdrwords = 0;
  426. if (qp->s_rdma_mr) {
  427. atomic_dec(&qp->s_rdma_mr->refcount);
  428. qp->s_rdma_mr = NULL;
  429. }
  430. if (qp->s_tx) {
  431. qib_put_txreq(qp->s_tx);
  432. qp->s_tx = NULL;
  433. }
  434. }
  435. /* Schedule the sending tasklet to drain the send work queue. */
  436. if (qp->s_last != qp->s_head)
  437. qib_schedule_send(qp);
  438. clear_mr_refs(qp, 0);
  439. memset(&wc, 0, sizeof(wc));
  440. wc.qp = &qp->ibqp;
  441. wc.opcode = IB_WC_RECV;
  442. if (test_and_clear_bit(QIB_R_WRID_VALID, &qp->r_aflags)) {
  443. wc.wr_id = qp->r_wr_id;
  444. wc.status = err;
  445. qib_cq_enter(to_icq(qp->ibqp.recv_cq), &wc, 1);
  446. }
  447. wc.status = IB_WC_WR_FLUSH_ERR;
  448. if (qp->r_rq.wq) {
  449. struct qib_rwq *wq;
  450. u32 head;
  451. u32 tail;
  452. spin_lock(&qp->r_rq.lock);
  453. /* sanity check pointers before trusting them */
  454. wq = qp->r_rq.wq;
  455. head = wq->head;
  456. if (head >= qp->r_rq.size)
  457. head = 0;
  458. tail = wq->tail;
  459. if (tail >= qp->r_rq.size)
  460. tail = 0;
  461. while (tail != head) {
  462. wc.wr_id = get_rwqe_ptr(&qp->r_rq, tail)->wr_id;
  463. if (++tail >= qp->r_rq.size)
  464. tail = 0;
  465. qib_cq_enter(to_icq(qp->ibqp.recv_cq), &wc, 1);
  466. }
  467. wq->tail = tail;
  468. spin_unlock(&qp->r_rq.lock);
  469. } else if (qp->ibqp.event_handler)
  470. ret = 1;
  471. bail:
  472. return ret;
  473. }
  474. /**
  475. * qib_modify_qp - modify the attributes of a queue pair
  476. * @ibqp: the queue pair who's attributes we're modifying
  477. * @attr: the new attributes
  478. * @attr_mask: the mask of attributes to modify
  479. * @udata: user data for libibverbs.so
  480. *
  481. * Returns 0 on success, otherwise returns an errno.
  482. */
  483. int qib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
  484. int attr_mask, struct ib_udata *udata)
  485. {
  486. struct qib_ibdev *dev = to_idev(ibqp->device);
  487. struct qib_qp *qp = to_iqp(ibqp);
  488. enum ib_qp_state cur_state, new_state;
  489. struct ib_event ev;
  490. int lastwqe = 0;
  491. int mig = 0;
  492. int ret;
  493. u32 pmtu = 0; /* for gcc warning only */
  494. spin_lock_irq(&qp->r_lock);
  495. spin_lock(&qp->s_lock);
  496. cur_state = attr_mask & IB_QP_CUR_STATE ?
  497. attr->cur_qp_state : qp->state;
  498. new_state = attr_mask & IB_QP_STATE ? attr->qp_state : cur_state;
  499. if (!ib_modify_qp_is_ok(cur_state, new_state, ibqp->qp_type,
  500. attr_mask))
  501. goto inval;
  502. if (attr_mask & IB_QP_AV) {
  503. if (attr->ah_attr.dlid >= QIB_MULTICAST_LID_BASE)
  504. goto inval;
  505. if (qib_check_ah(qp->ibqp.device, &attr->ah_attr))
  506. goto inval;
  507. }
  508. if (attr_mask & IB_QP_ALT_PATH) {
  509. if (attr->alt_ah_attr.dlid >= QIB_MULTICAST_LID_BASE)
  510. goto inval;
  511. if (qib_check_ah(qp->ibqp.device, &attr->alt_ah_attr))
  512. goto inval;
  513. if (attr->alt_pkey_index >= qib_get_npkeys(dd_from_dev(dev)))
  514. goto inval;
  515. }
  516. if (attr_mask & IB_QP_PKEY_INDEX)
  517. if (attr->pkey_index >= qib_get_npkeys(dd_from_dev(dev)))
  518. goto inval;
  519. if (attr_mask & IB_QP_MIN_RNR_TIMER)
  520. if (attr->min_rnr_timer > 31)
  521. goto inval;
  522. if (attr_mask & IB_QP_PORT)
  523. if (qp->ibqp.qp_type == IB_QPT_SMI ||
  524. qp->ibqp.qp_type == IB_QPT_GSI ||
  525. attr->port_num == 0 ||
  526. attr->port_num > ibqp->device->phys_port_cnt)
  527. goto inval;
  528. if (attr_mask & IB_QP_DEST_QPN)
  529. if (attr->dest_qp_num > QIB_QPN_MASK)
  530. goto inval;
  531. if (attr_mask & IB_QP_RETRY_CNT)
  532. if (attr->retry_cnt > 7)
  533. goto inval;
  534. if (attr_mask & IB_QP_RNR_RETRY)
  535. if (attr->rnr_retry > 7)
  536. goto inval;
  537. /*
  538. * Don't allow invalid path_mtu values. OK to set greater
  539. * than the active mtu (or even the max_cap, if we have tuned
  540. * that to a small mtu. We'll set qp->path_mtu
  541. * to the lesser of requested attribute mtu and active,
  542. * for packetizing messages.
  543. * Note that the QP port has to be set in INIT and MTU in RTR.
  544. */
  545. if (attr_mask & IB_QP_PATH_MTU) {
  546. struct qib_devdata *dd = dd_from_dev(dev);
  547. int mtu, pidx = qp->port_num - 1;
  548. mtu = ib_mtu_enum_to_int(attr->path_mtu);
  549. if (mtu == -1)
  550. goto inval;
  551. if (mtu > dd->pport[pidx].ibmtu) {
  552. switch (dd->pport[pidx].ibmtu) {
  553. case 4096:
  554. pmtu = IB_MTU_4096;
  555. break;
  556. case 2048:
  557. pmtu = IB_MTU_2048;
  558. break;
  559. case 1024:
  560. pmtu = IB_MTU_1024;
  561. break;
  562. case 512:
  563. pmtu = IB_MTU_512;
  564. break;
  565. case 256:
  566. pmtu = IB_MTU_256;
  567. break;
  568. default:
  569. pmtu = IB_MTU_2048;
  570. }
  571. } else
  572. pmtu = attr->path_mtu;
  573. }
  574. if (attr_mask & IB_QP_PATH_MIG_STATE) {
  575. if (attr->path_mig_state == IB_MIG_REARM) {
  576. if (qp->s_mig_state == IB_MIG_ARMED)
  577. goto inval;
  578. if (new_state != IB_QPS_RTS)
  579. goto inval;
  580. } else if (attr->path_mig_state == IB_MIG_MIGRATED) {
  581. if (qp->s_mig_state == IB_MIG_REARM)
  582. goto inval;
  583. if (new_state != IB_QPS_RTS && new_state != IB_QPS_SQD)
  584. goto inval;
  585. if (qp->s_mig_state == IB_MIG_ARMED)
  586. mig = 1;
  587. } else
  588. goto inval;
  589. }
  590. if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC)
  591. if (attr->max_dest_rd_atomic > QIB_MAX_RDMA_ATOMIC)
  592. goto inval;
  593. switch (new_state) {
  594. case IB_QPS_RESET:
  595. if (qp->state != IB_QPS_RESET) {
  596. qp->state = IB_QPS_RESET;
  597. spin_lock(&dev->pending_lock);
  598. if (!list_empty(&qp->iowait))
  599. list_del_init(&qp->iowait);
  600. spin_unlock(&dev->pending_lock);
  601. qp->s_flags &= ~(QIB_S_TIMER | QIB_S_ANY_WAIT);
  602. spin_unlock(&qp->s_lock);
  603. spin_unlock_irq(&qp->r_lock);
  604. /* Stop the sending work queue and retry timer */
  605. cancel_work_sync(&qp->s_work);
  606. del_timer_sync(&qp->s_timer);
  607. wait_event(qp->wait_dma, !atomic_read(&qp->s_dma_busy));
  608. if (qp->s_tx) {
  609. qib_put_txreq(qp->s_tx);
  610. qp->s_tx = NULL;
  611. }
  612. remove_qp(dev, qp);
  613. wait_event(qp->wait, !atomic_read(&qp->refcount));
  614. spin_lock_irq(&qp->r_lock);
  615. spin_lock(&qp->s_lock);
  616. clear_mr_refs(qp, 1);
  617. qib_reset_qp(qp, ibqp->qp_type);
  618. }
  619. break;
  620. case IB_QPS_RTR:
  621. /* Allow event to retrigger if QP set to RTR more than once */
  622. qp->r_flags &= ~QIB_R_COMM_EST;
  623. qp->state = new_state;
  624. break;
  625. case IB_QPS_SQD:
  626. qp->s_draining = qp->s_last != qp->s_cur;
  627. qp->state = new_state;
  628. break;
  629. case IB_QPS_SQE:
  630. if (qp->ibqp.qp_type == IB_QPT_RC)
  631. goto inval;
  632. qp->state = new_state;
  633. break;
  634. case IB_QPS_ERR:
  635. lastwqe = qib_error_qp(qp, IB_WC_WR_FLUSH_ERR);
  636. break;
  637. default:
  638. qp->state = new_state;
  639. break;
  640. }
  641. if (attr_mask & IB_QP_PKEY_INDEX)
  642. qp->s_pkey_index = attr->pkey_index;
  643. if (attr_mask & IB_QP_PORT)
  644. qp->port_num = attr->port_num;
  645. if (attr_mask & IB_QP_DEST_QPN)
  646. qp->remote_qpn = attr->dest_qp_num;
  647. if (attr_mask & IB_QP_SQ_PSN) {
  648. qp->s_next_psn = attr->sq_psn & QIB_PSN_MASK;
  649. qp->s_psn = qp->s_next_psn;
  650. qp->s_sending_psn = qp->s_next_psn;
  651. qp->s_last_psn = qp->s_next_psn - 1;
  652. qp->s_sending_hpsn = qp->s_last_psn;
  653. }
  654. if (attr_mask & IB_QP_RQ_PSN)
  655. qp->r_psn = attr->rq_psn & QIB_PSN_MASK;
  656. if (attr_mask & IB_QP_ACCESS_FLAGS)
  657. qp->qp_access_flags = attr->qp_access_flags;
  658. if (attr_mask & IB_QP_AV) {
  659. qp->remote_ah_attr = attr->ah_attr;
  660. qp->s_srate = attr->ah_attr.static_rate;
  661. }
  662. if (attr_mask & IB_QP_ALT_PATH) {
  663. qp->alt_ah_attr = attr->alt_ah_attr;
  664. qp->s_alt_pkey_index = attr->alt_pkey_index;
  665. }
  666. if (attr_mask & IB_QP_PATH_MIG_STATE) {
  667. qp->s_mig_state = attr->path_mig_state;
  668. if (mig) {
  669. qp->remote_ah_attr = qp->alt_ah_attr;
  670. qp->port_num = qp->alt_ah_attr.port_num;
  671. qp->s_pkey_index = qp->s_alt_pkey_index;
  672. }
  673. }
  674. if (attr_mask & IB_QP_PATH_MTU)
  675. qp->path_mtu = pmtu;
  676. if (attr_mask & IB_QP_RETRY_CNT) {
  677. qp->s_retry_cnt = attr->retry_cnt;
  678. qp->s_retry = attr->retry_cnt;
  679. }
  680. if (attr_mask & IB_QP_RNR_RETRY) {
  681. qp->s_rnr_retry_cnt = attr->rnr_retry;
  682. qp->s_rnr_retry = attr->rnr_retry;
  683. }
  684. if (attr_mask & IB_QP_MIN_RNR_TIMER)
  685. qp->r_min_rnr_timer = attr->min_rnr_timer;
  686. if (attr_mask & IB_QP_TIMEOUT)
  687. qp->timeout = attr->timeout;
  688. if (attr_mask & IB_QP_QKEY)
  689. qp->qkey = attr->qkey;
  690. if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC)
  691. qp->r_max_rd_atomic = attr->max_dest_rd_atomic;
  692. if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC)
  693. qp->s_max_rd_atomic = attr->max_rd_atomic;
  694. spin_unlock(&qp->s_lock);
  695. spin_unlock_irq(&qp->r_lock);
  696. if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT)
  697. insert_qp(dev, qp);
  698. if (lastwqe) {
  699. ev.device = qp->ibqp.device;
  700. ev.element.qp = &qp->ibqp;
  701. ev.event = IB_EVENT_QP_LAST_WQE_REACHED;
  702. qp->ibqp.event_handler(&ev, qp->ibqp.qp_context);
  703. }
  704. if (mig) {
  705. ev.device = qp->ibqp.device;
  706. ev.element.qp = &qp->ibqp;
  707. ev.event = IB_EVENT_PATH_MIG;
  708. qp->ibqp.event_handler(&ev, qp->ibqp.qp_context);
  709. }
  710. ret = 0;
  711. goto bail;
  712. inval:
  713. spin_unlock(&qp->s_lock);
  714. spin_unlock_irq(&qp->r_lock);
  715. ret = -EINVAL;
  716. bail:
  717. return ret;
  718. }
  719. int qib_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
  720. int attr_mask, struct ib_qp_init_attr *init_attr)
  721. {
  722. struct qib_qp *qp = to_iqp(ibqp);
  723. attr->qp_state = qp->state;
  724. attr->cur_qp_state = attr->qp_state;
  725. attr->path_mtu = qp->path_mtu;
  726. attr->path_mig_state = qp->s_mig_state;
  727. attr->qkey = qp->qkey;
  728. attr->rq_psn = qp->r_psn & QIB_PSN_MASK;
  729. attr->sq_psn = qp->s_next_psn & QIB_PSN_MASK;
  730. attr->dest_qp_num = qp->remote_qpn;
  731. attr->qp_access_flags = qp->qp_access_flags;
  732. attr->cap.max_send_wr = qp->s_size - 1;
  733. attr->cap.max_recv_wr = qp->ibqp.srq ? 0 : qp->r_rq.size - 1;
  734. attr->cap.max_send_sge = qp->s_max_sge;
  735. attr->cap.max_recv_sge = qp->r_rq.max_sge;
  736. attr->cap.max_inline_data = 0;
  737. attr->ah_attr = qp->remote_ah_attr;
  738. attr->alt_ah_attr = qp->alt_ah_attr;
  739. attr->pkey_index = qp->s_pkey_index;
  740. attr->alt_pkey_index = qp->s_alt_pkey_index;
  741. attr->en_sqd_async_notify = 0;
  742. attr->sq_draining = qp->s_draining;
  743. attr->max_rd_atomic = qp->s_max_rd_atomic;
  744. attr->max_dest_rd_atomic = qp->r_max_rd_atomic;
  745. attr->min_rnr_timer = qp->r_min_rnr_timer;
  746. attr->port_num = qp->port_num;
  747. attr->timeout = qp->timeout;
  748. attr->retry_cnt = qp->s_retry_cnt;
  749. attr->rnr_retry = qp->s_rnr_retry_cnt;
  750. attr->alt_port_num = qp->alt_ah_attr.port_num;
  751. attr->alt_timeout = qp->alt_timeout;
  752. init_attr->event_handler = qp->ibqp.event_handler;
  753. init_attr->qp_context = qp->ibqp.qp_context;
  754. init_attr->send_cq = qp->ibqp.send_cq;
  755. init_attr->recv_cq = qp->ibqp.recv_cq;
  756. init_attr->srq = qp->ibqp.srq;
  757. init_attr->cap = attr->cap;
  758. if (qp->s_flags & QIB_S_SIGNAL_REQ_WR)
  759. init_attr->sq_sig_type = IB_SIGNAL_REQ_WR;
  760. else
  761. init_attr->sq_sig_type = IB_SIGNAL_ALL_WR;
  762. init_attr->qp_type = qp->ibqp.qp_type;
  763. init_attr->port_num = qp->port_num;
  764. return 0;
  765. }
  766. /**
  767. * qib_compute_aeth - compute the AETH (syndrome + MSN)
  768. * @qp: the queue pair to compute the AETH for
  769. *
  770. * Returns the AETH.
  771. */
  772. __be32 qib_compute_aeth(struct qib_qp *qp)
  773. {
  774. u32 aeth = qp->r_msn & QIB_MSN_MASK;
  775. if (qp->ibqp.srq) {
  776. /*
  777. * Shared receive queues don't generate credits.
  778. * Set the credit field to the invalid value.
  779. */
  780. aeth |= QIB_AETH_CREDIT_INVAL << QIB_AETH_CREDIT_SHIFT;
  781. } else {
  782. u32 min, max, x;
  783. u32 credits;
  784. struct qib_rwq *wq = qp->r_rq.wq;
  785. u32 head;
  786. u32 tail;
  787. /* sanity check pointers before trusting them */
  788. head = wq->head;
  789. if (head >= qp->r_rq.size)
  790. head = 0;
  791. tail = wq->tail;
  792. if (tail >= qp->r_rq.size)
  793. tail = 0;
  794. /*
  795. * Compute the number of credits available (RWQEs).
  796. * XXX Not holding the r_rq.lock here so there is a small
  797. * chance that the pair of reads are not atomic.
  798. */
  799. credits = head - tail;
  800. if ((int)credits < 0)
  801. credits += qp->r_rq.size;
  802. /*
  803. * Binary search the credit table to find the code to
  804. * use.
  805. */
  806. min = 0;
  807. max = 31;
  808. for (;;) {
  809. x = (min + max) / 2;
  810. if (credit_table[x] == credits)
  811. break;
  812. if (credit_table[x] > credits)
  813. max = x;
  814. else if (min == x)
  815. break;
  816. else
  817. min = x;
  818. }
  819. aeth |= x << QIB_AETH_CREDIT_SHIFT;
  820. }
  821. return cpu_to_be32(aeth);
  822. }
  823. /**
  824. * qib_create_qp - create a queue pair for a device
  825. * @ibpd: the protection domain who's device we create the queue pair for
  826. * @init_attr: the attributes of the queue pair
  827. * @udata: user data for libibverbs.so
  828. *
  829. * Returns the queue pair on success, otherwise returns an errno.
  830. *
  831. * Called by the ib_create_qp() core verbs function.
  832. */
  833. struct ib_qp *qib_create_qp(struct ib_pd *ibpd,
  834. struct ib_qp_init_attr *init_attr,
  835. struct ib_udata *udata)
  836. {
  837. struct qib_qp *qp;
  838. int err;
  839. struct qib_swqe *swq = NULL;
  840. struct qib_ibdev *dev;
  841. struct qib_devdata *dd;
  842. size_t sz;
  843. size_t sg_list_sz;
  844. struct ib_qp *ret;
  845. if (init_attr->cap.max_send_sge > ib_qib_max_sges ||
  846. init_attr->cap.max_send_wr > ib_qib_max_qp_wrs) {
  847. ret = ERR_PTR(-EINVAL);
  848. goto bail;
  849. }
  850. /* Check receive queue parameters if no SRQ is specified. */
  851. if (!init_attr->srq) {
  852. if (init_attr->cap.max_recv_sge > ib_qib_max_sges ||
  853. init_attr->cap.max_recv_wr > ib_qib_max_qp_wrs) {
  854. ret = ERR_PTR(-EINVAL);
  855. goto bail;
  856. }
  857. if (init_attr->cap.max_send_sge +
  858. init_attr->cap.max_send_wr +
  859. init_attr->cap.max_recv_sge +
  860. init_attr->cap.max_recv_wr == 0) {
  861. ret = ERR_PTR(-EINVAL);
  862. goto bail;
  863. }
  864. }
  865. switch (init_attr->qp_type) {
  866. case IB_QPT_SMI:
  867. case IB_QPT_GSI:
  868. if (init_attr->port_num == 0 ||
  869. init_attr->port_num > ibpd->device->phys_port_cnt) {
  870. ret = ERR_PTR(-EINVAL);
  871. goto bail;
  872. }
  873. case IB_QPT_UC:
  874. case IB_QPT_RC:
  875. case IB_QPT_UD:
  876. sz = sizeof(struct qib_sge) *
  877. init_attr->cap.max_send_sge +
  878. sizeof(struct qib_swqe);
  879. swq = vmalloc((init_attr->cap.max_send_wr + 1) * sz);
  880. if (swq == NULL) {
  881. ret = ERR_PTR(-ENOMEM);
  882. goto bail;
  883. }
  884. sz = sizeof(*qp);
  885. sg_list_sz = 0;
  886. if (init_attr->srq) {
  887. struct qib_srq *srq = to_isrq(init_attr->srq);
  888. if (srq->rq.max_sge > 1)
  889. sg_list_sz = sizeof(*qp->r_sg_list) *
  890. (srq->rq.max_sge - 1);
  891. } else if (init_attr->cap.max_recv_sge > 1)
  892. sg_list_sz = sizeof(*qp->r_sg_list) *
  893. (init_attr->cap.max_recv_sge - 1);
  894. qp = kzalloc(sz + sg_list_sz, GFP_KERNEL);
  895. if (!qp) {
  896. ret = ERR_PTR(-ENOMEM);
  897. goto bail_swq;
  898. }
  899. if (init_attr->srq)
  900. sz = 0;
  901. else {
  902. qp->r_rq.size = init_attr->cap.max_recv_wr + 1;
  903. qp->r_rq.max_sge = init_attr->cap.max_recv_sge;
  904. sz = (sizeof(struct ib_sge) * qp->r_rq.max_sge) +
  905. sizeof(struct qib_rwqe);
  906. qp->r_rq.wq = vmalloc_user(sizeof(struct qib_rwq) +
  907. qp->r_rq.size * sz);
  908. if (!qp->r_rq.wq) {
  909. ret = ERR_PTR(-ENOMEM);
  910. goto bail_qp;
  911. }
  912. }
  913. /*
  914. * ib_create_qp() will initialize qp->ibqp
  915. * except for qp->ibqp.qp_num.
  916. */
  917. spin_lock_init(&qp->r_lock);
  918. spin_lock_init(&qp->s_lock);
  919. spin_lock_init(&qp->r_rq.lock);
  920. atomic_set(&qp->refcount, 0);
  921. init_waitqueue_head(&qp->wait);
  922. init_waitqueue_head(&qp->wait_dma);
  923. init_timer(&qp->s_timer);
  924. qp->s_timer.data = (unsigned long)qp;
  925. INIT_WORK(&qp->s_work, qib_do_send);
  926. INIT_LIST_HEAD(&qp->iowait);
  927. INIT_LIST_HEAD(&qp->rspwait);
  928. qp->state = IB_QPS_RESET;
  929. qp->s_wq = swq;
  930. qp->s_size = init_attr->cap.max_send_wr + 1;
  931. qp->s_max_sge = init_attr->cap.max_send_sge;
  932. if (init_attr->sq_sig_type == IB_SIGNAL_REQ_WR)
  933. qp->s_flags = QIB_S_SIGNAL_REQ_WR;
  934. dev = to_idev(ibpd->device);
  935. dd = dd_from_dev(dev);
  936. err = alloc_qpn(dd, &dev->qpn_table, init_attr->qp_type,
  937. init_attr->port_num);
  938. if (err < 0) {
  939. ret = ERR_PTR(err);
  940. vfree(qp->r_rq.wq);
  941. goto bail_qp;
  942. }
  943. qp->ibqp.qp_num = err;
  944. qp->port_num = init_attr->port_num;
  945. qib_reset_qp(qp, init_attr->qp_type);
  946. break;
  947. default:
  948. /* Don't support raw QPs */
  949. ret = ERR_PTR(-ENOSYS);
  950. goto bail;
  951. }
  952. init_attr->cap.max_inline_data = 0;
  953. /*
  954. * Return the address of the RWQ as the offset to mmap.
  955. * See qib_mmap() for details.
  956. */
  957. if (udata && udata->outlen >= sizeof(__u64)) {
  958. if (!qp->r_rq.wq) {
  959. __u64 offset = 0;
  960. err = ib_copy_to_udata(udata, &offset,
  961. sizeof(offset));
  962. if (err) {
  963. ret = ERR_PTR(err);
  964. goto bail_ip;
  965. }
  966. } else {
  967. u32 s = sizeof(struct qib_rwq) + qp->r_rq.size * sz;
  968. qp->ip = qib_create_mmap_info(dev, s,
  969. ibpd->uobject->context,
  970. qp->r_rq.wq);
  971. if (!qp->ip) {
  972. ret = ERR_PTR(-ENOMEM);
  973. goto bail_ip;
  974. }
  975. err = ib_copy_to_udata(udata, &(qp->ip->offset),
  976. sizeof(qp->ip->offset));
  977. if (err) {
  978. ret = ERR_PTR(err);
  979. goto bail_ip;
  980. }
  981. }
  982. }
  983. spin_lock(&dev->n_qps_lock);
  984. if (dev->n_qps_allocated == ib_qib_max_qps) {
  985. spin_unlock(&dev->n_qps_lock);
  986. ret = ERR_PTR(-ENOMEM);
  987. goto bail_ip;
  988. }
  989. dev->n_qps_allocated++;
  990. spin_unlock(&dev->n_qps_lock);
  991. if (qp->ip) {
  992. spin_lock_irq(&dev->pending_lock);
  993. list_add(&qp->ip->pending_mmaps, &dev->pending_mmaps);
  994. spin_unlock_irq(&dev->pending_lock);
  995. }
  996. ret = &qp->ibqp;
  997. goto bail;
  998. bail_ip:
  999. if (qp->ip)
  1000. kref_put(&qp->ip->ref, qib_release_mmap_info);
  1001. else
  1002. vfree(qp->r_rq.wq);
  1003. free_qpn(&dev->qpn_table, qp->ibqp.qp_num);
  1004. bail_qp:
  1005. kfree(qp);
  1006. bail_swq:
  1007. vfree(swq);
  1008. bail:
  1009. return ret;
  1010. }
  1011. /**
  1012. * qib_destroy_qp - destroy a queue pair
  1013. * @ibqp: the queue pair to destroy
  1014. *
  1015. * Returns 0 on success.
  1016. *
  1017. * Note that this can be called while the QP is actively sending or
  1018. * receiving!
  1019. */
  1020. int qib_destroy_qp(struct ib_qp *ibqp)
  1021. {
  1022. struct qib_qp *qp = to_iqp(ibqp);
  1023. struct qib_ibdev *dev = to_idev(ibqp->device);
  1024. /* Make sure HW and driver activity is stopped. */
  1025. spin_lock_irq(&qp->s_lock);
  1026. if (qp->state != IB_QPS_RESET) {
  1027. qp->state = IB_QPS_RESET;
  1028. spin_lock(&dev->pending_lock);
  1029. if (!list_empty(&qp->iowait))
  1030. list_del_init(&qp->iowait);
  1031. spin_unlock(&dev->pending_lock);
  1032. qp->s_flags &= ~(QIB_S_TIMER | QIB_S_ANY_WAIT);
  1033. spin_unlock_irq(&qp->s_lock);
  1034. cancel_work_sync(&qp->s_work);
  1035. del_timer_sync(&qp->s_timer);
  1036. wait_event(qp->wait_dma, !atomic_read(&qp->s_dma_busy));
  1037. if (qp->s_tx) {
  1038. qib_put_txreq(qp->s_tx);
  1039. qp->s_tx = NULL;
  1040. }
  1041. remove_qp(dev, qp);
  1042. wait_event(qp->wait, !atomic_read(&qp->refcount));
  1043. clear_mr_refs(qp, 1);
  1044. } else
  1045. spin_unlock_irq(&qp->s_lock);
  1046. /* all user's cleaned up, mark it available */
  1047. free_qpn(&dev->qpn_table, qp->ibqp.qp_num);
  1048. spin_lock(&dev->n_qps_lock);
  1049. dev->n_qps_allocated--;
  1050. spin_unlock(&dev->n_qps_lock);
  1051. if (qp->ip)
  1052. kref_put(&qp->ip->ref, qib_release_mmap_info);
  1053. else
  1054. vfree(qp->r_rq.wq);
  1055. vfree(qp->s_wq);
  1056. kfree(qp);
  1057. return 0;
  1058. }
  1059. /**
  1060. * qib_init_qpn_table - initialize the QP number table for a device
  1061. * @qpt: the QPN table
  1062. */
  1063. void qib_init_qpn_table(struct qib_devdata *dd, struct qib_qpn_table *qpt)
  1064. {
  1065. spin_lock_init(&qpt->lock);
  1066. qpt->last = 1; /* start with QPN 2 */
  1067. qpt->nmaps = 1;
  1068. qpt->mask = dd->qpn_mask;
  1069. }
  1070. /**
  1071. * qib_free_qpn_table - free the QP number table for a device
  1072. * @qpt: the QPN table
  1073. */
  1074. void qib_free_qpn_table(struct qib_qpn_table *qpt)
  1075. {
  1076. int i;
  1077. for (i = 0; i < ARRAY_SIZE(qpt->map); i++)
  1078. if (qpt->map[i].page)
  1079. free_page((unsigned long) qpt->map[i].page);
  1080. }
  1081. /**
  1082. * qib_get_credit - flush the send work queue of a QP
  1083. * @qp: the qp who's send work queue to flush
  1084. * @aeth: the Acknowledge Extended Transport Header
  1085. *
  1086. * The QP s_lock should be held.
  1087. */
  1088. void qib_get_credit(struct qib_qp *qp, u32 aeth)
  1089. {
  1090. u32 credit = (aeth >> QIB_AETH_CREDIT_SHIFT) & QIB_AETH_CREDIT_MASK;
  1091. /*
  1092. * If the credit is invalid, we can send
  1093. * as many packets as we like. Otherwise, we have to
  1094. * honor the credit field.
  1095. */
  1096. if (credit == QIB_AETH_CREDIT_INVAL) {
  1097. if (!(qp->s_flags & QIB_S_UNLIMITED_CREDIT)) {
  1098. qp->s_flags |= QIB_S_UNLIMITED_CREDIT;
  1099. if (qp->s_flags & QIB_S_WAIT_SSN_CREDIT) {
  1100. qp->s_flags &= ~QIB_S_WAIT_SSN_CREDIT;
  1101. qib_schedule_send(qp);
  1102. }
  1103. }
  1104. } else if (!(qp->s_flags & QIB_S_UNLIMITED_CREDIT)) {
  1105. /* Compute new LSN (i.e., MSN + credit) */
  1106. credit = (aeth + credit_table[credit]) & QIB_MSN_MASK;
  1107. if (qib_cmp24(credit, qp->s_lsn) > 0) {
  1108. qp->s_lsn = credit;
  1109. if (qp->s_flags & QIB_S_WAIT_SSN_CREDIT) {
  1110. qp->s_flags &= ~QIB_S_WAIT_SSN_CREDIT;
  1111. qib_schedule_send(qp);
  1112. }
  1113. }
  1114. }
  1115. }