nes_utils.c 31 KB

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  1. /*
  2. * Copyright (c) 2006 - 2009 Intel Corporation. All rights reserved.
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and/or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. *
  32. */
  33. #include <linux/module.h>
  34. #include <linux/moduleparam.h>
  35. #include <linux/netdevice.h>
  36. #include <linux/etherdevice.h>
  37. #include <linux/ethtool.h>
  38. #include <linux/mii.h>
  39. #include <linux/if_vlan.h>
  40. #include <linux/slab.h>
  41. #include <linux/crc32.h>
  42. #include <linux/in.h>
  43. #include <linux/ip.h>
  44. #include <linux/tcp.h>
  45. #include <linux/init.h>
  46. #include <asm/io.h>
  47. #include <asm/irq.h>
  48. #include <asm/byteorder.h>
  49. #include "nes.h"
  50. static u16 nes_read16_eeprom(void __iomem *addr, u16 offset);
  51. u32 mh_detected;
  52. u32 mh_pauses_sent;
  53. /**
  54. * nes_read_eeprom_values -
  55. */
  56. int nes_read_eeprom_values(struct nes_device *nesdev, struct nes_adapter *nesadapter)
  57. {
  58. u32 mac_addr_low;
  59. u16 mac_addr_high;
  60. u16 eeprom_data;
  61. u16 eeprom_offset;
  62. u16 next_section_address;
  63. u16 sw_section_ver;
  64. u8 major_ver = 0;
  65. u8 minor_ver = 0;
  66. /* TODO: deal with EEPROM endian issues */
  67. if (nesadapter->firmware_eeprom_offset == 0) {
  68. /* Read the EEPROM Parameters */
  69. eeprom_data = nes_read16_eeprom(nesdev->regs, 0);
  70. nes_debug(NES_DBG_HW, "EEPROM Offset 0 = 0x%04X\n", eeprom_data);
  71. eeprom_offset = 2 + (((eeprom_data & 0x007f) << 3) <<
  72. ((eeprom_data & 0x0080) >> 7));
  73. nes_debug(NES_DBG_HW, "Firmware Offset = 0x%04X\n", eeprom_offset);
  74. nesadapter->firmware_eeprom_offset = eeprom_offset;
  75. eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset + 4);
  76. if (eeprom_data != 0x5746) {
  77. nes_debug(NES_DBG_HW, "Not a valid Firmware Image = 0x%04X\n", eeprom_data);
  78. return -1;
  79. }
  80. eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset + 2);
  81. nes_debug(NES_DBG_HW, "EEPROM Offset %u = 0x%04X\n",
  82. eeprom_offset + 2, eeprom_data);
  83. eeprom_offset += ((eeprom_data & 0x00ff) << 3) << ((eeprom_data & 0x0100) >> 8);
  84. nes_debug(NES_DBG_HW, "Software Offset = 0x%04X\n", eeprom_offset);
  85. nesadapter->software_eeprom_offset = eeprom_offset;
  86. eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset + 4);
  87. if (eeprom_data != 0x5753) {
  88. printk("Not a valid Software Image = 0x%04X\n", eeprom_data);
  89. return -1;
  90. }
  91. sw_section_ver = nes_read16_eeprom(nesdev->regs, nesadapter->software_eeprom_offset + 6);
  92. nes_debug(NES_DBG_HW, "Software section version number = 0x%04X\n",
  93. sw_section_ver);
  94. eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset + 2);
  95. nes_debug(NES_DBG_HW, "EEPROM Offset %u (next section) = 0x%04X\n",
  96. eeprom_offset + 2, eeprom_data);
  97. next_section_address = eeprom_offset + (((eeprom_data & 0x00ff) << 3) <<
  98. ((eeprom_data & 0x0100) >> 8));
  99. eeprom_data = nes_read16_eeprom(nesdev->regs, next_section_address + 4);
  100. if (eeprom_data != 0x414d) {
  101. nes_debug(NES_DBG_HW, "EEPROM Changed offset should be 0x414d but was 0x%04X\n",
  102. eeprom_data);
  103. goto no_fw_rev;
  104. }
  105. eeprom_offset = next_section_address;
  106. eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset + 2);
  107. nes_debug(NES_DBG_HW, "EEPROM Offset %u (next section) = 0x%04X\n",
  108. eeprom_offset + 2, eeprom_data);
  109. next_section_address = eeprom_offset + (((eeprom_data & 0x00ff) << 3) <<
  110. ((eeprom_data & 0x0100) >> 8));
  111. eeprom_data = nes_read16_eeprom(nesdev->regs, next_section_address + 4);
  112. if (eeprom_data != 0x4f52) {
  113. nes_debug(NES_DBG_HW, "EEPROM Changed offset should be 0x4f52 but was 0x%04X\n",
  114. eeprom_data);
  115. goto no_fw_rev;
  116. }
  117. eeprom_offset = next_section_address;
  118. eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset + 2);
  119. nes_debug(NES_DBG_HW, "EEPROM Offset %u (next section) = 0x%04X\n",
  120. eeprom_offset + 2, eeprom_data);
  121. next_section_address = eeprom_offset + ((eeprom_data & 0x00ff) << 3);
  122. eeprom_data = nes_read16_eeprom(nesdev->regs, next_section_address + 4);
  123. if (eeprom_data != 0x5746) {
  124. nes_debug(NES_DBG_HW, "EEPROM Changed offset should be 0x5746 but was 0x%04X\n",
  125. eeprom_data);
  126. goto no_fw_rev;
  127. }
  128. eeprom_offset = next_section_address;
  129. eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset + 2);
  130. nes_debug(NES_DBG_HW, "EEPROM Offset %u (next section) = 0x%04X\n",
  131. eeprom_offset + 2, eeprom_data);
  132. next_section_address = eeprom_offset + ((eeprom_data & 0x00ff) << 3);
  133. eeprom_data = nes_read16_eeprom(nesdev->regs, next_section_address + 4);
  134. if (eeprom_data != 0x5753) {
  135. nes_debug(NES_DBG_HW, "EEPROM Changed offset should be 0x5753 but was 0x%04X\n",
  136. eeprom_data);
  137. goto no_fw_rev;
  138. }
  139. eeprom_offset = next_section_address;
  140. eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset + 2);
  141. nes_debug(NES_DBG_HW, "EEPROM Offset %u (next section) = 0x%04X\n",
  142. eeprom_offset + 2, eeprom_data);
  143. next_section_address = eeprom_offset + ((eeprom_data & 0x00ff) << 3);
  144. eeprom_data = nes_read16_eeprom(nesdev->regs, next_section_address + 4);
  145. if (eeprom_data != 0x414d) {
  146. nes_debug(NES_DBG_HW, "EEPROM Changed offset should be 0x414d but was 0x%04X\n",
  147. eeprom_data);
  148. goto no_fw_rev;
  149. }
  150. eeprom_offset = next_section_address;
  151. eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset + 2);
  152. nes_debug(NES_DBG_HW, "EEPROM Offset %u (next section) = 0x%04X\n",
  153. eeprom_offset + 2, eeprom_data);
  154. next_section_address = eeprom_offset + ((eeprom_data & 0x00ff) << 3);
  155. eeprom_data = nes_read16_eeprom(nesdev->regs, next_section_address + 4);
  156. if (eeprom_data != 0x464e) {
  157. nes_debug(NES_DBG_HW, "EEPROM Changed offset should be 0x464e but was 0x%04X\n",
  158. eeprom_data);
  159. goto no_fw_rev;
  160. }
  161. eeprom_data = nes_read16_eeprom(nesdev->regs, next_section_address + 8);
  162. printk(PFX "Firmware version %u.%u\n", (u8)(eeprom_data>>8), (u8)eeprom_data);
  163. major_ver = (u8)(eeprom_data >> 8);
  164. minor_ver = (u8)(eeprom_data);
  165. if (nes_drv_opt & NES_DRV_OPT_DISABLE_VIRT_WQ) {
  166. nes_debug(NES_DBG_HW, "Virtual WQs have been disabled\n");
  167. } else if (((major_ver == 2) && (minor_ver > 21)) || ((major_ver > 2) && (major_ver != 255))) {
  168. nesadapter->virtwq = 1;
  169. }
  170. if (((major_ver == 3) && (minor_ver >= 16)) || (major_ver > 3))
  171. nesadapter->send_term_ok = 1;
  172. nesadapter->firmware_version = (((u32)(u8)(eeprom_data>>8)) << 16) +
  173. (u32)((u8)eeprom_data);
  174. eeprom_data = nes_read16_eeprom(nesdev->regs, next_section_address + 10);
  175. printk(PFX "EEPROM version %u.%u\n", (u8)(eeprom_data>>8), (u8)eeprom_data);
  176. nesadapter->eeprom_version = (((u32)(u8)(eeprom_data>>8)) << 16) +
  177. (u32)((u8)eeprom_data);
  178. no_fw_rev:
  179. /* eeprom is valid */
  180. eeprom_offset = nesadapter->software_eeprom_offset;
  181. eeprom_offset += 8;
  182. nesadapter->netdev_max = (u8)nes_read16_eeprom(nesdev->regs, eeprom_offset);
  183. eeprom_offset += 2;
  184. mac_addr_high = nes_read16_eeprom(nesdev->regs, eeprom_offset);
  185. eeprom_offset += 2;
  186. mac_addr_low = (u32)nes_read16_eeprom(nesdev->regs, eeprom_offset);
  187. eeprom_offset += 2;
  188. mac_addr_low <<= 16;
  189. mac_addr_low += (u32)nes_read16_eeprom(nesdev->regs, eeprom_offset);
  190. nes_debug(NES_DBG_HW, "Base MAC Address = 0x%04X%08X\n",
  191. mac_addr_high, mac_addr_low);
  192. nes_debug(NES_DBG_HW, "MAC Address count = %u\n", nesadapter->netdev_max);
  193. nesadapter->mac_addr_low = mac_addr_low;
  194. nesadapter->mac_addr_high = mac_addr_high;
  195. /* Read the Phy Type array */
  196. eeprom_offset += 10;
  197. eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
  198. nesadapter->phy_type[0] = (u8)(eeprom_data >> 8);
  199. nesadapter->phy_type[1] = (u8)eeprom_data;
  200. /* Read the port array */
  201. eeprom_offset += 2;
  202. eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
  203. nesadapter->phy_type[2] = (u8)(eeprom_data >> 8);
  204. nesadapter->phy_type[3] = (u8)eeprom_data;
  205. /* port_count is set by soft reset reg */
  206. nes_debug(NES_DBG_HW, "port_count = %u, port 0 -> %u, port 1 -> %u,"
  207. " port 2 -> %u, port 3 -> %u\n",
  208. nesadapter->port_count,
  209. nesadapter->phy_type[0], nesadapter->phy_type[1],
  210. nesadapter->phy_type[2], nesadapter->phy_type[3]);
  211. /* Read PD config array */
  212. eeprom_offset += 10;
  213. eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
  214. nesadapter->pd_config_size[0] = eeprom_data;
  215. eeprom_offset += 2;
  216. eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
  217. nesadapter->pd_config_base[0] = eeprom_data;
  218. nes_debug(NES_DBG_HW, "PD0 config, size=0x%04x, base=0x%04x\n",
  219. nesadapter->pd_config_size[0], nesadapter->pd_config_base[0]);
  220. eeprom_offset += 2;
  221. eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
  222. nesadapter->pd_config_size[1] = eeprom_data;
  223. eeprom_offset += 2;
  224. eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
  225. nesadapter->pd_config_base[1] = eeprom_data;
  226. nes_debug(NES_DBG_HW, "PD1 config, size=0x%04x, base=0x%04x\n",
  227. nesadapter->pd_config_size[1], nesadapter->pd_config_base[1]);
  228. eeprom_offset += 2;
  229. eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
  230. nesadapter->pd_config_size[2] = eeprom_data;
  231. eeprom_offset += 2;
  232. eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
  233. nesadapter->pd_config_base[2] = eeprom_data;
  234. nes_debug(NES_DBG_HW, "PD2 config, size=0x%04x, base=0x%04x\n",
  235. nesadapter->pd_config_size[2], nesadapter->pd_config_base[2]);
  236. eeprom_offset += 2;
  237. eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
  238. nesadapter->pd_config_size[3] = eeprom_data;
  239. eeprom_offset += 2;
  240. eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
  241. nesadapter->pd_config_base[3] = eeprom_data;
  242. nes_debug(NES_DBG_HW, "PD3 config, size=0x%04x, base=0x%04x\n",
  243. nesadapter->pd_config_size[3], nesadapter->pd_config_base[3]);
  244. /* Read Rx Pool Size */
  245. eeprom_offset += 22; /* 46 */
  246. eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
  247. eeprom_offset += 2;
  248. nesadapter->rx_pool_size = (((u32)eeprom_data) << 16) +
  249. nes_read16_eeprom(nesdev->regs, eeprom_offset);
  250. nes_debug(NES_DBG_HW, "rx_pool_size = 0x%08X\n", nesadapter->rx_pool_size);
  251. eeprom_offset += 2;
  252. eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
  253. eeprom_offset += 2;
  254. nesadapter->tx_pool_size = (((u32)eeprom_data) << 16) +
  255. nes_read16_eeprom(nesdev->regs, eeprom_offset);
  256. nes_debug(NES_DBG_HW, "tx_pool_size = 0x%08X\n", nesadapter->tx_pool_size);
  257. eeprom_offset += 2;
  258. eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
  259. eeprom_offset += 2;
  260. nesadapter->rx_threshold = (((u32)eeprom_data) << 16) +
  261. nes_read16_eeprom(nesdev->regs, eeprom_offset);
  262. nes_debug(NES_DBG_HW, "rx_threshold = 0x%08X\n", nesadapter->rx_threshold);
  263. eeprom_offset += 2;
  264. eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
  265. eeprom_offset += 2;
  266. nesadapter->tcp_timer_core_clk_divisor = (((u32)eeprom_data) << 16) +
  267. nes_read16_eeprom(nesdev->regs, eeprom_offset);
  268. nes_debug(NES_DBG_HW, "tcp_timer_core_clk_divisor = 0x%08X\n",
  269. nesadapter->tcp_timer_core_clk_divisor);
  270. eeprom_offset += 2;
  271. eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
  272. eeprom_offset += 2;
  273. nesadapter->iwarp_config = (((u32)eeprom_data) << 16) +
  274. nes_read16_eeprom(nesdev->regs, eeprom_offset);
  275. nes_debug(NES_DBG_HW, "iwarp_config = 0x%08X\n", nesadapter->iwarp_config);
  276. eeprom_offset += 2;
  277. eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
  278. eeprom_offset += 2;
  279. nesadapter->cm_config = (((u32)eeprom_data) << 16) +
  280. nes_read16_eeprom(nesdev->regs, eeprom_offset);
  281. nes_debug(NES_DBG_HW, "cm_config = 0x%08X\n", nesadapter->cm_config);
  282. eeprom_offset += 2;
  283. eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
  284. eeprom_offset += 2;
  285. nesadapter->sws_timer_config = (((u32)eeprom_data) << 16) +
  286. nes_read16_eeprom(nesdev->regs, eeprom_offset);
  287. nes_debug(NES_DBG_HW, "sws_timer_config = 0x%08X\n", nesadapter->sws_timer_config);
  288. eeprom_offset += 2;
  289. eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
  290. eeprom_offset += 2;
  291. nesadapter->tcp_config1 = (((u32)eeprom_data) << 16) +
  292. nes_read16_eeprom(nesdev->regs, eeprom_offset);
  293. nes_debug(NES_DBG_HW, "tcp_config1 = 0x%08X\n", nesadapter->tcp_config1);
  294. eeprom_offset += 2;
  295. eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
  296. eeprom_offset += 2;
  297. nesadapter->wqm_wat = (((u32)eeprom_data) << 16) +
  298. nes_read16_eeprom(nesdev->regs, eeprom_offset);
  299. nes_debug(NES_DBG_HW, "wqm_wat = 0x%08X\n", nesadapter->wqm_wat);
  300. eeprom_offset += 2;
  301. eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
  302. eeprom_offset += 2;
  303. nesadapter->core_clock = (((u32)eeprom_data) << 16) +
  304. nes_read16_eeprom(nesdev->regs, eeprom_offset);
  305. nes_debug(NES_DBG_HW, "core_clock = 0x%08X\n", nesadapter->core_clock);
  306. if ((sw_section_ver) && (nesadapter->hw_rev != NE020_REV)) {
  307. eeprom_offset += 2;
  308. eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
  309. nesadapter->phy_index[0] = (eeprom_data & 0xff00)>>8;
  310. nesadapter->phy_index[1] = eeprom_data & 0x00ff;
  311. eeprom_offset += 2;
  312. eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
  313. nesadapter->phy_index[2] = (eeprom_data & 0xff00)>>8;
  314. nesadapter->phy_index[3] = eeprom_data & 0x00ff;
  315. } else {
  316. nesadapter->phy_index[0] = 4;
  317. nesadapter->phy_index[1] = 5;
  318. nesadapter->phy_index[2] = 6;
  319. nesadapter->phy_index[3] = 7;
  320. }
  321. nes_debug(NES_DBG_HW, "Phy address map = 0 > %u, 1 > %u, 2 > %u, 3 > %u\n",
  322. nesadapter->phy_index[0],nesadapter->phy_index[1],
  323. nesadapter->phy_index[2],nesadapter->phy_index[3]);
  324. }
  325. return 0;
  326. }
  327. /**
  328. * nes_read16_eeprom
  329. */
  330. static u16 nes_read16_eeprom(void __iomem *addr, u16 offset)
  331. {
  332. writel(NES_EEPROM_READ_REQUEST + (offset >> 1),
  333. (void __iomem *)addr + NES_EEPROM_COMMAND);
  334. do {
  335. } while (readl((void __iomem *)addr + NES_EEPROM_COMMAND) &
  336. NES_EEPROM_READ_REQUEST);
  337. return readw((void __iomem *)addr + NES_EEPROM_DATA);
  338. }
  339. /**
  340. * nes_write_1G_phy_reg
  341. */
  342. void nes_write_1G_phy_reg(struct nes_device *nesdev, u8 phy_reg, u8 phy_addr, u16 data)
  343. {
  344. u32 u32temp;
  345. u32 counter;
  346. nes_write_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL,
  347. 0x50020000 | data | ((u32)phy_reg << 18) | ((u32)phy_addr << 23));
  348. for (counter = 0; counter < 100 ; counter++) {
  349. udelay(30);
  350. u32temp = nes_read_indexed(nesdev, NES_IDX_MAC_INT_STATUS);
  351. if (u32temp & 1) {
  352. /* nes_debug(NES_DBG_PHY, "Phy interrupt status = 0x%X.\n", u32temp); */
  353. nes_write_indexed(nesdev, NES_IDX_MAC_INT_STATUS, 1);
  354. break;
  355. }
  356. }
  357. if (!(u32temp & 1))
  358. nes_debug(NES_DBG_PHY, "Phy is not responding. interrupt status = 0x%X.\n",
  359. u32temp);
  360. }
  361. /**
  362. * nes_read_1G_phy_reg
  363. * This routine only issues the read, the data must be read
  364. * separately.
  365. */
  366. void nes_read_1G_phy_reg(struct nes_device *nesdev, u8 phy_reg, u8 phy_addr, u16 *data)
  367. {
  368. u32 u32temp;
  369. u32 counter;
  370. /* nes_debug(NES_DBG_PHY, "phy addr = %d, mac_index = %d\n",
  371. phy_addr, nesdev->mac_index); */
  372. nes_write_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL,
  373. 0x60020000 | ((u32)phy_reg << 18) | ((u32)phy_addr << 23));
  374. for (counter = 0; counter < 100 ; counter++) {
  375. udelay(30);
  376. u32temp = nes_read_indexed(nesdev, NES_IDX_MAC_INT_STATUS);
  377. if (u32temp & 1) {
  378. /* nes_debug(NES_DBG_PHY, "Phy interrupt status = 0x%X.\n", u32temp); */
  379. nes_write_indexed(nesdev, NES_IDX_MAC_INT_STATUS, 1);
  380. break;
  381. }
  382. }
  383. if (!(u32temp & 1)) {
  384. nes_debug(NES_DBG_PHY, "Phy is not responding. interrupt status = 0x%X.\n",
  385. u32temp);
  386. *data = 0xffff;
  387. } else {
  388. *data = (u16)nes_read_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL);
  389. }
  390. }
  391. /**
  392. * nes_write_10G_phy_reg
  393. */
  394. void nes_write_10G_phy_reg(struct nes_device *nesdev, u16 phy_addr, u8 dev_addr, u16 phy_reg,
  395. u16 data)
  396. {
  397. u32 port_addr;
  398. u32 u32temp;
  399. u32 counter;
  400. port_addr = phy_addr;
  401. /* set address */
  402. nes_write_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL,
  403. 0x00020000 | (u32)phy_reg | (((u32)dev_addr) << 18) | (((u32)port_addr) << 23));
  404. for (counter = 0; counter < 100 ; counter++) {
  405. udelay(30);
  406. u32temp = nes_read_indexed(nesdev, NES_IDX_MAC_INT_STATUS);
  407. if (u32temp & 1) {
  408. nes_write_indexed(nesdev, NES_IDX_MAC_INT_STATUS, 1);
  409. break;
  410. }
  411. }
  412. if (!(u32temp & 1))
  413. nes_debug(NES_DBG_PHY, "Phy is not responding. interrupt status = 0x%X.\n",
  414. u32temp);
  415. /* set data */
  416. nes_write_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL,
  417. 0x10020000 | (u32)data | (((u32)dev_addr) << 18) | (((u32)port_addr) << 23));
  418. for (counter = 0; counter < 100 ; counter++) {
  419. udelay(30);
  420. u32temp = nes_read_indexed(nesdev, NES_IDX_MAC_INT_STATUS);
  421. if (u32temp & 1) {
  422. nes_write_indexed(nesdev, NES_IDX_MAC_INT_STATUS, 1);
  423. break;
  424. }
  425. }
  426. if (!(u32temp & 1))
  427. nes_debug(NES_DBG_PHY, "Phy is not responding. interrupt status = 0x%X.\n",
  428. u32temp);
  429. }
  430. /**
  431. * nes_read_10G_phy_reg
  432. * This routine only issues the read, the data must be read
  433. * separately.
  434. */
  435. void nes_read_10G_phy_reg(struct nes_device *nesdev, u8 phy_addr, u8 dev_addr, u16 phy_reg)
  436. {
  437. u32 port_addr;
  438. u32 u32temp;
  439. u32 counter;
  440. port_addr = phy_addr;
  441. /* set address */
  442. nes_write_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL,
  443. 0x00020000 | (u32)phy_reg | (((u32)dev_addr) << 18) | (((u32)port_addr) << 23));
  444. for (counter = 0; counter < 100 ; counter++) {
  445. udelay(30);
  446. u32temp = nes_read_indexed(nesdev, NES_IDX_MAC_INT_STATUS);
  447. if (u32temp & 1) {
  448. nes_write_indexed(nesdev, NES_IDX_MAC_INT_STATUS, 1);
  449. break;
  450. }
  451. }
  452. if (!(u32temp & 1))
  453. nes_debug(NES_DBG_PHY, "Phy is not responding. interrupt status = 0x%X.\n",
  454. u32temp);
  455. /* issue read */
  456. nes_write_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL,
  457. 0x30020000 | (((u32)dev_addr) << 18) | (((u32)port_addr) << 23));
  458. for (counter = 0; counter < 100 ; counter++) {
  459. udelay(30);
  460. u32temp = nes_read_indexed(nesdev, NES_IDX_MAC_INT_STATUS);
  461. if (u32temp & 1) {
  462. nes_write_indexed(nesdev, NES_IDX_MAC_INT_STATUS, 1);
  463. break;
  464. }
  465. }
  466. if (!(u32temp & 1))
  467. nes_debug(NES_DBG_PHY, "Phy is not responding. interrupt status = 0x%X.\n",
  468. u32temp);
  469. }
  470. /**
  471. * nes_get_cqp_request
  472. */
  473. struct nes_cqp_request *nes_get_cqp_request(struct nes_device *nesdev)
  474. {
  475. unsigned long flags;
  476. struct nes_cqp_request *cqp_request = NULL;
  477. if (!list_empty(&nesdev->cqp_avail_reqs)) {
  478. spin_lock_irqsave(&nesdev->cqp.lock, flags);
  479. if (!list_empty(&nesdev->cqp_avail_reqs)) {
  480. cqp_request = list_entry(nesdev->cqp_avail_reqs.next,
  481. struct nes_cqp_request, list);
  482. list_del_init(&cqp_request->list);
  483. }
  484. spin_unlock_irqrestore(&nesdev->cqp.lock, flags);
  485. }
  486. if (cqp_request == NULL) {
  487. cqp_request = kzalloc(sizeof(struct nes_cqp_request), GFP_ATOMIC);
  488. if (cqp_request) {
  489. cqp_request->dynamic = 1;
  490. INIT_LIST_HEAD(&cqp_request->list);
  491. }
  492. }
  493. if (cqp_request) {
  494. init_waitqueue_head(&cqp_request->waitq);
  495. cqp_request->waiting = 0;
  496. cqp_request->request_done = 0;
  497. cqp_request->callback = 0;
  498. init_waitqueue_head(&cqp_request->waitq);
  499. nes_debug(NES_DBG_CQP, "Got cqp request %p from the available list \n",
  500. cqp_request);
  501. } else
  502. printk(KERN_ERR PFX "%s: Could not allocated a CQP request.\n",
  503. __func__);
  504. return cqp_request;
  505. }
  506. void nes_free_cqp_request(struct nes_device *nesdev,
  507. struct nes_cqp_request *cqp_request)
  508. {
  509. unsigned long flags;
  510. nes_debug(NES_DBG_CQP, "CQP request %p (opcode 0x%02X) freed.\n",
  511. cqp_request,
  512. le32_to_cpu(cqp_request->cqp_wqe.wqe_words[NES_CQP_WQE_OPCODE_IDX]) & 0x3f);
  513. if (cqp_request->dynamic) {
  514. kfree(cqp_request);
  515. } else {
  516. spin_lock_irqsave(&nesdev->cqp.lock, flags);
  517. list_add_tail(&cqp_request->list, &nesdev->cqp_avail_reqs);
  518. spin_unlock_irqrestore(&nesdev->cqp.lock, flags);
  519. }
  520. }
  521. void nes_put_cqp_request(struct nes_device *nesdev,
  522. struct nes_cqp_request *cqp_request)
  523. {
  524. if (atomic_dec_and_test(&cqp_request->refcount))
  525. nes_free_cqp_request(nesdev, cqp_request);
  526. }
  527. /**
  528. * nes_post_cqp_request
  529. */
  530. void nes_post_cqp_request(struct nes_device *nesdev,
  531. struct nes_cqp_request *cqp_request)
  532. {
  533. struct nes_hw_cqp_wqe *cqp_wqe;
  534. unsigned long flags;
  535. u32 cqp_head;
  536. u64 u64temp;
  537. spin_lock_irqsave(&nesdev->cqp.lock, flags);
  538. if (((((nesdev->cqp.sq_tail+(nesdev->cqp.sq_size*2))-nesdev->cqp.sq_head) &
  539. (nesdev->cqp.sq_size - 1)) != 1)
  540. && (list_empty(&nesdev->cqp_pending_reqs))) {
  541. cqp_head = nesdev->cqp.sq_head++;
  542. nesdev->cqp.sq_head &= nesdev->cqp.sq_size-1;
  543. cqp_wqe = &nesdev->cqp.sq_vbase[cqp_head];
  544. memcpy(cqp_wqe, &cqp_request->cqp_wqe, sizeof(*cqp_wqe));
  545. barrier();
  546. u64temp = (unsigned long)cqp_request;
  547. set_wqe_64bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_COMP_SCRATCH_LOW_IDX,
  548. u64temp);
  549. nes_debug(NES_DBG_CQP, "CQP request (opcode 0x%02X), line 1 = 0x%08X put on CQPs SQ,"
  550. " request = %p, cqp_head = %u, cqp_tail = %u, cqp_size = %u,"
  551. " waiting = %d, refcount = %d.\n",
  552. le32_to_cpu(cqp_wqe->wqe_words[NES_CQP_WQE_OPCODE_IDX])&0x3f,
  553. le32_to_cpu(cqp_wqe->wqe_words[NES_CQP_WQE_ID_IDX]), cqp_request,
  554. nesdev->cqp.sq_head, nesdev->cqp.sq_tail, nesdev->cqp.sq_size,
  555. cqp_request->waiting, atomic_read(&cqp_request->refcount));
  556. barrier();
  557. /* Ring doorbell (1 WQEs) */
  558. nes_write32(nesdev->regs+NES_WQE_ALLOC, 0x01800000 | nesdev->cqp.qp_id);
  559. barrier();
  560. } else {
  561. nes_debug(NES_DBG_CQP, "CQP request %p (opcode 0x%02X), line 1 = 0x%08X"
  562. " put on the pending queue.\n",
  563. cqp_request,
  564. le32_to_cpu(cqp_request->cqp_wqe.wqe_words[NES_CQP_WQE_OPCODE_IDX])&0x3f,
  565. le32_to_cpu(cqp_request->cqp_wqe.wqe_words[NES_CQP_WQE_ID_IDX]));
  566. list_add_tail(&cqp_request->list, &nesdev->cqp_pending_reqs);
  567. }
  568. spin_unlock_irqrestore(&nesdev->cqp.lock, flags);
  569. return;
  570. }
  571. /**
  572. * nes_arp_table
  573. */
  574. int nes_arp_table(struct nes_device *nesdev, u32 ip_addr, u8 *mac_addr, u32 action)
  575. {
  576. struct nes_adapter *nesadapter = nesdev->nesadapter;
  577. int arp_index;
  578. int err = 0;
  579. __be32 tmp_addr;
  580. for (arp_index = 0; (u32) arp_index < nesadapter->arp_table_size; arp_index++) {
  581. if (nesadapter->arp_table[arp_index].ip_addr == ip_addr)
  582. break;
  583. }
  584. if (action == NES_ARP_ADD) {
  585. if (arp_index != nesadapter->arp_table_size) {
  586. return -1;
  587. }
  588. arp_index = 0;
  589. err = nes_alloc_resource(nesadapter, nesadapter->allocated_arps,
  590. nesadapter->arp_table_size, (u32 *)&arp_index, &nesadapter->next_arp_index);
  591. if (err) {
  592. nes_debug(NES_DBG_NETDEV, "nes_alloc_resource returned error = %u\n", err);
  593. return err;
  594. }
  595. nes_debug(NES_DBG_NETDEV, "ADD, arp_index=%d\n", arp_index);
  596. nesadapter->arp_table[arp_index].ip_addr = ip_addr;
  597. memcpy(nesadapter->arp_table[arp_index].mac_addr, mac_addr, ETH_ALEN);
  598. return arp_index;
  599. }
  600. /* DELETE or RESOLVE */
  601. if (arp_index == nesadapter->arp_table_size) {
  602. tmp_addr = cpu_to_be32(ip_addr);
  603. nes_debug(NES_DBG_NETDEV, "MAC for %pI4 not in ARP table - cannot %s\n",
  604. &tmp_addr, action == NES_ARP_RESOLVE ? "resolve" : "delete");
  605. return -1;
  606. }
  607. if (action == NES_ARP_RESOLVE) {
  608. nes_debug(NES_DBG_NETDEV, "RESOLVE, arp_index=%d\n", arp_index);
  609. return arp_index;
  610. }
  611. if (action == NES_ARP_DELETE) {
  612. nes_debug(NES_DBG_NETDEV, "DELETE, arp_index=%d\n", arp_index);
  613. nesadapter->arp_table[arp_index].ip_addr = 0;
  614. memset(nesadapter->arp_table[arp_index].mac_addr, 0x00, ETH_ALEN);
  615. nes_free_resource(nesadapter, nesadapter->allocated_arps, arp_index);
  616. return arp_index;
  617. }
  618. return -1;
  619. }
  620. /**
  621. * nes_mh_fix
  622. */
  623. void nes_mh_fix(unsigned long parm)
  624. {
  625. unsigned long flags;
  626. struct nes_device *nesdev = (struct nes_device *)parm;
  627. struct nes_adapter *nesadapter = nesdev->nesadapter;
  628. struct nes_vnic *nesvnic;
  629. u32 used_chunks_tx;
  630. u32 temp_used_chunks_tx;
  631. u32 temp_last_used_chunks_tx;
  632. u32 used_chunks_mask;
  633. u32 mac_tx_frames_low;
  634. u32 mac_tx_frames_high;
  635. u32 mac_tx_pauses;
  636. u32 serdes_status;
  637. u32 reset_value;
  638. u32 tx_control;
  639. u32 tx_config;
  640. u32 tx_pause_quanta;
  641. u32 rx_control;
  642. u32 rx_config;
  643. u32 mac_exact_match;
  644. u32 mpp_debug;
  645. u32 i=0;
  646. u32 chunks_tx_progress = 0;
  647. spin_lock_irqsave(&nesadapter->phy_lock, flags);
  648. if ((nesadapter->mac_sw_state[0] != NES_MAC_SW_IDLE) || (nesadapter->mac_link_down[0])) {
  649. spin_unlock_irqrestore(&nesadapter->phy_lock, flags);
  650. goto no_mh_work;
  651. }
  652. nesadapter->mac_sw_state[0] = NES_MAC_SW_MH;
  653. spin_unlock_irqrestore(&nesadapter->phy_lock, flags);
  654. do {
  655. mac_tx_frames_low = nes_read_indexed(nesdev, NES_IDX_MAC_TX_FRAMES_LOW);
  656. mac_tx_frames_high = nes_read_indexed(nesdev, NES_IDX_MAC_TX_FRAMES_HIGH);
  657. mac_tx_pauses = nes_read_indexed(nesdev, NES_IDX_MAC_TX_PAUSE_FRAMES);
  658. used_chunks_tx = nes_read_indexed(nesdev, NES_IDX_USED_CHUNKS_TX);
  659. nesdev->mac_pause_frames_sent += mac_tx_pauses;
  660. used_chunks_mask = 0;
  661. temp_used_chunks_tx = used_chunks_tx;
  662. temp_last_used_chunks_tx = nesdev->last_used_chunks_tx;
  663. if (nesdev->netdev[0]) {
  664. nesvnic = netdev_priv(nesdev->netdev[0]);
  665. } else {
  666. break;
  667. }
  668. for (i=0; i<4; i++) {
  669. used_chunks_mask <<= 8;
  670. if (nesvnic->qp_nic_index[i] != 0xff) {
  671. used_chunks_mask |= 0xff;
  672. if ((temp_used_chunks_tx&0xff)<(temp_last_used_chunks_tx&0xff)) {
  673. chunks_tx_progress = 1;
  674. }
  675. }
  676. temp_used_chunks_tx >>= 8;
  677. temp_last_used_chunks_tx >>= 8;
  678. }
  679. if ((mac_tx_frames_low) || (mac_tx_frames_high) ||
  680. (!(used_chunks_tx&used_chunks_mask)) ||
  681. (!(nesdev->last_used_chunks_tx&used_chunks_mask)) ||
  682. (chunks_tx_progress) ) {
  683. nesdev->last_used_chunks_tx = used_chunks_tx;
  684. break;
  685. }
  686. nesdev->last_used_chunks_tx = used_chunks_tx;
  687. barrier();
  688. nes_write_indexed(nesdev, NES_IDX_MAC_TX_CONTROL, 0x00000005);
  689. mh_pauses_sent++;
  690. mac_tx_pauses = nes_read_indexed(nesdev, NES_IDX_MAC_TX_PAUSE_FRAMES);
  691. if (mac_tx_pauses) {
  692. nesdev->mac_pause_frames_sent += mac_tx_pauses;
  693. break;
  694. }
  695. tx_control = nes_read_indexed(nesdev, NES_IDX_MAC_TX_CONTROL);
  696. tx_config = nes_read_indexed(nesdev, NES_IDX_MAC_TX_CONFIG);
  697. tx_pause_quanta = nes_read_indexed(nesdev, NES_IDX_MAC_TX_PAUSE_QUANTA);
  698. rx_control = nes_read_indexed(nesdev, NES_IDX_MAC_RX_CONTROL);
  699. rx_config = nes_read_indexed(nesdev, NES_IDX_MAC_RX_CONFIG);
  700. mac_exact_match = nes_read_indexed(nesdev, NES_IDX_MAC_EXACT_MATCH_BOTTOM);
  701. mpp_debug = nes_read_indexed(nesdev, NES_IDX_MPP_DEBUG);
  702. /* one last ditch effort to avoid a false positive */
  703. mac_tx_pauses = nes_read_indexed(nesdev, NES_IDX_MAC_TX_PAUSE_FRAMES);
  704. if (mac_tx_pauses) {
  705. nesdev->last_mac_tx_pauses = nesdev->mac_pause_frames_sent;
  706. nes_debug(NES_DBG_HW, "failsafe caught slow outbound pause\n");
  707. break;
  708. }
  709. mh_detected++;
  710. nes_write_indexed(nesdev, NES_IDX_MAC_TX_CONTROL, 0x00000000);
  711. nes_write_indexed(nesdev, NES_IDX_MAC_TX_CONFIG, 0x00000000);
  712. reset_value = nes_read32(nesdev->regs+NES_SOFTWARE_RESET);
  713. nes_write32(nesdev->regs+NES_SOFTWARE_RESET, reset_value | 0x0000001d);
  714. while (((nes_read32(nesdev->regs+NES_SOFTWARE_RESET)
  715. & 0x00000040) != 0x00000040) && (i++ < 5000)) {
  716. /* mdelay(1); */
  717. }
  718. nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_COMMON_CONTROL0, 0x00000008);
  719. serdes_status = nes_read_indexed(nesdev, NES_IDX_ETH_SERDES_COMMON_STATUS0);
  720. nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_TX_EMP0, 0x000bdef7);
  721. nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_TX_DRIVE0, 0x9ce73000);
  722. nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_RX_MODE0, 0x0ff00000);
  723. nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_RX_SIGDET0, 0x00000000);
  724. nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_BYPASS0, 0x00000000);
  725. nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_LOOPBACK_CONTROL0, 0x00000000);
  726. if (nesadapter->OneG_Mode) {
  727. nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_RX_EQ_CONTROL0, 0xf0182222);
  728. } else {
  729. nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_RX_EQ_CONTROL0, 0xf0042222);
  730. }
  731. serdes_status = nes_read_indexed(nesdev, NES_IDX_ETH_SERDES_RX_EQ_STATUS0);
  732. nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_CDR_CONTROL0, 0x000000ff);
  733. nes_write_indexed(nesdev, NES_IDX_MAC_TX_CONTROL, tx_control);
  734. nes_write_indexed(nesdev, NES_IDX_MAC_TX_CONFIG, tx_config);
  735. nes_write_indexed(nesdev, NES_IDX_MAC_TX_PAUSE_QUANTA, tx_pause_quanta);
  736. nes_write_indexed(nesdev, NES_IDX_MAC_RX_CONTROL, rx_control);
  737. nes_write_indexed(nesdev, NES_IDX_MAC_RX_CONFIG, rx_config);
  738. nes_write_indexed(nesdev, NES_IDX_MAC_EXACT_MATCH_BOTTOM, mac_exact_match);
  739. nes_write_indexed(nesdev, NES_IDX_MPP_DEBUG, mpp_debug);
  740. } while (0);
  741. nesadapter->mac_sw_state[0] = NES_MAC_SW_IDLE;
  742. no_mh_work:
  743. nesdev->nesadapter->mh_timer.expires = jiffies + (HZ/5);
  744. add_timer(&nesdev->nesadapter->mh_timer);
  745. }
  746. /**
  747. * nes_clc
  748. */
  749. void nes_clc(unsigned long parm)
  750. {
  751. unsigned long flags;
  752. struct nes_device *nesdev = (struct nes_device *)parm;
  753. struct nes_adapter *nesadapter = nesdev->nesadapter;
  754. spin_lock_irqsave(&nesadapter->phy_lock, flags);
  755. nesadapter->link_interrupt_count[0] = 0;
  756. nesadapter->link_interrupt_count[1] = 0;
  757. nesadapter->link_interrupt_count[2] = 0;
  758. nesadapter->link_interrupt_count[3] = 0;
  759. spin_unlock_irqrestore(&nesadapter->phy_lock, flags);
  760. nesadapter->lc_timer.expires = jiffies + 3600 * HZ; /* 1 hour */
  761. add_timer(&nesadapter->lc_timer);
  762. }
  763. /**
  764. * nes_dump_mem
  765. */
  766. void nes_dump_mem(unsigned int dump_debug_level, void *addr, int length)
  767. {
  768. char xlate[] = {'0', '1', '2', '3', '4', '5', '6', '7', '8', '9',
  769. 'a', 'b', 'c', 'd', 'e', 'f'};
  770. char *ptr;
  771. char hex_buf[80];
  772. char ascii_buf[20];
  773. int num_char;
  774. int num_ascii;
  775. int num_hex;
  776. if (!(nes_debug_level & dump_debug_level)) {
  777. return;
  778. }
  779. ptr = addr;
  780. if (length > 0x100) {
  781. nes_debug(dump_debug_level, "Length truncated from %x to %x\n", length, 0x100);
  782. length = 0x100;
  783. }
  784. nes_debug(dump_debug_level, "Address=0x%p, length=0x%x (%d)\n", ptr, length, length);
  785. memset(ascii_buf, 0, 20);
  786. memset(hex_buf, 0, 80);
  787. num_ascii = 0;
  788. num_hex = 0;
  789. for (num_char = 0; num_char < length; num_char++) {
  790. if (num_ascii == 8) {
  791. ascii_buf[num_ascii++] = ' ';
  792. hex_buf[num_hex++] = '-';
  793. hex_buf[num_hex++] = ' ';
  794. }
  795. if (*ptr < 0x20 || *ptr > 0x7e)
  796. ascii_buf[num_ascii++] = '.';
  797. else
  798. ascii_buf[num_ascii++] = *ptr;
  799. hex_buf[num_hex++] = xlate[((*ptr & 0xf0) >> 4)];
  800. hex_buf[num_hex++] = xlate[*ptr & 0x0f];
  801. hex_buf[num_hex++] = ' ';
  802. ptr++;
  803. if (num_ascii >= 17) {
  804. /* output line and reset */
  805. nes_debug(dump_debug_level, " %s | %s\n", hex_buf, ascii_buf);
  806. memset(ascii_buf, 0, 20);
  807. memset(hex_buf, 0, 80);
  808. num_ascii = 0;
  809. num_hex = 0;
  810. }
  811. }
  812. /* output the rest */
  813. if (num_ascii) {
  814. while (num_ascii < 17) {
  815. if (num_ascii == 8) {
  816. hex_buf[num_hex++] = ' ';
  817. hex_buf[num_hex++] = ' ';
  818. }
  819. hex_buf[num_hex++] = ' ';
  820. hex_buf[num_hex++] = ' ';
  821. hex_buf[num_hex++] = ' ';
  822. num_ascii++;
  823. }
  824. nes_debug(dump_debug_level, " %s | %s\n", hex_buf, ascii_buf);
  825. }
  826. }