k10temp.c 6.7 KB

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  1. /*
  2. * k10temp.c - AMD Family 10h/11h/12h/14h/15h processor hardware monitoring
  3. *
  4. * Copyright (c) 2009 Clemens Ladisch <clemens@ladisch.de>
  5. *
  6. *
  7. * This driver is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License; either
  9. * version 2 of the License, or (at your option) any later version.
  10. *
  11. * This driver is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  14. * See the GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this driver; if not, see <http://www.gnu.org/licenses/>.
  18. */
  19. #include <linux/err.h>
  20. #include <linux/hwmon.h>
  21. #include <linux/hwmon-sysfs.h>
  22. #include <linux/init.h>
  23. #include <linux/module.h>
  24. #include <linux/pci.h>
  25. #include <asm/processor.h>
  26. MODULE_DESCRIPTION("AMD Family 10h+ CPU core temperature monitor");
  27. MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>");
  28. MODULE_LICENSE("GPL");
  29. static bool force;
  30. module_param(force, bool, 0444);
  31. MODULE_PARM_DESC(force, "force loading on processors with erratum 319");
  32. /* CPUID function 0x80000001, ebx */
  33. #define CPUID_PKGTYPE_MASK 0xf0000000
  34. #define CPUID_PKGTYPE_F 0x00000000
  35. #define CPUID_PKGTYPE_AM2R2_AM3 0x10000000
  36. /* DRAM controller (PCI function 2) */
  37. #define REG_DCT0_CONFIG_HIGH 0x094
  38. #define DDR3_MODE 0x00000100
  39. /* miscellaneous (PCI function 3) */
  40. #define REG_HARDWARE_THERMAL_CONTROL 0x64
  41. #define HTC_ENABLE 0x00000001
  42. #define REG_REPORTED_TEMPERATURE 0xa4
  43. #define REG_NORTHBRIDGE_CAPABILITIES 0xe8
  44. #define NB_CAP_HTC 0x00000400
  45. static ssize_t show_temp(struct device *dev,
  46. struct device_attribute *attr, char *buf)
  47. {
  48. u32 regval;
  49. pci_read_config_dword(to_pci_dev(dev),
  50. REG_REPORTED_TEMPERATURE, &regval);
  51. return sprintf(buf, "%u\n", (regval >> 21) * 125);
  52. }
  53. static ssize_t show_temp_max(struct device *dev,
  54. struct device_attribute *attr, char *buf)
  55. {
  56. return sprintf(buf, "%d\n", 70 * 1000);
  57. }
  58. static ssize_t show_temp_crit(struct device *dev,
  59. struct device_attribute *devattr, char *buf)
  60. {
  61. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  62. int show_hyst = attr->index;
  63. u32 regval;
  64. int value;
  65. pci_read_config_dword(to_pci_dev(dev),
  66. REG_HARDWARE_THERMAL_CONTROL, &regval);
  67. value = ((regval >> 16) & 0x7f) * 500 + 52000;
  68. if (show_hyst)
  69. value -= ((regval >> 24) & 0xf) * 500;
  70. return sprintf(buf, "%d\n", value);
  71. }
  72. static ssize_t show_name(struct device *dev,
  73. struct device_attribute *attr, char *buf)
  74. {
  75. return sprintf(buf, "k10temp\n");
  76. }
  77. static DEVICE_ATTR(temp1_input, S_IRUGO, show_temp, NULL);
  78. static DEVICE_ATTR(temp1_max, S_IRUGO, show_temp_max, NULL);
  79. static SENSOR_DEVICE_ATTR(temp1_crit, S_IRUGO, show_temp_crit, NULL, 0);
  80. static SENSOR_DEVICE_ATTR(temp1_crit_hyst, S_IRUGO, show_temp_crit, NULL, 1);
  81. static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
  82. static bool __devinit has_erratum_319(struct pci_dev *pdev)
  83. {
  84. u32 pkg_type, reg_dram_cfg;
  85. if (boot_cpu_data.x86 != 0x10)
  86. return false;
  87. /*
  88. * Erratum 319: The thermal sensor of Socket F/AM2+ processors
  89. * may be unreliable.
  90. */
  91. pkg_type = cpuid_ebx(0x80000001) & CPUID_PKGTYPE_MASK;
  92. if (pkg_type == CPUID_PKGTYPE_F)
  93. return true;
  94. if (pkg_type != CPUID_PKGTYPE_AM2R2_AM3)
  95. return false;
  96. /* DDR3 memory implies socket AM3, which is good */
  97. pci_bus_read_config_dword(pdev->bus,
  98. PCI_DEVFN(PCI_SLOT(pdev->devfn), 2),
  99. REG_DCT0_CONFIG_HIGH, &reg_dram_cfg);
  100. if (reg_dram_cfg & DDR3_MODE)
  101. return false;
  102. /*
  103. * Unfortunately it is possible to run a socket AM3 CPU with DDR2
  104. * memory. We blacklist all the cores which do exist in socket AM2+
  105. * format. It still isn't perfect, as RB-C2 cores exist in both AM2+
  106. * and AM3 formats, but that's the best we can do.
  107. */
  108. return boot_cpu_data.x86_model < 4 ||
  109. (boot_cpu_data.x86_model == 4 && boot_cpu_data.x86_mask <= 2);
  110. }
  111. static int __devinit k10temp_probe(struct pci_dev *pdev,
  112. const struct pci_device_id *id)
  113. {
  114. struct device *hwmon_dev;
  115. u32 reg_caps, reg_htc;
  116. int unreliable = has_erratum_319(pdev);
  117. int err;
  118. if (unreliable && !force) {
  119. dev_err(&pdev->dev,
  120. "unreliable CPU thermal sensor; monitoring disabled\n");
  121. err = -ENODEV;
  122. goto exit;
  123. }
  124. err = device_create_file(&pdev->dev, &dev_attr_temp1_input);
  125. if (err)
  126. goto exit;
  127. err = device_create_file(&pdev->dev, &dev_attr_temp1_max);
  128. if (err)
  129. goto exit_remove;
  130. pci_read_config_dword(pdev, REG_NORTHBRIDGE_CAPABILITIES, &reg_caps);
  131. pci_read_config_dword(pdev, REG_HARDWARE_THERMAL_CONTROL, &reg_htc);
  132. if ((reg_caps & NB_CAP_HTC) && (reg_htc & HTC_ENABLE)) {
  133. err = device_create_file(&pdev->dev,
  134. &sensor_dev_attr_temp1_crit.dev_attr);
  135. if (err)
  136. goto exit_remove;
  137. err = device_create_file(&pdev->dev,
  138. &sensor_dev_attr_temp1_crit_hyst.dev_attr);
  139. if (err)
  140. goto exit_remove;
  141. }
  142. err = device_create_file(&pdev->dev, &dev_attr_name);
  143. if (err)
  144. goto exit_remove;
  145. hwmon_dev = hwmon_device_register(&pdev->dev);
  146. if (IS_ERR(hwmon_dev)) {
  147. err = PTR_ERR(hwmon_dev);
  148. goto exit_remove;
  149. }
  150. pci_set_drvdata(pdev, hwmon_dev);
  151. if (unreliable && force)
  152. dev_warn(&pdev->dev,
  153. "unreliable CPU thermal sensor; check erratum 319\n");
  154. return 0;
  155. exit_remove:
  156. device_remove_file(&pdev->dev, &dev_attr_name);
  157. device_remove_file(&pdev->dev, &dev_attr_temp1_input);
  158. device_remove_file(&pdev->dev, &dev_attr_temp1_max);
  159. device_remove_file(&pdev->dev,
  160. &sensor_dev_attr_temp1_crit.dev_attr);
  161. device_remove_file(&pdev->dev,
  162. &sensor_dev_attr_temp1_crit_hyst.dev_attr);
  163. exit:
  164. return err;
  165. }
  166. static void __devexit k10temp_remove(struct pci_dev *pdev)
  167. {
  168. hwmon_device_unregister(pci_get_drvdata(pdev));
  169. device_remove_file(&pdev->dev, &dev_attr_name);
  170. device_remove_file(&pdev->dev, &dev_attr_temp1_input);
  171. device_remove_file(&pdev->dev, &dev_attr_temp1_max);
  172. device_remove_file(&pdev->dev,
  173. &sensor_dev_attr_temp1_crit.dev_attr);
  174. device_remove_file(&pdev->dev,
  175. &sensor_dev_attr_temp1_crit_hyst.dev_attr);
  176. pci_set_drvdata(pdev, NULL);
  177. }
  178. static const struct pci_device_id k10temp_id_table[] = {
  179. { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_10H_NB_MISC) },
  180. { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_11H_NB_MISC) },
  181. { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_CNB17H_F3) },
  182. { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_NB_F3) },
  183. {}
  184. };
  185. MODULE_DEVICE_TABLE(pci, k10temp_id_table);
  186. static struct pci_driver k10temp_driver = {
  187. .name = "k10temp",
  188. .id_table = k10temp_id_table,
  189. .probe = k10temp_probe,
  190. .remove = __devexit_p(k10temp_remove),
  191. };
  192. static int __init k10temp_init(void)
  193. {
  194. return pci_register_driver(&k10temp_driver);
  195. }
  196. static void __exit k10temp_exit(void)
  197. {
  198. pci_unregister_driver(&k10temp_driver);
  199. }
  200. module_init(k10temp_init)
  201. module_exit(k10temp_exit)