radeon_fb.c 10 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419
  1. /*
  2. * Copyright © 2007 David Airlie
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice (including the next
  12. * paragraph) shall be included in all copies or substantial portions of the
  13. * Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  18. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21. * DEALINGS IN THE SOFTWARE.
  22. *
  23. * Authors:
  24. * David Airlie
  25. */
  26. #include <linux/module.h>
  27. #include <linux/slab.h>
  28. #include <linux/fb.h>
  29. #include "drmP.h"
  30. #include "drm.h"
  31. #include "drm_crtc.h"
  32. #include "drm_crtc_helper.h"
  33. #include "radeon_drm.h"
  34. #include "radeon.h"
  35. #include "drm_fb_helper.h"
  36. #include <linux/vga_switcheroo.h>
  37. /* object hierarchy -
  38. this contains a helper + a radeon fb
  39. the helper contains a pointer to radeon framebuffer baseclass.
  40. */
  41. struct radeon_fbdev {
  42. struct drm_fb_helper helper;
  43. struct radeon_framebuffer rfb;
  44. struct list_head fbdev_list;
  45. struct radeon_device *rdev;
  46. };
  47. static struct fb_ops radeonfb_ops = {
  48. .owner = THIS_MODULE,
  49. .fb_check_var = drm_fb_helper_check_var,
  50. .fb_set_par = drm_fb_helper_set_par,
  51. .fb_fillrect = cfb_fillrect,
  52. .fb_copyarea = cfb_copyarea,
  53. .fb_imageblit = cfb_imageblit,
  54. .fb_pan_display = drm_fb_helper_pan_display,
  55. .fb_blank = drm_fb_helper_blank,
  56. .fb_setcmap = drm_fb_helper_setcmap,
  57. .fb_debug_enter = drm_fb_helper_debug_enter,
  58. .fb_debug_leave = drm_fb_helper_debug_leave,
  59. };
  60. int radeon_align_pitch(struct radeon_device *rdev, int width, int bpp, bool tiled)
  61. {
  62. int aligned = width;
  63. int align_large = (ASIC_IS_AVIVO(rdev)) || tiled;
  64. int pitch_mask = 0;
  65. switch (bpp / 8) {
  66. case 1:
  67. pitch_mask = align_large ? 255 : 127;
  68. break;
  69. case 2:
  70. pitch_mask = align_large ? 127 : 31;
  71. break;
  72. case 3:
  73. case 4:
  74. pitch_mask = align_large ? 63 : 15;
  75. break;
  76. }
  77. aligned += pitch_mask;
  78. aligned &= ~pitch_mask;
  79. return aligned;
  80. }
  81. static void radeonfb_destroy_pinned_object(struct drm_gem_object *gobj)
  82. {
  83. struct radeon_bo *rbo = gem_to_radeon_bo(gobj);
  84. int ret;
  85. ret = radeon_bo_reserve(rbo, false);
  86. if (likely(ret == 0)) {
  87. radeon_bo_kunmap(rbo);
  88. radeon_bo_unpin(rbo);
  89. radeon_bo_unreserve(rbo);
  90. }
  91. drm_gem_object_unreference_unlocked(gobj);
  92. }
  93. static int radeonfb_create_pinned_object(struct radeon_fbdev *rfbdev,
  94. struct drm_mode_fb_cmd *mode_cmd,
  95. struct drm_gem_object **gobj_p)
  96. {
  97. struct radeon_device *rdev = rfbdev->rdev;
  98. struct drm_gem_object *gobj = NULL;
  99. struct radeon_bo *rbo = NULL;
  100. bool fb_tiled = false; /* useful for testing */
  101. u32 tiling_flags = 0;
  102. int ret;
  103. int aligned_size, size;
  104. int height = mode_cmd->height;
  105. /* need to align pitch with crtc limits */
  106. mode_cmd->pitch = radeon_align_pitch(rdev, mode_cmd->width, mode_cmd->bpp, fb_tiled) * ((mode_cmd->bpp + 1) / 8);
  107. if (rdev->family >= CHIP_R600)
  108. height = ALIGN(mode_cmd->height, 8);
  109. size = mode_cmd->pitch * height;
  110. aligned_size = ALIGN(size, PAGE_SIZE);
  111. ret = radeon_gem_object_create(rdev, aligned_size, 0,
  112. RADEON_GEM_DOMAIN_VRAM,
  113. false, true,
  114. &gobj);
  115. if (ret) {
  116. printk(KERN_ERR "failed to allocate framebuffer (%d)\n",
  117. aligned_size);
  118. return -ENOMEM;
  119. }
  120. rbo = gem_to_radeon_bo(gobj);
  121. if (fb_tiled)
  122. tiling_flags = RADEON_TILING_MACRO;
  123. #ifdef __BIG_ENDIAN
  124. switch (mode_cmd->bpp) {
  125. case 32:
  126. tiling_flags |= RADEON_TILING_SWAP_32BIT;
  127. break;
  128. case 16:
  129. tiling_flags |= RADEON_TILING_SWAP_16BIT;
  130. default:
  131. break;
  132. }
  133. #endif
  134. if (tiling_flags) {
  135. ret = radeon_bo_set_tiling_flags(rbo,
  136. tiling_flags | RADEON_TILING_SURFACE,
  137. mode_cmd->pitch);
  138. if (ret)
  139. dev_err(rdev->dev, "FB failed to set tiling flags\n");
  140. }
  141. ret = radeon_bo_reserve(rbo, false);
  142. if (unlikely(ret != 0))
  143. goto out_unref;
  144. ret = radeon_bo_pin(rbo, RADEON_GEM_DOMAIN_VRAM, NULL);
  145. if (ret) {
  146. radeon_bo_unreserve(rbo);
  147. goto out_unref;
  148. }
  149. if (fb_tiled)
  150. radeon_bo_check_tiling(rbo, 0, 0);
  151. ret = radeon_bo_kmap(rbo, NULL);
  152. radeon_bo_unreserve(rbo);
  153. if (ret) {
  154. goto out_unref;
  155. }
  156. *gobj_p = gobj;
  157. return 0;
  158. out_unref:
  159. radeonfb_destroy_pinned_object(gobj);
  160. *gobj_p = NULL;
  161. return ret;
  162. }
  163. static int radeonfb_create(struct radeon_fbdev *rfbdev,
  164. struct drm_fb_helper_surface_size *sizes)
  165. {
  166. struct radeon_device *rdev = rfbdev->rdev;
  167. struct fb_info *info;
  168. struct drm_framebuffer *fb = NULL;
  169. struct drm_mode_fb_cmd mode_cmd;
  170. struct drm_gem_object *gobj = NULL;
  171. struct radeon_bo *rbo = NULL;
  172. struct device *device = &rdev->pdev->dev;
  173. int ret;
  174. unsigned long tmp;
  175. mode_cmd.width = sizes->surface_width;
  176. mode_cmd.height = sizes->surface_height;
  177. /* avivo can't scanout real 24bpp */
  178. if ((sizes->surface_bpp == 24) && ASIC_IS_AVIVO(rdev))
  179. sizes->surface_bpp = 32;
  180. mode_cmd.bpp = sizes->surface_bpp;
  181. mode_cmd.depth = sizes->surface_depth;
  182. ret = radeonfb_create_pinned_object(rfbdev, &mode_cmd, &gobj);
  183. rbo = gem_to_radeon_bo(gobj);
  184. /* okay we have an object now allocate the framebuffer */
  185. info = framebuffer_alloc(0, device);
  186. if (info == NULL) {
  187. ret = -ENOMEM;
  188. goto out_unref;
  189. }
  190. info->par = rfbdev;
  191. radeon_framebuffer_init(rdev->ddev, &rfbdev->rfb, &mode_cmd, gobj);
  192. fb = &rfbdev->rfb.base;
  193. /* setup helper */
  194. rfbdev->helper.fb = fb;
  195. rfbdev->helper.fbdev = info;
  196. memset_io(rbo->kptr, 0x0, radeon_bo_size(rbo));
  197. strcpy(info->fix.id, "radeondrmfb");
  198. drm_fb_helper_fill_fix(info, fb->pitch, fb->depth);
  199. info->flags = FBINFO_DEFAULT | FBINFO_CAN_FORCE_OUTPUT;
  200. info->fbops = &radeonfb_ops;
  201. tmp = radeon_bo_gpu_offset(rbo) - rdev->mc.vram_start;
  202. info->fix.smem_start = rdev->mc.aper_base + tmp;
  203. info->fix.smem_len = radeon_bo_size(rbo);
  204. info->screen_base = rbo->kptr;
  205. info->screen_size = radeon_bo_size(rbo);
  206. drm_fb_helper_fill_var(info, &rfbdev->helper, sizes->fb_width, sizes->fb_height);
  207. /* setup aperture base/size for vesafb takeover */
  208. info->apertures = alloc_apertures(1);
  209. if (!info->apertures) {
  210. ret = -ENOMEM;
  211. goto out_unref;
  212. }
  213. info->apertures->ranges[0].base = rdev->ddev->mode_config.fb_base;
  214. info->apertures->ranges[0].size = rdev->mc.aper_size;
  215. info->pixmap.size = 64*1024;
  216. info->pixmap.buf_align = 8;
  217. info->pixmap.access_align = 32;
  218. info->pixmap.flags = FB_PIXMAP_SYSTEM;
  219. info->pixmap.scan_align = 1;
  220. if (info->screen_base == NULL) {
  221. ret = -ENOSPC;
  222. goto out_unref;
  223. }
  224. ret = fb_alloc_cmap(&info->cmap, 256, 0);
  225. if (ret) {
  226. ret = -ENOMEM;
  227. goto out_unref;
  228. }
  229. DRM_INFO("fb mappable at 0x%lX\n", info->fix.smem_start);
  230. DRM_INFO("vram apper at 0x%lX\n", (unsigned long)rdev->mc.aper_base);
  231. DRM_INFO("size %lu\n", (unsigned long)radeon_bo_size(rbo));
  232. DRM_INFO("fb depth is %d\n", fb->depth);
  233. DRM_INFO(" pitch is %d\n", fb->pitch);
  234. vga_switcheroo_client_fb_set(rdev->ddev->pdev, info);
  235. return 0;
  236. out_unref:
  237. if (rbo) {
  238. }
  239. if (fb && ret) {
  240. drm_gem_object_unreference(gobj);
  241. drm_framebuffer_cleanup(fb);
  242. kfree(fb);
  243. }
  244. return ret;
  245. }
  246. static int radeon_fb_find_or_create_single(struct drm_fb_helper *helper,
  247. struct drm_fb_helper_surface_size *sizes)
  248. {
  249. struct radeon_fbdev *rfbdev = (struct radeon_fbdev *)helper;
  250. int new_fb = 0;
  251. int ret;
  252. if (!helper->fb) {
  253. ret = radeonfb_create(rfbdev, sizes);
  254. if (ret)
  255. return ret;
  256. new_fb = 1;
  257. }
  258. return new_fb;
  259. }
  260. static char *mode_option;
  261. int radeon_parse_options(char *options)
  262. {
  263. char *this_opt;
  264. if (!options || !*options)
  265. return 0;
  266. while ((this_opt = strsep(&options, ",")) != NULL) {
  267. if (!*this_opt)
  268. continue;
  269. mode_option = this_opt;
  270. }
  271. return 0;
  272. }
  273. void radeon_fb_output_poll_changed(struct radeon_device *rdev)
  274. {
  275. drm_fb_helper_hotplug_event(&rdev->mode_info.rfbdev->helper);
  276. }
  277. static int radeon_fbdev_destroy(struct drm_device *dev, struct radeon_fbdev *rfbdev)
  278. {
  279. struct fb_info *info;
  280. struct radeon_framebuffer *rfb = &rfbdev->rfb;
  281. if (rfbdev->helper.fbdev) {
  282. info = rfbdev->helper.fbdev;
  283. unregister_framebuffer(info);
  284. if (info->cmap.len)
  285. fb_dealloc_cmap(&info->cmap);
  286. framebuffer_release(info);
  287. }
  288. if (rfb->obj) {
  289. radeonfb_destroy_pinned_object(rfb->obj);
  290. rfb->obj = NULL;
  291. }
  292. drm_fb_helper_fini(&rfbdev->helper);
  293. drm_framebuffer_cleanup(&rfb->base);
  294. return 0;
  295. }
  296. static struct drm_fb_helper_funcs radeon_fb_helper_funcs = {
  297. .gamma_set = radeon_crtc_fb_gamma_set,
  298. .gamma_get = radeon_crtc_fb_gamma_get,
  299. .fb_probe = radeon_fb_find_or_create_single,
  300. };
  301. int radeon_fbdev_init(struct radeon_device *rdev)
  302. {
  303. struct radeon_fbdev *rfbdev;
  304. int bpp_sel = 32;
  305. int ret;
  306. /* select 8 bpp console on RN50 or 16MB cards */
  307. if (ASIC_IS_RN50(rdev) || rdev->mc.real_vram_size <= (32*1024*1024))
  308. bpp_sel = 8;
  309. rfbdev = kzalloc(sizeof(struct radeon_fbdev), GFP_KERNEL);
  310. if (!rfbdev)
  311. return -ENOMEM;
  312. rfbdev->rdev = rdev;
  313. rdev->mode_info.rfbdev = rfbdev;
  314. rfbdev->helper.funcs = &radeon_fb_helper_funcs;
  315. ret = drm_fb_helper_init(rdev->ddev, &rfbdev->helper,
  316. rdev->num_crtc,
  317. RADEONFB_CONN_LIMIT);
  318. if (ret) {
  319. kfree(rfbdev);
  320. return ret;
  321. }
  322. drm_fb_helper_single_add_all_connectors(&rfbdev->helper);
  323. drm_fb_helper_initial_config(&rfbdev->helper, bpp_sel);
  324. return 0;
  325. }
  326. void radeon_fbdev_fini(struct radeon_device *rdev)
  327. {
  328. if (!rdev->mode_info.rfbdev)
  329. return;
  330. radeon_fbdev_destroy(rdev->ddev, rdev->mode_info.rfbdev);
  331. kfree(rdev->mode_info.rfbdev);
  332. rdev->mode_info.rfbdev = NULL;
  333. }
  334. void radeon_fbdev_set_suspend(struct radeon_device *rdev, int state)
  335. {
  336. fb_set_suspend(rdev->mode_info.rfbdev->helper.fbdev, state);
  337. }
  338. int radeon_fbdev_total_size(struct radeon_device *rdev)
  339. {
  340. struct radeon_bo *robj;
  341. int size = 0;
  342. robj = gem_to_radeon_bo(rdev->mode_info.rfbdev->rfb.obj);
  343. size += radeon_bo_size(robj);
  344. return size;
  345. }
  346. bool radeon_fbdev_robj_is_fb(struct radeon_device *rdev, struct radeon_bo *robj)
  347. {
  348. if (robj == gem_to_radeon_bo(rdev->mode_info.rfbdev->rfb.obj))
  349. return true;
  350. return false;
  351. }