gpio-u300.c 19 KB

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  1. /*
  2. * U300 GPIO module.
  3. *
  4. * Copyright (C) 2007-2009 ST-Ericsson AB
  5. * License terms: GNU General Public License (GPL) version 2
  6. * This can driver either of the two basic GPIO cores
  7. * available in the U300 platforms:
  8. * COH 901 335 - Used in DB3150 (U300 1.0) and DB3200 (U330 1.0)
  9. * COH 901 571/3 - Used in DB3210 (U365 2.0) and DB3350 (U335 1.0)
  10. * Notice that you also have inline macros in <asm-arch/gpio.h>
  11. * Author: Linus Walleij <linus.walleij@stericsson.com>
  12. * Author: Jonas Aaberg <jonas.aberg@stericsson.com>
  13. *
  14. */
  15. #include <linux/module.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/delay.h>
  18. #include <linux/errno.h>
  19. #include <linux/io.h>
  20. #include <linux/clk.h>
  21. #include <linux/err.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/gpio.h>
  24. /* Reference to GPIO block clock */
  25. static struct clk *clk;
  26. /* Memory resource */
  27. static struct resource *memres;
  28. static void __iomem *virtbase;
  29. static struct device *gpiodev;
  30. struct u300_gpio_port {
  31. const char *name;
  32. int irq;
  33. int number;
  34. };
  35. static struct u300_gpio_port gpio_ports[] = {
  36. {
  37. .name = "gpio0",
  38. .number = 0,
  39. },
  40. {
  41. .name = "gpio1",
  42. .number = 1,
  43. },
  44. {
  45. .name = "gpio2",
  46. .number = 2,
  47. },
  48. #ifdef U300_COH901571_3
  49. {
  50. .name = "gpio3",
  51. .number = 3,
  52. },
  53. {
  54. .name = "gpio4",
  55. .number = 4,
  56. },
  57. #ifdef CONFIG_MACH_U300_BS335
  58. {
  59. .name = "gpio5",
  60. .number = 5,
  61. },
  62. {
  63. .name = "gpio6",
  64. .number = 6,
  65. },
  66. #endif
  67. #endif
  68. };
  69. #ifdef U300_COH901571_3
  70. /* Default input value */
  71. #define DEFAULT_OUTPUT_LOW 0
  72. #define DEFAULT_OUTPUT_HIGH 1
  73. /* GPIO Pull-Up status */
  74. #define DISABLE_PULL_UP 0
  75. #define ENABLE_PULL_UP 1
  76. #define GPIO_NOT_USED 0
  77. #define GPIO_IN 1
  78. #define GPIO_OUT 2
  79. struct u300_gpio_configuration_data {
  80. unsigned char pin_usage;
  81. unsigned char default_output_value;
  82. unsigned char pull_up;
  83. };
  84. /* Initial configuration */
  85. const struct u300_gpio_configuration_data
  86. u300_gpio_config[U300_GPIO_NUM_PORTS][U300_GPIO_PINS_PER_PORT] = {
  87. #ifdef CONFIG_MACH_U300_BS335
  88. /* Port 0, pins 0-7 */
  89. {
  90. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  91. {GPIO_OUT, DEFAULT_OUTPUT_HIGH, DISABLE_PULL_UP},
  92. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  93. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  94. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  95. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  96. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  97. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP}
  98. },
  99. /* Port 1, pins 0-7 */
  100. {
  101. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  102. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  103. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  104. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  105. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  106. {GPIO_OUT, DEFAULT_OUTPUT_HIGH, DISABLE_PULL_UP},
  107. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  108. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP}
  109. },
  110. /* Port 2, pins 0-7 */
  111. {
  112. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  113. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  114. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  115. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  116. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  117. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  118. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  119. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP}
  120. },
  121. /* Port 3, pins 0-7 */
  122. {
  123. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  124. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  125. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  126. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  127. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  128. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  129. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  130. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP}
  131. },
  132. /* Port 4, pins 0-7 */
  133. {
  134. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  135. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  136. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  137. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  138. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  139. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  140. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  141. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP}
  142. },
  143. /* Port 5, pins 0-7 */
  144. {
  145. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  146. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  147. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  148. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  149. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  150. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  151. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  152. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP}
  153. },
  154. /* Port 6, pind 0-7 */
  155. {
  156. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  157. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  158. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  159. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  160. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  161. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  162. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  163. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP}
  164. }
  165. #endif
  166. #ifdef CONFIG_MACH_U300_BS365
  167. /* Port 0, pins 0-7 */
  168. {
  169. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  170. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  171. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  172. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  173. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  174. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  175. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  176. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP}
  177. },
  178. /* Port 1, pins 0-7 */
  179. {
  180. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  181. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  182. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  183. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  184. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  185. {GPIO_OUT, DEFAULT_OUTPUT_HIGH, DISABLE_PULL_UP},
  186. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  187. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP}
  188. },
  189. /* Port 2, pins 0-7 */
  190. {
  191. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  192. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  193. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  194. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  195. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  196. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  197. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  198. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP}
  199. },
  200. /* Port 3, pins 0-7 */
  201. {
  202. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  203. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  204. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  205. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  206. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  207. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  208. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  209. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP}
  210. },
  211. /* Port 4, pins 0-7 */
  212. {
  213. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  214. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  215. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  216. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  217. /* These 4 pins doesn't exist on DB3210 */
  218. {GPIO_OUT, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  219. {GPIO_OUT, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  220. {GPIO_OUT, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  221. {GPIO_OUT, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP}
  222. }
  223. #endif
  224. };
  225. #endif
  226. /* No users == we can power down GPIO */
  227. static int gpio_users;
  228. struct gpio_struct {
  229. int (*callback)(void *);
  230. void *data;
  231. int users;
  232. };
  233. static struct gpio_struct gpio_pin[U300_GPIO_MAX];
  234. /*
  235. * Let drivers register callback in order to get notified when there is
  236. * an interrupt on the gpio pin
  237. */
  238. int gpio_register_callback(unsigned gpio, int (*func)(void *arg), void *data)
  239. {
  240. if (gpio_pin[gpio].callback)
  241. dev_warn(gpiodev, "%s: WARNING: callback already "
  242. "registered for gpio pin#%d\n", __func__, gpio);
  243. gpio_pin[gpio].callback = func;
  244. gpio_pin[gpio].data = data;
  245. return 0;
  246. }
  247. EXPORT_SYMBOL(gpio_register_callback);
  248. int gpio_unregister_callback(unsigned gpio)
  249. {
  250. if (!gpio_pin[gpio].callback)
  251. dev_warn(gpiodev, "%s: WARNING: callback already "
  252. "unregistered for gpio pin#%d\n", __func__, gpio);
  253. gpio_pin[gpio].callback = NULL;
  254. gpio_pin[gpio].data = NULL;
  255. return 0;
  256. }
  257. EXPORT_SYMBOL(gpio_unregister_callback);
  258. /* Non-zero means valid */
  259. int gpio_is_valid(int number)
  260. {
  261. if (number >= 0 &&
  262. number < (U300_GPIO_NUM_PORTS * U300_GPIO_PINS_PER_PORT))
  263. return 1;
  264. return 0;
  265. }
  266. EXPORT_SYMBOL(gpio_is_valid);
  267. int gpio_request(unsigned gpio, const char *label)
  268. {
  269. if (gpio_pin[gpio].users)
  270. return -EINVAL;
  271. else
  272. gpio_pin[gpio].users++;
  273. gpio_users++;
  274. return 0;
  275. }
  276. EXPORT_SYMBOL(gpio_request);
  277. void gpio_free(unsigned gpio)
  278. {
  279. gpio_users--;
  280. gpio_pin[gpio].users--;
  281. if (unlikely(gpio_pin[gpio].users < 0)) {
  282. dev_warn(gpiodev, "warning: gpio#%d release mismatch\n",
  283. gpio);
  284. gpio_pin[gpio].users = 0;
  285. }
  286. return;
  287. }
  288. EXPORT_SYMBOL(gpio_free);
  289. /* This returns zero or nonzero */
  290. int gpio_get_value(unsigned gpio)
  291. {
  292. return readl(virtbase + U300_GPIO_PXPDIR +
  293. PIN_TO_PORT(gpio) * U300_GPIO_PORTX_SPACING) & (1 << (gpio & 0x07));
  294. }
  295. EXPORT_SYMBOL(gpio_get_value);
  296. /*
  297. * We hope that the compiler will optimize away the unused branch
  298. * in case "value" is a constant
  299. */
  300. void gpio_set_value(unsigned gpio, int value)
  301. {
  302. u32 val;
  303. unsigned long flags;
  304. local_irq_save(flags);
  305. if (value) {
  306. /* set */
  307. val = readl(virtbase + U300_GPIO_PXPDOR +
  308. PIN_TO_PORT(gpio) * U300_GPIO_PORTX_SPACING)
  309. & (1 << (gpio & 0x07));
  310. writel(val | (1 << (gpio & 0x07)), virtbase +
  311. U300_GPIO_PXPDOR +
  312. PIN_TO_PORT(gpio) * U300_GPIO_PORTX_SPACING);
  313. } else {
  314. /* clear */
  315. val = readl(virtbase + U300_GPIO_PXPDOR +
  316. PIN_TO_PORT(gpio) * U300_GPIO_PORTX_SPACING)
  317. & (1 << (gpio & 0x07));
  318. writel(val & ~(1 << (gpio & 0x07)), virtbase +
  319. U300_GPIO_PXPDOR +
  320. PIN_TO_PORT(gpio) * U300_GPIO_PORTX_SPACING);
  321. }
  322. local_irq_restore(flags);
  323. }
  324. EXPORT_SYMBOL(gpio_set_value);
  325. int gpio_direction_input(unsigned gpio)
  326. {
  327. unsigned long flags;
  328. u32 val;
  329. if (gpio > U300_GPIO_MAX)
  330. return -EINVAL;
  331. local_irq_save(flags);
  332. val = readl(virtbase + U300_GPIO_PXPCR + PIN_TO_PORT(gpio) *
  333. U300_GPIO_PORTX_SPACING);
  334. /* Mask out this pin*/
  335. val &= ~(U300_GPIO_PXPCR_PIN_MODE_MASK << ((gpio & 0x07) << 1));
  336. /* This is not needed since it sets the bits to zero.*/
  337. /* val |= (U300_GPIO_PXPCR_PIN_MODE_INPUT << (gpio*2)); */
  338. writel(val, virtbase + U300_GPIO_PXPCR + PIN_TO_PORT(gpio) *
  339. U300_GPIO_PORTX_SPACING);
  340. local_irq_restore(flags);
  341. return 0;
  342. }
  343. EXPORT_SYMBOL(gpio_direction_input);
  344. int gpio_direction_output(unsigned gpio, int value)
  345. {
  346. unsigned long flags;
  347. u32 val;
  348. if (gpio > U300_GPIO_MAX)
  349. return -EINVAL;
  350. local_irq_save(flags);
  351. val = readl(virtbase + U300_GPIO_PXPCR + PIN_TO_PORT(gpio) *
  352. U300_GPIO_PORTX_SPACING);
  353. /* Mask out this pin */
  354. val &= ~(U300_GPIO_PXPCR_PIN_MODE_MASK << ((gpio & 0x07) << 1));
  355. /*
  356. * FIXME: configure for push/pull, open drain or open source per pin
  357. * in setup. The current driver will only support push/pull.
  358. */
  359. val |= (U300_GPIO_PXPCR_PIN_MODE_OUTPUT_PUSH_PULL
  360. << ((gpio & 0x07) << 1));
  361. writel(val, virtbase + U300_GPIO_PXPCR + PIN_TO_PORT(gpio) *
  362. U300_GPIO_PORTX_SPACING);
  363. gpio_set_value(gpio, value);
  364. local_irq_restore(flags);
  365. return 0;
  366. }
  367. EXPORT_SYMBOL(gpio_direction_output);
  368. /*
  369. * Enable an IRQ, edge is rising edge (!= 0) or falling edge (==0).
  370. */
  371. void enable_irq_on_gpio_pin(unsigned gpio, int edge)
  372. {
  373. u32 val;
  374. unsigned long flags;
  375. local_irq_save(flags);
  376. val = readl(virtbase + U300_GPIO_PXIEN + PIN_TO_PORT(gpio) *
  377. U300_GPIO_PORTX_SPACING);
  378. val |= (1 << (gpio & 0x07));
  379. writel(val, virtbase + U300_GPIO_PXIEN + PIN_TO_PORT(gpio) *
  380. U300_GPIO_PORTX_SPACING);
  381. val = readl(virtbase + U300_GPIO_PXICR + PIN_TO_PORT(gpio) *
  382. U300_GPIO_PORTX_SPACING);
  383. if (edge)
  384. val |= (1 << (gpio & 0x07));
  385. else
  386. val &= ~(1 << (gpio & 0x07));
  387. writel(val, virtbase + U300_GPIO_PXICR + PIN_TO_PORT(gpio) *
  388. U300_GPIO_PORTX_SPACING);
  389. local_irq_restore(flags);
  390. }
  391. EXPORT_SYMBOL(enable_irq_on_gpio_pin);
  392. void disable_irq_on_gpio_pin(unsigned gpio)
  393. {
  394. u32 val;
  395. unsigned long flags;
  396. local_irq_save(flags);
  397. val = readl(virtbase + U300_GPIO_PXIEN + PIN_TO_PORT(gpio) *
  398. U300_GPIO_PORTX_SPACING);
  399. val &= ~(1 << (gpio & 0x07));
  400. writel(val, virtbase + U300_GPIO_PXIEN + PIN_TO_PORT(gpio) *
  401. U300_GPIO_PORTX_SPACING);
  402. local_irq_restore(flags);
  403. }
  404. EXPORT_SYMBOL(disable_irq_on_gpio_pin);
  405. /* Enable (value == 0) or disable (value == 1) internal pullup */
  406. void gpio_pullup(unsigned gpio, int value)
  407. {
  408. u32 val;
  409. unsigned long flags;
  410. local_irq_save(flags);
  411. if (value) {
  412. val = readl(virtbase + U300_GPIO_PXPER + PIN_TO_PORT(gpio) *
  413. U300_GPIO_PORTX_SPACING);
  414. writel(val | (1 << (gpio & 0x07)), virtbase + U300_GPIO_PXPER +
  415. PIN_TO_PORT(gpio) * U300_GPIO_PORTX_SPACING);
  416. } else {
  417. val = readl(virtbase + U300_GPIO_PXPER + PIN_TO_PORT(gpio) *
  418. U300_GPIO_PORTX_SPACING);
  419. writel(val & ~(1 << (gpio & 0x07)), virtbase + U300_GPIO_PXPER +
  420. PIN_TO_PORT(gpio) * U300_GPIO_PORTX_SPACING);
  421. }
  422. local_irq_restore(flags);
  423. }
  424. EXPORT_SYMBOL(gpio_pullup);
  425. static irqreturn_t gpio_irq_handler(int irq, void *dev_id)
  426. {
  427. struct u300_gpio_port *port = dev_id;
  428. u32 val;
  429. int pin;
  430. /* Read event register */
  431. val = readl(virtbase + U300_GPIO_PXIEV + port->number *
  432. U300_GPIO_PORTX_SPACING);
  433. /* Mask with enable register */
  434. val &= readl(virtbase + U300_GPIO_PXIEV + port->number *
  435. U300_GPIO_PORTX_SPACING);
  436. /* Mask relevant bits */
  437. val &= U300_GPIO_PXIEV_ALL_IRQ_EVENT_MASK;
  438. /* ACK IRQ (clear event) */
  439. writel(val, virtbase + U300_GPIO_PXIEV + port->number *
  440. U300_GPIO_PORTX_SPACING);
  441. /* Print message */
  442. while (val != 0) {
  443. unsigned gpio;
  444. pin = __ffs(val);
  445. /* mask off this pin */
  446. val &= ~(1 << pin);
  447. gpio = (port->number << 3) + pin;
  448. if (gpio_pin[gpio].callback)
  449. (void)gpio_pin[gpio].callback(gpio_pin[gpio].data);
  450. else
  451. dev_dbg(gpiodev, "stray GPIO IRQ on line %d\n",
  452. gpio);
  453. }
  454. return IRQ_HANDLED;
  455. }
  456. static void gpio_set_initial_values(void)
  457. {
  458. #ifdef U300_COH901571_3
  459. int i, j;
  460. unsigned long flags;
  461. u32 val;
  462. /* Write default values to all pins */
  463. for (i = 0; i < U300_GPIO_NUM_PORTS; i++) {
  464. val = 0;
  465. for (j = 0; j < 8; j++)
  466. val |= (u32) (u300_gpio_config[i][j].default_output_value != DEFAULT_OUTPUT_LOW) << j;
  467. local_irq_save(flags);
  468. writel(val, virtbase + U300_GPIO_PXPDOR + i * U300_GPIO_PORTX_SPACING);
  469. local_irq_restore(flags);
  470. }
  471. /*
  472. * Put all pins that are set to either 'GPIO_OUT' or 'GPIO_NOT_USED'
  473. * to output and 'GPIO_IN' to input for each port. And initialize
  474. * default value on outputs.
  475. */
  476. for (i = 0; i < U300_GPIO_NUM_PORTS; i++) {
  477. for (j = 0; j < U300_GPIO_PINS_PER_PORT; j++) {
  478. local_irq_save(flags);
  479. val = readl(virtbase + U300_GPIO_PXPCR +
  480. i * U300_GPIO_PORTX_SPACING);
  481. /* Mask out this pin */
  482. val &= ~(U300_GPIO_PXPCR_PIN_MODE_MASK << (j << 1));
  483. if (u300_gpio_config[i][j].pin_usage != GPIO_IN)
  484. val |= (U300_GPIO_PXPCR_PIN_MODE_OUTPUT_PUSH_PULL << (j << 1));
  485. writel(val, virtbase + U300_GPIO_PXPCR +
  486. i * U300_GPIO_PORTX_SPACING);
  487. local_irq_restore(flags);
  488. }
  489. }
  490. /* Enable or disable the internal pull-ups in the GPIO ASIC block */
  491. for (i = 0; i < U300_GPIO_MAX; i++) {
  492. val = 0;
  493. for (j = 0; j < 8; j++)
  494. val |= (u32)((u300_gpio_config[i][j].pull_up == DISABLE_PULL_UP) << j);
  495. local_irq_save(flags);
  496. writel(val, virtbase + U300_GPIO_PXPER + i * U300_GPIO_PORTX_SPACING);
  497. local_irq_restore(flags);
  498. }
  499. #endif
  500. }
  501. static int __init gpio_probe(struct platform_device *pdev)
  502. {
  503. u32 val;
  504. int err = 0;
  505. int i;
  506. int num_irqs;
  507. gpiodev = &pdev->dev;
  508. memset(gpio_pin, 0, sizeof(gpio_pin));
  509. /* Get GPIO clock */
  510. clk = clk_get(&pdev->dev, NULL);
  511. if (IS_ERR(clk)) {
  512. err = PTR_ERR(clk);
  513. dev_err(gpiodev, "could not get GPIO clock\n");
  514. goto err_no_clk;
  515. }
  516. err = clk_enable(clk);
  517. if (err) {
  518. dev_err(gpiodev, "could not enable GPIO clock\n");
  519. goto err_no_clk_enable;
  520. }
  521. memres = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  522. if (!memres)
  523. goto err_no_resource;
  524. if (!request_mem_region(memres->start, resource_size(memres),
  525. "GPIO Controller")) {
  526. err = -ENODEV;
  527. goto err_no_ioregion;
  528. }
  529. virtbase = ioremap(memres->start, resource_size(memres));
  530. if (!virtbase) {
  531. err = -ENOMEM;
  532. goto err_no_ioremap;
  533. }
  534. dev_info(gpiodev, "remapped 0x%08x to %p\n",
  535. memres->start, virtbase);
  536. #ifdef U300_COH901335
  537. dev_info(gpiodev, "initializing GPIO Controller COH 901 335\n");
  538. /* Turn on the GPIO block */
  539. writel(U300_GPIO_CR_BLOCK_CLOCK_ENABLE, virtbase + U300_GPIO_CR);
  540. #endif
  541. #ifdef U300_COH901571_3
  542. dev_info(gpiodev, "initializing GPIO Controller COH 901 571/3\n");
  543. val = readl(virtbase + U300_GPIO_CR);
  544. dev_info(gpiodev, "COH901571/3 block version: %d, " \
  545. "number of cores: %d\n",
  546. ((val & 0x0000FE00) >> 9),
  547. ((val & 0x000001FC) >> 2));
  548. writel(U300_GPIO_CR_BLOCK_CLKRQ_ENABLE, virtbase + U300_GPIO_CR);
  549. #endif
  550. gpio_set_initial_values();
  551. for (num_irqs = 0 ; num_irqs < U300_GPIO_NUM_PORTS; num_irqs++) {
  552. gpio_ports[num_irqs].irq =
  553. platform_get_irq_byname(pdev,
  554. gpio_ports[num_irqs].name);
  555. err = request_irq(gpio_ports[num_irqs].irq,
  556. gpio_irq_handler, IRQF_DISABLED,
  557. gpio_ports[num_irqs].name,
  558. &gpio_ports[num_irqs]);
  559. if (err) {
  560. dev_err(gpiodev, "cannot allocate IRQ for %s!\n",
  561. gpio_ports[num_irqs].name);
  562. goto err_no_irq;
  563. }
  564. /* Turns off PortX_irq_force */
  565. writel(0x0, virtbase + U300_GPIO_PXIFR +
  566. num_irqs * U300_GPIO_PORTX_SPACING);
  567. }
  568. return 0;
  569. err_no_irq:
  570. for (i = 0; i < num_irqs; i++)
  571. free_irq(gpio_ports[i].irq, &gpio_ports[i]);
  572. iounmap(virtbase);
  573. err_no_ioremap:
  574. release_mem_region(memres->start, resource_size(memres));
  575. err_no_ioregion:
  576. err_no_resource:
  577. clk_disable(clk);
  578. err_no_clk_enable:
  579. clk_put(clk);
  580. err_no_clk:
  581. dev_info(gpiodev, "module ERROR:%d\n", err);
  582. return err;
  583. }
  584. static int __exit gpio_remove(struct platform_device *pdev)
  585. {
  586. int i;
  587. /* Turn off the GPIO block */
  588. writel(0x00000000U, virtbase + U300_GPIO_CR);
  589. for (i = 0 ; i < U300_GPIO_NUM_PORTS; i++)
  590. free_irq(gpio_ports[i].irq, &gpio_ports[i]);
  591. iounmap(virtbase);
  592. release_mem_region(memres->start, resource_size(memres));
  593. clk_disable(clk);
  594. clk_put(clk);
  595. return 0;
  596. }
  597. static struct platform_driver gpio_driver = {
  598. .driver = {
  599. .name = "u300-gpio",
  600. },
  601. .remove = __exit_p(gpio_remove),
  602. };
  603. static int __init u300_gpio_init(void)
  604. {
  605. return platform_driver_probe(&gpio_driver, gpio_probe);
  606. }
  607. static void __exit u300_gpio_exit(void)
  608. {
  609. platform_driver_unregister(&gpio_driver);
  610. }
  611. arch_initcall(u300_gpio_init);
  612. module_exit(u300_gpio_exit);
  613. MODULE_AUTHOR("Linus Walleij <linus.walleij@stericsson.com>");
  614. #ifdef U300_COH901571_3
  615. MODULE_DESCRIPTION("ST-Ericsson AB COH 901 571/3 GPIO driver");
  616. #endif
  617. #ifdef U300_COH901335
  618. MODULE_DESCRIPTION("ST-Ericsson AB COH 901 335 GPIO driver");
  619. #endif
  620. MODULE_LICENSE("GPL");