gx-suspmod.c 14 KB

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  1. /*
  2. * Cyrix MediaGX and NatSemi Geode Suspend Modulation
  3. * (C) 2002 Zwane Mwaikambo <zwane@commfireservices.com>
  4. * (C) 2002 Hiroshi Miura <miura@da-cha.org>
  5. * All Rights Reserved
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * version 2 as published by the Free Software Foundation
  10. *
  11. * The author(s) of this software shall not be held liable for damages
  12. * of any nature resulting due to the use of this software. This
  13. * software is provided AS-IS with no warranties.
  14. *
  15. * Theoretical note:
  16. *
  17. * (see Geode(tm) CS5530 manual (rev.4.1) page.56)
  18. *
  19. * CPU frequency control on NatSemi Geode GX1/GXLV processor and CS55x0
  20. * are based on Suspend Modulation.
  21. *
  22. * Suspend Modulation works by asserting and de-asserting the SUSP# pin
  23. * to CPU(GX1/GXLV) for configurable durations. When asserting SUSP#
  24. * the CPU enters an idle state. GX1 stops its core clock when SUSP# is
  25. * asserted then power consumption is reduced.
  26. *
  27. * Suspend Modulation's OFF/ON duration are configurable
  28. * with 'Suspend Modulation OFF Count Register'
  29. * and 'Suspend Modulation ON Count Register'.
  30. * These registers are 8bit counters that represent the number of
  31. * 32us intervals which the SUSP# pin is asserted(ON)/de-asserted(OFF)
  32. * to the processor.
  33. *
  34. * These counters define a ratio which is the effective frequency
  35. * of operation of the system.
  36. *
  37. * OFF Count
  38. * F_eff = Fgx * ----------------------
  39. * OFF Count + ON Count
  40. *
  41. * 0 <= On Count, Off Count <= 255
  42. *
  43. * From these limits, we can get register values
  44. *
  45. * off_duration + on_duration <= MAX_DURATION
  46. * on_duration = off_duration * (stock_freq - freq) / freq
  47. *
  48. * off_duration = (freq * DURATION) / stock_freq
  49. * on_duration = DURATION - off_duration
  50. *
  51. *
  52. *---------------------------------------------------------------------------
  53. *
  54. * ChangeLog:
  55. * Dec. 12, 2003 Hiroshi Miura <miura@da-cha.org>
  56. * - fix on/off register mistake
  57. * - fix cpu_khz calc when it stops cpu modulation.
  58. *
  59. * Dec. 11, 2002 Hiroshi Miura <miura@da-cha.org>
  60. * - rewrite for Cyrix MediaGX Cx5510/5520 and
  61. * NatSemi Geode Cs5530(A).
  62. *
  63. * Jul. ??, 2002 Zwane Mwaikambo <zwane@commfireservices.com>
  64. * - cs5530_mod patch for 2.4.19-rc1.
  65. *
  66. *---------------------------------------------------------------------------
  67. *
  68. * Todo
  69. * Test on machines with 5510, 5530, 5530A
  70. */
  71. /************************************************************************
  72. * Suspend Modulation - Definitions *
  73. ************************************************************************/
  74. #include <linux/kernel.h>
  75. #include <linux/module.h>
  76. #include <linux/init.h>
  77. #include <linux/smp.h>
  78. #include <linux/cpufreq.h>
  79. #include <linux/pci.h>
  80. #include <linux/errno.h>
  81. #include <linux/slab.h>
  82. #include <asm/processor-cyrix.h>
  83. /* PCI config registers, all at F0 */
  84. #define PCI_PMER1 0x80 /* power management enable register 1 */
  85. #define PCI_PMER2 0x81 /* power management enable register 2 */
  86. #define PCI_PMER3 0x82 /* power management enable register 3 */
  87. #define PCI_IRQTC 0x8c /* irq speedup timer counter register:typical 2 to 4ms */
  88. #define PCI_VIDTC 0x8d /* video speedup timer counter register: typical 50 to 100ms */
  89. #define PCI_MODOFF 0x94 /* suspend modulation OFF counter register, 1 = 32us */
  90. #define PCI_MODON 0x95 /* suspend modulation ON counter register */
  91. #define PCI_SUSCFG 0x96 /* suspend configuration register */
  92. /* PMER1 bits */
  93. #define GPM (1<<0) /* global power management */
  94. #define GIT (1<<1) /* globally enable PM device idle timers */
  95. #define GTR (1<<2) /* globally enable IO traps */
  96. #define IRQ_SPDUP (1<<3) /* disable clock throttle during interrupt handling */
  97. #define VID_SPDUP (1<<4) /* disable clock throttle during vga video handling */
  98. /* SUSCFG bits */
  99. #define SUSMOD (1<<0) /* enable/disable suspend modulation */
  100. /* the below is supported only with cs5530 (after rev.1.2)/cs5530A */
  101. #define SMISPDUP (1<<1) /* select how SMI re-enable suspend modulation: */
  102. /* IRQTC timer or read SMI speedup disable reg.(F1BAR[08-09h]) */
  103. #define SUSCFG (1<<2) /* enable powering down a GXLV processor. "Special 3Volt Suspend" mode */
  104. /* the below is supported only with cs5530A */
  105. #define PWRSVE_ISA (1<<3) /* stop ISA clock */
  106. #define PWRSVE (1<<4) /* active idle */
  107. struct gxfreq_params {
  108. u8 on_duration;
  109. u8 off_duration;
  110. u8 pci_suscfg;
  111. u8 pci_pmer1;
  112. u8 pci_pmer2;
  113. struct pci_dev *cs55x0;
  114. };
  115. static struct gxfreq_params *gx_params;
  116. static int stock_freq;
  117. /* PCI bus clock - defaults to 30.000 if cpu_khz is not available */
  118. static int pci_busclk;
  119. module_param(pci_busclk, int, 0444);
  120. /* maximum duration for which the cpu may be suspended
  121. * (32us * MAX_DURATION). If no parameter is given, this defaults
  122. * to 255.
  123. * Note that this leads to a maximum of 8 ms(!) where the CPU clock
  124. * is suspended -- processing power is just 0.39% of what it used to be,
  125. * though. 781.25 kHz(!) for a 200 MHz processor -- wow. */
  126. static int max_duration = 255;
  127. module_param(max_duration, int, 0444);
  128. /* For the default policy, we want at least some processing power
  129. * - let's say 5%. (min = maxfreq / POLICY_MIN_DIV)
  130. */
  131. #define POLICY_MIN_DIV 20
  132. /**
  133. * we can detect a core multipiler from dir0_lsb
  134. * from GX1 datasheet p.56,
  135. * MULT[3:0]:
  136. * 0000 = SYSCLK multiplied by 4 (test only)
  137. * 0001 = SYSCLK multiplied by 10
  138. * 0010 = SYSCLK multiplied by 4
  139. * 0011 = SYSCLK multiplied by 6
  140. * 0100 = SYSCLK multiplied by 9
  141. * 0101 = SYSCLK multiplied by 5
  142. * 0110 = SYSCLK multiplied by 7
  143. * 0111 = SYSCLK multiplied by 8
  144. * of 33.3MHz
  145. **/
  146. static int gx_freq_mult[16] = {
  147. 4, 10, 4, 6, 9, 5, 7, 8,
  148. 0, 0, 0, 0, 0, 0, 0, 0
  149. };
  150. /****************************************************************
  151. * Low Level chipset interface *
  152. ****************************************************************/
  153. static struct pci_device_id gx_chipset_tbl[] __initdata = {
  154. { PCI_VDEVICE(CYRIX, PCI_DEVICE_ID_CYRIX_5530_LEGACY), },
  155. { PCI_VDEVICE(CYRIX, PCI_DEVICE_ID_CYRIX_5520), },
  156. { PCI_VDEVICE(CYRIX, PCI_DEVICE_ID_CYRIX_5510), },
  157. { 0, },
  158. };
  159. static void gx_write_byte(int reg, int value)
  160. {
  161. pci_write_config_byte(gx_params->cs55x0, reg, value);
  162. }
  163. /**
  164. * gx_detect_chipset:
  165. *
  166. **/
  167. static __init struct pci_dev *gx_detect_chipset(void)
  168. {
  169. struct pci_dev *gx_pci = NULL;
  170. /* check if CPU is a MediaGX or a Geode. */
  171. if ((boot_cpu_data.x86_vendor != X86_VENDOR_NSC) &&
  172. (boot_cpu_data.x86_vendor != X86_VENDOR_CYRIX)) {
  173. pr_debug("error: no MediaGX/Geode processor found!\n");
  174. return NULL;
  175. }
  176. /* detect which companion chip is used */
  177. for_each_pci_dev(gx_pci) {
  178. if ((pci_match_id(gx_chipset_tbl, gx_pci)) != NULL)
  179. return gx_pci;
  180. }
  181. pr_debug("error: no supported chipset found!\n");
  182. return NULL;
  183. }
  184. /**
  185. * gx_get_cpuspeed:
  186. *
  187. * Finds out at which efficient frequency the Cyrix MediaGX/NatSemi
  188. * Geode CPU runs.
  189. */
  190. static unsigned int gx_get_cpuspeed(unsigned int cpu)
  191. {
  192. if ((gx_params->pci_suscfg & SUSMOD) == 0)
  193. return stock_freq;
  194. return (stock_freq * gx_params->off_duration)
  195. / (gx_params->on_duration + gx_params->off_duration);
  196. }
  197. /**
  198. * gx_validate_speed:
  199. * determine current cpu speed
  200. *
  201. **/
  202. static unsigned int gx_validate_speed(unsigned int khz, u8 *on_duration,
  203. u8 *off_duration)
  204. {
  205. unsigned int i;
  206. u8 tmp_on, tmp_off;
  207. int old_tmp_freq = stock_freq;
  208. int tmp_freq;
  209. *off_duration = 1;
  210. *on_duration = 0;
  211. for (i = max_duration; i > 0; i--) {
  212. tmp_off = ((khz * i) / stock_freq) & 0xff;
  213. tmp_on = i - tmp_off;
  214. tmp_freq = (stock_freq * tmp_off) / i;
  215. /* if this relation is closer to khz, use this. If it's equal,
  216. * prefer it, too - lower latency */
  217. if (abs(tmp_freq - khz) <= abs(old_tmp_freq - khz)) {
  218. *on_duration = tmp_on;
  219. *off_duration = tmp_off;
  220. old_tmp_freq = tmp_freq;
  221. }
  222. }
  223. return old_tmp_freq;
  224. }
  225. /**
  226. * gx_set_cpuspeed:
  227. * set cpu speed in khz.
  228. **/
  229. static void gx_set_cpuspeed(unsigned int khz)
  230. {
  231. u8 suscfg, pmer1;
  232. unsigned int new_khz;
  233. unsigned long flags;
  234. struct cpufreq_freqs freqs;
  235. freqs.cpu = 0;
  236. freqs.old = gx_get_cpuspeed(0);
  237. new_khz = gx_validate_speed(khz, &gx_params->on_duration,
  238. &gx_params->off_duration);
  239. freqs.new = new_khz;
  240. cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
  241. local_irq_save(flags);
  242. if (new_khz != stock_freq) {
  243. /* if new khz == 100% of CPU speed, it is special case */
  244. switch (gx_params->cs55x0->device) {
  245. case PCI_DEVICE_ID_CYRIX_5530_LEGACY:
  246. pmer1 = gx_params->pci_pmer1 | IRQ_SPDUP | VID_SPDUP;
  247. /* FIXME: need to test other values -- Zwane,Miura */
  248. /* typical 2 to 4ms */
  249. gx_write_byte(PCI_IRQTC, 4);
  250. /* typical 50 to 100ms */
  251. gx_write_byte(PCI_VIDTC, 100);
  252. gx_write_byte(PCI_PMER1, pmer1);
  253. if (gx_params->cs55x0->revision < 0x10) {
  254. /* CS5530(rev 1.2, 1.3) */
  255. suscfg = gx_params->pci_suscfg|SUSMOD;
  256. } else {
  257. /* CS5530A,B.. */
  258. suscfg = gx_params->pci_suscfg|SUSMOD|PWRSVE;
  259. }
  260. break;
  261. case PCI_DEVICE_ID_CYRIX_5520:
  262. case PCI_DEVICE_ID_CYRIX_5510:
  263. suscfg = gx_params->pci_suscfg | SUSMOD;
  264. break;
  265. default:
  266. local_irq_restore(flags);
  267. pr_debug("fatal: try to set unknown chipset.\n");
  268. return;
  269. }
  270. } else {
  271. suscfg = gx_params->pci_suscfg & ~(SUSMOD);
  272. gx_params->off_duration = 0;
  273. gx_params->on_duration = 0;
  274. pr_debug("suspend modulation disabled: cpu runs 100%% speed.\n");
  275. }
  276. gx_write_byte(PCI_MODOFF, gx_params->off_duration);
  277. gx_write_byte(PCI_MODON, gx_params->on_duration);
  278. gx_write_byte(PCI_SUSCFG, suscfg);
  279. pci_read_config_byte(gx_params->cs55x0, PCI_SUSCFG, &suscfg);
  280. local_irq_restore(flags);
  281. gx_params->pci_suscfg = suscfg;
  282. cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
  283. pr_debug("suspend modulation w/ duration of ON:%d us, OFF:%d us\n",
  284. gx_params->on_duration * 32, gx_params->off_duration * 32);
  285. pr_debug("suspend modulation w/ clock speed: %d kHz.\n", freqs.new);
  286. }
  287. /****************************************************************
  288. * High level functions *
  289. ****************************************************************/
  290. /*
  291. * cpufreq_gx_verify: test if frequency range is valid
  292. *
  293. * This function checks if a given frequency range in kHz is valid
  294. * for the hardware supported by the driver.
  295. */
  296. static int cpufreq_gx_verify(struct cpufreq_policy *policy)
  297. {
  298. unsigned int tmp_freq = 0;
  299. u8 tmp1, tmp2;
  300. if (!stock_freq || !policy)
  301. return -EINVAL;
  302. policy->cpu = 0;
  303. cpufreq_verify_within_limits(policy, (stock_freq / max_duration),
  304. stock_freq);
  305. /* it needs to be assured that at least one supported frequency is
  306. * within policy->min and policy->max. If it is not, policy->max
  307. * needs to be increased until one freuqency is supported.
  308. * policy->min may not be decreased, though. This way we guarantee a
  309. * specific processing capacity.
  310. */
  311. tmp_freq = gx_validate_speed(policy->min, &tmp1, &tmp2);
  312. if (tmp_freq < policy->min)
  313. tmp_freq += stock_freq / max_duration;
  314. policy->min = tmp_freq;
  315. if (policy->min > policy->max)
  316. policy->max = tmp_freq;
  317. tmp_freq = gx_validate_speed(policy->max, &tmp1, &tmp2);
  318. if (tmp_freq > policy->max)
  319. tmp_freq -= stock_freq / max_duration;
  320. policy->max = tmp_freq;
  321. if (policy->max < policy->min)
  322. policy->max = policy->min;
  323. cpufreq_verify_within_limits(policy, (stock_freq / max_duration),
  324. stock_freq);
  325. return 0;
  326. }
  327. /*
  328. * cpufreq_gx_target:
  329. *
  330. */
  331. static int cpufreq_gx_target(struct cpufreq_policy *policy,
  332. unsigned int target_freq,
  333. unsigned int relation)
  334. {
  335. u8 tmp1, tmp2;
  336. unsigned int tmp_freq;
  337. if (!stock_freq || !policy)
  338. return -EINVAL;
  339. policy->cpu = 0;
  340. tmp_freq = gx_validate_speed(target_freq, &tmp1, &tmp2);
  341. while (tmp_freq < policy->min) {
  342. tmp_freq += stock_freq / max_duration;
  343. tmp_freq = gx_validate_speed(tmp_freq, &tmp1, &tmp2);
  344. }
  345. while (tmp_freq > policy->max) {
  346. tmp_freq -= stock_freq / max_duration;
  347. tmp_freq = gx_validate_speed(tmp_freq, &tmp1, &tmp2);
  348. }
  349. gx_set_cpuspeed(tmp_freq);
  350. return 0;
  351. }
  352. static int cpufreq_gx_cpu_init(struct cpufreq_policy *policy)
  353. {
  354. unsigned int maxfreq, curfreq;
  355. if (!policy || policy->cpu != 0)
  356. return -ENODEV;
  357. /* determine maximum frequency */
  358. if (pci_busclk)
  359. maxfreq = pci_busclk * gx_freq_mult[getCx86(CX86_DIR1) & 0x0f];
  360. else if (cpu_khz)
  361. maxfreq = cpu_khz;
  362. else
  363. maxfreq = 30000 * gx_freq_mult[getCx86(CX86_DIR1) & 0x0f];
  364. stock_freq = maxfreq;
  365. curfreq = gx_get_cpuspeed(0);
  366. pr_debug("cpu max frequency is %d.\n", maxfreq);
  367. pr_debug("cpu current frequency is %dkHz.\n", curfreq);
  368. /* setup basic struct for cpufreq API */
  369. policy->cpu = 0;
  370. if (max_duration < POLICY_MIN_DIV)
  371. policy->min = maxfreq / max_duration;
  372. else
  373. policy->min = maxfreq / POLICY_MIN_DIV;
  374. policy->max = maxfreq;
  375. policy->cur = curfreq;
  376. policy->cpuinfo.min_freq = maxfreq / max_duration;
  377. policy->cpuinfo.max_freq = maxfreq;
  378. policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
  379. return 0;
  380. }
  381. /*
  382. * cpufreq_gx_init:
  383. * MediaGX/Geode GX initialize cpufreq driver
  384. */
  385. static struct cpufreq_driver gx_suspmod_driver = {
  386. .get = gx_get_cpuspeed,
  387. .verify = cpufreq_gx_verify,
  388. .target = cpufreq_gx_target,
  389. .init = cpufreq_gx_cpu_init,
  390. .name = "gx-suspmod",
  391. .owner = THIS_MODULE,
  392. };
  393. static int __init cpufreq_gx_init(void)
  394. {
  395. int ret;
  396. struct gxfreq_params *params;
  397. struct pci_dev *gx_pci;
  398. /* Test if we have the right hardware */
  399. gx_pci = gx_detect_chipset();
  400. if (gx_pci == NULL)
  401. return -ENODEV;
  402. /* check whether module parameters are sane */
  403. if (max_duration > 0xff)
  404. max_duration = 0xff;
  405. pr_debug("geode suspend modulation available.\n");
  406. params = kzalloc(sizeof(struct gxfreq_params), GFP_KERNEL);
  407. if (params == NULL)
  408. return -ENOMEM;
  409. params->cs55x0 = gx_pci;
  410. gx_params = params;
  411. /* keep cs55x0 configurations */
  412. pci_read_config_byte(params->cs55x0, PCI_SUSCFG, &(params->pci_suscfg));
  413. pci_read_config_byte(params->cs55x0, PCI_PMER1, &(params->pci_pmer1));
  414. pci_read_config_byte(params->cs55x0, PCI_PMER2, &(params->pci_pmer2));
  415. pci_read_config_byte(params->cs55x0, PCI_MODON, &(params->on_duration));
  416. pci_read_config_byte(params->cs55x0, PCI_MODOFF,
  417. &(params->off_duration));
  418. ret = cpufreq_register_driver(&gx_suspmod_driver);
  419. if (ret) {
  420. kfree(params);
  421. return ret; /* register error! */
  422. }
  423. return 0;
  424. }
  425. static void __exit cpufreq_gx_exit(void)
  426. {
  427. cpufreq_unregister_driver(&gx_suspmod_driver);
  428. pci_dev_put(gx_params->cs55x0);
  429. kfree(gx_params);
  430. }
  431. MODULE_AUTHOR("Hiroshi Miura <miura@da-cha.org>");
  432. MODULE_DESCRIPTION("Cpufreq driver for Cyrix MediaGX and NatSemi Geode");
  433. MODULE_LICENSE("GPL");
  434. module_init(cpufreq_gx_init);
  435. module_exit(cpufreq_gx_exit);