core.c 2.8 KB

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  1. /*
  2. * Broadcom specific AMBA
  3. * Core ops
  4. *
  5. * Licensed under the GNU/GPL. See COPYING for details.
  6. */
  7. #include "bcma_private.h"
  8. #include <linux/bcma/bcma.h>
  9. bool bcma_core_is_enabled(struct bcma_device *core)
  10. {
  11. if ((bcma_aread32(core, BCMA_IOCTL) & (BCMA_IOCTL_CLK | BCMA_IOCTL_FGC))
  12. != BCMA_IOCTL_CLK)
  13. return false;
  14. if (bcma_aread32(core, BCMA_RESET_CTL) & BCMA_RESET_CTL_RESET)
  15. return false;
  16. return true;
  17. }
  18. EXPORT_SYMBOL_GPL(bcma_core_is_enabled);
  19. void bcma_core_disable(struct bcma_device *core, u32 flags)
  20. {
  21. if (bcma_aread32(core, BCMA_RESET_CTL) & BCMA_RESET_CTL_RESET)
  22. return;
  23. bcma_awrite32(core, BCMA_IOCTL, flags);
  24. bcma_aread32(core, BCMA_IOCTL);
  25. udelay(10);
  26. bcma_awrite32(core, BCMA_RESET_CTL, BCMA_RESET_CTL_RESET);
  27. udelay(1);
  28. }
  29. EXPORT_SYMBOL_GPL(bcma_core_disable);
  30. int bcma_core_enable(struct bcma_device *core, u32 flags)
  31. {
  32. bcma_core_disable(core, flags);
  33. bcma_awrite32(core, BCMA_IOCTL, (BCMA_IOCTL_CLK | BCMA_IOCTL_FGC | flags));
  34. bcma_aread32(core, BCMA_IOCTL);
  35. bcma_awrite32(core, BCMA_RESET_CTL, 0);
  36. udelay(1);
  37. bcma_awrite32(core, BCMA_IOCTL, (BCMA_IOCTL_CLK | flags));
  38. bcma_aread32(core, BCMA_IOCTL);
  39. udelay(1);
  40. return 0;
  41. }
  42. EXPORT_SYMBOL_GPL(bcma_core_enable);
  43. void bcma_core_set_clockmode(struct bcma_device *core,
  44. enum bcma_clkmode clkmode)
  45. {
  46. u16 i;
  47. WARN_ON(core->id.id != BCMA_CORE_CHIPCOMMON &&
  48. core->id.id != BCMA_CORE_PCIE &&
  49. core->id.id != BCMA_CORE_80211);
  50. switch (clkmode) {
  51. case BCMA_CLKMODE_FAST:
  52. bcma_set32(core, BCMA_CLKCTLST, BCMA_CLKCTLST_FORCEHT);
  53. udelay(64);
  54. for (i = 0; i < 1500; i++) {
  55. if (bcma_read32(core, BCMA_CLKCTLST) &
  56. BCMA_CLKCTLST_HAVEHT) {
  57. i = 0;
  58. break;
  59. }
  60. udelay(10);
  61. }
  62. if (i)
  63. pr_err("HT force timeout\n");
  64. break;
  65. case BCMA_CLKMODE_DYNAMIC:
  66. pr_warn("Dynamic clockmode not supported yet!\n");
  67. break;
  68. }
  69. }
  70. EXPORT_SYMBOL_GPL(bcma_core_set_clockmode);
  71. void bcma_core_pll_ctl(struct bcma_device *core, u32 req, u32 status, bool on)
  72. {
  73. u16 i;
  74. WARN_ON(req & ~BCMA_CLKCTLST_EXTRESREQ);
  75. WARN_ON(status & ~BCMA_CLKCTLST_EXTRESST);
  76. if (on) {
  77. bcma_set32(core, BCMA_CLKCTLST, req);
  78. for (i = 0; i < 10000; i++) {
  79. if ((bcma_read32(core, BCMA_CLKCTLST) & status) ==
  80. status) {
  81. i = 0;
  82. break;
  83. }
  84. udelay(10);
  85. }
  86. if (i)
  87. pr_err("PLL enable timeout\n");
  88. } else {
  89. pr_warn("Disabling PLL not supported yet!\n");
  90. }
  91. }
  92. EXPORT_SYMBOL_GPL(bcma_core_pll_ctl);
  93. u32 bcma_core_dma_translation(struct bcma_device *core)
  94. {
  95. switch (core->bus->hosttype) {
  96. case BCMA_HOSTTYPE_PCI:
  97. if (bcma_aread32(core, BCMA_IOST) & BCMA_IOST_DMA64)
  98. return BCMA_DMA_TRANSLATION_DMA64_CMT;
  99. else
  100. return BCMA_DMA_TRANSLATION_DMA32_CMT;
  101. default:
  102. pr_err("DMA translation unknown for host %d\n",
  103. core->bus->hosttype);
  104. }
  105. return BCMA_DMA_TRANSLATION_NONE;
  106. }
  107. EXPORT_SYMBOL(bcma_core_dma_translation);