pgtable.c 6.7 KB

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  1. /*
  2. * This file contains common routines for dealing with free of page tables
  3. * Along with common page table handling code
  4. *
  5. * Derived from arch/powerpc/mm/tlb_64.c:
  6. * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
  7. *
  8. * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
  9. * and Cort Dougan (PReP) (cort@cs.nmt.edu)
  10. * Copyright (C) 1996 Paul Mackerras
  11. *
  12. * Derived from "arch/i386/mm/init.c"
  13. * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
  14. *
  15. * Dave Engebretsen <engebret@us.ibm.com>
  16. * Rework for PPC64 port.
  17. *
  18. * This program is free software; you can redistribute it and/or
  19. * modify it under the terms of the GNU General Public License
  20. * as published by the Free Software Foundation; either version
  21. * 2 of the License, or (at your option) any later version.
  22. */
  23. #include <linux/kernel.h>
  24. #include <linux/gfp.h>
  25. #include <linux/mm.h>
  26. #include <linux/init.h>
  27. #include <linux/percpu.h>
  28. #include <linux/hardirq.h>
  29. #include <asm/pgalloc.h>
  30. #include <asm/tlbflush.h>
  31. #include <asm/tlb.h>
  32. #include "mmu_decl.h"
  33. static inline int is_exec_fault(void)
  34. {
  35. return current->thread.regs && TRAP(current->thread.regs) == 0x400;
  36. }
  37. /* We only try to do i/d cache coherency on stuff that looks like
  38. * reasonably "normal" PTEs. We currently require a PTE to be present
  39. * and we avoid _PAGE_SPECIAL and _PAGE_NO_CACHE. We also only do that
  40. * on userspace PTEs
  41. */
  42. static inline int pte_looks_normal(pte_t pte)
  43. {
  44. return (pte_val(pte) &
  45. (_PAGE_PRESENT | _PAGE_SPECIAL | _PAGE_NO_CACHE | _PAGE_USER)) ==
  46. (_PAGE_PRESENT | _PAGE_USER);
  47. }
  48. struct page * maybe_pte_to_page(pte_t pte)
  49. {
  50. unsigned long pfn = pte_pfn(pte);
  51. struct page *page;
  52. if (unlikely(!pfn_valid(pfn)))
  53. return NULL;
  54. page = pfn_to_page(pfn);
  55. if (PageReserved(page))
  56. return NULL;
  57. return page;
  58. }
  59. #if defined(CONFIG_PPC_STD_MMU) || _PAGE_EXEC == 0
  60. /* Server-style MMU handles coherency when hashing if HW exec permission
  61. * is supposed per page (currently 64-bit only). If not, then, we always
  62. * flush the cache for valid PTEs in set_pte. Embedded CPU without HW exec
  63. * support falls into the same category.
  64. */
  65. static pte_t set_pte_filter(pte_t pte, unsigned long addr)
  66. {
  67. pte = __pte(pte_val(pte) & ~_PAGE_HPTEFLAGS);
  68. if (pte_looks_normal(pte) && !(cpu_has_feature(CPU_FTR_COHERENT_ICACHE) ||
  69. cpu_has_feature(CPU_FTR_NOEXECUTE))) {
  70. struct page *pg = maybe_pte_to_page(pte);
  71. if (!pg)
  72. return pte;
  73. if (!test_bit(PG_arch_1, &pg->flags)) {
  74. #ifdef CONFIG_8xx
  75. /* On 8xx, cache control instructions (particularly
  76. * "dcbst" from flush_dcache_icache) fault as write
  77. * operation if there is an unpopulated TLB entry
  78. * for the address in question. To workaround that,
  79. * we invalidate the TLB here, thus avoiding dcbst
  80. * misbehaviour.
  81. */
  82. /* 8xx doesn't care about PID, size or ind args */
  83. _tlbil_va(addr, 0, 0, 0);
  84. #endif /* CONFIG_8xx */
  85. flush_dcache_icache_page(pg);
  86. set_bit(PG_arch_1, &pg->flags);
  87. }
  88. }
  89. return pte;
  90. }
  91. static pte_t set_access_flags_filter(pte_t pte, struct vm_area_struct *vma,
  92. int dirty)
  93. {
  94. return pte;
  95. }
  96. #else /* defined(CONFIG_PPC_STD_MMU) || _PAGE_EXEC == 0 */
  97. /* Embedded type MMU with HW exec support. This is a bit more complicated
  98. * as we don't have two bits to spare for _PAGE_EXEC and _PAGE_HWEXEC so
  99. * instead we "filter out" the exec permission for non clean pages.
  100. */
  101. static pte_t set_pte_filter(pte_t pte, unsigned long addr)
  102. {
  103. struct page *pg;
  104. /* No exec permission in the first place, move on */
  105. if (!(pte_val(pte) & _PAGE_EXEC) || !pte_looks_normal(pte))
  106. return pte;
  107. /* If you set _PAGE_EXEC on weird pages you're on your own */
  108. pg = maybe_pte_to_page(pte);
  109. if (unlikely(!pg))
  110. return pte;
  111. /* If the page clean, we move on */
  112. if (test_bit(PG_arch_1, &pg->flags))
  113. return pte;
  114. /* If it's an exec fault, we flush the cache and make it clean */
  115. if (is_exec_fault()) {
  116. flush_dcache_icache_page(pg);
  117. set_bit(PG_arch_1, &pg->flags);
  118. return pte;
  119. }
  120. /* Else, we filter out _PAGE_EXEC */
  121. return __pte(pte_val(pte) & ~_PAGE_EXEC);
  122. }
  123. static pte_t set_access_flags_filter(pte_t pte, struct vm_area_struct *vma,
  124. int dirty)
  125. {
  126. struct page *pg;
  127. /* So here, we only care about exec faults, as we use them
  128. * to recover lost _PAGE_EXEC and perform I$/D$ coherency
  129. * if necessary. Also if _PAGE_EXEC is already set, same deal,
  130. * we just bail out
  131. */
  132. if (dirty || (pte_val(pte) & _PAGE_EXEC) || !is_exec_fault())
  133. return pte;
  134. #ifdef CONFIG_DEBUG_VM
  135. /* So this is an exec fault, _PAGE_EXEC is not set. If it was
  136. * an error we would have bailed out earlier in do_page_fault()
  137. * but let's make sure of it
  138. */
  139. if (WARN_ON(!(vma->vm_flags & VM_EXEC)))
  140. return pte;
  141. #endif /* CONFIG_DEBUG_VM */
  142. /* If you set _PAGE_EXEC on weird pages you're on your own */
  143. pg = maybe_pte_to_page(pte);
  144. if (unlikely(!pg))
  145. goto bail;
  146. /* If the page is already clean, we move on */
  147. if (test_bit(PG_arch_1, &pg->flags))
  148. goto bail;
  149. /* Clean the page and set PG_arch_1 */
  150. flush_dcache_icache_page(pg);
  151. set_bit(PG_arch_1, &pg->flags);
  152. bail:
  153. return __pte(pte_val(pte) | _PAGE_EXEC);
  154. }
  155. #endif /* !(defined(CONFIG_PPC_STD_MMU) || _PAGE_EXEC == 0) */
  156. /*
  157. * set_pte stores a linux PTE into the linux page table.
  158. */
  159. void set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep,
  160. pte_t pte)
  161. {
  162. #ifdef CONFIG_DEBUG_VM
  163. WARN_ON(pte_present(*ptep));
  164. #endif
  165. /* Note: mm->context.id might not yet have been assigned as
  166. * this context might not have been activated yet when this
  167. * is called.
  168. */
  169. pte = set_pte_filter(pte, addr);
  170. /* Perform the setting of the PTE */
  171. __set_pte_at(mm, addr, ptep, pte, 0);
  172. }
  173. /*
  174. * This is called when relaxing access to a PTE. It's also called in the page
  175. * fault path when we don't hit any of the major fault cases, ie, a minor
  176. * update of _PAGE_ACCESSED, _PAGE_DIRTY, etc... The generic code will have
  177. * handled those two for us, we additionally deal with missing execute
  178. * permission here on some processors
  179. */
  180. int ptep_set_access_flags(struct vm_area_struct *vma, unsigned long address,
  181. pte_t *ptep, pte_t entry, int dirty)
  182. {
  183. int changed;
  184. entry = set_access_flags_filter(entry, vma, dirty);
  185. changed = !pte_same(*(ptep), entry);
  186. if (changed) {
  187. if (!(vma->vm_flags & VM_HUGETLB))
  188. assert_pte_locked(vma->vm_mm, address);
  189. __ptep_set_access_flags(ptep, entry);
  190. flush_tlb_page_nohash(vma, address);
  191. }
  192. return changed;
  193. }
  194. #ifdef CONFIG_DEBUG_VM
  195. void assert_pte_locked(struct mm_struct *mm, unsigned long addr)
  196. {
  197. pgd_t *pgd;
  198. pud_t *pud;
  199. pmd_t *pmd;
  200. if (mm == &init_mm)
  201. return;
  202. pgd = mm->pgd + pgd_index(addr);
  203. BUG_ON(pgd_none(*pgd));
  204. pud = pud_offset(pgd, addr);
  205. BUG_ON(pud_none(*pud));
  206. pmd = pmd_offset(pud, addr);
  207. BUG_ON(!pmd_present(*pmd));
  208. assert_spin_locked(pte_lockptr(mm, pmd));
  209. }
  210. #endif /* CONFIG_DEBUG_VM */