pci.h 4.0 KB

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  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. */
  6. #ifndef _ASM_PCI_H
  7. #define _ASM_PCI_H
  8. #include <linux/mm.h>
  9. #ifdef __KERNEL__
  10. /*
  11. * This file essentially defines the interface between board
  12. * specific PCI code and MIPS common PCI code. Should potentially put
  13. * into include/asm/pci.h file.
  14. */
  15. #include <linux/ioport.h>
  16. /*
  17. * Each pci channel is a top-level PCI bus seem by CPU. A machine with
  18. * multiple PCI channels may have multiple PCI host controllers or a
  19. * single controller supporting multiple channels.
  20. */
  21. struct pci_controller {
  22. struct pci_controller *next;
  23. struct pci_bus *bus;
  24. struct pci_ops *pci_ops;
  25. struct resource *mem_resource;
  26. unsigned long mem_offset;
  27. struct resource *io_resource;
  28. unsigned long io_offset;
  29. unsigned long io_map_base;
  30. unsigned int index;
  31. /* For compatibility with current (as of July 2003) pciutils
  32. and XFree86. Eventually will be removed. */
  33. unsigned int need_domain_info;
  34. int iommu;
  35. /* Optional access methods for reading/writing the bus number
  36. of the PCI controller */
  37. int (*get_busno)(void);
  38. void (*set_busno)(int busno);
  39. };
  40. /*
  41. * Used by boards to register their PCI busses before the actual scanning.
  42. */
  43. extern struct pci_controller * alloc_pci_controller(void);
  44. extern void register_pci_controller(struct pci_controller *hose);
  45. /*
  46. * board supplied pci irq fixup routine
  47. */
  48. extern int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
  49. /* Can be used to override the logic in pci_scan_bus for skipping
  50. already-configured bus numbers - to be used for buggy BIOSes
  51. or architectures with incomplete PCI setup by the loader */
  52. extern unsigned int pcibios_assign_all_busses(void);
  53. extern unsigned long PCIBIOS_MIN_IO;
  54. extern unsigned long PCIBIOS_MIN_MEM;
  55. #define PCIBIOS_MIN_CARDBUS_IO 0x4000
  56. extern void pcibios_set_master(struct pci_dev *dev);
  57. static inline void pcibios_penalize_isa_irq(int irq, int active)
  58. {
  59. /* We don't do dynamic PCI IRQ allocation */
  60. }
  61. #define HAVE_PCI_MMAP
  62. extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
  63. enum pci_mmap_state mmap_state, int write_combine);
  64. /*
  65. * Dynamic DMA mapping stuff.
  66. * MIPS has everything mapped statically.
  67. */
  68. #include <linux/types.h>
  69. #include <linux/slab.h>
  70. #include <asm/scatterlist.h>
  71. #include <linux/string.h>
  72. #include <asm/io.h>
  73. struct pci_dev;
  74. /*
  75. * The PCI address space does equal the physical memory address space. The
  76. * networking and block device layers use this boolean for bounce buffer
  77. * decisions. This is set if any hose does not have an IOMMU.
  78. */
  79. extern unsigned int PCI_DMA_BUS_IS_PHYS;
  80. #ifdef CONFIG_PCI
  81. static inline void pci_dma_burst_advice(struct pci_dev *pdev,
  82. enum pci_dma_burst_strategy *strat,
  83. unsigned long *strategy_parameter)
  84. {
  85. *strat = PCI_DMA_BURST_INFINITY;
  86. *strategy_parameter = ~0UL;
  87. }
  88. #endif
  89. extern void pcibios_resource_to_bus(struct pci_dev *dev,
  90. struct pci_bus_region *region, struct resource *res);
  91. extern void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
  92. struct pci_bus_region *region);
  93. #define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index
  94. static inline int pci_proc_domain(struct pci_bus *bus)
  95. {
  96. struct pci_controller *hose = bus->sysdata;
  97. return hose->need_domain_info;
  98. }
  99. #endif /* __KERNEL__ */
  100. /* implement the pci_ DMA API in terms of the generic device dma_ one */
  101. #include <asm-generic/pci-dma-compat.h>
  102. /* Do platform specific device initialization at pci_enable_device() time */
  103. extern int pcibios_plat_dev_init(struct pci_dev *dev);
  104. /* Chances are this interrupt is wired PC-style ... */
  105. static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
  106. {
  107. return channel ? 15 : 14;
  108. }
  109. #ifdef CONFIG_CPU_CAVIUM_OCTEON
  110. /* MSI arch hook for OCTEON */
  111. #define arch_setup_msi_irqs arch_setup_msi_irqs
  112. #endif
  113. extern int pci_probe_only;
  114. extern char * (*pcibios_plat_setup)(char *str);
  115. #endif /* _ASM_PCI_H */