dma-coherence.h 2.2 KB

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  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * Copyright (C) 2006 Ralf Baechle <ralf@linux-mips.org>
  7. *
  8. */
  9. #ifndef __ASM_MACH_IP32_DMA_COHERENCE_H
  10. #define __ASM_MACH_IP32_DMA_COHERENCE_H
  11. #include <asm/ip32/crime.h>
  12. struct device;
  13. /*
  14. * Few notes.
  15. * 1. CPU sees memory as two chunks: 0-256M@0x0, and the rest @0x40000000+256M
  16. * 2. PCI sees memory as one big chunk @0x0 (or we could use 0x40000000 for
  17. * native-endian)
  18. * 3. All other devices see memory as one big chunk at 0x40000000
  19. * 4. Non-PCI devices will pass NULL as struct device*
  20. *
  21. * Thus we translate differently, depending on device.
  22. */
  23. #define RAM_OFFSET_MASK 0x3fffffffUL
  24. static inline dma_addr_t plat_map_dma_mem(struct device *dev, void *addr,
  25. size_t size)
  26. {
  27. dma_addr_t pa = virt_to_phys(addr) & RAM_OFFSET_MASK;
  28. if (dev == NULL)
  29. pa += CRIME_HI_MEM_BASE;
  30. return pa;
  31. }
  32. static inline dma_addr_t plat_map_dma_mem_page(struct device *dev,
  33. struct page *page)
  34. {
  35. dma_addr_t pa;
  36. pa = page_to_phys(page) & RAM_OFFSET_MASK;
  37. if (dev == NULL)
  38. pa += CRIME_HI_MEM_BASE;
  39. return pa;
  40. }
  41. /* This is almost certainly wrong but it's what dma-ip32.c used to use */
  42. static inline unsigned long plat_dma_addr_to_phys(struct device *dev,
  43. dma_addr_t dma_addr)
  44. {
  45. unsigned long addr = dma_addr & RAM_OFFSET_MASK;
  46. if (dma_addr >= 256*1024*1024)
  47. addr += CRIME_HI_MEM_BASE;
  48. return addr;
  49. }
  50. static inline void plat_unmap_dma_mem(struct device *dev, dma_addr_t dma_addr,
  51. size_t size, enum dma_data_direction direction)
  52. {
  53. }
  54. static inline int plat_dma_supported(struct device *dev, u64 mask)
  55. {
  56. /*
  57. * we fall back to GFP_DMA when the mask isn't all 1s,
  58. * so we can't guarantee allocations that must be
  59. * within a tighter range than GFP_DMA..
  60. */
  61. if (mask < DMA_BIT_MASK(24))
  62. return 0;
  63. return 1;
  64. }
  65. static inline void plat_extra_sync_for_device(struct device *dev)
  66. {
  67. return;
  68. }
  69. static inline int plat_dma_mapping_error(struct device *dev,
  70. dma_addr_t dma_addr)
  71. {
  72. return 0;
  73. }
  74. static inline int plat_device_is_coherent(struct device *dev)
  75. {
  76. return 0; /* IP32 is non-cohernet */
  77. }
  78. #endif /* __ASM_MACH_IP32_DMA_COHERENCE_H */