gpiolib-au1000.c 4.0 KB

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  1. /*
  2. * Copyright (C) 2007-2009, OpenWrt.org, Florian Fainelli <florian@openwrt.org>
  3. * GPIOLIB support for Au1000, Au1500, Au1100, Au1550 and Au12x0.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License as published by the
  7. * Free Software Foundation; either version 2 of the License, or (at your
  8. * option) any later version.
  9. *
  10. * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  11. * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  12. * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
  13. * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  14. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  15. * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  16. * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  17. * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  18. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  19. * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  20. *
  21. * You should have received a copy of the GNU General Public License along
  22. * with this program; if not, write to the Free Software Foundation, Inc.,
  23. * 675 Mass Ave, Cambridge, MA 02139, USA.
  24. *
  25. * Notes :
  26. * au1000 SoC have only one GPIO block : GPIO1
  27. * Au1100, Au15x0, Au12x0 have a second one : GPIO2
  28. */
  29. #include <linux/kernel.h>
  30. #include <linux/module.h>
  31. #include <linux/types.h>
  32. #include <linux/platform_device.h>
  33. #include <linux/gpio.h>
  34. #include <asm/mach-au1x00/au1000.h>
  35. #include <asm/mach-au1x00/gpio.h>
  36. static int gpio2_get(struct gpio_chip *chip, unsigned offset)
  37. {
  38. return alchemy_gpio2_get_value(offset + ALCHEMY_GPIO2_BASE);
  39. }
  40. static void gpio2_set(struct gpio_chip *chip, unsigned offset, int value)
  41. {
  42. alchemy_gpio2_set_value(offset + ALCHEMY_GPIO2_BASE, value);
  43. }
  44. static int gpio2_direction_input(struct gpio_chip *chip, unsigned offset)
  45. {
  46. return alchemy_gpio2_direction_input(offset + ALCHEMY_GPIO2_BASE);
  47. }
  48. static int gpio2_direction_output(struct gpio_chip *chip, unsigned offset,
  49. int value)
  50. {
  51. return alchemy_gpio2_direction_output(offset + ALCHEMY_GPIO2_BASE,
  52. value);
  53. }
  54. static int gpio2_to_irq(struct gpio_chip *chip, unsigned offset)
  55. {
  56. return alchemy_gpio2_to_irq(offset + ALCHEMY_GPIO2_BASE);
  57. }
  58. static int gpio1_get(struct gpio_chip *chip, unsigned offset)
  59. {
  60. return alchemy_gpio1_get_value(offset + ALCHEMY_GPIO1_BASE);
  61. }
  62. static void gpio1_set(struct gpio_chip *chip,
  63. unsigned offset, int value)
  64. {
  65. alchemy_gpio1_set_value(offset + ALCHEMY_GPIO1_BASE, value);
  66. }
  67. static int gpio1_direction_input(struct gpio_chip *chip, unsigned offset)
  68. {
  69. return alchemy_gpio1_direction_input(offset + ALCHEMY_GPIO1_BASE);
  70. }
  71. static int gpio1_direction_output(struct gpio_chip *chip,
  72. unsigned offset, int value)
  73. {
  74. return alchemy_gpio1_direction_output(offset + ALCHEMY_GPIO1_BASE,
  75. value);
  76. }
  77. static int gpio1_to_irq(struct gpio_chip *chip, unsigned offset)
  78. {
  79. return alchemy_gpio1_to_irq(offset + ALCHEMY_GPIO1_BASE);
  80. }
  81. struct gpio_chip alchemy_gpio_chip[] = {
  82. [0] = {
  83. .label = "alchemy-gpio1",
  84. .direction_input = gpio1_direction_input,
  85. .direction_output = gpio1_direction_output,
  86. .get = gpio1_get,
  87. .set = gpio1_set,
  88. .to_irq = gpio1_to_irq,
  89. .base = ALCHEMY_GPIO1_BASE,
  90. .ngpio = ALCHEMY_GPIO1_NUM,
  91. },
  92. [1] = {
  93. .label = "alchemy-gpio2",
  94. .direction_input = gpio2_direction_input,
  95. .direction_output = gpio2_direction_output,
  96. .get = gpio2_get,
  97. .set = gpio2_set,
  98. .to_irq = gpio2_to_irq,
  99. .base = ALCHEMY_GPIO2_BASE,
  100. .ngpio = ALCHEMY_GPIO2_NUM,
  101. },
  102. };
  103. static int __init alchemy_gpiolib_init(void)
  104. {
  105. gpiochip_add(&alchemy_gpio_chip[0]);
  106. if (alchemy_get_cputype() != ALCHEMY_CPU_AU1000)
  107. gpiochip_add(&alchemy_gpio_chip[1]);
  108. return 0;
  109. }
  110. arch_initcall(alchemy_gpiolib_init);