macints.c 10 KB

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  1. /*
  2. * Macintosh interrupts
  3. *
  4. * General design:
  5. * In contrary to the Amiga and Atari platforms, the Mac hardware seems to
  6. * exclusively use the autovector interrupts (the 'generic level0-level7'
  7. * interrupts with exception vectors 0x19-0x1f). The following interrupt levels
  8. * are used:
  9. * 1 - VIA1
  10. * - slot 0: one second interrupt (CA2)
  11. * - slot 1: VBlank (CA1)
  12. * - slot 2: ADB data ready (SR full)
  13. * - slot 3: ADB data (CB2)
  14. * - slot 4: ADB clock (CB1)
  15. * - slot 5: timer 2
  16. * - slot 6: timer 1
  17. * - slot 7: status of IRQ; signals 'any enabled int.'
  18. *
  19. * 2 - VIA2 or RBV
  20. * - slot 0: SCSI DRQ (CA2)
  21. * - slot 1: NUBUS IRQ (CA1) need to read port A to find which
  22. * - slot 2: /EXP IRQ (only on IIci)
  23. * - slot 3: SCSI IRQ (CB2)
  24. * - slot 4: ASC IRQ (CB1)
  25. * - slot 5: timer 2 (not on IIci)
  26. * - slot 6: timer 1 (not on IIci)
  27. * - slot 7: status of IRQ; signals 'any enabled int.'
  28. *
  29. * 2 - OSS (IIfx only?)
  30. * - slot 0: SCSI interrupt
  31. * - slot 1: Sound interrupt
  32. *
  33. * Levels 3-6 vary by machine type. For VIA or RBV Macintoshes:
  34. *
  35. * 3 - unused (?)
  36. *
  37. * 4 - SCC
  38. *
  39. * 5 - unused (?)
  40. * [serial errors or special conditions seem to raise level 6
  41. * interrupts on some models (LC4xx?)]
  42. *
  43. * 6 - off switch (?)
  44. *
  45. * For OSS Macintoshes (IIfx only at this point):
  46. *
  47. * 3 - Nubus interrupt
  48. * - slot 0: Slot $9
  49. * - slot 1: Slot $A
  50. * - slot 2: Slot $B
  51. * - slot 3: Slot $C
  52. * - slot 4: Slot $D
  53. * - slot 5: Slot $E
  54. *
  55. * 4 - SCC IOP
  56. *
  57. * 5 - ISM IOP (ADB?)
  58. *
  59. * 6 - unused
  60. *
  61. * For PSC Macintoshes (660AV, 840AV):
  62. *
  63. * 3 - PSC level 3
  64. * - slot 0: MACE
  65. *
  66. * 4 - PSC level 4
  67. * - slot 1: SCC channel A interrupt
  68. * - slot 2: SCC channel B interrupt
  69. * - slot 3: MACE DMA
  70. *
  71. * 5 - PSC level 5
  72. *
  73. * 6 - PSC level 6
  74. *
  75. * Finally we have good 'ole level 7, the non-maskable interrupt:
  76. *
  77. * 7 - NMI (programmer's switch on the back of some Macs)
  78. * Also RAM parity error on models which support it (IIc, IIfx?)
  79. *
  80. * The current interrupt logic looks something like this:
  81. *
  82. * - We install dispatchers for the autovector interrupts (1-7). These
  83. * dispatchers are responsible for querying the hardware (the
  84. * VIA/RBV/OSS/PSC chips) to determine the actual interrupt source. Using
  85. * this information a machspec interrupt number is generated by placing the
  86. * index of the interrupt hardware into the low three bits and the original
  87. * autovector interrupt number in the upper 5 bits. The handlers for the
  88. * resulting machspec interrupt are then called.
  89. *
  90. * - Nubus is a special case because its interrupts are hidden behind two
  91. * layers of hardware. Nubus interrupts come in as index 1 on VIA #2,
  92. * which translates to IRQ number 17. In this spot we install _another_
  93. * dispatcher. This dispatcher finds the interrupting slot number (9-F) and
  94. * then forms a new machspec interrupt number as above with the slot number
  95. * minus 9 in the low three bits and the pseudo-level 7 in the upper five
  96. * bits. The handlers for this new machspec interrupt number are then
  97. * called. This puts Nubus interrupts into the range 56-62.
  98. *
  99. * - The Baboon interrupts (used on some PowerBooks) are an even more special
  100. * case. They're hidden behind the Nubus slot $C interrupt thus adding a
  101. * third layer of indirection. Why oh why did the Apple engineers do that?
  102. *
  103. * - We support "fast" and "slow" handlers, just like the Amiga port. The
  104. * fast handlers are called first and with all interrupts disabled. They
  105. * are expected to execute quickly (hence the name). The slow handlers are
  106. * called last with interrupts enabled and the interrupt level restored.
  107. * They must therefore be reentrant.
  108. *
  109. * TODO:
  110. *
  111. */
  112. #include <linux/module.h>
  113. #include <linux/types.h>
  114. #include <linux/kernel.h>
  115. #include <linux/sched.h>
  116. #include <linux/kernel_stat.h>
  117. #include <linux/interrupt.h> /* for intr_count */
  118. #include <linux/delay.h>
  119. #include <linux/seq_file.h>
  120. #include <asm/system.h>
  121. #include <asm/irq.h>
  122. #include <asm/traps.h>
  123. #include <asm/bootinfo.h>
  124. #include <asm/macintosh.h>
  125. #include <asm/mac_via.h>
  126. #include <asm/mac_psc.h>
  127. #include <asm/hwtest.h>
  128. #include <asm/errno.h>
  129. #include <asm/macints.h>
  130. #include <asm/irq_regs.h>
  131. #include <asm/mac_oss.h>
  132. #define SHUTUP_SONIC
  133. /*
  134. * VIA/RBV hooks
  135. */
  136. extern void via_register_interrupts(void);
  137. extern void via_irq_enable(int);
  138. extern void via_irq_disable(int);
  139. extern void via_irq_clear(int);
  140. extern int via_irq_pending(int);
  141. /*
  142. * OSS hooks
  143. */
  144. extern void oss_register_interrupts(void);
  145. extern void oss_irq_enable(int);
  146. extern void oss_irq_disable(int);
  147. extern void oss_irq_clear(int);
  148. extern int oss_irq_pending(int);
  149. /*
  150. * PSC hooks
  151. */
  152. extern void psc_register_interrupts(void);
  153. extern void psc_irq_enable(int);
  154. extern void psc_irq_disable(int);
  155. extern void psc_irq_clear(int);
  156. extern int psc_irq_pending(int);
  157. /*
  158. * IOP hooks
  159. */
  160. extern void iop_register_interrupts(void);
  161. /*
  162. * Baboon hooks
  163. */
  164. extern int baboon_present;
  165. extern void baboon_register_interrupts(void);
  166. extern void baboon_irq_enable(int);
  167. extern void baboon_irq_disable(int);
  168. extern void baboon_irq_clear(int);
  169. /*
  170. * console_loglevel determines NMI handler function
  171. */
  172. irqreturn_t mac_nmi_handler(int, void *);
  173. irqreturn_t mac_debug_handler(int, void *);
  174. /* #define DEBUG_MACINTS */
  175. void mac_enable_irq(unsigned int irq);
  176. void mac_disable_irq(unsigned int irq);
  177. static struct irq_controller mac_irq_controller = {
  178. .name = "mac",
  179. .lock = __SPIN_LOCK_UNLOCKED(mac_irq_controller.lock),
  180. .enable = mac_enable_irq,
  181. .disable = mac_disable_irq,
  182. };
  183. void __init mac_init_IRQ(void)
  184. {
  185. #ifdef DEBUG_MACINTS
  186. printk("mac_init_IRQ(): Setting things up...\n");
  187. #endif
  188. m68k_setup_irq_controller(&mac_irq_controller, IRQ_USER,
  189. NUM_MAC_SOURCES - IRQ_USER);
  190. /* Make sure the SONIC interrupt is cleared or things get ugly */
  191. #ifdef SHUTUP_SONIC
  192. printk("Killing onboard sonic... ");
  193. /* This address should hopefully be mapped already */
  194. if (hwreg_present((void*)(0x50f0a000))) {
  195. *(long *)(0x50f0a014) = 0x7fffL;
  196. *(long *)(0x50f0a010) = 0L;
  197. }
  198. printk("Done.\n");
  199. #endif /* SHUTUP_SONIC */
  200. /*
  201. * Now register the handlers for the master IRQ handlers
  202. * at levels 1-7. Most of the work is done elsewhere.
  203. */
  204. if (oss_present)
  205. oss_register_interrupts();
  206. else
  207. via_register_interrupts();
  208. if (psc_present)
  209. psc_register_interrupts();
  210. if (baboon_present)
  211. baboon_register_interrupts();
  212. iop_register_interrupts();
  213. if (request_irq(IRQ_AUTO_7, mac_nmi_handler, 0, "NMI",
  214. mac_nmi_handler))
  215. pr_err("Couldn't register NMI\n");
  216. #ifdef DEBUG_MACINTS
  217. printk("mac_init_IRQ(): Done!\n");
  218. #endif
  219. }
  220. /*
  221. * mac_enable_irq - enable an interrupt source
  222. * mac_disable_irq - disable an interrupt source
  223. * mac_clear_irq - clears a pending interrupt
  224. * mac_pending_irq - Returns the pending status of an IRQ (nonzero = pending)
  225. *
  226. * These routines are just dispatchers to the VIA/OSS/PSC routines.
  227. */
  228. void mac_enable_irq(unsigned int irq)
  229. {
  230. int irq_src = IRQ_SRC(irq);
  231. switch(irq_src) {
  232. case 1:
  233. via_irq_enable(irq);
  234. break;
  235. case 2:
  236. case 7:
  237. if (oss_present)
  238. oss_irq_enable(irq);
  239. else
  240. via_irq_enable(irq);
  241. break;
  242. case 3:
  243. case 5:
  244. case 6:
  245. if (psc_present)
  246. psc_irq_enable(irq);
  247. else if (oss_present)
  248. oss_irq_enable(irq);
  249. break;
  250. case 4:
  251. if (psc_present)
  252. psc_irq_enable(irq);
  253. break;
  254. case 8:
  255. if (baboon_present)
  256. baboon_irq_enable(irq);
  257. break;
  258. }
  259. }
  260. void mac_disable_irq(unsigned int irq)
  261. {
  262. int irq_src = IRQ_SRC(irq);
  263. switch(irq_src) {
  264. case 1:
  265. via_irq_disable(irq);
  266. break;
  267. case 2:
  268. case 7:
  269. if (oss_present)
  270. oss_irq_disable(irq);
  271. else
  272. via_irq_disable(irq);
  273. break;
  274. case 3:
  275. case 5:
  276. case 6:
  277. if (psc_present)
  278. psc_irq_disable(irq);
  279. else if (oss_present)
  280. oss_irq_disable(irq);
  281. break;
  282. case 4:
  283. if (psc_present)
  284. psc_irq_disable(irq);
  285. break;
  286. case 8:
  287. if (baboon_present)
  288. baboon_irq_disable(irq);
  289. break;
  290. }
  291. }
  292. void mac_clear_irq(unsigned int irq)
  293. {
  294. switch(IRQ_SRC(irq)) {
  295. case 1:
  296. via_irq_clear(irq);
  297. break;
  298. case 2:
  299. case 7:
  300. if (oss_present)
  301. oss_irq_clear(irq);
  302. else
  303. via_irq_clear(irq);
  304. break;
  305. case 3:
  306. case 5:
  307. case 6:
  308. if (psc_present)
  309. psc_irq_clear(irq);
  310. else if (oss_present)
  311. oss_irq_clear(irq);
  312. break;
  313. case 4:
  314. if (psc_present)
  315. psc_irq_clear(irq);
  316. break;
  317. case 8:
  318. if (baboon_present)
  319. baboon_irq_clear(irq);
  320. break;
  321. }
  322. }
  323. int mac_irq_pending(unsigned int irq)
  324. {
  325. switch(IRQ_SRC(irq)) {
  326. case 1:
  327. return via_irq_pending(irq);
  328. case 2:
  329. case 7:
  330. if (oss_present)
  331. return oss_irq_pending(irq);
  332. else
  333. return via_irq_pending(irq);
  334. case 3:
  335. case 5:
  336. case 6:
  337. if (psc_present)
  338. return psc_irq_pending(irq);
  339. else if (oss_present)
  340. return oss_irq_pending(irq);
  341. break;
  342. case 4:
  343. if (psc_present)
  344. psc_irq_pending(irq);
  345. break;
  346. }
  347. return 0;
  348. }
  349. EXPORT_SYMBOL(mac_irq_pending);
  350. static int num_debug[8];
  351. irqreturn_t mac_debug_handler(int irq, void *dev_id)
  352. {
  353. if (num_debug[irq] < 10) {
  354. printk("DEBUG: Unexpected IRQ %d\n", irq);
  355. num_debug[irq]++;
  356. }
  357. return IRQ_HANDLED;
  358. }
  359. static int in_nmi;
  360. static volatile int nmi_hold;
  361. irqreturn_t mac_nmi_handler(int irq, void *dev_id)
  362. {
  363. int i;
  364. /*
  365. * generate debug output on NMI switch if 'debug' kernel option given
  366. * (only works with Penguin!)
  367. */
  368. in_nmi++;
  369. for (i=0; i<100; i++)
  370. udelay(1000);
  371. if (in_nmi == 1) {
  372. nmi_hold = 1;
  373. printk("... pausing, press NMI to resume ...");
  374. } else {
  375. printk(" ok!\n");
  376. nmi_hold = 0;
  377. }
  378. barrier();
  379. while (nmi_hold == 1)
  380. udelay(1000);
  381. if (console_loglevel >= 8) {
  382. #if 0
  383. struct pt_regs *fp = get_irq_regs();
  384. show_state();
  385. printk("PC: %08lx\nSR: %04x SP: %p\n", fp->pc, fp->sr, fp);
  386. printk("d0: %08lx d1: %08lx d2: %08lx d3: %08lx\n",
  387. fp->d0, fp->d1, fp->d2, fp->d3);
  388. printk("d4: %08lx d5: %08lx a0: %08lx a1: %08lx\n",
  389. fp->d4, fp->d5, fp->a0, fp->a1);
  390. if (STACK_MAGIC != *(unsigned long *)current->kernel_stack_page)
  391. printk("Corrupted stack page\n");
  392. printk("Process %s (pid: %d, stackpage=%08lx)\n",
  393. current->comm, current->pid, current->kernel_stack_page);
  394. if (intr_count == 1)
  395. dump_stack((struct frame *)fp);
  396. #else
  397. /* printk("NMI "); */
  398. #endif
  399. }
  400. in_nmi--;
  401. return IRQ_HANDLED;
  402. }