setup.c 4.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172
  1. /*
  2. * linux/arch/m32r/platforms/mappi2/setup.c
  3. *
  4. * Setup routines for Renesas MAPPI-II(M3A-ZA36) Board
  5. *
  6. * Copyright (c) 2001-2005 Hiroyuki Kondo, Hirokazu Takata,
  7. * Hitoshi Yamamoto, Mamoru Sakugawa
  8. */
  9. #include <linux/irq.h>
  10. #include <linux/kernel.h>
  11. #include <linux/init.h>
  12. #include <linux/platform_device.h>
  13. #include <asm/system.h>
  14. #include <asm/m32r.h>
  15. #include <asm/io.h>
  16. #define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long)))
  17. icu_data_t icu_data[NR_IRQS];
  18. static void disable_mappi2_irq(unsigned int irq)
  19. {
  20. unsigned long port, data;
  21. if ((irq == 0) ||(irq >= NR_IRQS)) {
  22. printk("bad irq 0x%08x\n", irq);
  23. return;
  24. }
  25. port = irq2port(irq);
  26. data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7;
  27. outl(data, port);
  28. }
  29. static void enable_mappi2_irq(unsigned int irq)
  30. {
  31. unsigned long port, data;
  32. if ((irq == 0) ||(irq >= NR_IRQS)) {
  33. printk("bad irq 0x%08x\n", irq);
  34. return;
  35. }
  36. port = irq2port(irq);
  37. data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6;
  38. outl(data, port);
  39. }
  40. static void mask_mappi2(struct irq_data *data)
  41. {
  42. disable_mappi2_irq(data->irq);
  43. }
  44. static void unmask_mappi2(struct irq_data *data)
  45. {
  46. enable_mappi2_irq(data->irq);
  47. }
  48. static void shutdown_mappi2(struct irq_data *data)
  49. {
  50. unsigned long port;
  51. port = irq2port(data->irq);
  52. outl(M32R_ICUCR_ILEVEL7, port);
  53. }
  54. static struct irq_chip mappi2_irq_type =
  55. {
  56. .name = "MAPPI2-IRQ",
  57. .irq_shutdown = shutdown_mappi2,
  58. .irq_mask = mask_mappi2,
  59. .irq_unmask = unmask_mappi2,
  60. };
  61. void __init init_IRQ(void)
  62. {
  63. #if defined(CONFIG_SMC91X)
  64. /* INT0 : LAN controller (SMC91111) */
  65. irq_set_chip_and_handler(M32R_IRQ_INT0, &mappi2_irq_type,
  66. handle_level_irq);
  67. icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
  68. disable_mappi2_irq(M32R_IRQ_INT0);
  69. #endif /* CONFIG_SMC91X */
  70. /* MFT2 : system timer */
  71. irq_set_chip_and_handler(M32R_IRQ_MFT2, &mappi2_irq_type,
  72. handle_level_irq);
  73. icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
  74. disable_mappi2_irq(M32R_IRQ_MFT2);
  75. #ifdef CONFIG_SERIAL_M32R_SIO
  76. /* SIO0_R : uart receive data */
  77. irq_set_chip_and_handler(M32R_IRQ_SIO0_R, &mappi2_irq_type,
  78. handle_level_irq);
  79. icu_data[M32R_IRQ_SIO0_R].icucr = 0;
  80. disable_mappi2_irq(M32R_IRQ_SIO0_R);
  81. /* SIO0_S : uart send data */
  82. irq_set_chip_and_handler(M32R_IRQ_SIO0_S, &mappi2_irq_type,
  83. handle_level_irq);
  84. icu_data[M32R_IRQ_SIO0_S].icucr = 0;
  85. disable_mappi2_irq(M32R_IRQ_SIO0_S);
  86. /* SIO1_R : uart receive data */
  87. irq_set_chip_and_handler(M32R_IRQ_SIO1_R, &mappi2_irq_type,
  88. handle_level_irq);
  89. icu_data[M32R_IRQ_SIO1_R].icucr = 0;
  90. disable_mappi2_irq(M32R_IRQ_SIO1_R);
  91. /* SIO1_S : uart send data */
  92. irq_set_chip_and_handler(M32R_IRQ_SIO1_S, &mappi2_irq_type,
  93. handle_level_irq);
  94. icu_data[M32R_IRQ_SIO1_S].icucr = 0;
  95. disable_mappi2_irq(M32R_IRQ_SIO1_S);
  96. #endif /* CONFIG_M32R_USE_DBG_CONSOLE */
  97. #if defined(CONFIG_USB)
  98. /* INT1 : USB Host controller interrupt */
  99. irq_set_chip_and_handler(M32R_IRQ_INT1, &mappi2_irq_type,
  100. handle_level_irq);
  101. icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_ISMOD01;
  102. disable_mappi2_irq(M32R_IRQ_INT1);
  103. #endif /* CONFIG_USB */
  104. /* ICUCR40: CFC IREQ */
  105. irq_set_chip_and_handler(PLD_IRQ_CFIREQ, &mappi2_irq_type,
  106. handle_level_irq);
  107. icu_data[PLD_IRQ_CFIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01;
  108. disable_mappi2_irq(PLD_IRQ_CFIREQ);
  109. #if defined(CONFIG_M32R_CFC)
  110. /* ICUCR41: CFC Insert */
  111. irq_set_chip_and_handler(PLD_IRQ_CFC_INSERT, &mappi2_irq_type,
  112. handle_level_irq);
  113. icu_data[PLD_IRQ_CFC_INSERT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD00;
  114. disable_mappi2_irq(PLD_IRQ_CFC_INSERT);
  115. /* ICUCR42: CFC Eject */
  116. irq_set_chip_and_handler(PLD_IRQ_CFC_EJECT, &mappi2_irq_type,
  117. handle_level_irq);
  118. icu_data[PLD_IRQ_CFC_EJECT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
  119. disable_mappi2_irq(PLD_IRQ_CFC_EJECT);
  120. #endif /* CONFIG_MAPPI2_CFC */
  121. }
  122. #define LAN_IOSTART 0x300
  123. #define LAN_IOEND 0x320
  124. static struct resource smc91x_resources[] = {
  125. [0] = {
  126. .start = (LAN_IOSTART),
  127. .end = (LAN_IOEND),
  128. .flags = IORESOURCE_MEM,
  129. },
  130. [1] = {
  131. .start = M32R_IRQ_INT0,
  132. .end = M32R_IRQ_INT0,
  133. .flags = IORESOURCE_IRQ,
  134. }
  135. };
  136. static struct platform_device smc91x_device = {
  137. .name = "smc91x",
  138. .id = 0,
  139. .num_resources = ARRAY_SIZE(smc91x_resources),
  140. .resource = smc91x_resources,
  141. };
  142. static int __init platform_init(void)
  143. {
  144. platform_device_register(&smc91x_device);
  145. return 0;
  146. }
  147. arch_initcall(platform_init);