devices.c 17 KB

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  1. /*
  2. * linux/arch/arm/mach-omap2/devices.c
  3. *
  4. * OMAP2 platform device setup/initialization
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. */
  11. #include <linux/kernel.h>
  12. #include <linux/init.h>
  13. #include <linux/platform_device.h>
  14. #include <linux/io.h>
  15. #include <linux/clk.h>
  16. #include <linux/err.h>
  17. #include <linux/slab.h>
  18. #include <mach/hardware.h>
  19. #include <mach/irqs.h>
  20. #include <asm/mach-types.h>
  21. #include <asm/mach/map.h>
  22. #include <asm/pmu.h>
  23. #include <plat/tc.h>
  24. #include <plat/board.h>
  25. #include <plat/mcbsp.h>
  26. #include <mach/gpio.h>
  27. #include <plat/mmc.h>
  28. #include <plat/dma.h>
  29. #include <plat/omap_hwmod.h>
  30. #include <plat/omap_device.h>
  31. #include <plat/omap4-keypad.h>
  32. #include "mux.h"
  33. #include "control.h"
  34. #include "devices.h"
  35. #define L3_MODULES_MAX_LEN 12
  36. #define L3_MODULES 3
  37. static int __init omap3_l3_init(void)
  38. {
  39. int l;
  40. struct omap_hwmod *oh;
  41. struct omap_device *od;
  42. char oh_name[L3_MODULES_MAX_LEN];
  43. /*
  44. * To avoid code running on other OMAPs in
  45. * multi-omap builds
  46. */
  47. if (!(cpu_is_omap34xx()))
  48. return -ENODEV;
  49. l = snprintf(oh_name, L3_MODULES_MAX_LEN, "l3_main");
  50. oh = omap_hwmod_lookup(oh_name);
  51. if (!oh)
  52. pr_err("could not look up %s\n", oh_name);
  53. od = omap_device_build("omap_l3_smx", 0, oh, NULL, 0,
  54. NULL, 0, 0);
  55. WARN(IS_ERR(od), "could not build omap_device for %s\n", oh_name);
  56. return IS_ERR(od) ? PTR_ERR(od) : 0;
  57. }
  58. postcore_initcall(omap3_l3_init);
  59. static int __init omap4_l3_init(void)
  60. {
  61. int l, i;
  62. struct omap_hwmod *oh[3];
  63. struct omap_device *od;
  64. char oh_name[L3_MODULES_MAX_LEN];
  65. /*
  66. * To avoid code running on other OMAPs in
  67. * multi-omap builds
  68. */
  69. if (!(cpu_is_omap44xx()))
  70. return -ENODEV;
  71. for (i = 0; i < L3_MODULES; i++) {
  72. l = snprintf(oh_name, L3_MODULES_MAX_LEN, "l3_main_%d", i+1);
  73. oh[i] = omap_hwmod_lookup(oh_name);
  74. if (!(oh[i]))
  75. pr_err("could not look up %s\n", oh_name);
  76. }
  77. od = omap_device_build_ss("omap_l3_noc", 0, oh, 3, NULL,
  78. 0, NULL, 0, 0);
  79. WARN(IS_ERR(od), "could not build omap_device for %s\n", oh_name);
  80. return IS_ERR(od) ? PTR_ERR(od) : 0;
  81. }
  82. postcore_initcall(omap4_l3_init);
  83. #if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE)
  84. static struct resource omap2cam_resources[] = {
  85. {
  86. .start = OMAP24XX_CAMERA_BASE,
  87. .end = OMAP24XX_CAMERA_BASE + 0xfff,
  88. .flags = IORESOURCE_MEM,
  89. },
  90. {
  91. .start = INT_24XX_CAM_IRQ,
  92. .flags = IORESOURCE_IRQ,
  93. }
  94. };
  95. static struct platform_device omap2cam_device = {
  96. .name = "omap24xxcam",
  97. .id = -1,
  98. .num_resources = ARRAY_SIZE(omap2cam_resources),
  99. .resource = omap2cam_resources,
  100. };
  101. #endif
  102. static struct resource omap3isp_resources[] = {
  103. {
  104. .start = OMAP3430_ISP_BASE,
  105. .end = OMAP3430_ISP_END,
  106. .flags = IORESOURCE_MEM,
  107. },
  108. {
  109. .start = OMAP3430_ISP_CCP2_BASE,
  110. .end = OMAP3430_ISP_CCP2_END,
  111. .flags = IORESOURCE_MEM,
  112. },
  113. {
  114. .start = OMAP3430_ISP_CCDC_BASE,
  115. .end = OMAP3430_ISP_CCDC_END,
  116. .flags = IORESOURCE_MEM,
  117. },
  118. {
  119. .start = OMAP3430_ISP_HIST_BASE,
  120. .end = OMAP3430_ISP_HIST_END,
  121. .flags = IORESOURCE_MEM,
  122. },
  123. {
  124. .start = OMAP3430_ISP_H3A_BASE,
  125. .end = OMAP3430_ISP_H3A_END,
  126. .flags = IORESOURCE_MEM,
  127. },
  128. {
  129. .start = OMAP3430_ISP_PREV_BASE,
  130. .end = OMAP3430_ISP_PREV_END,
  131. .flags = IORESOURCE_MEM,
  132. },
  133. {
  134. .start = OMAP3430_ISP_RESZ_BASE,
  135. .end = OMAP3430_ISP_RESZ_END,
  136. .flags = IORESOURCE_MEM,
  137. },
  138. {
  139. .start = OMAP3430_ISP_SBL_BASE,
  140. .end = OMAP3430_ISP_SBL_END,
  141. .flags = IORESOURCE_MEM,
  142. },
  143. {
  144. .start = OMAP3430_ISP_CSI2A_REGS1_BASE,
  145. .end = OMAP3430_ISP_CSI2A_REGS1_END,
  146. .flags = IORESOURCE_MEM,
  147. },
  148. {
  149. .start = OMAP3430_ISP_CSIPHY2_BASE,
  150. .end = OMAP3430_ISP_CSIPHY2_END,
  151. .flags = IORESOURCE_MEM,
  152. },
  153. {
  154. .start = OMAP3630_ISP_CSI2A_REGS2_BASE,
  155. .end = OMAP3630_ISP_CSI2A_REGS2_END,
  156. .flags = IORESOURCE_MEM,
  157. },
  158. {
  159. .start = OMAP3630_ISP_CSI2C_REGS1_BASE,
  160. .end = OMAP3630_ISP_CSI2C_REGS1_END,
  161. .flags = IORESOURCE_MEM,
  162. },
  163. {
  164. .start = OMAP3630_ISP_CSIPHY1_BASE,
  165. .end = OMAP3630_ISP_CSIPHY1_END,
  166. .flags = IORESOURCE_MEM,
  167. },
  168. {
  169. .start = OMAP3630_ISP_CSI2C_REGS2_BASE,
  170. .end = OMAP3630_ISP_CSI2C_REGS2_END,
  171. .flags = IORESOURCE_MEM,
  172. },
  173. {
  174. .start = INT_34XX_CAM_IRQ,
  175. .flags = IORESOURCE_IRQ,
  176. }
  177. };
  178. static struct platform_device omap3isp_device = {
  179. .name = "omap3isp",
  180. .id = -1,
  181. .num_resources = ARRAY_SIZE(omap3isp_resources),
  182. .resource = omap3isp_resources,
  183. };
  184. int omap3_init_camera(struct isp_platform_data *pdata)
  185. {
  186. omap3isp_device.dev.platform_data = pdata;
  187. return platform_device_register(&omap3isp_device);
  188. }
  189. static inline void omap_init_camera(void)
  190. {
  191. #if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE)
  192. if (cpu_is_omap24xx())
  193. platform_device_register(&omap2cam_device);
  194. #endif
  195. }
  196. struct omap_device_pm_latency omap_keyboard_latency[] = {
  197. {
  198. .deactivate_func = omap_device_idle_hwmods,
  199. .activate_func = omap_device_enable_hwmods,
  200. .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
  201. },
  202. };
  203. int __init omap4_keyboard_init(struct omap4_keypad_platform_data
  204. *sdp4430_keypad_data, struct omap_board_data *bdata)
  205. {
  206. struct omap_device *od;
  207. struct omap_hwmod *oh;
  208. struct omap4_keypad_platform_data *keypad_data;
  209. unsigned int id = -1;
  210. char *oh_name = "kbd";
  211. char *name = "omap4-keypad";
  212. oh = omap_hwmod_lookup(oh_name);
  213. if (!oh) {
  214. pr_err("Could not look up %s\n", oh_name);
  215. return -ENODEV;
  216. }
  217. keypad_data = sdp4430_keypad_data;
  218. od = omap_device_build(name, id, oh, keypad_data,
  219. sizeof(struct omap4_keypad_platform_data),
  220. omap_keyboard_latency,
  221. ARRAY_SIZE(omap_keyboard_latency), 0);
  222. if (IS_ERR(od)) {
  223. WARN(1, "Can't build omap_device for %s:%s.\n",
  224. name, oh->name);
  225. return PTR_ERR(od);
  226. }
  227. oh->mux = omap_hwmod_mux_init(bdata->pads, bdata->pads_cnt);
  228. return 0;
  229. }
  230. #if defined(CONFIG_OMAP_MBOX_FWK) || defined(CONFIG_OMAP_MBOX_FWK_MODULE)
  231. static struct omap_device_pm_latency mbox_latencies[] = {
  232. [0] = {
  233. .activate_func = omap_device_enable_hwmods,
  234. .deactivate_func = omap_device_idle_hwmods,
  235. .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
  236. },
  237. };
  238. static inline void omap_init_mbox(void)
  239. {
  240. struct omap_hwmod *oh;
  241. struct omap_device *od;
  242. oh = omap_hwmod_lookup("mailbox");
  243. if (!oh) {
  244. pr_err("%s: unable to find hwmod\n", __func__);
  245. return;
  246. }
  247. od = omap_device_build("omap-mailbox", -1, oh, NULL, 0,
  248. mbox_latencies, ARRAY_SIZE(mbox_latencies), 0);
  249. WARN(IS_ERR(od), "%s: could not build device, err %ld\n",
  250. __func__, PTR_ERR(od));
  251. }
  252. #else
  253. static inline void omap_init_mbox(void) { }
  254. #endif /* CONFIG_OMAP_MBOX_FWK */
  255. static inline void omap_init_sti(void) {}
  256. #if defined(CONFIG_SND_SOC) || defined(CONFIG_SND_SOC_MODULE)
  257. static struct platform_device omap_pcm = {
  258. .name = "omap-pcm-audio",
  259. .id = -1,
  260. };
  261. /*
  262. * OMAP2420 has 2 McBSP ports
  263. * OMAP2430 has 5 McBSP ports
  264. * OMAP3 has 5 McBSP ports
  265. * OMAP4 has 4 McBSP ports
  266. */
  267. OMAP_MCBSP_PLATFORM_DEVICE(1);
  268. OMAP_MCBSP_PLATFORM_DEVICE(2);
  269. OMAP_MCBSP_PLATFORM_DEVICE(3);
  270. OMAP_MCBSP_PLATFORM_DEVICE(4);
  271. OMAP_MCBSP_PLATFORM_DEVICE(5);
  272. static void omap_init_audio(void)
  273. {
  274. platform_device_register(&omap_mcbsp1);
  275. platform_device_register(&omap_mcbsp2);
  276. if (cpu_is_omap243x() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
  277. platform_device_register(&omap_mcbsp3);
  278. platform_device_register(&omap_mcbsp4);
  279. }
  280. if (cpu_is_omap243x() || cpu_is_omap34xx())
  281. platform_device_register(&omap_mcbsp5);
  282. platform_device_register(&omap_pcm);
  283. }
  284. #else
  285. static inline void omap_init_audio(void) {}
  286. #endif
  287. #if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE)
  288. #include <plat/mcspi.h>
  289. struct omap_device_pm_latency omap_mcspi_latency[] = {
  290. [0] = {
  291. .deactivate_func = omap_device_idle_hwmods,
  292. .activate_func = omap_device_enable_hwmods,
  293. .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
  294. },
  295. };
  296. static int omap_mcspi_init(struct omap_hwmod *oh, void *unused)
  297. {
  298. struct omap_device *od;
  299. char *name = "omap2_mcspi";
  300. struct omap2_mcspi_platform_config *pdata;
  301. static int spi_num;
  302. struct omap2_mcspi_dev_attr *mcspi_attrib = oh->dev_attr;
  303. pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
  304. if (!pdata) {
  305. pr_err("Memory allocation for McSPI device failed\n");
  306. return -ENOMEM;
  307. }
  308. pdata->num_cs = mcspi_attrib->num_chipselect;
  309. switch (oh->class->rev) {
  310. case OMAP2_MCSPI_REV:
  311. case OMAP3_MCSPI_REV:
  312. pdata->regs_offset = 0;
  313. break;
  314. case OMAP4_MCSPI_REV:
  315. pdata->regs_offset = OMAP4_MCSPI_REG_OFFSET;
  316. break;
  317. default:
  318. pr_err("Invalid McSPI Revision value\n");
  319. return -EINVAL;
  320. }
  321. spi_num++;
  322. od = omap_device_build(name, spi_num, oh, pdata,
  323. sizeof(*pdata), omap_mcspi_latency,
  324. ARRAY_SIZE(omap_mcspi_latency), 0);
  325. WARN(IS_ERR(od), "Can't build omap_device for %s:%s\n",
  326. name, oh->name);
  327. kfree(pdata);
  328. return 0;
  329. }
  330. static void omap_init_mcspi(void)
  331. {
  332. omap_hwmod_for_each_by_class("mcspi", omap_mcspi_init, NULL);
  333. }
  334. #else
  335. static inline void omap_init_mcspi(void) {}
  336. #endif
  337. static struct resource omap2_pmu_resource = {
  338. .start = 3,
  339. .end = 3,
  340. .flags = IORESOURCE_IRQ,
  341. };
  342. static struct resource omap3_pmu_resource = {
  343. .start = INT_34XX_BENCH_MPU_EMUL,
  344. .end = INT_34XX_BENCH_MPU_EMUL,
  345. .flags = IORESOURCE_IRQ,
  346. };
  347. static struct platform_device omap_pmu_device = {
  348. .name = "arm-pmu",
  349. .id = ARM_PMU_DEVICE_CPU,
  350. .num_resources = 1,
  351. };
  352. static void omap_init_pmu(void)
  353. {
  354. if (cpu_is_omap24xx())
  355. omap_pmu_device.resource = &omap2_pmu_resource;
  356. else if (cpu_is_omap34xx())
  357. omap_pmu_device.resource = &omap3_pmu_resource;
  358. else
  359. return;
  360. platform_device_register(&omap_pmu_device);
  361. }
  362. #if defined(CONFIG_CRYPTO_DEV_OMAP_SHAM) || defined(CONFIG_CRYPTO_DEV_OMAP_SHAM_MODULE)
  363. #ifdef CONFIG_ARCH_OMAP2
  364. static struct resource omap2_sham_resources[] = {
  365. {
  366. .start = OMAP24XX_SEC_SHA1MD5_BASE,
  367. .end = OMAP24XX_SEC_SHA1MD5_BASE + 0x64,
  368. .flags = IORESOURCE_MEM,
  369. },
  370. {
  371. .start = INT_24XX_SHA1MD5,
  372. .flags = IORESOURCE_IRQ,
  373. }
  374. };
  375. static int omap2_sham_resources_sz = ARRAY_SIZE(omap2_sham_resources);
  376. #else
  377. #define omap2_sham_resources NULL
  378. #define omap2_sham_resources_sz 0
  379. #endif
  380. #ifdef CONFIG_ARCH_OMAP3
  381. static struct resource omap3_sham_resources[] = {
  382. {
  383. .start = OMAP34XX_SEC_SHA1MD5_BASE,
  384. .end = OMAP34XX_SEC_SHA1MD5_BASE + 0x64,
  385. .flags = IORESOURCE_MEM,
  386. },
  387. {
  388. .start = INT_34XX_SHA1MD52_IRQ,
  389. .flags = IORESOURCE_IRQ,
  390. },
  391. {
  392. .start = OMAP34XX_DMA_SHA1MD5_RX,
  393. .flags = IORESOURCE_DMA,
  394. }
  395. };
  396. static int omap3_sham_resources_sz = ARRAY_SIZE(omap3_sham_resources);
  397. #else
  398. #define omap3_sham_resources NULL
  399. #define omap3_sham_resources_sz 0
  400. #endif
  401. static struct platform_device sham_device = {
  402. .name = "omap-sham",
  403. .id = -1,
  404. };
  405. static void omap_init_sham(void)
  406. {
  407. if (cpu_is_omap24xx()) {
  408. sham_device.resource = omap2_sham_resources;
  409. sham_device.num_resources = omap2_sham_resources_sz;
  410. } else if (cpu_is_omap34xx()) {
  411. sham_device.resource = omap3_sham_resources;
  412. sham_device.num_resources = omap3_sham_resources_sz;
  413. } else {
  414. pr_err("%s: platform not supported\n", __func__);
  415. return;
  416. }
  417. platform_device_register(&sham_device);
  418. }
  419. #else
  420. static inline void omap_init_sham(void) { }
  421. #endif
  422. #if defined(CONFIG_CRYPTO_DEV_OMAP_AES) || defined(CONFIG_CRYPTO_DEV_OMAP_AES_MODULE)
  423. #ifdef CONFIG_ARCH_OMAP2
  424. static struct resource omap2_aes_resources[] = {
  425. {
  426. .start = OMAP24XX_SEC_AES_BASE,
  427. .end = OMAP24XX_SEC_AES_BASE + 0x4C,
  428. .flags = IORESOURCE_MEM,
  429. },
  430. {
  431. .start = OMAP24XX_DMA_AES_TX,
  432. .flags = IORESOURCE_DMA,
  433. },
  434. {
  435. .start = OMAP24XX_DMA_AES_RX,
  436. .flags = IORESOURCE_DMA,
  437. }
  438. };
  439. static int omap2_aes_resources_sz = ARRAY_SIZE(omap2_aes_resources);
  440. #else
  441. #define omap2_aes_resources NULL
  442. #define omap2_aes_resources_sz 0
  443. #endif
  444. #ifdef CONFIG_ARCH_OMAP3
  445. static struct resource omap3_aes_resources[] = {
  446. {
  447. .start = OMAP34XX_SEC_AES_BASE,
  448. .end = OMAP34XX_SEC_AES_BASE + 0x4C,
  449. .flags = IORESOURCE_MEM,
  450. },
  451. {
  452. .start = OMAP34XX_DMA_AES2_TX,
  453. .flags = IORESOURCE_DMA,
  454. },
  455. {
  456. .start = OMAP34XX_DMA_AES2_RX,
  457. .flags = IORESOURCE_DMA,
  458. }
  459. };
  460. static int omap3_aes_resources_sz = ARRAY_SIZE(omap3_aes_resources);
  461. #else
  462. #define omap3_aes_resources NULL
  463. #define omap3_aes_resources_sz 0
  464. #endif
  465. static struct platform_device aes_device = {
  466. .name = "omap-aes",
  467. .id = -1,
  468. };
  469. static void omap_init_aes(void)
  470. {
  471. if (cpu_is_omap24xx()) {
  472. aes_device.resource = omap2_aes_resources;
  473. aes_device.num_resources = omap2_aes_resources_sz;
  474. } else if (cpu_is_omap34xx()) {
  475. aes_device.resource = omap3_aes_resources;
  476. aes_device.num_resources = omap3_aes_resources_sz;
  477. } else {
  478. pr_err("%s: platform not supported\n", __func__);
  479. return;
  480. }
  481. platform_device_register(&aes_device);
  482. }
  483. #else
  484. static inline void omap_init_aes(void) { }
  485. #endif
  486. /*-------------------------------------------------------------------------*/
  487. #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
  488. static inline void omap242x_mmc_mux(struct omap_mmc_platform_data
  489. *mmc_controller)
  490. {
  491. if ((mmc_controller->slots[0].switch_pin > 0) && \
  492. (mmc_controller->slots[0].switch_pin < OMAP_MAX_GPIO_LINES))
  493. omap_mux_init_gpio(mmc_controller->slots[0].switch_pin,
  494. OMAP_PIN_INPUT_PULLUP);
  495. if ((mmc_controller->slots[0].gpio_wp > 0) && \
  496. (mmc_controller->slots[0].gpio_wp < OMAP_MAX_GPIO_LINES))
  497. omap_mux_init_gpio(mmc_controller->slots[0].gpio_wp,
  498. OMAP_PIN_INPUT_PULLUP);
  499. omap_mux_init_signal("sdmmc_cmd", 0);
  500. omap_mux_init_signal("sdmmc_clki", 0);
  501. omap_mux_init_signal("sdmmc_clko", 0);
  502. omap_mux_init_signal("sdmmc_dat0", 0);
  503. omap_mux_init_signal("sdmmc_dat_dir0", 0);
  504. omap_mux_init_signal("sdmmc_cmd_dir", 0);
  505. if (mmc_controller->slots[0].caps & MMC_CAP_4_BIT_DATA) {
  506. omap_mux_init_signal("sdmmc_dat1", 0);
  507. omap_mux_init_signal("sdmmc_dat2", 0);
  508. omap_mux_init_signal("sdmmc_dat3", 0);
  509. omap_mux_init_signal("sdmmc_dat_dir1", 0);
  510. omap_mux_init_signal("sdmmc_dat_dir2", 0);
  511. omap_mux_init_signal("sdmmc_dat_dir3", 0);
  512. }
  513. /*
  514. * Use internal loop-back in MMC/SDIO Module Input Clock
  515. * selection
  516. */
  517. if (mmc_controller->slots[0].internal_clock) {
  518. u32 v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
  519. v |= (1 << 24);
  520. omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
  521. }
  522. }
  523. void __init omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data)
  524. {
  525. char *name = "mmci-omap";
  526. if (!mmc_data[0]) {
  527. pr_err("%s fails: Incomplete platform data\n", __func__);
  528. return;
  529. }
  530. omap242x_mmc_mux(mmc_data[0]);
  531. omap_mmc_add(name, 0, OMAP2_MMC1_BASE, OMAP2420_MMC_SIZE,
  532. INT_24XX_MMC_IRQ, mmc_data[0]);
  533. }
  534. #endif
  535. /*-------------------------------------------------------------------------*/
  536. #if defined(CONFIG_HDQ_MASTER_OMAP) || defined(CONFIG_HDQ_MASTER_OMAP_MODULE)
  537. #if defined(CONFIG_SOC_OMAP2430) || defined(CONFIG_SOC_OMAP3430)
  538. #define OMAP_HDQ_BASE 0x480B2000
  539. #endif
  540. static struct resource omap_hdq_resources[] = {
  541. {
  542. .start = OMAP_HDQ_BASE,
  543. .end = OMAP_HDQ_BASE + 0x1C,
  544. .flags = IORESOURCE_MEM,
  545. },
  546. {
  547. .start = INT_24XX_HDQ_IRQ,
  548. .flags = IORESOURCE_IRQ,
  549. },
  550. };
  551. static struct platform_device omap_hdq_dev = {
  552. .name = "omap_hdq",
  553. .id = 0,
  554. .dev = {
  555. .platform_data = NULL,
  556. },
  557. .num_resources = ARRAY_SIZE(omap_hdq_resources),
  558. .resource = omap_hdq_resources,
  559. };
  560. static inline void omap_hdq_init(void)
  561. {
  562. (void) platform_device_register(&omap_hdq_dev);
  563. }
  564. #else
  565. static inline void omap_hdq_init(void) {}
  566. #endif
  567. /*---------------------------------------------------------------------------*/
  568. #if defined(CONFIG_VIDEO_OMAP2_VOUT) || \
  569. defined(CONFIG_VIDEO_OMAP2_VOUT_MODULE)
  570. #if defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE)
  571. static struct resource omap_vout_resource[3 - CONFIG_FB_OMAP2_NUM_FBS] = {
  572. };
  573. #else
  574. static struct resource omap_vout_resource[2] = {
  575. };
  576. #endif
  577. static struct platform_device omap_vout_device = {
  578. .name = "omap_vout",
  579. .num_resources = ARRAY_SIZE(omap_vout_resource),
  580. .resource = &omap_vout_resource[0],
  581. .id = -1,
  582. };
  583. static void omap_init_vout(void)
  584. {
  585. if (platform_device_register(&omap_vout_device) < 0)
  586. printk(KERN_ERR "Unable to register OMAP-VOUT device\n");
  587. }
  588. #else
  589. static inline void omap_init_vout(void) {}
  590. #endif
  591. /*-------------------------------------------------------------------------*/
  592. static int __init omap2_init_devices(void)
  593. {
  594. /*
  595. * please keep these calls, and their implementations above,
  596. * in alphabetical order so they're easier to sort through.
  597. */
  598. omap_init_audio();
  599. omap_init_camera();
  600. omap_init_mbox();
  601. omap_init_mcspi();
  602. omap_init_pmu();
  603. omap_hdq_init();
  604. omap_init_sti();
  605. omap_init_sham();
  606. omap_init_aes();
  607. omap_init_vout();
  608. return 0;
  609. }
  610. arch_initcall(omap2_init_devices);
  611. #if defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE)
  612. static struct omap_device_pm_latency omap_wdt_latency[] = {
  613. [0] = {
  614. .deactivate_func = omap_device_idle_hwmods,
  615. .activate_func = omap_device_enable_hwmods,
  616. .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
  617. },
  618. };
  619. static int __init omap_init_wdt(void)
  620. {
  621. int id = -1;
  622. struct omap_device *od;
  623. struct omap_hwmod *oh;
  624. char *oh_name = "wd_timer2";
  625. char *dev_name = "omap_wdt";
  626. if (!cpu_class_is_omap2())
  627. return 0;
  628. oh = omap_hwmod_lookup(oh_name);
  629. if (!oh) {
  630. pr_err("Could not look up wd_timer%d hwmod\n", id);
  631. return -EINVAL;
  632. }
  633. od = omap_device_build(dev_name, id, oh, NULL, 0,
  634. omap_wdt_latency,
  635. ARRAY_SIZE(omap_wdt_latency), 0);
  636. WARN(IS_ERR(od), "Can't build omap_device for %s:%s.\n",
  637. dev_name, oh->name);
  638. return 0;
  639. }
  640. subsys_initcall(omap_init_wdt);
  641. #endif