mach-imx27_visstrim_m10.c 6.5 KB

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  1. /*
  2. * mach-imx27_visstrim_m10.c
  3. *
  4. * Copyright 2010 Javier Martin <javier.martin@vista-silicon.com>
  5. *
  6. * Based on mach-pcm038.c, mach-pca100.c, mach-mx27ads.c and others.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  21. * MA 02110-1301, USA.
  22. */
  23. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  24. #include <linux/platform_device.h>
  25. #include <linux/mtd/physmap.h>
  26. #include <linux/i2c.h>
  27. #include <linux/i2c/pca953x.h>
  28. #include <linux/input.h>
  29. #include <linux/gpio.h>
  30. #include <linux/delay.h>
  31. #include <asm/mach-types.h>
  32. #include <asm/mach/arch.h>
  33. #include <asm/mach/time.h>
  34. #include <mach/common.h>
  35. #include <mach/iomux-mx27.h>
  36. #include "devices-imx27.h"
  37. #define OTG_PHY_CS_GPIO (GPIO_PORTF + 17)
  38. #define SDHC1_IRQ IRQ_GPIOB(25)
  39. static const int visstrim_m10_pins[] __initconst = {
  40. /* UART1 (console) */
  41. PE12_PF_UART1_TXD,
  42. PE13_PF_UART1_RXD,
  43. PE14_PF_UART1_CTS,
  44. PE15_PF_UART1_RTS,
  45. /* FEC */
  46. PD0_AIN_FEC_TXD0,
  47. PD1_AIN_FEC_TXD1,
  48. PD2_AIN_FEC_TXD2,
  49. PD3_AIN_FEC_TXD3,
  50. PD4_AOUT_FEC_RX_ER,
  51. PD5_AOUT_FEC_RXD1,
  52. PD6_AOUT_FEC_RXD2,
  53. PD7_AOUT_FEC_RXD3,
  54. PD8_AF_FEC_MDIO,
  55. PD9_AIN_FEC_MDC,
  56. PD10_AOUT_FEC_CRS,
  57. PD11_AOUT_FEC_TX_CLK,
  58. PD12_AOUT_FEC_RXD0,
  59. PD13_AOUT_FEC_RX_DV,
  60. PD14_AOUT_FEC_RX_CLK,
  61. PD15_AOUT_FEC_COL,
  62. PD16_AIN_FEC_TX_ER,
  63. PF23_AIN_FEC_TX_EN,
  64. /* SSI1 */
  65. PC20_PF_SSI1_FS,
  66. PC21_PF_SSI1_RXD,
  67. PC22_PF_SSI1_TXD,
  68. PC23_PF_SSI1_CLK,
  69. /* SDHC1 */
  70. PE18_PF_SD1_D0,
  71. PE19_PF_SD1_D1,
  72. PE20_PF_SD1_D2,
  73. PE21_PF_SD1_D3,
  74. PE22_PF_SD1_CMD,
  75. PE23_PF_SD1_CLK,
  76. /* Both I2Cs */
  77. PD17_PF_I2C_DATA,
  78. PD18_PF_I2C_CLK,
  79. PC5_PF_I2C2_SDA,
  80. PC6_PF_I2C2_SCL,
  81. /* USB OTG */
  82. OTG_PHY_CS_GPIO | GPIO_GPIO | GPIO_OUT,
  83. PC9_PF_USBOTG_DATA0,
  84. PC11_PF_USBOTG_DATA1,
  85. PC10_PF_USBOTG_DATA2,
  86. PC13_PF_USBOTG_DATA3,
  87. PC12_PF_USBOTG_DATA4,
  88. PC7_PF_USBOTG_DATA5,
  89. PC8_PF_USBOTG_DATA6,
  90. PE25_PF_USBOTG_DATA7,
  91. PE24_PF_USBOTG_CLK,
  92. PE2_PF_USBOTG_DIR,
  93. PE0_PF_USBOTG_NXT,
  94. PE1_PF_USBOTG_STP,
  95. PB23_PF_USB_PWR,
  96. PB24_PF_USB_OC,
  97. };
  98. /* GPIOs used as events for applications */
  99. static struct gpio_keys_button visstrim_gpio_keys[] = {
  100. {
  101. .type = EV_KEY,
  102. .code = KEY_RESTART,
  103. .gpio = (GPIO_PORTC + 15),
  104. .desc = "Default config",
  105. .active_low = 0,
  106. .wakeup = 1,
  107. },
  108. {
  109. .type = EV_KEY,
  110. .code = KEY_RECORD,
  111. .gpio = (GPIO_PORTF + 14),
  112. .desc = "Record",
  113. .active_low = 0,
  114. .wakeup = 1,
  115. },
  116. {
  117. .type = EV_KEY,
  118. .code = KEY_STOP,
  119. .gpio = (GPIO_PORTF + 13),
  120. .desc = "Stop",
  121. .active_low = 0,
  122. .wakeup = 1,
  123. }
  124. };
  125. static const struct gpio_keys_platform_data
  126. visstrim_gpio_keys_platform_data __initconst = {
  127. .buttons = visstrim_gpio_keys,
  128. .nbuttons = ARRAY_SIZE(visstrim_gpio_keys),
  129. };
  130. /* Visstrim_SM10 has a microSD slot connected to sdhc1 */
  131. static int visstrim_m10_sdhc1_init(struct device *dev,
  132. irq_handler_t detect_irq, void *data)
  133. {
  134. int ret;
  135. ret = request_irq(SDHC1_IRQ, detect_irq, IRQF_TRIGGER_FALLING,
  136. "mmc-detect", data);
  137. return ret;
  138. }
  139. static void visstrim_m10_sdhc1_exit(struct device *dev, void *data)
  140. {
  141. free_irq(SDHC1_IRQ, data);
  142. }
  143. static const struct imxmmc_platform_data visstrim_m10_sdhc_pdata __initconst = {
  144. .init = visstrim_m10_sdhc1_init,
  145. .exit = visstrim_m10_sdhc1_exit,
  146. };
  147. /* Visstrim_SM10 NOR flash */
  148. static struct physmap_flash_data visstrim_m10_flash_data = {
  149. .width = 2,
  150. };
  151. static struct resource visstrim_m10_flash_resource = {
  152. .start = 0xc0000000,
  153. .end = 0xc0000000 + SZ_64M - 1,
  154. .flags = IORESOURCE_MEM,
  155. };
  156. static struct platform_device visstrim_m10_nor_mtd_device = {
  157. .name = "physmap-flash",
  158. .id = 0,
  159. .dev = {
  160. .platform_data = &visstrim_m10_flash_data,
  161. },
  162. .num_resources = 1,
  163. .resource = &visstrim_m10_flash_resource,
  164. };
  165. static struct platform_device *platform_devices[] __initdata = {
  166. &visstrim_m10_nor_mtd_device,
  167. };
  168. /* Visstrim_M10 uses UART0 as console */
  169. static const struct imxuart_platform_data uart_pdata __initconst = {
  170. .flags = IMXUART_HAVE_RTSCTS,
  171. };
  172. /* I2C */
  173. static const struct imxi2c_platform_data visstrim_m10_i2c_data __initconst = {
  174. .bitrate = 100000,
  175. };
  176. static struct pca953x_platform_data visstrim_m10_pca9555_pdata = {
  177. .gpio_base = 240, /* After MX27 internal GPIOs */
  178. .invert = 0,
  179. };
  180. static struct i2c_board_info visstrim_m10_i2c_devices[] = {
  181. {
  182. I2C_BOARD_INFO("pca9555", 0x20),
  183. .platform_data = &visstrim_m10_pca9555_pdata,
  184. },
  185. {
  186. I2C_BOARD_INFO("tlv320aic32x4", 0x18),
  187. }
  188. };
  189. /* USB OTG */
  190. static int otg_phy_init(struct platform_device *pdev)
  191. {
  192. gpio_set_value(OTG_PHY_CS_GPIO, 0);
  193. mdelay(10);
  194. return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED);
  195. }
  196. static const struct mxc_usbh_platform_data
  197. visstrim_m10_usbotg_pdata __initconst = {
  198. .init = otg_phy_init,
  199. .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
  200. };
  201. /* SSI */
  202. static const struct imx_ssi_platform_data visstrim_m10_ssi_pdata __initconst = {
  203. .flags = IMX_SSI_DMA | IMX_SSI_SYN,
  204. };
  205. static void __init visstrim_m10_board_init(void)
  206. {
  207. int ret;
  208. imx27_soc_init();
  209. ret = mxc_gpio_setup_multiple_pins(visstrim_m10_pins,
  210. ARRAY_SIZE(visstrim_m10_pins), "VISSTRIM_M10");
  211. if (ret)
  212. pr_err("Failed to setup pins (%d)\n", ret);
  213. imx27_add_imx_ssi(0, &visstrim_m10_ssi_pdata);
  214. imx27_add_imx_uart0(&uart_pdata);
  215. i2c_register_board_info(0, visstrim_m10_i2c_devices,
  216. ARRAY_SIZE(visstrim_m10_i2c_devices));
  217. imx27_add_imx_i2c(0, &visstrim_m10_i2c_data);
  218. imx27_add_imx_i2c(1, &visstrim_m10_i2c_data);
  219. imx27_add_mxc_mmc(0, &visstrim_m10_sdhc_pdata);
  220. imx27_add_mxc_ehci_otg(&visstrim_m10_usbotg_pdata);
  221. imx27_add_fec(NULL);
  222. imx_add_gpio_keys(&visstrim_gpio_keys_platform_data);
  223. platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
  224. }
  225. static void __init visstrim_m10_timer_init(void)
  226. {
  227. mx27_clocks_init((unsigned long)25000000);
  228. }
  229. static struct sys_timer visstrim_m10_timer = {
  230. .init = visstrim_m10_timer_init,
  231. };
  232. MACHINE_START(IMX27_VISSTRIM_M10, "Vista Silicon Visstrim_M10")
  233. .boot_params = MX27_PHYS_OFFSET + 0x100,
  234. .map_io = mx27_map_io,
  235. .init_early = imx27_init_early,
  236. .init_irq = mx27_init_irq,
  237. .timer = &visstrim_m10_timer,
  238. .init_machine = visstrim_m10_board_init,
  239. MACHINE_END