devices.c 8.0 KB

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  1. /*
  2. * mach-davinci/devices.c
  3. *
  4. * DaVinci platform device setup/initialization
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. */
  11. #include <linux/init.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/dma-mapping.h>
  14. #include <linux/io.h>
  15. #include <mach/hardware.h>
  16. #include <mach/i2c.h>
  17. #include <mach/irqs.h>
  18. #include <mach/cputype.h>
  19. #include <mach/mux.h>
  20. #include <mach/edma.h>
  21. #include <mach/mmc.h>
  22. #include <mach/time.h>
  23. #include "clock.h"
  24. #define DAVINCI_I2C_BASE 0x01C21000
  25. #define DAVINCI_ATA_BASE 0x01C66000
  26. #define DAVINCI_MMCSD0_BASE 0x01E10000
  27. #define DM355_MMCSD0_BASE 0x01E11000
  28. #define DM355_MMCSD1_BASE 0x01E00000
  29. #define DM365_MMCSD0_BASE 0x01D11000
  30. #define DM365_MMCSD1_BASE 0x01D00000
  31. /* System control register offsets */
  32. #define DM64XX_VDD3P3V_PWDN 0x48
  33. static struct resource i2c_resources[] = {
  34. {
  35. .start = DAVINCI_I2C_BASE,
  36. .end = DAVINCI_I2C_BASE + 0x40,
  37. .flags = IORESOURCE_MEM,
  38. },
  39. {
  40. .start = IRQ_I2C,
  41. .flags = IORESOURCE_IRQ,
  42. },
  43. };
  44. static struct platform_device davinci_i2c_device = {
  45. .name = "i2c_davinci",
  46. .id = 1,
  47. .num_resources = ARRAY_SIZE(i2c_resources),
  48. .resource = i2c_resources,
  49. };
  50. void __init davinci_init_i2c(struct davinci_i2c_platform_data *pdata)
  51. {
  52. if (cpu_is_davinci_dm644x())
  53. davinci_cfg_reg(DM644X_I2C);
  54. davinci_i2c_device.dev.platform_data = pdata;
  55. (void) platform_device_register(&davinci_i2c_device);
  56. }
  57. static struct resource ide_resources[] = {
  58. {
  59. .start = DAVINCI_ATA_BASE,
  60. .end = DAVINCI_ATA_BASE + 0x7ff,
  61. .flags = IORESOURCE_MEM,
  62. },
  63. {
  64. .start = IRQ_IDE,
  65. .end = IRQ_IDE,
  66. .flags = IORESOURCE_IRQ,
  67. },
  68. };
  69. static u64 ide_dma_mask = DMA_BIT_MASK(32);
  70. static struct platform_device ide_device = {
  71. .name = "palm_bk3710",
  72. .id = -1,
  73. .resource = ide_resources,
  74. .num_resources = ARRAY_SIZE(ide_resources),
  75. .dev = {
  76. .dma_mask = &ide_dma_mask,
  77. .coherent_dma_mask = DMA_BIT_MASK(32),
  78. },
  79. };
  80. void __init davinci_init_ide(void)
  81. {
  82. if (cpu_is_davinci_dm644x()) {
  83. davinci_cfg_reg(DM644X_HPIEN_DISABLE);
  84. davinci_cfg_reg(DM644X_ATAEN);
  85. davinci_cfg_reg(DM644X_HDIREN);
  86. } else if (cpu_is_davinci_dm646x()) {
  87. /* IRQ_DM646X_IDE is the same as IRQ_IDE */
  88. davinci_cfg_reg(DM646X_ATAEN);
  89. } else {
  90. WARN_ON(1);
  91. return;
  92. }
  93. platform_device_register(&ide_device);
  94. }
  95. #if defined(CONFIG_MMC_DAVINCI) || defined(CONFIG_MMC_DAVINCI_MODULE)
  96. static u64 mmcsd0_dma_mask = DMA_BIT_MASK(32);
  97. static struct resource mmcsd0_resources[] = {
  98. {
  99. /* different on dm355 */
  100. .start = DAVINCI_MMCSD0_BASE,
  101. .end = DAVINCI_MMCSD0_BASE + SZ_4K - 1,
  102. .flags = IORESOURCE_MEM,
  103. },
  104. /* IRQs: MMC/SD, then SDIO */
  105. {
  106. .start = IRQ_MMCINT,
  107. .flags = IORESOURCE_IRQ,
  108. }, {
  109. /* different on dm355 */
  110. .start = IRQ_SDIOINT,
  111. .flags = IORESOURCE_IRQ,
  112. },
  113. /* DMA channels: RX, then TX */
  114. {
  115. .start = EDMA_CTLR_CHAN(0, DAVINCI_DMA_MMCRXEVT),
  116. .flags = IORESOURCE_DMA,
  117. }, {
  118. .start = EDMA_CTLR_CHAN(0, DAVINCI_DMA_MMCTXEVT),
  119. .flags = IORESOURCE_DMA,
  120. },
  121. };
  122. static struct platform_device davinci_mmcsd0_device = {
  123. .name = "davinci_mmc",
  124. .id = 0,
  125. .dev = {
  126. .dma_mask = &mmcsd0_dma_mask,
  127. .coherent_dma_mask = DMA_BIT_MASK(32),
  128. },
  129. .num_resources = ARRAY_SIZE(mmcsd0_resources),
  130. .resource = mmcsd0_resources,
  131. };
  132. static u64 mmcsd1_dma_mask = DMA_BIT_MASK(32);
  133. static struct resource mmcsd1_resources[] = {
  134. {
  135. .start = DM355_MMCSD1_BASE,
  136. .end = DM355_MMCSD1_BASE + SZ_4K - 1,
  137. .flags = IORESOURCE_MEM,
  138. },
  139. /* IRQs: MMC/SD, then SDIO */
  140. {
  141. .start = IRQ_DM355_MMCINT1,
  142. .flags = IORESOURCE_IRQ,
  143. }, {
  144. .start = IRQ_DM355_SDIOINT1,
  145. .flags = IORESOURCE_IRQ,
  146. },
  147. /* DMA channels: RX, then TX */
  148. {
  149. .start = EDMA_CTLR_CHAN(0, 30), /* rx */
  150. .flags = IORESOURCE_DMA,
  151. }, {
  152. .start = EDMA_CTLR_CHAN(0, 31), /* tx */
  153. .flags = IORESOURCE_DMA,
  154. },
  155. };
  156. static struct platform_device davinci_mmcsd1_device = {
  157. .name = "davinci_mmc",
  158. .id = 1,
  159. .dev = {
  160. .dma_mask = &mmcsd1_dma_mask,
  161. .coherent_dma_mask = DMA_BIT_MASK(32),
  162. },
  163. .num_resources = ARRAY_SIZE(mmcsd1_resources),
  164. .resource = mmcsd1_resources,
  165. };
  166. void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
  167. {
  168. struct platform_device *pdev = NULL;
  169. if (WARN_ON(cpu_is_davinci_dm646x()))
  170. return;
  171. /* REVISIT: update PINMUX, ARM_IRQMUX, and EDMA_EVTMUX here too;
  172. * for example if MMCSD1 is used for SDIO, maybe DAT2 is unused.
  173. *
  174. * FIXME dm6441 (no MMC/SD), dm357 (one), and dm335 (two) are
  175. * not handled right here ...
  176. */
  177. switch (module) {
  178. case 1:
  179. if (cpu_is_davinci_dm355()) {
  180. /* REVISIT we may not need all these pins if e.g. this
  181. * is a hard-wired SDIO device...
  182. */
  183. davinci_cfg_reg(DM355_SD1_CMD);
  184. davinci_cfg_reg(DM355_SD1_CLK);
  185. davinci_cfg_reg(DM355_SD1_DATA0);
  186. davinci_cfg_reg(DM355_SD1_DATA1);
  187. davinci_cfg_reg(DM355_SD1_DATA2);
  188. davinci_cfg_reg(DM355_SD1_DATA3);
  189. } else if (cpu_is_davinci_dm365()) {
  190. void __iomem *pupdctl1 =
  191. IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE + 0x7c);
  192. /* Configure pull down control */
  193. __raw_writel((__raw_readl(pupdctl1) & ~0xfc0),
  194. pupdctl1);
  195. mmcsd1_resources[0].start = DM365_MMCSD1_BASE;
  196. mmcsd1_resources[0].end = DM365_MMCSD1_BASE +
  197. SZ_4K - 1;
  198. mmcsd1_resources[2].start = IRQ_DM365_SDIOINT1;
  199. } else
  200. break;
  201. pdev = &davinci_mmcsd1_device;
  202. break;
  203. case 0:
  204. if (cpu_is_davinci_dm355()) {
  205. mmcsd0_resources[0].start = DM355_MMCSD0_BASE;
  206. mmcsd0_resources[0].end = DM355_MMCSD0_BASE + SZ_4K - 1;
  207. mmcsd0_resources[2].start = IRQ_DM355_SDIOINT0;
  208. /* expose all 6 MMC0 signals: CLK, CMD, DATA[0..3] */
  209. davinci_cfg_reg(DM355_MMCSD0);
  210. /* enable RX EDMA */
  211. davinci_cfg_reg(DM355_EVT26_MMC0_RX);
  212. } else if (cpu_is_davinci_dm365()) {
  213. mmcsd0_resources[0].start = DM365_MMCSD0_BASE;
  214. mmcsd0_resources[0].end = DM365_MMCSD0_BASE +
  215. SZ_4K - 1;
  216. mmcsd0_resources[2].start = IRQ_DM365_SDIOINT0;
  217. } else if (cpu_is_davinci_dm644x()) {
  218. /* REVISIT: should this be in board-init code? */
  219. void __iomem *base =
  220. IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE);
  221. /* Power-on 3.3V IO cells */
  222. __raw_writel(0, base + DM64XX_VDD3P3V_PWDN);
  223. /*Set up the pull regiter for MMC */
  224. davinci_cfg_reg(DM644X_MSTK);
  225. }
  226. pdev = &davinci_mmcsd0_device;
  227. break;
  228. }
  229. if (WARN_ON(!pdev))
  230. return;
  231. pdev->dev.platform_data = config;
  232. platform_device_register(pdev);
  233. }
  234. #else
  235. void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
  236. {
  237. }
  238. #endif
  239. /*-------------------------------------------------------------------------*/
  240. static struct resource wdt_resources[] = {
  241. {
  242. .start = DAVINCI_WDOG_BASE,
  243. .end = DAVINCI_WDOG_BASE + SZ_1K - 1,
  244. .flags = IORESOURCE_MEM,
  245. },
  246. };
  247. struct platform_device davinci_wdt_device = {
  248. .name = "watchdog",
  249. .id = -1,
  250. .num_resources = ARRAY_SIZE(wdt_resources),
  251. .resource = wdt_resources,
  252. };
  253. static void davinci_init_wdt(void)
  254. {
  255. platform_device_register(&davinci_wdt_device);
  256. }
  257. /*-------------------------------------------------------------------------*/
  258. static struct platform_device davinci_pcm_device = {
  259. .name = "davinci-pcm-audio",
  260. .id = -1,
  261. };
  262. static void davinci_init_pcm(void)
  263. {
  264. platform_device_register(&davinci_pcm_device);
  265. }
  266. /*-------------------------------------------------------------------------*/
  267. struct davinci_timer_instance davinci_timer_instance[2] = {
  268. {
  269. .base = DAVINCI_TIMER0_BASE,
  270. .bottom_irq = IRQ_TINT0_TINT12,
  271. .top_irq = IRQ_TINT0_TINT34,
  272. },
  273. {
  274. .base = DAVINCI_TIMER1_BASE,
  275. .bottom_irq = IRQ_TINT1_TINT12,
  276. .top_irq = IRQ_TINT1_TINT34,
  277. },
  278. };
  279. /*-------------------------------------------------------------------------*/
  280. static int __init davinci_init_devices(void)
  281. {
  282. /* please keep these calls, and their implementations above,
  283. * in alphabetical order so they're easier to sort through.
  284. */
  285. davinci_init_pcm();
  286. davinci_init_wdt();
  287. return 0;
  288. }
  289. arch_initcall(davinci_init_devices);