dma-mapping.h 15 KB

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  1. #ifndef ASMARM_DMA_MAPPING_H
  2. #define ASMARM_DMA_MAPPING_H
  3. #ifdef __KERNEL__
  4. #include <linux/mm_types.h>
  5. #include <linux/scatterlist.h>
  6. #include <linux/dma-debug.h>
  7. #include <asm-generic/dma-coherent.h>
  8. #include <asm/memory.h>
  9. #ifdef __arch_page_to_dma
  10. #error Please update to __arch_pfn_to_dma
  11. #endif
  12. /*
  13. * dma_to_pfn/pfn_to_dma/dma_to_virt/virt_to_dma are architecture private
  14. * functions used internally by the DMA-mapping API to provide DMA
  15. * addresses. They must not be used by drivers.
  16. */
  17. #ifndef __arch_pfn_to_dma
  18. static inline dma_addr_t pfn_to_dma(struct device *dev, unsigned long pfn)
  19. {
  20. return (dma_addr_t)__pfn_to_bus(pfn);
  21. }
  22. static inline unsigned long dma_to_pfn(struct device *dev, dma_addr_t addr)
  23. {
  24. return __bus_to_pfn(addr);
  25. }
  26. static inline void *dma_to_virt(struct device *dev, dma_addr_t addr)
  27. {
  28. return (void *)__bus_to_virt(addr);
  29. }
  30. static inline dma_addr_t virt_to_dma(struct device *dev, void *addr)
  31. {
  32. return (dma_addr_t)__virt_to_bus((unsigned long)(addr));
  33. }
  34. #else
  35. static inline dma_addr_t pfn_to_dma(struct device *dev, unsigned long pfn)
  36. {
  37. return __arch_pfn_to_dma(dev, pfn);
  38. }
  39. static inline unsigned long dma_to_pfn(struct device *dev, dma_addr_t addr)
  40. {
  41. return __arch_dma_to_pfn(dev, addr);
  42. }
  43. static inline void *dma_to_virt(struct device *dev, dma_addr_t addr)
  44. {
  45. return __arch_dma_to_virt(dev, addr);
  46. }
  47. static inline dma_addr_t virt_to_dma(struct device *dev, void *addr)
  48. {
  49. return __arch_virt_to_dma(dev, addr);
  50. }
  51. #endif
  52. /*
  53. * The DMA API is built upon the notion of "buffer ownership". A buffer
  54. * is either exclusively owned by the CPU (and therefore may be accessed
  55. * by it) or exclusively owned by the DMA device. These helper functions
  56. * represent the transitions between these two ownership states.
  57. *
  58. * Note, however, that on later ARMs, this notion does not work due to
  59. * speculative prefetches. We model our approach on the assumption that
  60. * the CPU does do speculative prefetches, which means we clean caches
  61. * before transfers and delay cache invalidation until transfer completion.
  62. *
  63. * Private support functions: these are not part of the API and are
  64. * liable to change. Drivers must not use these.
  65. */
  66. static inline void __dma_single_cpu_to_dev(const void *kaddr, size_t size,
  67. enum dma_data_direction dir)
  68. {
  69. extern void ___dma_single_cpu_to_dev(const void *, size_t,
  70. enum dma_data_direction);
  71. if (!arch_is_coherent())
  72. ___dma_single_cpu_to_dev(kaddr, size, dir);
  73. }
  74. static inline void __dma_single_dev_to_cpu(const void *kaddr, size_t size,
  75. enum dma_data_direction dir)
  76. {
  77. extern void ___dma_single_dev_to_cpu(const void *, size_t,
  78. enum dma_data_direction);
  79. if (!arch_is_coherent())
  80. ___dma_single_dev_to_cpu(kaddr, size, dir);
  81. }
  82. static inline void __dma_page_cpu_to_dev(struct page *page, unsigned long off,
  83. size_t size, enum dma_data_direction dir)
  84. {
  85. extern void ___dma_page_cpu_to_dev(struct page *, unsigned long,
  86. size_t, enum dma_data_direction);
  87. if (!arch_is_coherent())
  88. ___dma_page_cpu_to_dev(page, off, size, dir);
  89. }
  90. static inline void __dma_page_dev_to_cpu(struct page *page, unsigned long off,
  91. size_t size, enum dma_data_direction dir)
  92. {
  93. extern void ___dma_page_dev_to_cpu(struct page *, unsigned long,
  94. size_t, enum dma_data_direction);
  95. if (!arch_is_coherent())
  96. ___dma_page_dev_to_cpu(page, off, size, dir);
  97. }
  98. extern int dma_supported(struct device *, u64);
  99. extern int dma_set_mask(struct device *, u64);
  100. /*
  101. * DMA errors are defined by all-bits-set in the DMA address.
  102. */
  103. static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
  104. {
  105. return dma_addr == ~0;
  106. }
  107. /*
  108. * Dummy noncoherent implementation. We don't provide a dma_cache_sync
  109. * function so drivers using this API are highlighted with build warnings.
  110. */
  111. static inline void *dma_alloc_noncoherent(struct device *dev, size_t size,
  112. dma_addr_t *handle, gfp_t gfp)
  113. {
  114. return NULL;
  115. }
  116. static inline void dma_free_noncoherent(struct device *dev, size_t size,
  117. void *cpu_addr, dma_addr_t handle)
  118. {
  119. }
  120. /**
  121. * dma_alloc_coherent - allocate consistent memory for DMA
  122. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  123. * @size: required memory size
  124. * @handle: bus-specific DMA address
  125. *
  126. * Allocate some uncached, unbuffered memory for a device for
  127. * performing DMA. This function allocates pages, and will
  128. * return the CPU-viewed address, and sets @handle to be the
  129. * device-viewed address.
  130. */
  131. extern void *dma_alloc_coherent(struct device *, size_t, dma_addr_t *, gfp_t);
  132. /**
  133. * dma_free_coherent - free memory allocated by dma_alloc_coherent
  134. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  135. * @size: size of memory originally requested in dma_alloc_coherent
  136. * @cpu_addr: CPU-view address returned from dma_alloc_coherent
  137. * @handle: device-view address returned from dma_alloc_coherent
  138. *
  139. * Free (and unmap) a DMA buffer previously allocated by
  140. * dma_alloc_coherent().
  141. *
  142. * References to memory and mappings associated with cpu_addr/handle
  143. * during and after this call executing are illegal.
  144. */
  145. extern void dma_free_coherent(struct device *, size_t, void *, dma_addr_t);
  146. /**
  147. * dma_mmap_coherent - map a coherent DMA allocation into user space
  148. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  149. * @vma: vm_area_struct describing requested user mapping
  150. * @cpu_addr: kernel CPU-view address returned from dma_alloc_coherent
  151. * @handle: device-view address returned from dma_alloc_coherent
  152. * @size: size of memory originally requested in dma_alloc_coherent
  153. *
  154. * Map a coherent DMA buffer previously allocated by dma_alloc_coherent
  155. * into user space. The coherent DMA buffer must not be freed by the
  156. * driver until the user space mapping has been released.
  157. */
  158. int dma_mmap_coherent(struct device *, struct vm_area_struct *,
  159. void *, dma_addr_t, size_t);
  160. /**
  161. * dma_alloc_writecombine - allocate writecombining memory for DMA
  162. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  163. * @size: required memory size
  164. * @handle: bus-specific DMA address
  165. *
  166. * Allocate some uncached, buffered memory for a device for
  167. * performing DMA. This function allocates pages, and will
  168. * return the CPU-viewed address, and sets @handle to be the
  169. * device-viewed address.
  170. */
  171. extern void *dma_alloc_writecombine(struct device *, size_t, dma_addr_t *,
  172. gfp_t);
  173. #define dma_free_writecombine(dev,size,cpu_addr,handle) \
  174. dma_free_coherent(dev,size,cpu_addr,handle)
  175. int dma_mmap_writecombine(struct device *, struct vm_area_struct *,
  176. void *, dma_addr_t, size_t);
  177. #ifdef CONFIG_DMABOUNCE
  178. /*
  179. * For SA-1111, IXP425, and ADI systems the dma-mapping functions are "magic"
  180. * and utilize bounce buffers as needed to work around limited DMA windows.
  181. *
  182. * On the SA-1111, a bug limits DMA to only certain regions of RAM.
  183. * On the IXP425, the PCI inbound window is 64MB (256MB total RAM)
  184. * On some ADI engineering systems, PCI inbound window is 32MB (12MB total RAM)
  185. *
  186. * The following are helper functions used by the dmabounce subystem
  187. *
  188. */
  189. /**
  190. * dmabounce_register_dev
  191. *
  192. * @dev: valid struct device pointer
  193. * @small_buf_size: size of buffers to use with small buffer pool
  194. * @large_buf_size: size of buffers to use with large buffer pool (can be 0)
  195. * @needs_bounce_fn: called to determine whether buffer needs bouncing
  196. *
  197. * This function should be called by low-level platform code to register
  198. * a device as requireing DMA buffer bouncing. The function will allocate
  199. * appropriate DMA pools for the device.
  200. */
  201. extern int dmabounce_register_dev(struct device *, unsigned long,
  202. unsigned long, int (*)(struct device *, dma_addr_t, size_t));
  203. /**
  204. * dmabounce_unregister_dev
  205. *
  206. * @dev: valid struct device pointer
  207. *
  208. * This function should be called by low-level platform code when device
  209. * that was previously registered with dmabounce_register_dev is removed
  210. * from the system.
  211. *
  212. */
  213. extern void dmabounce_unregister_dev(struct device *);
  214. /*
  215. * The DMA API, implemented by dmabounce.c. See below for descriptions.
  216. */
  217. extern dma_addr_t __dma_map_page(struct device *, struct page *,
  218. unsigned long, size_t, enum dma_data_direction);
  219. extern void __dma_unmap_page(struct device *, dma_addr_t, size_t,
  220. enum dma_data_direction);
  221. /*
  222. * Private functions
  223. */
  224. int dmabounce_sync_for_cpu(struct device *, dma_addr_t, unsigned long,
  225. size_t, enum dma_data_direction);
  226. int dmabounce_sync_for_device(struct device *, dma_addr_t, unsigned long,
  227. size_t, enum dma_data_direction);
  228. #else
  229. static inline int dmabounce_sync_for_cpu(struct device *d, dma_addr_t addr,
  230. unsigned long offset, size_t size, enum dma_data_direction dir)
  231. {
  232. return 1;
  233. }
  234. static inline int dmabounce_sync_for_device(struct device *d, dma_addr_t addr,
  235. unsigned long offset, size_t size, enum dma_data_direction dir)
  236. {
  237. return 1;
  238. }
  239. static inline dma_addr_t __dma_map_page(struct device *dev, struct page *page,
  240. unsigned long offset, size_t size, enum dma_data_direction dir)
  241. {
  242. __dma_page_cpu_to_dev(page, offset, size, dir);
  243. return pfn_to_dma(dev, page_to_pfn(page)) + offset;
  244. }
  245. static inline void __dma_unmap_page(struct device *dev, dma_addr_t handle,
  246. size_t size, enum dma_data_direction dir)
  247. {
  248. __dma_page_dev_to_cpu(pfn_to_page(dma_to_pfn(dev, handle)),
  249. handle & ~PAGE_MASK, size, dir);
  250. }
  251. #endif /* CONFIG_DMABOUNCE */
  252. /**
  253. * dma_map_single - map a single buffer for streaming DMA
  254. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  255. * @cpu_addr: CPU direct mapped address of buffer
  256. * @size: size of buffer to map
  257. * @dir: DMA transfer direction
  258. *
  259. * Ensure that any data held in the cache is appropriately discarded
  260. * or written back.
  261. *
  262. * The device owns this memory once this call has completed. The CPU
  263. * can regain ownership by calling dma_unmap_single() or
  264. * dma_sync_single_for_cpu().
  265. */
  266. static inline dma_addr_t dma_map_single(struct device *dev, void *cpu_addr,
  267. size_t size, enum dma_data_direction dir)
  268. {
  269. unsigned long offset;
  270. struct page *page;
  271. dma_addr_t addr;
  272. BUG_ON(!virt_addr_valid(cpu_addr));
  273. BUG_ON(!virt_addr_valid(cpu_addr + size - 1));
  274. BUG_ON(!valid_dma_direction(dir));
  275. page = virt_to_page(cpu_addr);
  276. offset = (unsigned long)cpu_addr & ~PAGE_MASK;
  277. addr = __dma_map_page(dev, page, offset, size, dir);
  278. debug_dma_map_page(dev, page, offset, size, dir, addr, true);
  279. return addr;
  280. }
  281. /**
  282. * dma_map_page - map a portion of a page for streaming DMA
  283. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  284. * @page: page that buffer resides in
  285. * @offset: offset into page for start of buffer
  286. * @size: size of buffer to map
  287. * @dir: DMA transfer direction
  288. *
  289. * Ensure that any data held in the cache is appropriately discarded
  290. * or written back.
  291. *
  292. * The device owns this memory once this call has completed. The CPU
  293. * can regain ownership by calling dma_unmap_page().
  294. */
  295. static inline dma_addr_t dma_map_page(struct device *dev, struct page *page,
  296. unsigned long offset, size_t size, enum dma_data_direction dir)
  297. {
  298. dma_addr_t addr;
  299. BUG_ON(!valid_dma_direction(dir));
  300. addr = __dma_map_page(dev, page, offset, size, dir);
  301. debug_dma_map_page(dev, page, offset, size, dir, addr, false);
  302. return addr;
  303. }
  304. /**
  305. * dma_unmap_single - unmap a single buffer previously mapped
  306. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  307. * @handle: DMA address of buffer
  308. * @size: size of buffer (same as passed to dma_map_single)
  309. * @dir: DMA transfer direction (same as passed to dma_map_single)
  310. *
  311. * Unmap a single streaming mode DMA translation. The handle and size
  312. * must match what was provided in the previous dma_map_single() call.
  313. * All other usages are undefined.
  314. *
  315. * After this call, reads by the CPU to the buffer are guaranteed to see
  316. * whatever the device wrote there.
  317. */
  318. static inline void dma_unmap_single(struct device *dev, dma_addr_t handle,
  319. size_t size, enum dma_data_direction dir)
  320. {
  321. debug_dma_unmap_page(dev, handle, size, dir, true);
  322. __dma_unmap_page(dev, handle, size, dir);
  323. }
  324. /**
  325. * dma_unmap_page - unmap a buffer previously mapped through dma_map_page()
  326. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  327. * @handle: DMA address of buffer
  328. * @size: size of buffer (same as passed to dma_map_page)
  329. * @dir: DMA transfer direction (same as passed to dma_map_page)
  330. *
  331. * Unmap a page streaming mode DMA translation. The handle and size
  332. * must match what was provided in the previous dma_map_page() call.
  333. * All other usages are undefined.
  334. *
  335. * After this call, reads by the CPU to the buffer are guaranteed to see
  336. * whatever the device wrote there.
  337. */
  338. static inline void dma_unmap_page(struct device *dev, dma_addr_t handle,
  339. size_t size, enum dma_data_direction dir)
  340. {
  341. debug_dma_unmap_page(dev, handle, size, dir, false);
  342. __dma_unmap_page(dev, handle, size, dir);
  343. }
  344. /**
  345. * dma_sync_single_range_for_cpu
  346. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  347. * @handle: DMA address of buffer
  348. * @offset: offset of region to start sync
  349. * @size: size of region to sync
  350. * @dir: DMA transfer direction (same as passed to dma_map_single)
  351. *
  352. * Make physical memory consistent for a single streaming mode DMA
  353. * translation after a transfer.
  354. *
  355. * If you perform a dma_map_single() but wish to interrogate the
  356. * buffer using the cpu, yet do not wish to teardown the PCI dma
  357. * mapping, you must call this function before doing so. At the
  358. * next point you give the PCI dma address back to the card, you
  359. * must first the perform a dma_sync_for_device, and then the
  360. * device again owns the buffer.
  361. */
  362. static inline void dma_sync_single_range_for_cpu(struct device *dev,
  363. dma_addr_t handle, unsigned long offset, size_t size,
  364. enum dma_data_direction dir)
  365. {
  366. BUG_ON(!valid_dma_direction(dir));
  367. debug_dma_sync_single_for_cpu(dev, handle + offset, size, dir);
  368. if (!dmabounce_sync_for_cpu(dev, handle, offset, size, dir))
  369. return;
  370. __dma_single_dev_to_cpu(dma_to_virt(dev, handle) + offset, size, dir);
  371. }
  372. static inline void dma_sync_single_range_for_device(struct device *dev,
  373. dma_addr_t handle, unsigned long offset, size_t size,
  374. enum dma_data_direction dir)
  375. {
  376. BUG_ON(!valid_dma_direction(dir));
  377. debug_dma_sync_single_for_device(dev, handle + offset, size, dir);
  378. if (!dmabounce_sync_for_device(dev, handle, offset, size, dir))
  379. return;
  380. __dma_single_cpu_to_dev(dma_to_virt(dev, handle) + offset, size, dir);
  381. }
  382. static inline void dma_sync_single_for_cpu(struct device *dev,
  383. dma_addr_t handle, size_t size, enum dma_data_direction dir)
  384. {
  385. dma_sync_single_range_for_cpu(dev, handle, 0, size, dir);
  386. }
  387. static inline void dma_sync_single_for_device(struct device *dev,
  388. dma_addr_t handle, size_t size, enum dma_data_direction dir)
  389. {
  390. dma_sync_single_range_for_device(dev, handle, 0, size, dir);
  391. }
  392. /*
  393. * The scatter list versions of the above methods.
  394. */
  395. extern int dma_map_sg(struct device *, struct scatterlist *, int,
  396. enum dma_data_direction);
  397. extern void dma_unmap_sg(struct device *, struct scatterlist *, int,
  398. enum dma_data_direction);
  399. extern void dma_sync_sg_for_cpu(struct device *, struct scatterlist *, int,
  400. enum dma_data_direction);
  401. extern void dma_sync_sg_for_device(struct device *, struct scatterlist *, int,
  402. enum dma_data_direction);
  403. #endif /* __KERNEL__ */
  404. #endif