traps.c 30 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167
  1. /*
  2. * linux/arch/i386/traps.c
  3. *
  4. * Copyright (C) 1991, 1992 Linus Torvalds
  5. *
  6. * Pentium III FXSR, SSE support
  7. * Gareth Hughes <gareth@valinux.com>, May 2000
  8. */
  9. /*
  10. * 'Traps.c' handles hardware traps and faults after we have saved some
  11. * state in 'asm.s'.
  12. */
  13. #include <linux/config.h>
  14. #include <linux/sched.h>
  15. #include <linux/kernel.h>
  16. #include <linux/string.h>
  17. #include <linux/errno.h>
  18. #include <linux/timer.h>
  19. #include <linux/mm.h>
  20. #include <linux/init.h>
  21. #include <linux/delay.h>
  22. #include <linux/spinlock.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/highmem.h>
  25. #include <linux/kallsyms.h>
  26. #include <linux/ptrace.h>
  27. #include <linux/utsname.h>
  28. #include <linux/kprobes.h>
  29. #include <linux/kexec.h>
  30. #ifdef CONFIG_EISA
  31. #include <linux/ioport.h>
  32. #include <linux/eisa.h>
  33. #endif
  34. #ifdef CONFIG_MCA
  35. #include <linux/mca.h>
  36. #endif
  37. #include <asm/processor.h>
  38. #include <asm/system.h>
  39. #include <asm/uaccess.h>
  40. #include <asm/io.h>
  41. #include <asm/atomic.h>
  42. #include <asm/debugreg.h>
  43. #include <asm/desc.h>
  44. #include <asm/i387.h>
  45. #include <asm/nmi.h>
  46. #include <asm/smp.h>
  47. #include <asm/arch_hooks.h>
  48. #include <asm/kdebug.h>
  49. #include <linux/module.h>
  50. #include "mach_traps.h"
  51. asmlinkage int system_call(void);
  52. struct desc_struct default_ldt[] = { { 0, 0 }, { 0, 0 }, { 0, 0 },
  53. { 0, 0 }, { 0, 0 } };
  54. /* Do we ignore FPU interrupts ? */
  55. char ignore_fpu_irq = 0;
  56. /*
  57. * The IDT has to be page-aligned to simplify the Pentium
  58. * F0 0F bug workaround.. We have a special link segment
  59. * for this.
  60. */
  61. struct desc_struct idt_table[256] __attribute__((__section__(".data.idt"))) = { {0, 0}, };
  62. asmlinkage void divide_error(void);
  63. asmlinkage void debug(void);
  64. asmlinkage void nmi(void);
  65. asmlinkage void int3(void);
  66. asmlinkage void overflow(void);
  67. asmlinkage void bounds(void);
  68. asmlinkage void invalid_op(void);
  69. asmlinkage void device_not_available(void);
  70. asmlinkage void coprocessor_segment_overrun(void);
  71. asmlinkage void invalid_TSS(void);
  72. asmlinkage void segment_not_present(void);
  73. asmlinkage void stack_segment(void);
  74. asmlinkage void general_protection(void);
  75. asmlinkage void page_fault(void);
  76. asmlinkage void coprocessor_error(void);
  77. asmlinkage void simd_coprocessor_error(void);
  78. asmlinkage void alignment_check(void);
  79. asmlinkage void spurious_interrupt_bug(void);
  80. asmlinkage void machine_check(void);
  81. static int kstack_depth_to_print = 24;
  82. struct notifier_block *i386die_chain;
  83. static DEFINE_SPINLOCK(die_notifier_lock);
  84. int register_die_notifier(struct notifier_block *nb)
  85. {
  86. int err = 0;
  87. unsigned long flags;
  88. spin_lock_irqsave(&die_notifier_lock, flags);
  89. err = notifier_chain_register(&i386die_chain, nb);
  90. spin_unlock_irqrestore(&die_notifier_lock, flags);
  91. return err;
  92. }
  93. EXPORT_SYMBOL(register_die_notifier);
  94. static inline int valid_stack_ptr(struct thread_info *tinfo, void *p)
  95. {
  96. return p > (void *)tinfo &&
  97. p < (void *)tinfo + THREAD_SIZE - 3;
  98. }
  99. static void print_addr_and_symbol(unsigned long addr, char *log_lvl)
  100. {
  101. printk(log_lvl);
  102. printk(" [<%08lx>] ", addr);
  103. print_symbol("%s", addr);
  104. printk("\n");
  105. }
  106. static inline unsigned long print_context_stack(struct thread_info *tinfo,
  107. unsigned long *stack, unsigned long ebp,
  108. char *log_lvl)
  109. {
  110. unsigned long addr;
  111. #ifdef CONFIG_FRAME_POINTER
  112. while (valid_stack_ptr(tinfo, (void *)ebp)) {
  113. addr = *(unsigned long *)(ebp + 4);
  114. print_addr_and_symbol(addr, log_lvl);
  115. ebp = *(unsigned long *)ebp;
  116. }
  117. #else
  118. while (valid_stack_ptr(tinfo, stack)) {
  119. addr = *stack++;
  120. if (__kernel_text_address(addr))
  121. print_addr_and_symbol(addr, log_lvl);
  122. }
  123. #endif
  124. return ebp;
  125. }
  126. static void show_trace_log_lvl(struct task_struct *task,
  127. unsigned long *stack, char *log_lvl)
  128. {
  129. unsigned long ebp;
  130. if (!task)
  131. task = current;
  132. if (task == current) {
  133. /* Grab ebp right from our regs */
  134. asm ("movl %%ebp, %0" : "=r" (ebp) : );
  135. } else {
  136. /* ebp is the last reg pushed by switch_to */
  137. ebp = *(unsigned long *) task->thread.esp;
  138. }
  139. while (1) {
  140. struct thread_info *context;
  141. context = (struct thread_info *)
  142. ((unsigned long)stack & (~(THREAD_SIZE - 1)));
  143. ebp = print_context_stack(context, stack, ebp, log_lvl);
  144. stack = (unsigned long*)context->previous_esp;
  145. if (!stack)
  146. break;
  147. printk(log_lvl);
  148. printk(" =======================\n");
  149. }
  150. }
  151. void show_trace(struct task_struct *task, unsigned long * stack)
  152. {
  153. show_trace_log_lvl(task, stack, "");
  154. }
  155. static void show_stack_log_lvl(struct task_struct *task, unsigned long *esp,
  156. char *log_lvl)
  157. {
  158. unsigned long *stack;
  159. int i;
  160. if (esp == NULL) {
  161. if (task)
  162. esp = (unsigned long*)task->thread.esp;
  163. else
  164. esp = (unsigned long *)&esp;
  165. }
  166. stack = esp;
  167. printk(log_lvl);
  168. for(i = 0; i < kstack_depth_to_print; i++) {
  169. if (kstack_end(stack))
  170. break;
  171. if (i && ((i % 8) == 0)) {
  172. printk("\n");
  173. printk(log_lvl);
  174. printk(" ");
  175. }
  176. printk("%08lx ", *stack++);
  177. }
  178. printk("\n");
  179. printk(log_lvl);
  180. printk("Call Trace:\n");
  181. show_trace_log_lvl(task, esp, log_lvl);
  182. }
  183. void show_stack(struct task_struct *task, unsigned long *esp)
  184. {
  185. show_stack_log_lvl(task, esp, "");
  186. }
  187. /*
  188. * The architecture-independent dump_stack generator
  189. */
  190. void dump_stack(void)
  191. {
  192. unsigned long stack;
  193. show_trace(current, &stack);
  194. }
  195. EXPORT_SYMBOL(dump_stack);
  196. void show_registers(struct pt_regs *regs)
  197. {
  198. int i;
  199. int in_kernel = 1;
  200. unsigned long esp;
  201. unsigned short ss;
  202. esp = (unsigned long) (&regs->esp);
  203. savesegment(ss, ss);
  204. if (user_mode(regs)) {
  205. in_kernel = 0;
  206. esp = regs->esp;
  207. ss = regs->xss & 0xffff;
  208. }
  209. print_modules();
  210. printk(KERN_EMERG "CPU: %d\nEIP: %04x:[<%08lx>] %s VLI\n"
  211. "EFLAGS: %08lx (%s) \n",
  212. smp_processor_id(), 0xffff & regs->xcs, regs->eip,
  213. print_tainted(), regs->eflags, system_utsname.release);
  214. print_symbol(KERN_EMERG "EIP is at %s\n", regs->eip);
  215. printk(KERN_EMERG "eax: %08lx ebx: %08lx ecx: %08lx edx: %08lx\n",
  216. regs->eax, regs->ebx, regs->ecx, regs->edx);
  217. printk(KERN_EMERG "esi: %08lx edi: %08lx ebp: %08lx esp: %08lx\n",
  218. regs->esi, regs->edi, regs->ebp, esp);
  219. printk(KERN_EMERG "ds: %04x es: %04x ss: %04x\n",
  220. regs->xds & 0xffff, regs->xes & 0xffff, ss);
  221. printk(KERN_EMERG "Process %s (pid: %d, threadinfo=%p task=%p)",
  222. current->comm, current->pid, current_thread_info(), current);
  223. /*
  224. * When in-kernel, we also print out the stack and code at the
  225. * time of the fault..
  226. */
  227. if (in_kernel) {
  228. u8 __user *eip;
  229. printk("\n" KERN_EMERG "Stack: ");
  230. show_stack_log_lvl(NULL, (unsigned long *)esp, KERN_EMERG);
  231. printk(KERN_EMERG "Code: ");
  232. eip = (u8 __user *)regs->eip - 43;
  233. for (i = 0; i < 64; i++, eip++) {
  234. unsigned char c;
  235. if (eip < (u8 __user *)PAGE_OFFSET || __get_user(c, eip)) {
  236. printk(" Bad EIP value.");
  237. break;
  238. }
  239. if (eip == (u8 __user *)regs->eip)
  240. printk("<%02x> ", c);
  241. else
  242. printk("%02x ", c);
  243. }
  244. }
  245. printk("\n");
  246. }
  247. static void handle_BUG(struct pt_regs *regs)
  248. {
  249. unsigned short ud2;
  250. unsigned short line;
  251. char *file;
  252. char c;
  253. unsigned long eip;
  254. eip = regs->eip;
  255. if (eip < PAGE_OFFSET)
  256. goto no_bug;
  257. if (__get_user(ud2, (unsigned short __user *)eip))
  258. goto no_bug;
  259. if (ud2 != 0x0b0f)
  260. goto no_bug;
  261. if (__get_user(line, (unsigned short __user *)(eip + 2)))
  262. goto bug;
  263. if (__get_user(file, (char * __user *)(eip + 4)) ||
  264. (unsigned long)file < PAGE_OFFSET || __get_user(c, file))
  265. file = "<bad filename>";
  266. printk(KERN_EMERG "------------[ cut here ]------------\n");
  267. printk(KERN_EMERG "kernel BUG at %s:%d!\n", file, line);
  268. no_bug:
  269. return;
  270. /* Here we know it was a BUG but file-n-line is unavailable */
  271. bug:
  272. printk(KERN_EMERG "Kernel BUG\n");
  273. }
  274. /* This is gone through when something in the kernel
  275. * has done something bad and is about to be terminated.
  276. */
  277. void die(const char * str, struct pt_regs * regs, long err)
  278. {
  279. static struct {
  280. spinlock_t lock;
  281. u32 lock_owner;
  282. int lock_owner_depth;
  283. } die = {
  284. .lock = SPIN_LOCK_UNLOCKED,
  285. .lock_owner = -1,
  286. .lock_owner_depth = 0
  287. };
  288. static int die_counter;
  289. unsigned long flags;
  290. if (die.lock_owner != raw_smp_processor_id()) {
  291. console_verbose();
  292. spin_lock_irqsave(&die.lock, flags);
  293. die.lock_owner = smp_processor_id();
  294. die.lock_owner_depth = 0;
  295. bust_spinlocks(1);
  296. }
  297. else
  298. local_save_flags(flags);
  299. if (++die.lock_owner_depth < 3) {
  300. int nl = 0;
  301. handle_BUG(regs);
  302. printk(KERN_EMERG "%s: %04lx [#%d]\n", str, err & 0xffff, ++die_counter);
  303. #ifdef CONFIG_PREEMPT
  304. printk(KERN_EMERG "PREEMPT ");
  305. nl = 1;
  306. #endif
  307. #ifdef CONFIG_SMP
  308. if (!nl)
  309. printk(KERN_EMERG);
  310. printk("SMP ");
  311. nl = 1;
  312. #endif
  313. #ifdef CONFIG_DEBUG_PAGEALLOC
  314. if (!nl)
  315. printk(KERN_EMERG);
  316. printk("DEBUG_PAGEALLOC");
  317. nl = 1;
  318. #endif
  319. if (nl)
  320. printk("\n");
  321. notify_die(DIE_OOPS, (char *)str, regs, err, 255, SIGSEGV);
  322. show_registers(regs);
  323. } else
  324. printk(KERN_EMERG "Recursive die() failure, output suppressed\n");
  325. bust_spinlocks(0);
  326. die.lock_owner = -1;
  327. spin_unlock_irqrestore(&die.lock, flags);
  328. if (kexec_should_crash(current))
  329. crash_kexec(regs);
  330. if (in_interrupt())
  331. panic("Fatal exception in interrupt");
  332. if (panic_on_oops) {
  333. printk(KERN_EMERG "Fatal exception: panic in 5 seconds\n");
  334. ssleep(5);
  335. panic("Fatal exception");
  336. }
  337. do_exit(SIGSEGV);
  338. }
  339. static inline void die_if_kernel(const char * str, struct pt_regs * regs, long err)
  340. {
  341. if (!user_mode_vm(regs))
  342. die(str, regs, err);
  343. }
  344. static void __kprobes do_trap(int trapnr, int signr, char *str, int vm86,
  345. struct pt_regs * regs, long error_code,
  346. siginfo_t *info)
  347. {
  348. struct task_struct *tsk = current;
  349. tsk->thread.error_code = error_code;
  350. tsk->thread.trap_no = trapnr;
  351. if (regs->eflags & VM_MASK) {
  352. if (vm86)
  353. goto vm86_trap;
  354. goto trap_signal;
  355. }
  356. if (!user_mode(regs))
  357. goto kernel_trap;
  358. trap_signal: {
  359. if (info)
  360. force_sig_info(signr, info, tsk);
  361. else
  362. force_sig(signr, tsk);
  363. return;
  364. }
  365. kernel_trap: {
  366. if (!fixup_exception(regs))
  367. die(str, regs, error_code);
  368. return;
  369. }
  370. vm86_trap: {
  371. int ret = handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code, trapnr);
  372. if (ret) goto trap_signal;
  373. return;
  374. }
  375. }
  376. #define DO_ERROR(trapnr, signr, str, name) \
  377. fastcall void do_##name(struct pt_regs * regs, long error_code) \
  378. { \
  379. if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \
  380. == NOTIFY_STOP) \
  381. return; \
  382. do_trap(trapnr, signr, str, 0, regs, error_code, NULL); \
  383. }
  384. #define DO_ERROR_INFO(trapnr, signr, str, name, sicode, siaddr) \
  385. fastcall void do_##name(struct pt_regs * regs, long error_code) \
  386. { \
  387. siginfo_t info; \
  388. info.si_signo = signr; \
  389. info.si_errno = 0; \
  390. info.si_code = sicode; \
  391. info.si_addr = (void __user *)siaddr; \
  392. if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \
  393. == NOTIFY_STOP) \
  394. return; \
  395. do_trap(trapnr, signr, str, 0, regs, error_code, &info); \
  396. }
  397. #define DO_VM86_ERROR(trapnr, signr, str, name) \
  398. fastcall void do_##name(struct pt_regs * regs, long error_code) \
  399. { \
  400. if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \
  401. == NOTIFY_STOP) \
  402. return; \
  403. do_trap(trapnr, signr, str, 1, regs, error_code, NULL); \
  404. }
  405. #define DO_VM86_ERROR_INFO(trapnr, signr, str, name, sicode, siaddr) \
  406. fastcall void do_##name(struct pt_regs * regs, long error_code) \
  407. { \
  408. siginfo_t info; \
  409. info.si_signo = signr; \
  410. info.si_errno = 0; \
  411. info.si_code = sicode; \
  412. info.si_addr = (void __user *)siaddr; \
  413. if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \
  414. == NOTIFY_STOP) \
  415. return; \
  416. do_trap(trapnr, signr, str, 1, regs, error_code, &info); \
  417. }
  418. DO_VM86_ERROR_INFO( 0, SIGFPE, "divide error", divide_error, FPE_INTDIV, regs->eip)
  419. #ifndef CONFIG_KPROBES
  420. DO_VM86_ERROR( 3, SIGTRAP, "int3", int3)
  421. #endif
  422. DO_VM86_ERROR( 4, SIGSEGV, "overflow", overflow)
  423. DO_VM86_ERROR( 5, SIGSEGV, "bounds", bounds)
  424. DO_ERROR_INFO( 6, SIGILL, "invalid opcode", invalid_op, ILL_ILLOPN, regs->eip)
  425. DO_ERROR( 9, SIGFPE, "coprocessor segment overrun", coprocessor_segment_overrun)
  426. DO_ERROR(10, SIGSEGV, "invalid TSS", invalid_TSS)
  427. DO_ERROR(11, SIGBUS, "segment not present", segment_not_present)
  428. DO_ERROR(12, SIGBUS, "stack segment", stack_segment)
  429. DO_ERROR_INFO(17, SIGBUS, "alignment check", alignment_check, BUS_ADRALN, 0)
  430. DO_ERROR_INFO(32, SIGSEGV, "iret exception", iret_error, ILL_BADSTK, 0)
  431. fastcall void __kprobes do_general_protection(struct pt_regs * regs,
  432. long error_code)
  433. {
  434. int cpu = get_cpu();
  435. struct tss_struct *tss = &per_cpu(init_tss, cpu);
  436. struct thread_struct *thread = &current->thread;
  437. /*
  438. * Perform the lazy TSS's I/O bitmap copy. If the TSS has an
  439. * invalid offset set (the LAZY one) and the faulting thread has
  440. * a valid I/O bitmap pointer, we copy the I/O bitmap in the TSS
  441. * and we set the offset field correctly. Then we let the CPU to
  442. * restart the faulting instruction.
  443. */
  444. if (tss->io_bitmap_base == INVALID_IO_BITMAP_OFFSET_LAZY &&
  445. thread->io_bitmap_ptr) {
  446. memcpy(tss->io_bitmap, thread->io_bitmap_ptr,
  447. thread->io_bitmap_max);
  448. /*
  449. * If the previously set map was extending to higher ports
  450. * than the current one, pad extra space with 0xff (no access).
  451. */
  452. if (thread->io_bitmap_max < tss->io_bitmap_max)
  453. memset((char *) tss->io_bitmap +
  454. thread->io_bitmap_max, 0xff,
  455. tss->io_bitmap_max - thread->io_bitmap_max);
  456. tss->io_bitmap_max = thread->io_bitmap_max;
  457. tss->io_bitmap_base = IO_BITMAP_OFFSET;
  458. tss->io_bitmap_owner = thread;
  459. put_cpu();
  460. return;
  461. }
  462. put_cpu();
  463. current->thread.error_code = error_code;
  464. current->thread.trap_no = 13;
  465. if (regs->eflags & VM_MASK)
  466. goto gp_in_vm86;
  467. if (!user_mode(regs))
  468. goto gp_in_kernel;
  469. current->thread.error_code = error_code;
  470. current->thread.trap_no = 13;
  471. force_sig(SIGSEGV, current);
  472. return;
  473. gp_in_vm86:
  474. local_irq_enable();
  475. handle_vm86_fault((struct kernel_vm86_regs *) regs, error_code);
  476. return;
  477. gp_in_kernel:
  478. if (!fixup_exception(regs)) {
  479. if (notify_die(DIE_GPF, "general protection fault", regs,
  480. error_code, 13, SIGSEGV) == NOTIFY_STOP)
  481. return;
  482. die("general protection fault", regs, error_code);
  483. }
  484. }
  485. static void mem_parity_error(unsigned char reason, struct pt_regs * regs)
  486. {
  487. printk(KERN_EMERG "Uhhuh. NMI received. Dazed and confused, but trying "
  488. "to continue\n");
  489. printk(KERN_EMERG "You probably have a hardware problem with your RAM "
  490. "chips\n");
  491. /* Clear and disable the memory parity error line. */
  492. clear_mem_error(reason);
  493. }
  494. static void io_check_error(unsigned char reason, struct pt_regs * regs)
  495. {
  496. unsigned long i;
  497. printk(KERN_EMERG "NMI: IOCK error (debug interrupt?)\n");
  498. show_registers(regs);
  499. /* Re-enable the IOCK line, wait for a few seconds */
  500. reason = (reason & 0xf) | 8;
  501. outb(reason, 0x61);
  502. i = 2000;
  503. while (--i) udelay(1000);
  504. reason &= ~8;
  505. outb(reason, 0x61);
  506. }
  507. static void unknown_nmi_error(unsigned char reason, struct pt_regs * regs)
  508. {
  509. #ifdef CONFIG_MCA
  510. /* Might actually be able to figure out what the guilty party
  511. * is. */
  512. if( MCA_bus ) {
  513. mca_handle_nmi();
  514. return;
  515. }
  516. #endif
  517. printk("Uhhuh. NMI received for unknown reason %02x on CPU %d.\n",
  518. reason, smp_processor_id());
  519. printk("Dazed and confused, but trying to continue\n");
  520. printk("Do you have a strange power saving mode enabled?\n");
  521. }
  522. static DEFINE_SPINLOCK(nmi_print_lock);
  523. void die_nmi (struct pt_regs *regs, const char *msg)
  524. {
  525. if (notify_die(DIE_NMIWATCHDOG, msg, regs, 0, 0, SIGINT) ==
  526. NOTIFY_STOP)
  527. return;
  528. spin_lock(&nmi_print_lock);
  529. /*
  530. * We are in trouble anyway, lets at least try
  531. * to get a message out.
  532. */
  533. bust_spinlocks(1);
  534. printk(KERN_EMERG "%s", msg);
  535. printk(" on CPU%d, eip %08lx, registers:\n",
  536. smp_processor_id(), regs->eip);
  537. show_registers(regs);
  538. printk(KERN_EMERG "console shuts up ...\n");
  539. console_silent();
  540. spin_unlock(&nmi_print_lock);
  541. bust_spinlocks(0);
  542. /* If we are in kernel we are probably nested up pretty bad
  543. * and might aswell get out now while we still can.
  544. */
  545. if (!user_mode(regs)) {
  546. current->thread.trap_no = 2;
  547. crash_kexec(regs);
  548. }
  549. do_exit(SIGSEGV);
  550. }
  551. static void default_do_nmi(struct pt_regs * regs)
  552. {
  553. unsigned char reason = 0;
  554. /* Only the BSP gets external NMIs from the system. */
  555. if (!smp_processor_id())
  556. reason = get_nmi_reason();
  557. if (!(reason & 0xc0)) {
  558. if (notify_die(DIE_NMI_IPI, "nmi_ipi", regs, reason, 0, SIGINT)
  559. == NOTIFY_STOP)
  560. return;
  561. #ifdef CONFIG_X86_LOCAL_APIC
  562. /*
  563. * Ok, so this is none of the documented NMI sources,
  564. * so it must be the NMI watchdog.
  565. */
  566. if (nmi_watchdog) {
  567. nmi_watchdog_tick(regs);
  568. return;
  569. }
  570. #endif
  571. unknown_nmi_error(reason, regs);
  572. return;
  573. }
  574. if (notify_die(DIE_NMI, "nmi", regs, reason, 0, SIGINT) == NOTIFY_STOP)
  575. return;
  576. if (reason & 0x80)
  577. mem_parity_error(reason, regs);
  578. if (reason & 0x40)
  579. io_check_error(reason, regs);
  580. /*
  581. * Reassert NMI in case it became active meanwhile
  582. * as it's edge-triggered.
  583. */
  584. reassert_nmi();
  585. }
  586. static int dummy_nmi_callback(struct pt_regs * regs, int cpu)
  587. {
  588. return 0;
  589. }
  590. static nmi_callback_t nmi_callback = dummy_nmi_callback;
  591. fastcall void do_nmi(struct pt_regs * regs, long error_code)
  592. {
  593. int cpu;
  594. nmi_enter();
  595. cpu = smp_processor_id();
  596. ++nmi_count(cpu);
  597. if (!rcu_dereference(nmi_callback)(regs, cpu))
  598. default_do_nmi(regs);
  599. nmi_exit();
  600. }
  601. void set_nmi_callback(nmi_callback_t callback)
  602. {
  603. rcu_assign_pointer(nmi_callback, callback);
  604. }
  605. EXPORT_SYMBOL_GPL(set_nmi_callback);
  606. void unset_nmi_callback(void)
  607. {
  608. nmi_callback = dummy_nmi_callback;
  609. }
  610. EXPORT_SYMBOL_GPL(unset_nmi_callback);
  611. #ifdef CONFIG_KPROBES
  612. fastcall void __kprobes do_int3(struct pt_regs *regs, long error_code)
  613. {
  614. if (notify_die(DIE_INT3, "int3", regs, error_code, 3, SIGTRAP)
  615. == NOTIFY_STOP)
  616. return;
  617. /* This is an interrupt gate, because kprobes wants interrupts
  618. disabled. Normal trap handlers don't. */
  619. restore_interrupts(regs);
  620. do_trap(3, SIGTRAP, "int3", 1, regs, error_code, NULL);
  621. }
  622. #endif
  623. /*
  624. * Our handling of the processor debug registers is non-trivial.
  625. * We do not clear them on entry and exit from the kernel. Therefore
  626. * it is possible to get a watchpoint trap here from inside the kernel.
  627. * However, the code in ./ptrace.c has ensured that the user can
  628. * only set watchpoints on userspace addresses. Therefore the in-kernel
  629. * watchpoint trap can only occur in code which is reading/writing
  630. * from user space. Such code must not hold kernel locks (since it
  631. * can equally take a page fault), therefore it is safe to call
  632. * force_sig_info even though that claims and releases locks.
  633. *
  634. * Code in ./signal.c ensures that the debug control register
  635. * is restored before we deliver any signal, and therefore that
  636. * user code runs with the correct debug control register even though
  637. * we clear it here.
  638. *
  639. * Being careful here means that we don't have to be as careful in a
  640. * lot of more complicated places (task switching can be a bit lazy
  641. * about restoring all the debug state, and ptrace doesn't have to
  642. * find every occurrence of the TF bit that could be saved away even
  643. * by user code)
  644. */
  645. fastcall void __kprobes do_debug(struct pt_regs * regs, long error_code)
  646. {
  647. unsigned int condition;
  648. struct task_struct *tsk = current;
  649. get_debugreg(condition, 6);
  650. if (notify_die(DIE_DEBUG, "debug", regs, condition, error_code,
  651. SIGTRAP) == NOTIFY_STOP)
  652. return;
  653. /* It's safe to allow irq's after DR6 has been saved */
  654. if (regs->eflags & X86_EFLAGS_IF)
  655. local_irq_enable();
  656. /* Mask out spurious debug traps due to lazy DR7 setting */
  657. if (condition & (DR_TRAP0|DR_TRAP1|DR_TRAP2|DR_TRAP3)) {
  658. if (!tsk->thread.debugreg[7])
  659. goto clear_dr7;
  660. }
  661. if (regs->eflags & VM_MASK)
  662. goto debug_vm86;
  663. /* Save debug status register where ptrace can see it */
  664. tsk->thread.debugreg[6] = condition;
  665. /*
  666. * Single-stepping through TF: make sure we ignore any events in
  667. * kernel space (but re-enable TF when returning to user mode).
  668. */
  669. if (condition & DR_STEP) {
  670. /*
  671. * We already checked v86 mode above, so we can
  672. * check for kernel mode by just checking the CPL
  673. * of CS.
  674. */
  675. if (!user_mode(regs))
  676. goto clear_TF_reenable;
  677. }
  678. /* Ok, finally something we can handle */
  679. send_sigtrap(tsk, regs, error_code);
  680. /* Disable additional traps. They'll be re-enabled when
  681. * the signal is delivered.
  682. */
  683. clear_dr7:
  684. set_debugreg(0, 7);
  685. return;
  686. debug_vm86:
  687. handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code, 1);
  688. return;
  689. clear_TF_reenable:
  690. set_tsk_thread_flag(tsk, TIF_SINGLESTEP);
  691. regs->eflags &= ~TF_MASK;
  692. return;
  693. }
  694. /*
  695. * Note that we play around with the 'TS' bit in an attempt to get
  696. * the correct behaviour even in the presence of the asynchronous
  697. * IRQ13 behaviour
  698. */
  699. void math_error(void __user *eip)
  700. {
  701. struct task_struct * task;
  702. siginfo_t info;
  703. unsigned short cwd, swd;
  704. /*
  705. * Save the info for the exception handler and clear the error.
  706. */
  707. task = current;
  708. save_init_fpu(task);
  709. task->thread.trap_no = 16;
  710. task->thread.error_code = 0;
  711. info.si_signo = SIGFPE;
  712. info.si_errno = 0;
  713. info.si_code = __SI_FAULT;
  714. info.si_addr = eip;
  715. /*
  716. * (~cwd & swd) will mask out exceptions that are not set to unmasked
  717. * status. 0x3f is the exception bits in these regs, 0x200 is the
  718. * C1 reg you need in case of a stack fault, 0x040 is the stack
  719. * fault bit. We should only be taking one exception at a time,
  720. * so if this combination doesn't produce any single exception,
  721. * then we have a bad program that isn't syncronizing its FPU usage
  722. * and it will suffer the consequences since we won't be able to
  723. * fully reproduce the context of the exception
  724. */
  725. cwd = get_fpu_cwd(task);
  726. swd = get_fpu_swd(task);
  727. switch (swd & ~cwd & 0x3f) {
  728. case 0x000: /* No unmasked exception */
  729. return;
  730. default: /* Multiple exceptions */
  731. break;
  732. case 0x001: /* Invalid Op */
  733. /*
  734. * swd & 0x240 == 0x040: Stack Underflow
  735. * swd & 0x240 == 0x240: Stack Overflow
  736. * User must clear the SF bit (0x40) if set
  737. */
  738. info.si_code = FPE_FLTINV;
  739. break;
  740. case 0x002: /* Denormalize */
  741. case 0x010: /* Underflow */
  742. info.si_code = FPE_FLTUND;
  743. break;
  744. case 0x004: /* Zero Divide */
  745. info.si_code = FPE_FLTDIV;
  746. break;
  747. case 0x008: /* Overflow */
  748. info.si_code = FPE_FLTOVF;
  749. break;
  750. case 0x020: /* Precision */
  751. info.si_code = FPE_FLTRES;
  752. break;
  753. }
  754. force_sig_info(SIGFPE, &info, task);
  755. }
  756. fastcall void do_coprocessor_error(struct pt_regs * regs, long error_code)
  757. {
  758. ignore_fpu_irq = 1;
  759. math_error((void __user *)regs->eip);
  760. }
  761. static void simd_math_error(void __user *eip)
  762. {
  763. struct task_struct * task;
  764. siginfo_t info;
  765. unsigned short mxcsr;
  766. /*
  767. * Save the info for the exception handler and clear the error.
  768. */
  769. task = current;
  770. save_init_fpu(task);
  771. task->thread.trap_no = 19;
  772. task->thread.error_code = 0;
  773. info.si_signo = SIGFPE;
  774. info.si_errno = 0;
  775. info.si_code = __SI_FAULT;
  776. info.si_addr = eip;
  777. /*
  778. * The SIMD FPU exceptions are handled a little differently, as there
  779. * is only a single status/control register. Thus, to determine which
  780. * unmasked exception was caught we must mask the exception mask bits
  781. * at 0x1f80, and then use these to mask the exception bits at 0x3f.
  782. */
  783. mxcsr = get_fpu_mxcsr(task);
  784. switch (~((mxcsr & 0x1f80) >> 7) & (mxcsr & 0x3f)) {
  785. case 0x000:
  786. default:
  787. break;
  788. case 0x001: /* Invalid Op */
  789. info.si_code = FPE_FLTINV;
  790. break;
  791. case 0x002: /* Denormalize */
  792. case 0x010: /* Underflow */
  793. info.si_code = FPE_FLTUND;
  794. break;
  795. case 0x004: /* Zero Divide */
  796. info.si_code = FPE_FLTDIV;
  797. break;
  798. case 0x008: /* Overflow */
  799. info.si_code = FPE_FLTOVF;
  800. break;
  801. case 0x020: /* Precision */
  802. info.si_code = FPE_FLTRES;
  803. break;
  804. }
  805. force_sig_info(SIGFPE, &info, task);
  806. }
  807. fastcall void do_simd_coprocessor_error(struct pt_regs * regs,
  808. long error_code)
  809. {
  810. if (cpu_has_xmm) {
  811. /* Handle SIMD FPU exceptions on PIII+ processors. */
  812. ignore_fpu_irq = 1;
  813. simd_math_error((void __user *)regs->eip);
  814. } else {
  815. /*
  816. * Handle strange cache flush from user space exception
  817. * in all other cases. This is undocumented behaviour.
  818. */
  819. if (regs->eflags & VM_MASK) {
  820. handle_vm86_fault((struct kernel_vm86_regs *)regs,
  821. error_code);
  822. return;
  823. }
  824. current->thread.trap_no = 19;
  825. current->thread.error_code = error_code;
  826. die_if_kernel("cache flush denied", regs, error_code);
  827. force_sig(SIGSEGV, current);
  828. }
  829. }
  830. fastcall void do_spurious_interrupt_bug(struct pt_regs * regs,
  831. long error_code)
  832. {
  833. #if 0
  834. /* No need to warn about this any longer. */
  835. printk("Ignoring P6 Local APIC Spurious Interrupt Bug...\n");
  836. #endif
  837. }
  838. fastcall void setup_x86_bogus_stack(unsigned char * stk)
  839. {
  840. unsigned long *switch16_ptr, *switch32_ptr;
  841. struct pt_regs *regs;
  842. unsigned long stack_top, stack_bot;
  843. unsigned short iret_frame16_off;
  844. int cpu = smp_processor_id();
  845. /* reserve the space on 32bit stack for the magic switch16 pointer */
  846. memmove(stk, stk + 8, sizeof(struct pt_regs));
  847. switch16_ptr = (unsigned long *)(stk + sizeof(struct pt_regs));
  848. regs = (struct pt_regs *)stk;
  849. /* now the switch32 on 16bit stack */
  850. stack_bot = (unsigned long)&per_cpu(cpu_16bit_stack, cpu);
  851. stack_top = stack_bot + CPU_16BIT_STACK_SIZE;
  852. switch32_ptr = (unsigned long *)(stack_top - 8);
  853. iret_frame16_off = CPU_16BIT_STACK_SIZE - 8 - 20;
  854. /* copy iret frame on 16bit stack */
  855. memcpy((void *)(stack_bot + iret_frame16_off), &regs->eip, 20);
  856. /* fill in the switch pointers */
  857. switch16_ptr[0] = (regs->esp & 0xffff0000) | iret_frame16_off;
  858. switch16_ptr[1] = __ESPFIX_SS;
  859. switch32_ptr[0] = (unsigned long)stk + sizeof(struct pt_regs) +
  860. 8 - CPU_16BIT_STACK_SIZE;
  861. switch32_ptr[1] = __KERNEL_DS;
  862. }
  863. fastcall unsigned char * fixup_x86_bogus_stack(unsigned short sp)
  864. {
  865. unsigned long *switch32_ptr;
  866. unsigned char *stack16, *stack32;
  867. unsigned long stack_top, stack_bot;
  868. int len;
  869. int cpu = smp_processor_id();
  870. stack_bot = (unsigned long)&per_cpu(cpu_16bit_stack, cpu);
  871. stack_top = stack_bot + CPU_16BIT_STACK_SIZE;
  872. switch32_ptr = (unsigned long *)(stack_top - 8);
  873. /* copy the data from 16bit stack to 32bit stack */
  874. len = CPU_16BIT_STACK_SIZE - 8 - sp;
  875. stack16 = (unsigned char *)(stack_bot + sp);
  876. stack32 = (unsigned char *)
  877. (switch32_ptr[0] + CPU_16BIT_STACK_SIZE - 8 - len);
  878. memcpy(stack32, stack16, len);
  879. return stack32;
  880. }
  881. /*
  882. * 'math_state_restore()' saves the current math information in the
  883. * old math state array, and gets the new ones from the current task
  884. *
  885. * Careful.. There are problems with IBM-designed IRQ13 behaviour.
  886. * Don't touch unless you *really* know how it works.
  887. *
  888. * Must be called with kernel preemption disabled (in this case,
  889. * local interrupts are disabled at the call-site in entry.S).
  890. */
  891. asmlinkage void math_state_restore(struct pt_regs regs)
  892. {
  893. struct thread_info *thread = current_thread_info();
  894. struct task_struct *tsk = thread->task;
  895. clts(); /* Allow maths ops (or we recurse) */
  896. if (!tsk_used_math(tsk))
  897. init_fpu(tsk);
  898. restore_fpu(tsk);
  899. thread->status |= TS_USEDFPU; /* So we fnsave on switch_to() */
  900. }
  901. #ifndef CONFIG_MATH_EMULATION
  902. asmlinkage void math_emulate(long arg)
  903. {
  904. printk(KERN_EMERG "math-emulation not enabled and no coprocessor found.\n");
  905. printk(KERN_EMERG "killing %s.\n",current->comm);
  906. force_sig(SIGFPE,current);
  907. schedule();
  908. }
  909. #endif /* CONFIG_MATH_EMULATION */
  910. #ifdef CONFIG_X86_F00F_BUG
  911. void __init trap_init_f00f_bug(void)
  912. {
  913. __set_fixmap(FIX_F00F_IDT, __pa(&idt_table), PAGE_KERNEL_RO);
  914. /*
  915. * Update the IDT descriptor and reload the IDT so that
  916. * it uses the read-only mapped virtual address.
  917. */
  918. idt_descr.address = fix_to_virt(FIX_F00F_IDT);
  919. load_idt(&idt_descr);
  920. }
  921. #endif
  922. #define _set_gate(gate_addr,type,dpl,addr,seg) \
  923. do { \
  924. int __d0, __d1; \
  925. __asm__ __volatile__ ("movw %%dx,%%ax\n\t" \
  926. "movw %4,%%dx\n\t" \
  927. "movl %%eax,%0\n\t" \
  928. "movl %%edx,%1" \
  929. :"=m" (*((long *) (gate_addr))), \
  930. "=m" (*(1+(long *) (gate_addr))), "=&a" (__d0), "=&d" (__d1) \
  931. :"i" ((short) (0x8000+(dpl<<13)+(type<<8))), \
  932. "3" ((char *) (addr)),"2" ((seg) << 16)); \
  933. } while (0)
  934. /*
  935. * This needs to use 'idt_table' rather than 'idt', and
  936. * thus use the _nonmapped_ version of the IDT, as the
  937. * Pentium F0 0F bugfix can have resulted in the mapped
  938. * IDT being write-protected.
  939. */
  940. void set_intr_gate(unsigned int n, void *addr)
  941. {
  942. _set_gate(idt_table+n,14,0,addr,__KERNEL_CS);
  943. }
  944. /*
  945. * This routine sets up an interrupt gate at directory privilege level 3.
  946. */
  947. static inline void set_system_intr_gate(unsigned int n, void *addr)
  948. {
  949. _set_gate(idt_table+n, 14, 3, addr, __KERNEL_CS);
  950. }
  951. static void __init set_trap_gate(unsigned int n, void *addr)
  952. {
  953. _set_gate(idt_table+n,15,0,addr,__KERNEL_CS);
  954. }
  955. static void __init set_system_gate(unsigned int n, void *addr)
  956. {
  957. _set_gate(idt_table+n,15,3,addr,__KERNEL_CS);
  958. }
  959. static void __init set_task_gate(unsigned int n, unsigned int gdt_entry)
  960. {
  961. _set_gate(idt_table+n,5,0,0,(gdt_entry<<3));
  962. }
  963. void __init trap_init(void)
  964. {
  965. #ifdef CONFIG_EISA
  966. void __iomem *p = ioremap(0x0FFFD9, 4);
  967. if (readl(p) == 'E'+('I'<<8)+('S'<<16)+('A'<<24)) {
  968. EISA_bus = 1;
  969. }
  970. iounmap(p);
  971. #endif
  972. #ifdef CONFIG_X86_LOCAL_APIC
  973. init_apic_mappings();
  974. #endif
  975. set_trap_gate(0,&divide_error);
  976. set_intr_gate(1,&debug);
  977. set_intr_gate(2,&nmi);
  978. set_system_intr_gate(3, &int3); /* int3/4 can be called from all */
  979. set_system_gate(4,&overflow);
  980. set_trap_gate(5,&bounds);
  981. set_trap_gate(6,&invalid_op);
  982. set_trap_gate(7,&device_not_available);
  983. set_task_gate(8,GDT_ENTRY_DOUBLEFAULT_TSS);
  984. set_trap_gate(9,&coprocessor_segment_overrun);
  985. set_trap_gate(10,&invalid_TSS);
  986. set_trap_gate(11,&segment_not_present);
  987. set_trap_gate(12,&stack_segment);
  988. set_trap_gate(13,&general_protection);
  989. set_intr_gate(14,&page_fault);
  990. set_trap_gate(15,&spurious_interrupt_bug);
  991. set_trap_gate(16,&coprocessor_error);
  992. set_trap_gate(17,&alignment_check);
  993. #ifdef CONFIG_X86_MCE
  994. set_trap_gate(18,&machine_check);
  995. #endif
  996. set_trap_gate(19,&simd_coprocessor_error);
  997. if (cpu_has_fxsr) {
  998. /*
  999. * Verify that the FXSAVE/FXRSTOR data will be 16-byte aligned.
  1000. * Generates a compile-time "error: zero width for bit-field" if
  1001. * the alignment is wrong.
  1002. */
  1003. struct fxsrAlignAssert {
  1004. int _:!(offsetof(struct task_struct,
  1005. thread.i387.fxsave) & 15);
  1006. };
  1007. printk(KERN_INFO "Enabling fast FPU save and restore... ");
  1008. set_in_cr4(X86_CR4_OSFXSR);
  1009. printk("done.\n");
  1010. }
  1011. if (cpu_has_xmm) {
  1012. printk(KERN_INFO "Enabling unmasked SIMD FPU exception "
  1013. "support... ");
  1014. set_in_cr4(X86_CR4_OSXMMEXCPT);
  1015. printk("done.\n");
  1016. }
  1017. set_system_gate(SYSCALL_VECTOR,&system_call);
  1018. /*
  1019. * Should be a barrier for any external CPU state.
  1020. */
  1021. cpu_init();
  1022. trap_init_hook();
  1023. }
  1024. static int __init kstack_setup(char *s)
  1025. {
  1026. kstack_depth_to_print = simple_strtoul(s, NULL, 0);
  1027. return 0;
  1028. }
  1029. __setup("kstack=", kstack_setup);