omap_wdt.c 10 KB

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  1. /*
  2. * omap_wdt.c
  3. *
  4. * Watchdog driver for the TI OMAP 16xx & 24xx/34xx 32KHz (non-secure) watchdog
  5. *
  6. * Author: MontaVista Software, Inc.
  7. * <gdavis@mvista.com> or <source@mvista.com>
  8. *
  9. * 2003 (c) MontaVista Software, Inc. This file is licensed under the
  10. * terms of the GNU General Public License version 2. This program is
  11. * licensed "as is" without any warranty of any kind, whether express
  12. * or implied.
  13. *
  14. * History:
  15. *
  16. * 20030527: George G. Davis <gdavis@mvista.com>
  17. * Initially based on linux-2.4.19-rmk7-pxa1/drivers/char/sa1100_wdt.c
  18. * (c) Copyright 2000 Oleg Drokin <green@crimea.edu>
  19. * Based on SoftDog driver by Alan Cox <alan@lxorguk.ukuu.org.uk>
  20. *
  21. * Copyright (c) 2004 Texas Instruments.
  22. * 1. Modified to support OMAP1610 32-KHz watchdog timer
  23. * 2. Ported to 2.6 kernel
  24. *
  25. * Copyright (c) 2005 David Brownell
  26. * Use the driver model and standard identifiers; handle bigger timeouts.
  27. */
  28. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  29. #include <linux/module.h>
  30. #include <linux/types.h>
  31. #include <linux/kernel.h>
  32. #include <linux/fs.h>
  33. #include <linux/mm.h>
  34. #include <linux/miscdevice.h>
  35. #include <linux/watchdog.h>
  36. #include <linux/reboot.h>
  37. #include <linux/init.h>
  38. #include <linux/err.h>
  39. #include <linux/platform_device.h>
  40. #include <linux/moduleparam.h>
  41. #include <linux/bitops.h>
  42. #include <linux/io.h>
  43. #include <linux/uaccess.h>
  44. #include <linux/slab.h>
  45. #include <linux/pm_runtime.h>
  46. #include <mach/hardware.h>
  47. #include <plat/cpu.h>
  48. #include <plat/prcm.h>
  49. #include "omap_wdt.h"
  50. static struct platform_device *omap_wdt_dev;
  51. static unsigned timer_margin;
  52. module_param(timer_margin, uint, 0);
  53. MODULE_PARM_DESC(timer_margin, "initial watchdog timeout (in seconds)");
  54. static unsigned int wdt_trgr_pattern = 0x1234;
  55. static DEFINE_SPINLOCK(wdt_lock);
  56. struct omap_wdt_dev {
  57. void __iomem *base; /* physical */
  58. struct device *dev;
  59. int omap_wdt_users;
  60. struct resource *mem;
  61. struct miscdevice omap_wdt_miscdev;
  62. };
  63. static void omap_wdt_ping(struct omap_wdt_dev *wdev)
  64. {
  65. void __iomem *base = wdev->base;
  66. /* wait for posted write to complete */
  67. while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x08)
  68. cpu_relax();
  69. wdt_trgr_pattern = ~wdt_trgr_pattern;
  70. __raw_writel(wdt_trgr_pattern, (base + OMAP_WATCHDOG_TGR));
  71. /* wait for posted write to complete */
  72. while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x08)
  73. cpu_relax();
  74. /* reloaded WCRR from WLDR */
  75. }
  76. static void omap_wdt_enable(struct omap_wdt_dev *wdev)
  77. {
  78. void __iomem *base = wdev->base;
  79. /* Sequence to enable the watchdog */
  80. __raw_writel(0xBBBB, base + OMAP_WATCHDOG_SPR);
  81. while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x10)
  82. cpu_relax();
  83. __raw_writel(0x4444, base + OMAP_WATCHDOG_SPR);
  84. while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x10)
  85. cpu_relax();
  86. }
  87. static void omap_wdt_disable(struct omap_wdt_dev *wdev)
  88. {
  89. void __iomem *base = wdev->base;
  90. /* sequence required to disable watchdog */
  91. __raw_writel(0xAAAA, base + OMAP_WATCHDOG_SPR); /* TIMER_MODE */
  92. while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x10)
  93. cpu_relax();
  94. __raw_writel(0x5555, base + OMAP_WATCHDOG_SPR); /* TIMER_MODE */
  95. while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x10)
  96. cpu_relax();
  97. }
  98. static void omap_wdt_adjust_timeout(unsigned new_timeout)
  99. {
  100. if (new_timeout < TIMER_MARGIN_MIN)
  101. new_timeout = TIMER_MARGIN_DEFAULT;
  102. if (new_timeout > TIMER_MARGIN_MAX)
  103. new_timeout = TIMER_MARGIN_MAX;
  104. timer_margin = new_timeout;
  105. }
  106. static void omap_wdt_set_timeout(struct omap_wdt_dev *wdev)
  107. {
  108. u32 pre_margin = GET_WLDR_VAL(timer_margin);
  109. void __iomem *base = wdev->base;
  110. /* just count up at 32 KHz */
  111. while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x04)
  112. cpu_relax();
  113. __raw_writel(pre_margin, base + OMAP_WATCHDOG_LDR);
  114. while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x04)
  115. cpu_relax();
  116. }
  117. /*
  118. * Allow only one task to hold it open
  119. */
  120. static int omap_wdt_open(struct inode *inode, struct file *file)
  121. {
  122. struct omap_wdt_dev *wdev = platform_get_drvdata(omap_wdt_dev);
  123. void __iomem *base = wdev->base;
  124. if (test_and_set_bit(1, (unsigned long *)&(wdev->omap_wdt_users)))
  125. return -EBUSY;
  126. pm_runtime_get_sync(wdev->dev);
  127. /* initialize prescaler */
  128. while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x01)
  129. cpu_relax();
  130. __raw_writel((1 << 5) | (PTV << 2), base + OMAP_WATCHDOG_CNTRL);
  131. while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x01)
  132. cpu_relax();
  133. file->private_data = (void *) wdev;
  134. omap_wdt_set_timeout(wdev);
  135. omap_wdt_ping(wdev); /* trigger loading of new timeout value */
  136. omap_wdt_enable(wdev);
  137. return nonseekable_open(inode, file);
  138. }
  139. static int omap_wdt_release(struct inode *inode, struct file *file)
  140. {
  141. struct omap_wdt_dev *wdev = file->private_data;
  142. /*
  143. * Shut off the timer unless NOWAYOUT is defined.
  144. */
  145. #ifndef CONFIG_WATCHDOG_NOWAYOUT
  146. omap_wdt_disable(wdev);
  147. pm_runtime_put_sync(wdev->dev);
  148. #else
  149. pr_crit("Unexpected close, not stopping!\n");
  150. #endif
  151. wdev->omap_wdt_users = 0;
  152. return 0;
  153. }
  154. static ssize_t omap_wdt_write(struct file *file, const char __user *data,
  155. size_t len, loff_t *ppos)
  156. {
  157. struct omap_wdt_dev *wdev = file->private_data;
  158. /* Refresh LOAD_TIME. */
  159. if (len) {
  160. spin_lock(&wdt_lock);
  161. omap_wdt_ping(wdev);
  162. spin_unlock(&wdt_lock);
  163. }
  164. return len;
  165. }
  166. static long omap_wdt_ioctl(struct file *file, unsigned int cmd,
  167. unsigned long arg)
  168. {
  169. struct omap_wdt_dev *wdev;
  170. int new_margin;
  171. static const struct watchdog_info ident = {
  172. .identity = "OMAP Watchdog",
  173. .options = WDIOF_SETTIMEOUT,
  174. .firmware_version = 0,
  175. };
  176. wdev = file->private_data;
  177. switch (cmd) {
  178. case WDIOC_GETSUPPORT:
  179. return copy_to_user((struct watchdog_info __user *)arg, &ident,
  180. sizeof(ident));
  181. case WDIOC_GETSTATUS:
  182. return put_user(0, (int __user *)arg);
  183. case WDIOC_GETBOOTSTATUS:
  184. #ifdef CONFIG_ARCH_OMAP1
  185. if (cpu_is_omap16xx())
  186. return put_user(__raw_readw(ARM_SYSST),
  187. (int __user *)arg);
  188. #endif
  189. #ifdef CONFIG_ARCH_OMAP2PLUS
  190. if (cpu_is_omap24xx())
  191. return put_user(omap_prcm_get_reset_sources(),
  192. (int __user *)arg);
  193. #endif
  194. return put_user(0, (int __user *)arg);
  195. case WDIOC_KEEPALIVE:
  196. spin_lock(&wdt_lock);
  197. omap_wdt_ping(wdev);
  198. spin_unlock(&wdt_lock);
  199. return 0;
  200. case WDIOC_SETTIMEOUT:
  201. if (get_user(new_margin, (int __user *)arg))
  202. return -EFAULT;
  203. omap_wdt_adjust_timeout(new_margin);
  204. spin_lock(&wdt_lock);
  205. omap_wdt_disable(wdev);
  206. omap_wdt_set_timeout(wdev);
  207. omap_wdt_enable(wdev);
  208. omap_wdt_ping(wdev);
  209. spin_unlock(&wdt_lock);
  210. /* Fall */
  211. case WDIOC_GETTIMEOUT:
  212. return put_user(timer_margin, (int __user *)arg);
  213. default:
  214. return -ENOTTY;
  215. }
  216. }
  217. static const struct file_operations omap_wdt_fops = {
  218. .owner = THIS_MODULE,
  219. .write = omap_wdt_write,
  220. .unlocked_ioctl = omap_wdt_ioctl,
  221. .open = omap_wdt_open,
  222. .release = omap_wdt_release,
  223. .llseek = no_llseek,
  224. };
  225. static int __devinit omap_wdt_probe(struct platform_device *pdev)
  226. {
  227. struct resource *res, *mem;
  228. struct omap_wdt_dev *wdev;
  229. int ret;
  230. /* reserve static register mappings */
  231. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  232. if (!res) {
  233. ret = -ENOENT;
  234. goto err_get_resource;
  235. }
  236. if (omap_wdt_dev) {
  237. ret = -EBUSY;
  238. goto err_busy;
  239. }
  240. mem = request_mem_region(res->start, resource_size(res), pdev->name);
  241. if (!mem) {
  242. ret = -EBUSY;
  243. goto err_busy;
  244. }
  245. wdev = kzalloc(sizeof(struct omap_wdt_dev), GFP_KERNEL);
  246. if (!wdev) {
  247. ret = -ENOMEM;
  248. goto err_kzalloc;
  249. }
  250. wdev->omap_wdt_users = 0;
  251. wdev->mem = mem;
  252. wdev->dev = &pdev->dev;
  253. wdev->base = ioremap(res->start, resource_size(res));
  254. if (!wdev->base) {
  255. ret = -ENOMEM;
  256. goto err_ioremap;
  257. }
  258. platform_set_drvdata(pdev, wdev);
  259. pm_runtime_enable(wdev->dev);
  260. pm_runtime_get_sync(wdev->dev);
  261. omap_wdt_disable(wdev);
  262. omap_wdt_adjust_timeout(timer_margin);
  263. wdev->omap_wdt_miscdev.parent = &pdev->dev;
  264. wdev->omap_wdt_miscdev.minor = WATCHDOG_MINOR;
  265. wdev->omap_wdt_miscdev.name = "watchdog";
  266. wdev->omap_wdt_miscdev.fops = &omap_wdt_fops;
  267. ret = misc_register(&(wdev->omap_wdt_miscdev));
  268. if (ret)
  269. goto err_misc;
  270. pr_info("OMAP Watchdog Timer Rev 0x%02x: initial timeout %d sec\n",
  271. __raw_readl(wdev->base + OMAP_WATCHDOG_REV) & 0xFF,
  272. timer_margin);
  273. pm_runtime_put_sync(wdev->dev);
  274. omap_wdt_dev = pdev;
  275. return 0;
  276. err_misc:
  277. pm_runtime_disable(wdev->dev);
  278. platform_set_drvdata(pdev, NULL);
  279. iounmap(wdev->base);
  280. err_ioremap:
  281. wdev->base = NULL;
  282. kfree(wdev);
  283. err_kzalloc:
  284. release_mem_region(res->start, resource_size(res));
  285. err_busy:
  286. err_get_resource:
  287. return ret;
  288. }
  289. static void omap_wdt_shutdown(struct platform_device *pdev)
  290. {
  291. struct omap_wdt_dev *wdev = platform_get_drvdata(pdev);
  292. if (wdev->omap_wdt_users) {
  293. omap_wdt_disable(wdev);
  294. pm_runtime_put_sync(wdev->dev);
  295. }
  296. }
  297. static int __devexit omap_wdt_remove(struct platform_device *pdev)
  298. {
  299. struct omap_wdt_dev *wdev = platform_get_drvdata(pdev);
  300. struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  301. pm_runtime_disable(wdev->dev);
  302. if (!res)
  303. return -ENOENT;
  304. misc_deregister(&(wdev->omap_wdt_miscdev));
  305. release_mem_region(res->start, resource_size(res));
  306. platform_set_drvdata(pdev, NULL);
  307. iounmap(wdev->base);
  308. kfree(wdev);
  309. omap_wdt_dev = NULL;
  310. return 0;
  311. }
  312. #ifdef CONFIG_PM
  313. /* REVISIT ... not clear this is the best way to handle system suspend; and
  314. * it's very inappropriate for selective device suspend (e.g. suspending this
  315. * through sysfs rather than by stopping the watchdog daemon). Also, this
  316. * may not play well enough with NOWAYOUT...
  317. */
  318. static int omap_wdt_suspend(struct platform_device *pdev, pm_message_t state)
  319. {
  320. struct omap_wdt_dev *wdev = platform_get_drvdata(pdev);
  321. if (wdev->omap_wdt_users) {
  322. omap_wdt_disable(wdev);
  323. pm_runtime_put_sync(wdev->dev);
  324. }
  325. return 0;
  326. }
  327. static int omap_wdt_resume(struct platform_device *pdev)
  328. {
  329. struct omap_wdt_dev *wdev = platform_get_drvdata(pdev);
  330. if (wdev->omap_wdt_users) {
  331. pm_runtime_get_sync(wdev->dev);
  332. omap_wdt_enable(wdev);
  333. omap_wdt_ping(wdev);
  334. }
  335. return 0;
  336. }
  337. #else
  338. #define omap_wdt_suspend NULL
  339. #define omap_wdt_resume NULL
  340. #endif
  341. static const struct of_device_id omap_wdt_of_match[] = {
  342. { .compatible = "ti,omap3-wdt", },
  343. {},
  344. };
  345. MODULE_DEVICE_TABLE(of, omap_wdt_of_match);
  346. static struct platform_driver omap_wdt_driver = {
  347. .probe = omap_wdt_probe,
  348. .remove = __devexit_p(omap_wdt_remove),
  349. .shutdown = omap_wdt_shutdown,
  350. .suspend = omap_wdt_suspend,
  351. .resume = omap_wdt_resume,
  352. .driver = {
  353. .owner = THIS_MODULE,
  354. .name = "omap_wdt",
  355. .of_match_table = omap_wdt_of_match,
  356. },
  357. };
  358. module_platform_driver(omap_wdt_driver);
  359. MODULE_AUTHOR("George G. Davis");
  360. MODULE_LICENSE("GPL");
  361. MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
  362. MODULE_ALIAS("platform:omap_wdt");