portdrv_core.c 15 KB

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  1. /*
  2. * File: portdrv_core.c
  3. * Purpose: PCI Express Port Bus Driver's Core Functions
  4. *
  5. * Copyright (C) 2004 Intel
  6. * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
  7. */
  8. #include <linux/module.h>
  9. #include <linux/pci.h>
  10. #include <linux/kernel.h>
  11. #include <linux/errno.h>
  12. #include <linux/pm.h>
  13. #include <linux/string.h>
  14. #include <linux/slab.h>
  15. #include <linux/pcieport_if.h>
  16. #include <linux/aer.h>
  17. #include "../pci.h"
  18. #include "portdrv.h"
  19. bool pciehp_msi_disabled;
  20. static int __init pciehp_setup(char *str)
  21. {
  22. if (!strncmp(str, "nomsi", 5))
  23. pciehp_msi_disabled = true;
  24. return 1;
  25. }
  26. __setup("pcie_hp=", pciehp_setup);
  27. /**
  28. * release_pcie_device - free PCI Express port service device structure
  29. * @dev: Port service device to release
  30. *
  31. * Invoked automatically when device is being removed in response to
  32. * device_unregister(dev). Release all resources being claimed.
  33. */
  34. static void release_pcie_device(struct device *dev)
  35. {
  36. kfree(to_pcie_device(dev));
  37. }
  38. /**
  39. * pcie_port_msix_add_entry - add entry to given array of MSI-X entries
  40. * @entries: Array of MSI-X entries
  41. * @new_entry: Index of the entry to add to the array
  42. * @nr_entries: Number of entries aleady in the array
  43. *
  44. * Return value: Position of the added entry in the array
  45. */
  46. static int pcie_port_msix_add_entry(
  47. struct msix_entry *entries, int new_entry, int nr_entries)
  48. {
  49. int j;
  50. for (j = 0; j < nr_entries; j++)
  51. if (entries[j].entry == new_entry)
  52. return j;
  53. entries[j].entry = new_entry;
  54. return j;
  55. }
  56. /**
  57. * pcie_port_enable_msix - try to set up MSI-X as interrupt mode for given port
  58. * @dev: PCI Express port to handle
  59. * @vectors: Array of interrupt vectors to populate
  60. * @mask: Bitmask of port capabilities returned by get_port_device_capability()
  61. *
  62. * Return value: 0 on success, error code on failure
  63. */
  64. static int pcie_port_enable_msix(struct pci_dev *dev, int *vectors, int mask)
  65. {
  66. struct msix_entry *msix_entries;
  67. int idx[PCIE_PORT_DEVICE_MAXSERVICES];
  68. int nr_entries, status, pos, i, nvec;
  69. u16 reg16;
  70. u32 reg32;
  71. nr_entries = pci_msix_table_size(dev);
  72. if (!nr_entries)
  73. return -EINVAL;
  74. if (nr_entries > PCIE_PORT_MAX_MSIX_ENTRIES)
  75. nr_entries = PCIE_PORT_MAX_MSIX_ENTRIES;
  76. msix_entries = kzalloc(sizeof(*msix_entries) * nr_entries, GFP_KERNEL);
  77. if (!msix_entries)
  78. return -ENOMEM;
  79. /*
  80. * Allocate as many entries as the port wants, so that we can check
  81. * which of them will be useful. Moreover, if nr_entries is correctly
  82. * equal to the number of entries this port actually uses, we'll happily
  83. * go through without any tricks.
  84. */
  85. for (i = 0; i < nr_entries; i++)
  86. msix_entries[i].entry = i;
  87. status = pci_enable_msix(dev, msix_entries, nr_entries);
  88. if (status)
  89. goto Exit;
  90. for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++)
  91. idx[i] = -1;
  92. status = -EIO;
  93. nvec = 0;
  94. if (mask & (PCIE_PORT_SERVICE_PME | PCIE_PORT_SERVICE_HP)) {
  95. int entry;
  96. /*
  97. * The code below follows the PCI Express Base Specification 2.0
  98. * stating in Section 6.1.6 that "PME and Hot-Plug Event
  99. * interrupts (when both are implemented) always share the same
  100. * MSI or MSI-X vector, as indicated by the Interrupt Message
  101. * Number field in the PCI Express Capabilities register", where
  102. * according to Section 7.8.2 of the specification "For MSI-X,
  103. * the value in this field indicates which MSI-X Table entry is
  104. * used to generate the interrupt message."
  105. */
  106. pos = pci_pcie_cap(dev);
  107. pci_read_config_word(dev, pos + PCI_EXP_FLAGS, &reg16);
  108. entry = (reg16 & PCI_EXP_FLAGS_IRQ) >> 9;
  109. if (entry >= nr_entries)
  110. goto Error;
  111. i = pcie_port_msix_add_entry(msix_entries, entry, nvec);
  112. if (i == nvec)
  113. nvec++;
  114. idx[PCIE_PORT_SERVICE_PME_SHIFT] = i;
  115. idx[PCIE_PORT_SERVICE_HP_SHIFT] = i;
  116. }
  117. if (mask & PCIE_PORT_SERVICE_AER) {
  118. int entry;
  119. /*
  120. * The code below follows Section 7.10.10 of the PCI Express
  121. * Base Specification 2.0 stating that bits 31-27 of the Root
  122. * Error Status Register contain a value indicating which of the
  123. * MSI/MSI-X vectors assigned to the port is going to be used
  124. * for AER, where "For MSI-X, the value in this register
  125. * indicates which MSI-X Table entry is used to generate the
  126. * interrupt message."
  127. */
  128. pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
  129. pci_read_config_dword(dev, pos + PCI_ERR_ROOT_STATUS, &reg32);
  130. entry = reg32 >> 27;
  131. if (entry >= nr_entries)
  132. goto Error;
  133. i = pcie_port_msix_add_entry(msix_entries, entry, nvec);
  134. if (i == nvec)
  135. nvec++;
  136. idx[PCIE_PORT_SERVICE_AER_SHIFT] = i;
  137. }
  138. /*
  139. * If nvec is equal to the allocated number of entries, we can just use
  140. * what we have. Otherwise, the port has some extra entries not for the
  141. * services we know and we need to work around that.
  142. */
  143. if (nvec == nr_entries) {
  144. status = 0;
  145. } else {
  146. /* Drop the temporary MSI-X setup */
  147. pci_disable_msix(dev);
  148. /* Now allocate the MSI-X vectors for real */
  149. status = pci_enable_msix(dev, msix_entries, nvec);
  150. if (status)
  151. goto Exit;
  152. }
  153. for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++)
  154. vectors[i] = idx[i] >= 0 ? msix_entries[idx[i]].vector : -1;
  155. Exit:
  156. kfree(msix_entries);
  157. return status;
  158. Error:
  159. pci_disable_msix(dev);
  160. goto Exit;
  161. }
  162. /**
  163. * init_service_irqs - initialize irqs for PCI Express port services
  164. * @dev: PCI Express port to handle
  165. * @irqs: Array of irqs to populate
  166. * @mask: Bitmask of port capabilities returned by get_port_device_capability()
  167. *
  168. * Return value: Interrupt mode associated with the port
  169. */
  170. static int init_service_irqs(struct pci_dev *dev, int *irqs, int mask)
  171. {
  172. int i, irq = -1;
  173. /*
  174. * If MSI cannot be used for PCIe PME or hotplug, we have to use
  175. * INTx or other interrupts, e.g. system shared interrupt.
  176. */
  177. if (((mask & PCIE_PORT_SERVICE_PME) && pcie_pme_no_msi()) ||
  178. ((mask & PCIE_PORT_SERVICE_HP) && pciehp_no_msi())) {
  179. if (dev->irq)
  180. irq = dev->irq;
  181. goto no_msi;
  182. }
  183. /* Try to use MSI-X if supported */
  184. if (!pcie_port_enable_msix(dev, irqs, mask))
  185. return 0;
  186. /*
  187. * We're not going to use MSI-X, so try MSI and fall back to INTx.
  188. * If neither MSI/MSI-X nor INTx available, try other interrupt. On
  189. * some platforms, root port doesn't support MSI/MSI-X/INTx in RC mode.
  190. */
  191. if (!pci_enable_msi(dev) || dev->irq)
  192. irq = dev->irq;
  193. no_msi:
  194. for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++)
  195. irqs[i] = irq;
  196. irqs[PCIE_PORT_SERVICE_VC_SHIFT] = -1;
  197. if (irq < 0)
  198. return -ENODEV;
  199. return 0;
  200. }
  201. static void cleanup_service_irqs(struct pci_dev *dev)
  202. {
  203. if (dev->msix_enabled)
  204. pci_disable_msix(dev);
  205. else if (dev->msi_enabled)
  206. pci_disable_msi(dev);
  207. }
  208. /**
  209. * get_port_device_capability - discover capabilities of a PCI Express port
  210. * @dev: PCI Express port to examine
  211. *
  212. * The capabilities are read from the port's PCI Express configuration registers
  213. * as described in PCI Express Base Specification 1.0a sections 7.8.2, 7.8.9 and
  214. * 7.9 - 7.11.
  215. *
  216. * Return value: Bitmask of discovered port capabilities
  217. */
  218. static int get_port_device_capability(struct pci_dev *dev)
  219. {
  220. int services = 0;
  221. u32 reg32;
  222. int cap_mask = 0;
  223. int err;
  224. if (pcie_ports_disabled)
  225. return 0;
  226. err = pcie_port_platform_notify(dev, &cap_mask);
  227. if (!pcie_ports_auto) {
  228. cap_mask = PCIE_PORT_SERVICE_PME | PCIE_PORT_SERVICE_HP
  229. | PCIE_PORT_SERVICE_VC;
  230. if (pci_aer_available())
  231. cap_mask |= PCIE_PORT_SERVICE_AER;
  232. } else if (err) {
  233. return 0;
  234. }
  235. /* Hot-Plug Capable */
  236. if ((cap_mask & PCIE_PORT_SERVICE_HP) &&
  237. dev->pcie_flags_reg & PCI_EXP_FLAGS_SLOT) {
  238. pcie_capability_read_dword(dev, PCI_EXP_SLTCAP, &reg32);
  239. if (reg32 & PCI_EXP_SLTCAP_HPC) {
  240. services |= PCIE_PORT_SERVICE_HP;
  241. /*
  242. * Disable hot-plug interrupts in case they have been
  243. * enabled by the BIOS and the hot-plug service driver
  244. * is not loaded.
  245. */
  246. pcie_capability_clear_word(dev, PCI_EXP_SLTCTL,
  247. PCI_EXP_SLTCTL_CCIE | PCI_EXP_SLTCTL_HPIE);
  248. }
  249. }
  250. /* AER capable */
  251. if ((cap_mask & PCIE_PORT_SERVICE_AER)
  252. && pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR)) {
  253. services |= PCIE_PORT_SERVICE_AER;
  254. /*
  255. * Disable AER on this port in case it's been enabled by the
  256. * BIOS (the AER service driver will enable it when necessary).
  257. */
  258. pci_disable_pcie_error_reporting(dev);
  259. }
  260. /* VC support */
  261. if (pci_find_ext_capability(dev, PCI_EXT_CAP_ID_VC))
  262. services |= PCIE_PORT_SERVICE_VC;
  263. /* Root ports are capable of generating PME too */
  264. if ((cap_mask & PCIE_PORT_SERVICE_PME)
  265. && pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT) {
  266. services |= PCIE_PORT_SERVICE_PME;
  267. /*
  268. * Disable PME interrupt on this port in case it's been enabled
  269. * by the BIOS (the PME service driver will enable it when
  270. * necessary).
  271. */
  272. pcie_pme_interrupt_enable(dev, false);
  273. }
  274. return services;
  275. }
  276. /**
  277. * pcie_device_init - allocate and initialize PCI Express port service device
  278. * @pdev: PCI Express port to associate the service device with
  279. * @service: Type of service to associate with the service device
  280. * @irq: Interrupt vector to associate with the service device
  281. */
  282. static int pcie_device_init(struct pci_dev *pdev, int service, int irq)
  283. {
  284. int retval;
  285. struct pcie_device *pcie;
  286. struct device *device;
  287. pcie = kzalloc(sizeof(*pcie), GFP_KERNEL);
  288. if (!pcie)
  289. return -ENOMEM;
  290. pcie->port = pdev;
  291. pcie->irq = irq;
  292. pcie->service = service;
  293. /* Initialize generic device interface */
  294. device = &pcie->device;
  295. device->bus = &pcie_port_bus_type;
  296. device->release = release_pcie_device; /* callback to free pcie dev */
  297. dev_set_name(device, "%s:pcie%02x",
  298. pci_name(pdev),
  299. get_descriptor_id(pci_pcie_type(pdev), service));
  300. device->parent = &pdev->dev;
  301. device_enable_async_suspend(device);
  302. retval = device_register(device);
  303. if (retval)
  304. kfree(pcie);
  305. else
  306. get_device(device);
  307. return retval;
  308. }
  309. /**
  310. * pcie_port_device_register - register PCI Express port
  311. * @dev: PCI Express port to register
  312. *
  313. * Allocate the port extension structure and register services associated with
  314. * the port.
  315. */
  316. int pcie_port_device_register(struct pci_dev *dev)
  317. {
  318. int status, capabilities, i, nr_service;
  319. int irqs[PCIE_PORT_DEVICE_MAXSERVICES];
  320. /* Enable PCI Express port device */
  321. status = pci_enable_device(dev);
  322. if (status)
  323. return status;
  324. /* Get and check PCI Express port services */
  325. capabilities = get_port_device_capability(dev);
  326. if (!capabilities)
  327. return 0;
  328. pci_set_master(dev);
  329. /*
  330. * Initialize service irqs. Don't use service devices that
  331. * require interrupts if there is no way to generate them.
  332. */
  333. status = init_service_irqs(dev, irqs, capabilities);
  334. if (status) {
  335. capabilities &= PCIE_PORT_SERVICE_VC;
  336. if (!capabilities)
  337. goto error_disable;
  338. }
  339. /* Allocate child services if any */
  340. status = -ENODEV;
  341. nr_service = 0;
  342. for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++) {
  343. int service = 1 << i;
  344. if (!(capabilities & service))
  345. continue;
  346. if (!pcie_device_init(dev, service, irqs[i]))
  347. nr_service++;
  348. }
  349. if (!nr_service)
  350. goto error_cleanup_irqs;
  351. return 0;
  352. error_cleanup_irqs:
  353. cleanup_service_irqs(dev);
  354. error_disable:
  355. pci_disable_device(dev);
  356. return status;
  357. }
  358. #ifdef CONFIG_PM
  359. static int suspend_iter(struct device *dev, void *data)
  360. {
  361. struct pcie_port_service_driver *service_driver;
  362. if ((dev->bus == &pcie_port_bus_type) && dev->driver) {
  363. service_driver = to_service_driver(dev->driver);
  364. if (service_driver->suspend)
  365. service_driver->suspend(to_pcie_device(dev));
  366. }
  367. return 0;
  368. }
  369. /**
  370. * pcie_port_device_suspend - suspend port services associated with a PCIe port
  371. * @dev: PCI Express port to handle
  372. */
  373. int pcie_port_device_suspend(struct device *dev)
  374. {
  375. return device_for_each_child(dev, NULL, suspend_iter);
  376. }
  377. static int resume_iter(struct device *dev, void *data)
  378. {
  379. struct pcie_port_service_driver *service_driver;
  380. if ((dev->bus == &pcie_port_bus_type) &&
  381. (dev->driver)) {
  382. service_driver = to_service_driver(dev->driver);
  383. if (service_driver->resume)
  384. service_driver->resume(to_pcie_device(dev));
  385. }
  386. return 0;
  387. }
  388. /**
  389. * pcie_port_device_suspend - resume port services associated with a PCIe port
  390. * @dev: PCI Express port to handle
  391. */
  392. int pcie_port_device_resume(struct device *dev)
  393. {
  394. return device_for_each_child(dev, NULL, resume_iter);
  395. }
  396. #endif /* PM */
  397. static int remove_iter(struct device *dev, void *data)
  398. {
  399. if (dev->bus == &pcie_port_bus_type) {
  400. put_device(dev);
  401. device_unregister(dev);
  402. }
  403. return 0;
  404. }
  405. /**
  406. * pcie_port_device_remove - unregister PCI Express port service devices
  407. * @dev: PCI Express port the service devices to unregister are associated with
  408. *
  409. * Remove PCI Express port service devices associated with given port and
  410. * disable MSI-X or MSI for the port.
  411. */
  412. void pcie_port_device_remove(struct pci_dev *dev)
  413. {
  414. device_for_each_child(&dev->dev, NULL, remove_iter);
  415. cleanup_service_irqs(dev);
  416. pci_disable_device(dev);
  417. }
  418. /**
  419. * pcie_port_probe_service - probe driver for given PCI Express port service
  420. * @dev: PCI Express port service device to probe against
  421. *
  422. * If PCI Express port service driver is registered with
  423. * pcie_port_service_register(), this function will be called by the driver core
  424. * whenever match is found between the driver and a port service device.
  425. */
  426. static int pcie_port_probe_service(struct device *dev)
  427. {
  428. struct pcie_device *pciedev;
  429. struct pcie_port_service_driver *driver;
  430. int status;
  431. if (!dev || !dev->driver)
  432. return -ENODEV;
  433. driver = to_service_driver(dev->driver);
  434. if (!driver || !driver->probe)
  435. return -ENODEV;
  436. pciedev = to_pcie_device(dev);
  437. status = driver->probe(pciedev);
  438. if (!status) {
  439. dev_printk(KERN_DEBUG, dev, "service driver %s loaded\n",
  440. driver->name);
  441. get_device(dev);
  442. }
  443. return status;
  444. }
  445. /**
  446. * pcie_port_remove_service - detach driver from given PCI Express port service
  447. * @dev: PCI Express port service device to handle
  448. *
  449. * If PCI Express port service driver is registered with
  450. * pcie_port_service_register(), this function will be called by the driver core
  451. * when device_unregister() is called for the port service device associated
  452. * with the driver.
  453. */
  454. static int pcie_port_remove_service(struct device *dev)
  455. {
  456. struct pcie_device *pciedev;
  457. struct pcie_port_service_driver *driver;
  458. if (!dev || !dev->driver)
  459. return 0;
  460. pciedev = to_pcie_device(dev);
  461. driver = to_service_driver(dev->driver);
  462. if (driver && driver->remove) {
  463. dev_printk(KERN_DEBUG, dev, "unloading service driver %s\n",
  464. driver->name);
  465. driver->remove(pciedev);
  466. put_device(dev);
  467. }
  468. return 0;
  469. }
  470. /**
  471. * pcie_port_shutdown_service - shut down given PCI Express port service
  472. * @dev: PCI Express port service device to handle
  473. *
  474. * If PCI Express port service driver is registered with
  475. * pcie_port_service_register(), this function will be called by the driver core
  476. * when device_shutdown() is called for the port service device associated
  477. * with the driver.
  478. */
  479. static void pcie_port_shutdown_service(struct device *dev) {}
  480. /**
  481. * pcie_port_service_register - register PCI Express port service driver
  482. * @new: PCI Express port service driver to register
  483. */
  484. int pcie_port_service_register(struct pcie_port_service_driver *new)
  485. {
  486. if (pcie_ports_disabled)
  487. return -ENODEV;
  488. new->driver.name = (char *)new->name;
  489. new->driver.bus = &pcie_port_bus_type;
  490. new->driver.probe = pcie_port_probe_service;
  491. new->driver.remove = pcie_port_remove_service;
  492. new->driver.shutdown = pcie_port_shutdown_service;
  493. return driver_register(&new->driver);
  494. }
  495. EXPORT_SYMBOL(pcie_port_service_register);
  496. /**
  497. * pcie_port_service_unregister - unregister PCI Express port service driver
  498. * @drv: PCI Express port service driver to unregister
  499. */
  500. void pcie_port_service_unregister(struct pcie_port_service_driver *drv)
  501. {
  502. driver_unregister(&drv->driver);
  503. }
  504. EXPORT_SYMBOL(pcie_port_service_unregister);