pci-sysfs.c 34 KB

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  1. /*
  2. * drivers/pci/pci-sysfs.c
  3. *
  4. * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
  5. * (C) Copyright 2002-2004 IBM Corp.
  6. * (C) Copyright 2003 Matthew Wilcox
  7. * (C) Copyright 2003 Hewlett-Packard
  8. * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
  9. * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
  10. *
  11. * File attributes for PCI devices
  12. *
  13. * Modeled after usb's driverfs.c
  14. *
  15. */
  16. #include <linux/kernel.h>
  17. #include <linux/sched.h>
  18. #include <linux/pci.h>
  19. #include <linux/stat.h>
  20. #include <linux/export.h>
  21. #include <linux/topology.h>
  22. #include <linux/mm.h>
  23. #include <linux/fs.h>
  24. #include <linux/capability.h>
  25. #include <linux/security.h>
  26. #include <linux/pci-aspm.h>
  27. #include <linux/slab.h>
  28. #include <linux/vgaarb.h>
  29. #include <linux/pm_runtime.h>
  30. #include "pci.h"
  31. static int sysfs_initialized; /* = 0 */
  32. /* show configuration fields */
  33. #define pci_config_attr(field, format_string) \
  34. static ssize_t \
  35. field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
  36. { \
  37. struct pci_dev *pdev; \
  38. \
  39. pdev = to_pci_dev (dev); \
  40. return sprintf (buf, format_string, pdev->field); \
  41. }
  42. pci_config_attr(vendor, "0x%04x\n");
  43. pci_config_attr(device, "0x%04x\n");
  44. pci_config_attr(subsystem_vendor, "0x%04x\n");
  45. pci_config_attr(subsystem_device, "0x%04x\n");
  46. pci_config_attr(class, "0x%06x\n");
  47. pci_config_attr(irq, "%u\n");
  48. static ssize_t broken_parity_status_show(struct device *dev,
  49. struct device_attribute *attr,
  50. char *buf)
  51. {
  52. struct pci_dev *pdev = to_pci_dev(dev);
  53. return sprintf (buf, "%u\n", pdev->broken_parity_status);
  54. }
  55. static ssize_t broken_parity_status_store(struct device *dev,
  56. struct device_attribute *attr,
  57. const char *buf, size_t count)
  58. {
  59. struct pci_dev *pdev = to_pci_dev(dev);
  60. unsigned long val;
  61. if (strict_strtoul(buf, 0, &val) < 0)
  62. return -EINVAL;
  63. pdev->broken_parity_status = !!val;
  64. return count;
  65. }
  66. static ssize_t local_cpus_show(struct device *dev,
  67. struct device_attribute *attr, char *buf)
  68. {
  69. const struct cpumask *mask;
  70. int len;
  71. #ifdef CONFIG_NUMA
  72. mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
  73. cpumask_of_node(dev_to_node(dev));
  74. #else
  75. mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
  76. #endif
  77. len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask);
  78. buf[len++] = '\n';
  79. buf[len] = '\0';
  80. return len;
  81. }
  82. static ssize_t local_cpulist_show(struct device *dev,
  83. struct device_attribute *attr, char *buf)
  84. {
  85. const struct cpumask *mask;
  86. int len;
  87. #ifdef CONFIG_NUMA
  88. mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
  89. cpumask_of_node(dev_to_node(dev));
  90. #else
  91. mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
  92. #endif
  93. len = cpulist_scnprintf(buf, PAGE_SIZE-2, mask);
  94. buf[len++] = '\n';
  95. buf[len] = '\0';
  96. return len;
  97. }
  98. /*
  99. * PCI Bus Class Devices
  100. */
  101. static ssize_t pci_bus_show_cpuaffinity(struct device *dev,
  102. int type,
  103. struct device_attribute *attr,
  104. char *buf)
  105. {
  106. int ret;
  107. const struct cpumask *cpumask;
  108. cpumask = cpumask_of_pcibus(to_pci_bus(dev));
  109. ret = type ?
  110. cpulist_scnprintf(buf, PAGE_SIZE-2, cpumask) :
  111. cpumask_scnprintf(buf, PAGE_SIZE-2, cpumask);
  112. buf[ret++] = '\n';
  113. buf[ret] = '\0';
  114. return ret;
  115. }
  116. static inline ssize_t pci_bus_show_cpumaskaffinity(struct device *dev,
  117. struct device_attribute *attr,
  118. char *buf)
  119. {
  120. return pci_bus_show_cpuaffinity(dev, 0, attr, buf);
  121. }
  122. static inline ssize_t pci_bus_show_cpulistaffinity(struct device *dev,
  123. struct device_attribute *attr,
  124. char *buf)
  125. {
  126. return pci_bus_show_cpuaffinity(dev, 1, attr, buf);
  127. }
  128. /* show resources */
  129. static ssize_t
  130. resource_show(struct device * dev, struct device_attribute *attr, char * buf)
  131. {
  132. struct pci_dev * pci_dev = to_pci_dev(dev);
  133. char * str = buf;
  134. int i;
  135. int max;
  136. resource_size_t start, end;
  137. if (pci_dev->subordinate)
  138. max = DEVICE_COUNT_RESOURCE;
  139. else
  140. max = PCI_BRIDGE_RESOURCES;
  141. for (i = 0; i < max; i++) {
  142. struct resource *res = &pci_dev->resource[i];
  143. pci_resource_to_user(pci_dev, i, res, &start, &end);
  144. str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n",
  145. (unsigned long long)start,
  146. (unsigned long long)end,
  147. (unsigned long long)res->flags);
  148. }
  149. return (str - buf);
  150. }
  151. static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf)
  152. {
  153. struct pci_dev *pci_dev = to_pci_dev(dev);
  154. return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n",
  155. pci_dev->vendor, pci_dev->device,
  156. pci_dev->subsystem_vendor, pci_dev->subsystem_device,
  157. (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
  158. (u8)(pci_dev->class));
  159. }
  160. static ssize_t is_enabled_store(struct device *dev,
  161. struct device_attribute *attr, const char *buf,
  162. size_t count)
  163. {
  164. struct pci_dev *pdev = to_pci_dev(dev);
  165. unsigned long val;
  166. ssize_t result = strict_strtoul(buf, 0, &val);
  167. if (result < 0)
  168. return result;
  169. /* this can crash the machine when done on the "wrong" device */
  170. if (!capable(CAP_SYS_ADMIN))
  171. return -EPERM;
  172. if (!val) {
  173. if (pci_is_enabled(pdev))
  174. pci_disable_device(pdev);
  175. else
  176. result = -EIO;
  177. } else
  178. result = pci_enable_device(pdev);
  179. return result < 0 ? result : count;
  180. }
  181. static ssize_t is_enabled_show(struct device *dev,
  182. struct device_attribute *attr, char *buf)
  183. {
  184. struct pci_dev *pdev;
  185. pdev = to_pci_dev (dev);
  186. return sprintf (buf, "%u\n", atomic_read(&pdev->enable_cnt));
  187. }
  188. #ifdef CONFIG_NUMA
  189. static ssize_t
  190. numa_node_show(struct device *dev, struct device_attribute *attr, char *buf)
  191. {
  192. return sprintf (buf, "%d\n", dev->numa_node);
  193. }
  194. #endif
  195. static ssize_t
  196. dma_mask_bits_show(struct device *dev, struct device_attribute *attr, char *buf)
  197. {
  198. struct pci_dev *pdev = to_pci_dev(dev);
  199. return sprintf (buf, "%d\n", fls64(pdev->dma_mask));
  200. }
  201. static ssize_t
  202. consistent_dma_mask_bits_show(struct device *dev, struct device_attribute *attr,
  203. char *buf)
  204. {
  205. return sprintf (buf, "%d\n", fls64(dev->coherent_dma_mask));
  206. }
  207. static ssize_t
  208. msi_bus_show(struct device *dev, struct device_attribute *attr, char *buf)
  209. {
  210. struct pci_dev *pdev = to_pci_dev(dev);
  211. if (!pdev->subordinate)
  212. return 0;
  213. return sprintf (buf, "%u\n",
  214. !(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI));
  215. }
  216. static ssize_t
  217. msi_bus_store(struct device *dev, struct device_attribute *attr,
  218. const char *buf, size_t count)
  219. {
  220. struct pci_dev *pdev = to_pci_dev(dev);
  221. unsigned long val;
  222. if (strict_strtoul(buf, 0, &val) < 0)
  223. return -EINVAL;
  224. /* bad things may happen if the no_msi flag is changed
  225. * while some drivers are loaded */
  226. if (!capable(CAP_SYS_ADMIN))
  227. return -EPERM;
  228. /* Maybe pci devices without subordinate busses shouldn't even have this
  229. * attribute in the first place? */
  230. if (!pdev->subordinate)
  231. return count;
  232. /* Is the flag going to change, or keep the value it already had? */
  233. if (!(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI) ^
  234. !!val) {
  235. pdev->subordinate->bus_flags ^= PCI_BUS_FLAGS_NO_MSI;
  236. dev_warn(&pdev->dev, "forced subordinate bus to%s support MSI,"
  237. " bad things could happen\n", val ? "" : " not");
  238. }
  239. return count;
  240. }
  241. #ifdef CONFIG_HOTPLUG
  242. static DEFINE_MUTEX(pci_remove_rescan_mutex);
  243. static ssize_t bus_rescan_store(struct bus_type *bus, const char *buf,
  244. size_t count)
  245. {
  246. unsigned long val;
  247. struct pci_bus *b = NULL;
  248. if (strict_strtoul(buf, 0, &val) < 0)
  249. return -EINVAL;
  250. if (val) {
  251. mutex_lock(&pci_remove_rescan_mutex);
  252. while ((b = pci_find_next_bus(b)) != NULL)
  253. pci_rescan_bus(b);
  254. mutex_unlock(&pci_remove_rescan_mutex);
  255. }
  256. return count;
  257. }
  258. struct bus_attribute pci_bus_attrs[] = {
  259. __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, bus_rescan_store),
  260. __ATTR_NULL
  261. };
  262. static ssize_t
  263. dev_rescan_store(struct device *dev, struct device_attribute *attr,
  264. const char *buf, size_t count)
  265. {
  266. unsigned long val;
  267. struct pci_dev *pdev = to_pci_dev(dev);
  268. if (strict_strtoul(buf, 0, &val) < 0)
  269. return -EINVAL;
  270. if (val) {
  271. mutex_lock(&pci_remove_rescan_mutex);
  272. pci_rescan_bus(pdev->bus);
  273. mutex_unlock(&pci_remove_rescan_mutex);
  274. }
  275. return count;
  276. }
  277. static void remove_callback(struct device *dev)
  278. {
  279. struct pci_dev *pdev = to_pci_dev(dev);
  280. mutex_lock(&pci_remove_rescan_mutex);
  281. pci_stop_and_remove_bus_device(pdev);
  282. mutex_unlock(&pci_remove_rescan_mutex);
  283. }
  284. static ssize_t
  285. remove_store(struct device *dev, struct device_attribute *dummy,
  286. const char *buf, size_t count)
  287. {
  288. int ret = 0;
  289. unsigned long val;
  290. if (strict_strtoul(buf, 0, &val) < 0)
  291. return -EINVAL;
  292. /* An attribute cannot be unregistered by one of its own methods,
  293. * so we have to use this roundabout approach.
  294. */
  295. if (val)
  296. ret = device_schedule_callback(dev, remove_callback);
  297. if (ret)
  298. count = ret;
  299. return count;
  300. }
  301. static ssize_t
  302. dev_bus_rescan_store(struct device *dev, struct device_attribute *attr,
  303. const char *buf, size_t count)
  304. {
  305. unsigned long val;
  306. struct pci_bus *bus = to_pci_bus(dev);
  307. if (strict_strtoul(buf, 0, &val) < 0)
  308. return -EINVAL;
  309. if (val) {
  310. mutex_lock(&pci_remove_rescan_mutex);
  311. if (!pci_is_root_bus(bus) && list_empty(&bus->devices))
  312. pci_rescan_bus_bridge_resize(bus->self);
  313. else
  314. pci_rescan_bus(bus);
  315. mutex_unlock(&pci_remove_rescan_mutex);
  316. }
  317. return count;
  318. }
  319. #endif
  320. #if defined(CONFIG_PM_RUNTIME) && defined(CONFIG_ACPI)
  321. static ssize_t d3cold_allowed_store(struct device *dev,
  322. struct device_attribute *attr,
  323. const char *buf, size_t count)
  324. {
  325. struct pci_dev *pdev = to_pci_dev(dev);
  326. unsigned long val;
  327. if (strict_strtoul(buf, 0, &val) < 0)
  328. return -EINVAL;
  329. pdev->d3cold_allowed = !!val;
  330. pm_runtime_resume(dev);
  331. return count;
  332. }
  333. static ssize_t d3cold_allowed_show(struct device *dev,
  334. struct device_attribute *attr, char *buf)
  335. {
  336. struct pci_dev *pdev = to_pci_dev(dev);
  337. return sprintf (buf, "%u\n", pdev->d3cold_allowed);
  338. }
  339. #endif
  340. struct device_attribute pci_dev_attrs[] = {
  341. __ATTR_RO(resource),
  342. __ATTR_RO(vendor),
  343. __ATTR_RO(device),
  344. __ATTR_RO(subsystem_vendor),
  345. __ATTR_RO(subsystem_device),
  346. __ATTR_RO(class),
  347. __ATTR_RO(irq),
  348. __ATTR_RO(local_cpus),
  349. __ATTR_RO(local_cpulist),
  350. __ATTR_RO(modalias),
  351. #ifdef CONFIG_NUMA
  352. __ATTR_RO(numa_node),
  353. #endif
  354. __ATTR_RO(dma_mask_bits),
  355. __ATTR_RO(consistent_dma_mask_bits),
  356. __ATTR(enable, 0600, is_enabled_show, is_enabled_store),
  357. __ATTR(broken_parity_status,(S_IRUGO|S_IWUSR),
  358. broken_parity_status_show,broken_parity_status_store),
  359. __ATTR(msi_bus, 0644, msi_bus_show, msi_bus_store),
  360. #ifdef CONFIG_HOTPLUG
  361. __ATTR(remove, (S_IWUSR|S_IWGRP), NULL, remove_store),
  362. __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_rescan_store),
  363. #endif
  364. #if defined(CONFIG_PM_RUNTIME) && defined(CONFIG_ACPI)
  365. __ATTR(d3cold_allowed, 0644, d3cold_allowed_show, d3cold_allowed_store),
  366. #endif
  367. __ATTR_NULL,
  368. };
  369. struct device_attribute pcibus_dev_attrs[] = {
  370. #ifdef CONFIG_HOTPLUG
  371. __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_bus_rescan_store),
  372. #endif
  373. __ATTR(cpuaffinity, S_IRUGO, pci_bus_show_cpumaskaffinity, NULL),
  374. __ATTR(cpulistaffinity, S_IRUGO, pci_bus_show_cpulistaffinity, NULL),
  375. __ATTR_NULL,
  376. };
  377. static ssize_t
  378. boot_vga_show(struct device *dev, struct device_attribute *attr, char *buf)
  379. {
  380. struct pci_dev *pdev = to_pci_dev(dev);
  381. struct pci_dev *vga_dev = vga_default_device();
  382. if (vga_dev)
  383. return sprintf(buf, "%u\n", (pdev == vga_dev));
  384. return sprintf(buf, "%u\n",
  385. !!(pdev->resource[PCI_ROM_RESOURCE].flags &
  386. IORESOURCE_ROM_SHADOW));
  387. }
  388. struct device_attribute vga_attr = __ATTR_RO(boot_vga);
  389. static ssize_t
  390. pci_read_config(struct file *filp, struct kobject *kobj,
  391. struct bin_attribute *bin_attr,
  392. char *buf, loff_t off, size_t count)
  393. {
  394. struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
  395. unsigned int size = 64;
  396. loff_t init_off = off;
  397. u8 *data = (u8*) buf;
  398. /* Several chips lock up trying to read undefined config space */
  399. if (security_capable(filp->f_cred, &init_user_ns, CAP_SYS_ADMIN) == 0) {
  400. size = dev->cfg_size;
  401. } else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
  402. size = 128;
  403. }
  404. if (off > size)
  405. return 0;
  406. if (off + count > size) {
  407. size -= off;
  408. count = size;
  409. } else {
  410. size = count;
  411. }
  412. pci_config_pm_runtime_get(dev);
  413. if ((off & 1) && size) {
  414. u8 val;
  415. pci_user_read_config_byte(dev, off, &val);
  416. data[off - init_off] = val;
  417. off++;
  418. size--;
  419. }
  420. if ((off & 3) && size > 2) {
  421. u16 val;
  422. pci_user_read_config_word(dev, off, &val);
  423. data[off - init_off] = val & 0xff;
  424. data[off - init_off + 1] = (val >> 8) & 0xff;
  425. off += 2;
  426. size -= 2;
  427. }
  428. while (size > 3) {
  429. u32 val;
  430. pci_user_read_config_dword(dev, off, &val);
  431. data[off - init_off] = val & 0xff;
  432. data[off - init_off + 1] = (val >> 8) & 0xff;
  433. data[off - init_off + 2] = (val >> 16) & 0xff;
  434. data[off - init_off + 3] = (val >> 24) & 0xff;
  435. off += 4;
  436. size -= 4;
  437. }
  438. if (size >= 2) {
  439. u16 val;
  440. pci_user_read_config_word(dev, off, &val);
  441. data[off - init_off] = val & 0xff;
  442. data[off - init_off + 1] = (val >> 8) & 0xff;
  443. off += 2;
  444. size -= 2;
  445. }
  446. if (size > 0) {
  447. u8 val;
  448. pci_user_read_config_byte(dev, off, &val);
  449. data[off - init_off] = val;
  450. off++;
  451. --size;
  452. }
  453. pci_config_pm_runtime_put(dev);
  454. return count;
  455. }
  456. static ssize_t
  457. pci_write_config(struct file* filp, struct kobject *kobj,
  458. struct bin_attribute *bin_attr,
  459. char *buf, loff_t off, size_t count)
  460. {
  461. struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
  462. unsigned int size = count;
  463. loff_t init_off = off;
  464. u8 *data = (u8*) buf;
  465. if (off > dev->cfg_size)
  466. return 0;
  467. if (off + count > dev->cfg_size) {
  468. size = dev->cfg_size - off;
  469. count = size;
  470. }
  471. pci_config_pm_runtime_get(dev);
  472. if ((off & 1) && size) {
  473. pci_user_write_config_byte(dev, off, data[off - init_off]);
  474. off++;
  475. size--;
  476. }
  477. if ((off & 3) && size > 2) {
  478. u16 val = data[off - init_off];
  479. val |= (u16) data[off - init_off + 1] << 8;
  480. pci_user_write_config_word(dev, off, val);
  481. off += 2;
  482. size -= 2;
  483. }
  484. while (size > 3) {
  485. u32 val = data[off - init_off];
  486. val |= (u32) data[off - init_off + 1] << 8;
  487. val |= (u32) data[off - init_off + 2] << 16;
  488. val |= (u32) data[off - init_off + 3] << 24;
  489. pci_user_write_config_dword(dev, off, val);
  490. off += 4;
  491. size -= 4;
  492. }
  493. if (size >= 2) {
  494. u16 val = data[off - init_off];
  495. val |= (u16) data[off - init_off + 1] << 8;
  496. pci_user_write_config_word(dev, off, val);
  497. off += 2;
  498. size -= 2;
  499. }
  500. if (size) {
  501. pci_user_write_config_byte(dev, off, data[off - init_off]);
  502. off++;
  503. --size;
  504. }
  505. pci_config_pm_runtime_put(dev);
  506. return count;
  507. }
  508. static ssize_t
  509. read_vpd_attr(struct file *filp, struct kobject *kobj,
  510. struct bin_attribute *bin_attr,
  511. char *buf, loff_t off, size_t count)
  512. {
  513. struct pci_dev *dev =
  514. to_pci_dev(container_of(kobj, struct device, kobj));
  515. if (off > bin_attr->size)
  516. count = 0;
  517. else if (count > bin_attr->size - off)
  518. count = bin_attr->size - off;
  519. return pci_read_vpd(dev, off, count, buf);
  520. }
  521. static ssize_t
  522. write_vpd_attr(struct file *filp, struct kobject *kobj,
  523. struct bin_attribute *bin_attr,
  524. char *buf, loff_t off, size_t count)
  525. {
  526. struct pci_dev *dev =
  527. to_pci_dev(container_of(kobj, struct device, kobj));
  528. if (off > bin_attr->size)
  529. count = 0;
  530. else if (count > bin_attr->size - off)
  531. count = bin_attr->size - off;
  532. return pci_write_vpd(dev, off, count, buf);
  533. }
  534. #ifdef HAVE_PCI_LEGACY
  535. /**
  536. * pci_read_legacy_io - read byte(s) from legacy I/O port space
  537. * @filp: open sysfs file
  538. * @kobj: kobject corresponding to file to read from
  539. * @bin_attr: struct bin_attribute for this file
  540. * @buf: buffer to store results
  541. * @off: offset into legacy I/O port space
  542. * @count: number of bytes to read
  543. *
  544. * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  545. * callback routine (pci_legacy_read).
  546. */
  547. static ssize_t
  548. pci_read_legacy_io(struct file *filp, struct kobject *kobj,
  549. struct bin_attribute *bin_attr,
  550. char *buf, loff_t off, size_t count)
  551. {
  552. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  553. struct device,
  554. kobj));
  555. /* Only support 1, 2 or 4 byte accesses */
  556. if (count != 1 && count != 2 && count != 4)
  557. return -EINVAL;
  558. return pci_legacy_read(bus, off, (u32 *)buf, count);
  559. }
  560. /**
  561. * pci_write_legacy_io - write byte(s) to legacy I/O port space
  562. * @filp: open sysfs file
  563. * @kobj: kobject corresponding to file to read from
  564. * @bin_attr: struct bin_attribute for this file
  565. * @buf: buffer containing value to be written
  566. * @off: offset into legacy I/O port space
  567. * @count: number of bytes to write
  568. *
  569. * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  570. * callback routine (pci_legacy_write).
  571. */
  572. static ssize_t
  573. pci_write_legacy_io(struct file *filp, struct kobject *kobj,
  574. struct bin_attribute *bin_attr,
  575. char *buf, loff_t off, size_t count)
  576. {
  577. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  578. struct device,
  579. kobj));
  580. /* Only support 1, 2 or 4 byte accesses */
  581. if (count != 1 && count != 2 && count != 4)
  582. return -EINVAL;
  583. return pci_legacy_write(bus, off, *(u32 *)buf, count);
  584. }
  585. /**
  586. * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
  587. * @filp: open sysfs file
  588. * @kobj: kobject corresponding to device to be mapped
  589. * @attr: struct bin_attribute for this file
  590. * @vma: struct vm_area_struct passed to mmap
  591. *
  592. * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
  593. * legacy memory space (first meg of bus space) into application virtual
  594. * memory space.
  595. */
  596. static int
  597. pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj,
  598. struct bin_attribute *attr,
  599. struct vm_area_struct *vma)
  600. {
  601. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  602. struct device,
  603. kobj));
  604. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
  605. }
  606. /**
  607. * pci_mmap_legacy_io - map legacy PCI IO into user memory space
  608. * @filp: open sysfs file
  609. * @kobj: kobject corresponding to device to be mapped
  610. * @attr: struct bin_attribute for this file
  611. * @vma: struct vm_area_struct passed to mmap
  612. *
  613. * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
  614. * legacy IO space (first meg of bus space) into application virtual
  615. * memory space. Returns -ENOSYS if the operation isn't supported
  616. */
  617. static int
  618. pci_mmap_legacy_io(struct file *filp, struct kobject *kobj,
  619. struct bin_attribute *attr,
  620. struct vm_area_struct *vma)
  621. {
  622. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  623. struct device,
  624. kobj));
  625. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
  626. }
  627. /**
  628. * pci_adjust_legacy_attr - adjustment of legacy file attributes
  629. * @b: bus to create files under
  630. * @mmap_type: I/O port or memory
  631. *
  632. * Stub implementation. Can be overridden by arch if necessary.
  633. */
  634. void __weak
  635. pci_adjust_legacy_attr(struct pci_bus *b, enum pci_mmap_state mmap_type)
  636. {
  637. return;
  638. }
  639. /**
  640. * pci_create_legacy_files - create legacy I/O port and memory files
  641. * @b: bus to create files under
  642. *
  643. * Some platforms allow access to legacy I/O port and ISA memory space on
  644. * a per-bus basis. This routine creates the files and ties them into
  645. * their associated read, write and mmap files from pci-sysfs.c
  646. *
  647. * On error unwind, but don't propagate the error to the caller
  648. * as it is ok to set up the PCI bus without these files.
  649. */
  650. void pci_create_legacy_files(struct pci_bus *b)
  651. {
  652. int error;
  653. b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2,
  654. GFP_ATOMIC);
  655. if (!b->legacy_io)
  656. goto kzalloc_err;
  657. sysfs_bin_attr_init(b->legacy_io);
  658. b->legacy_io->attr.name = "legacy_io";
  659. b->legacy_io->size = 0xffff;
  660. b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
  661. b->legacy_io->read = pci_read_legacy_io;
  662. b->legacy_io->write = pci_write_legacy_io;
  663. b->legacy_io->mmap = pci_mmap_legacy_io;
  664. pci_adjust_legacy_attr(b, pci_mmap_io);
  665. error = device_create_bin_file(&b->dev, b->legacy_io);
  666. if (error)
  667. goto legacy_io_err;
  668. /* Allocated above after the legacy_io struct */
  669. b->legacy_mem = b->legacy_io + 1;
  670. sysfs_bin_attr_init(b->legacy_mem);
  671. b->legacy_mem->attr.name = "legacy_mem";
  672. b->legacy_mem->size = 1024*1024;
  673. b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
  674. b->legacy_mem->mmap = pci_mmap_legacy_mem;
  675. pci_adjust_legacy_attr(b, pci_mmap_mem);
  676. error = device_create_bin_file(&b->dev, b->legacy_mem);
  677. if (error)
  678. goto legacy_mem_err;
  679. return;
  680. legacy_mem_err:
  681. device_remove_bin_file(&b->dev, b->legacy_io);
  682. legacy_io_err:
  683. kfree(b->legacy_io);
  684. b->legacy_io = NULL;
  685. kzalloc_err:
  686. printk(KERN_WARNING "pci: warning: could not create legacy I/O port "
  687. "and ISA memory resources to sysfs\n");
  688. return;
  689. }
  690. void pci_remove_legacy_files(struct pci_bus *b)
  691. {
  692. if (b->legacy_io) {
  693. device_remove_bin_file(&b->dev, b->legacy_io);
  694. device_remove_bin_file(&b->dev, b->legacy_mem);
  695. kfree(b->legacy_io); /* both are allocated here */
  696. }
  697. }
  698. #endif /* HAVE_PCI_LEGACY */
  699. #ifdef HAVE_PCI_MMAP
  700. int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma,
  701. enum pci_mmap_api mmap_api)
  702. {
  703. unsigned long nr, start, size, pci_start;
  704. if (pci_resource_len(pdev, resno) == 0)
  705. return 0;
  706. nr = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
  707. start = vma->vm_pgoff;
  708. size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
  709. pci_start = (mmap_api == PCI_MMAP_PROCFS) ?
  710. pci_resource_start(pdev, resno) >> PAGE_SHIFT : 0;
  711. if (start >= pci_start && start < pci_start + size &&
  712. start + nr <= pci_start + size)
  713. return 1;
  714. return 0;
  715. }
  716. /**
  717. * pci_mmap_resource - map a PCI resource into user memory space
  718. * @kobj: kobject for mapping
  719. * @attr: struct bin_attribute for the file being mapped
  720. * @vma: struct vm_area_struct passed into the mmap
  721. * @write_combine: 1 for write_combine mapping
  722. *
  723. * Use the regular PCI mapping routines to map a PCI resource into userspace.
  724. */
  725. static int
  726. pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
  727. struct vm_area_struct *vma, int write_combine)
  728. {
  729. struct pci_dev *pdev = to_pci_dev(container_of(kobj,
  730. struct device, kobj));
  731. struct resource *res = attr->private;
  732. enum pci_mmap_state mmap_type;
  733. resource_size_t start, end;
  734. int i;
  735. for (i = 0; i < PCI_ROM_RESOURCE; i++)
  736. if (res == &pdev->resource[i])
  737. break;
  738. if (i >= PCI_ROM_RESOURCE)
  739. return -ENODEV;
  740. if (!pci_mmap_fits(pdev, i, vma, PCI_MMAP_SYSFS)) {
  741. WARN(1, "process \"%s\" tried to map 0x%08lx bytes "
  742. "at page 0x%08lx on %s BAR %d (start 0x%16Lx, size 0x%16Lx)\n",
  743. current->comm, vma->vm_end-vma->vm_start, vma->vm_pgoff,
  744. pci_name(pdev), i,
  745. (u64)pci_resource_start(pdev, i),
  746. (u64)pci_resource_len(pdev, i));
  747. return -EINVAL;
  748. }
  749. /* pci_mmap_page_range() expects the same kind of entry as coming
  750. * from /proc/bus/pci/ which is a "user visible" value. If this is
  751. * different from the resource itself, arch will do necessary fixup.
  752. */
  753. pci_resource_to_user(pdev, i, res, &start, &end);
  754. vma->vm_pgoff += start >> PAGE_SHIFT;
  755. mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
  756. if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(start))
  757. return -EINVAL;
  758. return pci_mmap_page_range(pdev, vma, mmap_type, write_combine);
  759. }
  760. static int
  761. pci_mmap_resource_uc(struct file *filp, struct kobject *kobj,
  762. struct bin_attribute *attr,
  763. struct vm_area_struct *vma)
  764. {
  765. return pci_mmap_resource(kobj, attr, vma, 0);
  766. }
  767. static int
  768. pci_mmap_resource_wc(struct file *filp, struct kobject *kobj,
  769. struct bin_attribute *attr,
  770. struct vm_area_struct *vma)
  771. {
  772. return pci_mmap_resource(kobj, attr, vma, 1);
  773. }
  774. static ssize_t
  775. pci_resource_io(struct file *filp, struct kobject *kobj,
  776. struct bin_attribute *attr, char *buf,
  777. loff_t off, size_t count, bool write)
  778. {
  779. struct pci_dev *pdev = to_pci_dev(container_of(kobj,
  780. struct device, kobj));
  781. struct resource *res = attr->private;
  782. unsigned long port = off;
  783. int i;
  784. for (i = 0; i < PCI_ROM_RESOURCE; i++)
  785. if (res == &pdev->resource[i])
  786. break;
  787. if (i >= PCI_ROM_RESOURCE)
  788. return -ENODEV;
  789. port += pci_resource_start(pdev, i);
  790. if (port > pci_resource_end(pdev, i))
  791. return 0;
  792. if (port + count - 1 > pci_resource_end(pdev, i))
  793. return -EINVAL;
  794. switch (count) {
  795. case 1:
  796. if (write)
  797. outb(*(u8 *)buf, port);
  798. else
  799. *(u8 *)buf = inb(port);
  800. return 1;
  801. case 2:
  802. if (write)
  803. outw(*(u16 *)buf, port);
  804. else
  805. *(u16 *)buf = inw(port);
  806. return 2;
  807. case 4:
  808. if (write)
  809. outl(*(u32 *)buf, port);
  810. else
  811. *(u32 *)buf = inl(port);
  812. return 4;
  813. }
  814. return -EINVAL;
  815. }
  816. static ssize_t
  817. pci_read_resource_io(struct file *filp, struct kobject *kobj,
  818. struct bin_attribute *attr, char *buf,
  819. loff_t off, size_t count)
  820. {
  821. return pci_resource_io(filp, kobj, attr, buf, off, count, false);
  822. }
  823. static ssize_t
  824. pci_write_resource_io(struct file *filp, struct kobject *kobj,
  825. struct bin_attribute *attr, char *buf,
  826. loff_t off, size_t count)
  827. {
  828. return pci_resource_io(filp, kobj, attr, buf, off, count, true);
  829. }
  830. /**
  831. * pci_remove_resource_files - cleanup resource files
  832. * @pdev: dev to cleanup
  833. *
  834. * If we created resource files for @pdev, remove them from sysfs and
  835. * free their resources.
  836. */
  837. static void
  838. pci_remove_resource_files(struct pci_dev *pdev)
  839. {
  840. int i;
  841. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  842. struct bin_attribute *res_attr;
  843. res_attr = pdev->res_attr[i];
  844. if (res_attr) {
  845. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  846. kfree(res_attr);
  847. }
  848. res_attr = pdev->res_attr_wc[i];
  849. if (res_attr) {
  850. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  851. kfree(res_attr);
  852. }
  853. }
  854. }
  855. static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
  856. {
  857. /* allocate attribute structure, piggyback attribute name */
  858. int name_len = write_combine ? 13 : 10;
  859. struct bin_attribute *res_attr;
  860. int retval;
  861. res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
  862. if (res_attr) {
  863. char *res_attr_name = (char *)(res_attr + 1);
  864. sysfs_bin_attr_init(res_attr);
  865. if (write_combine) {
  866. pdev->res_attr_wc[num] = res_attr;
  867. sprintf(res_attr_name, "resource%d_wc", num);
  868. res_attr->mmap = pci_mmap_resource_wc;
  869. } else {
  870. pdev->res_attr[num] = res_attr;
  871. sprintf(res_attr_name, "resource%d", num);
  872. res_attr->mmap = pci_mmap_resource_uc;
  873. }
  874. if (pci_resource_flags(pdev, num) & IORESOURCE_IO) {
  875. res_attr->read = pci_read_resource_io;
  876. res_attr->write = pci_write_resource_io;
  877. }
  878. res_attr->attr.name = res_attr_name;
  879. res_attr->attr.mode = S_IRUSR | S_IWUSR;
  880. res_attr->size = pci_resource_len(pdev, num);
  881. res_attr->private = &pdev->resource[num];
  882. retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
  883. } else
  884. retval = -ENOMEM;
  885. return retval;
  886. }
  887. /**
  888. * pci_create_resource_files - create resource files in sysfs for @dev
  889. * @pdev: dev in question
  890. *
  891. * Walk the resources in @pdev creating files for each resource available.
  892. */
  893. static int pci_create_resource_files(struct pci_dev *pdev)
  894. {
  895. int i;
  896. int retval;
  897. /* Expose the PCI resources from this device as files */
  898. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  899. /* skip empty resources */
  900. if (!pci_resource_len(pdev, i))
  901. continue;
  902. retval = pci_create_attr(pdev, i, 0);
  903. /* for prefetchable resources, create a WC mappable file */
  904. if (!retval && pdev->resource[i].flags & IORESOURCE_PREFETCH)
  905. retval = pci_create_attr(pdev, i, 1);
  906. if (retval) {
  907. pci_remove_resource_files(pdev);
  908. return retval;
  909. }
  910. }
  911. return 0;
  912. }
  913. #else /* !HAVE_PCI_MMAP */
  914. int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
  915. void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
  916. #endif /* HAVE_PCI_MMAP */
  917. /**
  918. * pci_write_rom - used to enable access to the PCI ROM display
  919. * @filp: sysfs file
  920. * @kobj: kernel object handle
  921. * @bin_attr: struct bin_attribute for this file
  922. * @buf: user input
  923. * @off: file offset
  924. * @count: number of byte in input
  925. *
  926. * writing anything except 0 enables it
  927. */
  928. static ssize_t
  929. pci_write_rom(struct file *filp, struct kobject *kobj,
  930. struct bin_attribute *bin_attr,
  931. char *buf, loff_t off, size_t count)
  932. {
  933. struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
  934. if ((off == 0) && (*buf == '0') && (count == 2))
  935. pdev->rom_attr_enabled = 0;
  936. else
  937. pdev->rom_attr_enabled = 1;
  938. return count;
  939. }
  940. /**
  941. * pci_read_rom - read a PCI ROM
  942. * @filp: sysfs file
  943. * @kobj: kernel object handle
  944. * @bin_attr: struct bin_attribute for this file
  945. * @buf: where to put the data we read from the ROM
  946. * @off: file offset
  947. * @count: number of bytes to read
  948. *
  949. * Put @count bytes starting at @off into @buf from the ROM in the PCI
  950. * device corresponding to @kobj.
  951. */
  952. static ssize_t
  953. pci_read_rom(struct file *filp, struct kobject *kobj,
  954. struct bin_attribute *bin_attr,
  955. char *buf, loff_t off, size_t count)
  956. {
  957. struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
  958. void __iomem *rom;
  959. size_t size;
  960. if (!pdev->rom_attr_enabled)
  961. return -EINVAL;
  962. rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
  963. if (!rom || !size)
  964. return -EIO;
  965. if (off >= size)
  966. count = 0;
  967. else {
  968. if (off + count > size)
  969. count = size - off;
  970. memcpy_fromio(buf, rom + off, count);
  971. }
  972. pci_unmap_rom(pdev, rom);
  973. return count;
  974. }
  975. static struct bin_attribute pci_config_attr = {
  976. .attr = {
  977. .name = "config",
  978. .mode = S_IRUGO | S_IWUSR,
  979. },
  980. .size = PCI_CFG_SPACE_SIZE,
  981. .read = pci_read_config,
  982. .write = pci_write_config,
  983. };
  984. static struct bin_attribute pcie_config_attr = {
  985. .attr = {
  986. .name = "config",
  987. .mode = S_IRUGO | S_IWUSR,
  988. },
  989. .size = PCI_CFG_SPACE_EXP_SIZE,
  990. .read = pci_read_config,
  991. .write = pci_write_config,
  992. };
  993. int __weak pcibios_add_platform_entries(struct pci_dev *dev)
  994. {
  995. return 0;
  996. }
  997. static ssize_t reset_store(struct device *dev,
  998. struct device_attribute *attr, const char *buf,
  999. size_t count)
  1000. {
  1001. struct pci_dev *pdev = to_pci_dev(dev);
  1002. unsigned long val;
  1003. ssize_t result = strict_strtoul(buf, 0, &val);
  1004. if (result < 0)
  1005. return result;
  1006. if (val != 1)
  1007. return -EINVAL;
  1008. result = pci_reset_function(pdev);
  1009. if (result < 0)
  1010. return result;
  1011. return count;
  1012. }
  1013. static struct device_attribute reset_attr = __ATTR(reset, 0200, NULL, reset_store);
  1014. static int pci_create_capabilities_sysfs(struct pci_dev *dev)
  1015. {
  1016. int retval;
  1017. struct bin_attribute *attr;
  1018. /* If the device has VPD, try to expose it in sysfs. */
  1019. if (dev->vpd) {
  1020. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  1021. if (!attr)
  1022. return -ENOMEM;
  1023. sysfs_bin_attr_init(attr);
  1024. attr->size = dev->vpd->len;
  1025. attr->attr.name = "vpd";
  1026. attr->attr.mode = S_IRUSR | S_IWUSR;
  1027. attr->read = read_vpd_attr;
  1028. attr->write = write_vpd_attr;
  1029. retval = sysfs_create_bin_file(&dev->dev.kobj, attr);
  1030. if (retval) {
  1031. kfree(attr);
  1032. return retval;
  1033. }
  1034. dev->vpd->attr = attr;
  1035. }
  1036. /* Active State Power Management */
  1037. pcie_aspm_create_sysfs_dev_files(dev);
  1038. if (!pci_probe_reset_function(dev)) {
  1039. retval = device_create_file(&dev->dev, &reset_attr);
  1040. if (retval)
  1041. goto error;
  1042. dev->reset_fn = 1;
  1043. }
  1044. return 0;
  1045. error:
  1046. pcie_aspm_remove_sysfs_dev_files(dev);
  1047. if (dev->vpd && dev->vpd->attr) {
  1048. sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
  1049. kfree(dev->vpd->attr);
  1050. }
  1051. return retval;
  1052. }
  1053. int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev)
  1054. {
  1055. int retval;
  1056. int rom_size = 0;
  1057. struct bin_attribute *attr;
  1058. if (!sysfs_initialized)
  1059. return -EACCES;
  1060. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  1061. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1062. else
  1063. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1064. if (retval)
  1065. goto err;
  1066. retval = pci_create_resource_files(pdev);
  1067. if (retval)
  1068. goto err_config_file;
  1069. if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
  1070. rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  1071. else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
  1072. rom_size = 0x20000;
  1073. /* If the device has a ROM, try to expose it in sysfs. */
  1074. if (rom_size) {
  1075. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  1076. if (!attr) {
  1077. retval = -ENOMEM;
  1078. goto err_resource_files;
  1079. }
  1080. sysfs_bin_attr_init(attr);
  1081. attr->size = rom_size;
  1082. attr->attr.name = "rom";
  1083. attr->attr.mode = S_IRUSR | S_IWUSR;
  1084. attr->read = pci_read_rom;
  1085. attr->write = pci_write_rom;
  1086. retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
  1087. if (retval) {
  1088. kfree(attr);
  1089. goto err_resource_files;
  1090. }
  1091. pdev->rom_attr = attr;
  1092. }
  1093. if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA) {
  1094. retval = device_create_file(&pdev->dev, &vga_attr);
  1095. if (retval)
  1096. goto err_rom_file;
  1097. }
  1098. /* add platform-specific attributes */
  1099. retval = pcibios_add_platform_entries(pdev);
  1100. if (retval)
  1101. goto err_vga_file;
  1102. /* add sysfs entries for various capabilities */
  1103. retval = pci_create_capabilities_sysfs(pdev);
  1104. if (retval)
  1105. goto err_vga_file;
  1106. pci_create_firmware_label_files(pdev);
  1107. return 0;
  1108. err_vga_file:
  1109. if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA)
  1110. device_remove_file(&pdev->dev, &vga_attr);
  1111. err_rom_file:
  1112. if (rom_size) {
  1113. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  1114. kfree(pdev->rom_attr);
  1115. pdev->rom_attr = NULL;
  1116. }
  1117. err_resource_files:
  1118. pci_remove_resource_files(pdev);
  1119. err_config_file:
  1120. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  1121. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1122. else
  1123. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1124. err:
  1125. return retval;
  1126. }
  1127. static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
  1128. {
  1129. if (dev->vpd && dev->vpd->attr) {
  1130. sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
  1131. kfree(dev->vpd->attr);
  1132. }
  1133. pcie_aspm_remove_sysfs_dev_files(dev);
  1134. if (dev->reset_fn) {
  1135. device_remove_file(&dev->dev, &reset_attr);
  1136. dev->reset_fn = 0;
  1137. }
  1138. }
  1139. /**
  1140. * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
  1141. * @pdev: device whose entries we should free
  1142. *
  1143. * Cleanup when @pdev is removed from sysfs.
  1144. */
  1145. void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
  1146. {
  1147. int rom_size = 0;
  1148. if (!sysfs_initialized)
  1149. return;
  1150. pci_remove_capabilities_sysfs(pdev);
  1151. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  1152. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1153. else
  1154. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1155. pci_remove_resource_files(pdev);
  1156. if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
  1157. rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  1158. else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
  1159. rom_size = 0x20000;
  1160. if (rom_size && pdev->rom_attr) {
  1161. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  1162. kfree(pdev->rom_attr);
  1163. }
  1164. pci_remove_firmware_label_files(pdev);
  1165. }
  1166. static int __init pci_sysfs_init(void)
  1167. {
  1168. struct pci_dev *pdev = NULL;
  1169. int retval;
  1170. sysfs_initialized = 1;
  1171. for_each_pci_dev(pdev) {
  1172. retval = pci_create_sysfs_dev_files(pdev);
  1173. if (retval) {
  1174. pci_dev_put(pdev);
  1175. return retval;
  1176. }
  1177. }
  1178. return 0;
  1179. }
  1180. late_initcall(pci_sysfs_init);