parport_serial.c 19 KB

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  1. /*
  2. * Support for common PCI multi-I/O cards (which is most of them)
  3. *
  4. * Copyright (C) 2001 Tim Waugh <twaugh@redhat.com>
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * as published by the Free Software Foundation; either version
  9. * 2 of the License, or (at your option) any later version.
  10. *
  11. *
  12. * Multi-function PCI cards are supposed to present separate logical
  13. * devices on the bus. A common thing to do seems to be to just use
  14. * one logical device with lots of base address registers for both
  15. * parallel ports and serial ports. This driver is for dealing with
  16. * that.
  17. *
  18. */
  19. #include <linux/types.h>
  20. #include <linux/module.h>
  21. #include <linux/init.h>
  22. #include <linux/slab.h>
  23. #include <linux/pci.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/parport.h>
  26. #include <linux/parport_pc.h>
  27. #include <linux/8250_pci.h>
  28. enum parport_pc_pci_cards {
  29. titan_110l = 0,
  30. titan_210l,
  31. netmos_9xx5_combo,
  32. netmos_9855,
  33. netmos_9855_2p,
  34. netmos_9900,
  35. netmos_9900_2p,
  36. netmos_99xx_1p,
  37. avlab_1s1p,
  38. avlab_1s2p,
  39. avlab_2s1p,
  40. siig_1s1p_10x,
  41. siig_2s1p_10x,
  42. siig_2p1s_20x,
  43. siig_1s1p_20x,
  44. siig_2s1p_20x,
  45. timedia_4078a,
  46. timedia_4079h,
  47. timedia_4085h,
  48. timedia_4088a,
  49. timedia_4089a,
  50. timedia_4095a,
  51. timedia_4096a,
  52. timedia_4078u,
  53. timedia_4079a,
  54. timedia_4085u,
  55. timedia_4079r,
  56. timedia_4079s,
  57. timedia_4079d,
  58. timedia_4079e,
  59. timedia_4079f,
  60. timedia_9079a,
  61. timedia_9079b,
  62. timedia_9079c,
  63. wch_ch353_2s1p,
  64. };
  65. /* each element directly indexed from enum list, above */
  66. struct parport_pc_pci {
  67. int numports;
  68. struct { /* BAR (base address registers) numbers in the config
  69. space header */
  70. int lo;
  71. int hi; /* -1 if not there, >6 for offset-method (max
  72. BAR is 6) */
  73. } addr[4];
  74. /* If set, this is called immediately after pci_enable_device.
  75. * If it returns non-zero, no probing will take place and the
  76. * ports will not be used. */
  77. int (*preinit_hook) (struct pci_dev *pdev, struct parport_pc_pci *card,
  78. int autoirq, int autodma);
  79. /* If set, this is called after probing for ports. If 'failed'
  80. * is non-zero we couldn't use any of the ports. */
  81. void (*postinit_hook) (struct pci_dev *pdev,
  82. struct parport_pc_pci *card, int failed);
  83. };
  84. static int __devinit netmos_parallel_init(struct pci_dev *dev, struct parport_pc_pci *par, int autoirq, int autodma)
  85. {
  86. /* the rule described below doesn't hold for this device */
  87. if (dev->device == PCI_DEVICE_ID_NETMOS_9835 &&
  88. dev->subsystem_vendor == PCI_VENDOR_ID_IBM &&
  89. dev->subsystem_device == 0x0299)
  90. return -ENODEV;
  91. if (dev->device == PCI_DEVICE_ID_NETMOS_9912) {
  92. par->numports = 1;
  93. } else {
  94. /*
  95. * Netmos uses the subdevice ID to indicate the number of parallel
  96. * and serial ports. The form is 0x00PS, where <P> is the number of
  97. * parallel ports and <S> is the number of serial ports.
  98. */
  99. par->numports = (dev->subsystem_device & 0xf0) >> 4;
  100. if (par->numports > ARRAY_SIZE(par->addr))
  101. par->numports = ARRAY_SIZE(par->addr);
  102. }
  103. return 0;
  104. }
  105. static struct parport_pc_pci cards[] __devinitdata = {
  106. /* titan_110l */ { 1, { { 3, -1 }, } },
  107. /* titan_210l */ { 1, { { 3, -1 }, } },
  108. /* netmos_9xx5_combo */ { 1, { { 2, -1 }, }, netmos_parallel_init },
  109. /* netmos_9855 */ { 1, { { 0, -1 }, }, netmos_parallel_init },
  110. /* netmos_9855_2p */ { 2, { { 0, -1 }, { 2, -1 }, } },
  111. /* netmos_9900 */ {1, { { 3, 4 }, }, netmos_parallel_init },
  112. /* netmos_9900_2p */ {2, { { 0, 1 }, { 3, 4 }, } },
  113. /* netmos_99xx_1p */ {1, { { 0, 1 }, } },
  114. /* avlab_1s1p */ { 1, { { 1, 2}, } },
  115. /* avlab_1s2p */ { 2, { { 1, 2}, { 3, 4 },} },
  116. /* avlab_2s1p */ { 1, { { 2, 3}, } },
  117. /* siig_1s1p_10x */ { 1, { { 3, 4 }, } },
  118. /* siig_2s1p_10x */ { 1, { { 4, 5 }, } },
  119. /* siig_2p1s_20x */ { 2, { { 1, 2 }, { 3, 4 }, } },
  120. /* siig_1s1p_20x */ { 1, { { 1, 2 }, } },
  121. /* siig_2s1p_20x */ { 1, { { 2, 3 }, } },
  122. /* timedia_4078a */ { 1, { { 2, -1 }, } },
  123. /* timedia_4079h */ { 1, { { 2, 3 }, } },
  124. /* timedia_4085h */ { 2, { { 2, -1 }, { 4, -1 }, } },
  125. /* timedia_4088a */ { 2, { { 2, 3 }, { 4, 5 }, } },
  126. /* timedia_4089a */ { 2, { { 2, 3 }, { 4, 5 }, } },
  127. /* timedia_4095a */ { 2, { { 2, 3 }, { 4, 5 }, } },
  128. /* timedia_4096a */ { 2, { { 2, 3 }, { 4, 5 }, } },
  129. /* timedia_4078u */ { 1, { { 2, -1 }, } },
  130. /* timedia_4079a */ { 1, { { 2, 3 }, } },
  131. /* timedia_4085u */ { 2, { { 2, -1 }, { 4, -1 }, } },
  132. /* timedia_4079r */ { 1, { { 2, 3 }, } },
  133. /* timedia_4079s */ { 1, { { 2, 3 }, } },
  134. /* timedia_4079d */ { 1, { { 2, 3 }, } },
  135. /* timedia_4079e */ { 1, { { 2, 3 }, } },
  136. /* timedia_4079f */ { 1, { { 2, 3 }, } },
  137. /* timedia_9079a */ { 1, { { 2, 3 }, } },
  138. /* timedia_9079b */ { 1, { { 2, 3 }, } },
  139. /* timedia_9079c */ { 1, { { 2, 3 }, } },
  140. /* wch_ch353_2s1p*/ { 1, { { 2, -1}, } },
  141. };
  142. static struct pci_device_id parport_serial_pci_tbl[] = {
  143. /* PCI cards */
  144. { PCI_VENDOR_ID_TITAN, PCI_DEVICE_ID_TITAN_110L,
  145. PCI_ANY_ID, PCI_ANY_ID, 0, 0, titan_110l },
  146. { PCI_VENDOR_ID_TITAN, PCI_DEVICE_ID_TITAN_210L,
  147. PCI_ANY_ID, PCI_ANY_ID, 0, 0, titan_210l },
  148. { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9735,
  149. PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9xx5_combo },
  150. { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9745,
  151. PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9xx5_combo },
  152. { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9835,
  153. PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9xx5_combo },
  154. { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9845,
  155. PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9xx5_combo },
  156. { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9855,
  157. 0x1000, 0x0020, 0, 0, netmos_9855_2p },
  158. { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9855,
  159. 0x1000, 0x0022, 0, 0, netmos_9855_2p },
  160. { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9855,
  161. PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9855 },
  162. { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9900,
  163. 0xA000, 0x3011, 0, 0, netmos_9900 },
  164. { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9900,
  165. 0xA000, 0x3012, 0, 0, netmos_9900 },
  166. { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9900,
  167. 0xA000, 0x3020, 0, 0, netmos_9900_2p },
  168. { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9912,
  169. 0xA000, 0x2000, 0, 0, netmos_99xx_1p },
  170. /* PCI_VENDOR_ID_AVLAB/Intek21 has another bunch of cards ...*/
  171. { PCI_VENDOR_ID_AFAVLAB, 0x2110,
  172. PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_1s1p },
  173. { PCI_VENDOR_ID_AFAVLAB, 0x2111,
  174. PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_1s1p },
  175. { PCI_VENDOR_ID_AFAVLAB, 0x2112,
  176. PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_1s1p },
  177. { PCI_VENDOR_ID_AFAVLAB, 0x2140,
  178. PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_1s2p },
  179. { PCI_VENDOR_ID_AFAVLAB, 0x2141,
  180. PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_1s2p },
  181. { PCI_VENDOR_ID_AFAVLAB, 0x2142,
  182. PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_1s2p },
  183. { PCI_VENDOR_ID_AFAVLAB, 0x2160,
  184. PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_2s1p },
  185. { PCI_VENDOR_ID_AFAVLAB, 0x2161,
  186. PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_2s1p },
  187. { PCI_VENDOR_ID_AFAVLAB, 0x2162,
  188. PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_2s1p },
  189. { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1S1P_10x_550,
  190. PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_1s1p_10x },
  191. { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1S1P_10x_650,
  192. PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_1s1p_10x },
  193. { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1S1P_10x_850,
  194. PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_1s1p_10x },
  195. { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2S1P_10x_550,
  196. PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2s1p_10x },
  197. { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2S1P_10x_650,
  198. PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2s1p_10x },
  199. { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2S1P_10x_850,
  200. PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2s1p_10x },
  201. { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2P1S_20x_550,
  202. PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2p1s_20x },
  203. { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2P1S_20x_650,
  204. PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2p1s_20x },
  205. { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2P1S_20x_850,
  206. PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2p1s_20x },
  207. { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1S1P_20x_550,
  208. PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2s1p_20x },
  209. { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1S1P_20x_650,
  210. PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_1s1p_20x },
  211. { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1S1P_20x_850,
  212. PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_1s1p_20x },
  213. { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2S1P_20x_550,
  214. PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2s1p_20x },
  215. { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2S1P_20x_650,
  216. PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2s1p_20x },
  217. { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2S1P_20x_850,
  218. PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2s1p_20x },
  219. /* PCI_VENDOR_ID_TIMEDIA/SUNIX has many differing cards ...*/
  220. { 0x1409, 0x7168, 0x1409, 0x4078, 0, 0, timedia_4078a },
  221. { 0x1409, 0x7168, 0x1409, 0x4079, 0, 0, timedia_4079h },
  222. { 0x1409, 0x7168, 0x1409, 0x4085, 0, 0, timedia_4085h },
  223. { 0x1409, 0x7168, 0x1409, 0x4088, 0, 0, timedia_4088a },
  224. { 0x1409, 0x7168, 0x1409, 0x4089, 0, 0, timedia_4089a },
  225. { 0x1409, 0x7168, 0x1409, 0x4095, 0, 0, timedia_4095a },
  226. { 0x1409, 0x7168, 0x1409, 0x4096, 0, 0, timedia_4096a },
  227. { 0x1409, 0x7168, 0x1409, 0x5078, 0, 0, timedia_4078u },
  228. { 0x1409, 0x7168, 0x1409, 0x5079, 0, 0, timedia_4079a },
  229. { 0x1409, 0x7168, 0x1409, 0x5085, 0, 0, timedia_4085u },
  230. { 0x1409, 0x7168, 0x1409, 0x6079, 0, 0, timedia_4079r },
  231. { 0x1409, 0x7168, 0x1409, 0x7079, 0, 0, timedia_4079s },
  232. { 0x1409, 0x7168, 0x1409, 0x8079, 0, 0, timedia_4079d },
  233. { 0x1409, 0x7168, 0x1409, 0x9079, 0, 0, timedia_4079e },
  234. { 0x1409, 0x7168, 0x1409, 0xa079, 0, 0, timedia_4079f },
  235. { 0x1409, 0x7168, 0x1409, 0xb079, 0, 0, timedia_9079a },
  236. { 0x1409, 0x7168, 0x1409, 0xc079, 0, 0, timedia_9079b },
  237. { 0x1409, 0x7168, 0x1409, 0xd079, 0, 0, timedia_9079c },
  238. /* WCH CARDS */
  239. { 0x4348, 0x7053, 0x4348, 0x3253, 0, 0, wch_ch353_2s1p},
  240. { 0, } /* terminate list */
  241. };
  242. MODULE_DEVICE_TABLE(pci,parport_serial_pci_tbl);
  243. /*
  244. * This table describes the serial "geometry" of these boards. Any
  245. * quirks for these can be found in drivers/serial/8250_pci.c
  246. *
  247. * Cards not tested are marked n/t
  248. * If you have one of these cards and it works for you, please tell me..
  249. */
  250. static struct pciserial_board pci_parport_serial_boards[] __devinitdata = {
  251. [titan_110l] = {
  252. .flags = FL_BASE1 | FL_BASE_BARS,
  253. .num_ports = 1,
  254. .base_baud = 921600,
  255. .uart_offset = 8,
  256. },
  257. [titan_210l] = {
  258. .flags = FL_BASE1 | FL_BASE_BARS,
  259. .num_ports = 2,
  260. .base_baud = 921600,
  261. .uart_offset = 8,
  262. },
  263. [netmos_9xx5_combo] = {
  264. .flags = FL_BASE0 | FL_BASE_BARS,
  265. .num_ports = 1,
  266. .base_baud = 115200,
  267. .uart_offset = 8,
  268. },
  269. [netmos_9855] = {
  270. .flags = FL_BASE2 | FL_BASE_BARS,
  271. .num_ports = 1,
  272. .base_baud = 115200,
  273. .uart_offset = 8,
  274. },
  275. [netmos_9855_2p] = {
  276. .flags = FL_BASE4 | FL_BASE_BARS,
  277. .num_ports = 1,
  278. .base_baud = 115200,
  279. .uart_offset = 8,
  280. },
  281. [netmos_9900] = { /* n/t */
  282. .flags = FL_BASE0 | FL_BASE_BARS,
  283. .num_ports = 1,
  284. .base_baud = 115200,
  285. .uart_offset = 8,
  286. },
  287. [netmos_9900_2p] = { /* parallel only */ /* n/t */
  288. .flags = FL_BASE0,
  289. .num_ports = 0,
  290. .base_baud = 115200,
  291. .uart_offset = 8,
  292. },
  293. [netmos_99xx_1p] = { /* parallel only */ /* n/t */
  294. .flags = FL_BASE0,
  295. .num_ports = 0,
  296. .base_baud = 115200,
  297. .uart_offset = 8,
  298. },
  299. [avlab_1s1p] = { /* n/t */
  300. .flags = FL_BASE0 | FL_BASE_BARS,
  301. .num_ports = 1,
  302. .base_baud = 115200,
  303. .uart_offset = 8,
  304. },
  305. [avlab_1s2p] = { /* n/t */
  306. .flags = FL_BASE0 | FL_BASE_BARS,
  307. .num_ports = 1,
  308. .base_baud = 115200,
  309. .uart_offset = 8,
  310. },
  311. [avlab_2s1p] = { /* n/t */
  312. .flags = FL_BASE0 | FL_BASE_BARS,
  313. .num_ports = 2,
  314. .base_baud = 115200,
  315. .uart_offset = 8,
  316. },
  317. [siig_1s1p_10x] = {
  318. .flags = FL_BASE2,
  319. .num_ports = 1,
  320. .base_baud = 460800,
  321. .uart_offset = 8,
  322. },
  323. [siig_2s1p_10x] = {
  324. .flags = FL_BASE2,
  325. .num_ports = 1,
  326. .base_baud = 921600,
  327. .uart_offset = 8,
  328. },
  329. [siig_2p1s_20x] = {
  330. .flags = FL_BASE0,
  331. .num_ports = 1,
  332. .base_baud = 921600,
  333. .uart_offset = 8,
  334. },
  335. [siig_1s1p_20x] = {
  336. .flags = FL_BASE0,
  337. .num_ports = 1,
  338. .base_baud = 921600,
  339. .uart_offset = 8,
  340. },
  341. [siig_2s1p_20x] = {
  342. .flags = FL_BASE0,
  343. .num_ports = 1,
  344. .base_baud = 921600,
  345. .uart_offset = 8,
  346. },
  347. [timedia_4078a] = {
  348. .flags = FL_BASE0|FL_BASE_BARS,
  349. .num_ports = 1,
  350. .base_baud = 921600,
  351. .uart_offset = 8,
  352. },
  353. [timedia_4079h] = {
  354. .flags = FL_BASE0|FL_BASE_BARS,
  355. .num_ports = 1,
  356. .base_baud = 921600,
  357. .uart_offset = 8,
  358. },
  359. [timedia_4085h] = {
  360. .flags = FL_BASE0|FL_BASE_BARS,
  361. .num_ports = 1,
  362. .base_baud = 921600,
  363. .uart_offset = 8,
  364. },
  365. [timedia_4088a] = {
  366. .flags = FL_BASE0|FL_BASE_BARS,
  367. .num_ports = 1,
  368. .base_baud = 921600,
  369. .uart_offset = 8,
  370. },
  371. [timedia_4089a] = {
  372. .flags = FL_BASE0|FL_BASE_BARS,
  373. .num_ports = 1,
  374. .base_baud = 921600,
  375. .uart_offset = 8,
  376. },
  377. [timedia_4095a] = {
  378. .flags = FL_BASE0|FL_BASE_BARS,
  379. .num_ports = 1,
  380. .base_baud = 921600,
  381. .uart_offset = 8,
  382. },
  383. [timedia_4096a] = {
  384. .flags = FL_BASE0|FL_BASE_BARS,
  385. .num_ports = 1,
  386. .base_baud = 921600,
  387. .uart_offset = 8,
  388. },
  389. [timedia_4078u] = {
  390. .flags = FL_BASE0|FL_BASE_BARS,
  391. .num_ports = 1,
  392. .base_baud = 921600,
  393. .uart_offset = 8,
  394. },
  395. [timedia_4079a] = {
  396. .flags = FL_BASE0|FL_BASE_BARS,
  397. .num_ports = 1,
  398. .base_baud = 921600,
  399. .uart_offset = 8,
  400. },
  401. [timedia_4085u] = {
  402. .flags = FL_BASE0|FL_BASE_BARS,
  403. .num_ports = 1,
  404. .base_baud = 921600,
  405. .uart_offset = 8,
  406. },
  407. [timedia_4079r] = {
  408. .flags = FL_BASE0|FL_BASE_BARS,
  409. .num_ports = 1,
  410. .base_baud = 921600,
  411. .uart_offset = 8,
  412. },
  413. [timedia_4079s] = {
  414. .flags = FL_BASE0|FL_BASE_BARS,
  415. .num_ports = 1,
  416. .base_baud = 921600,
  417. .uart_offset = 8,
  418. },
  419. [timedia_4079d] = {
  420. .flags = FL_BASE0|FL_BASE_BARS,
  421. .num_ports = 1,
  422. .base_baud = 921600,
  423. .uart_offset = 8,
  424. },
  425. [timedia_4079e] = {
  426. .flags = FL_BASE0|FL_BASE_BARS,
  427. .num_ports = 1,
  428. .base_baud = 921600,
  429. .uart_offset = 8,
  430. },
  431. [timedia_4079f] = {
  432. .flags = FL_BASE0|FL_BASE_BARS,
  433. .num_ports = 1,
  434. .base_baud = 921600,
  435. .uart_offset = 8,
  436. },
  437. [timedia_9079a] = {
  438. .flags = FL_BASE0|FL_BASE_BARS,
  439. .num_ports = 1,
  440. .base_baud = 921600,
  441. .uart_offset = 8,
  442. },
  443. [timedia_9079b] = {
  444. .flags = FL_BASE0|FL_BASE_BARS,
  445. .num_ports = 1,
  446. .base_baud = 921600,
  447. .uart_offset = 8,
  448. },
  449. [timedia_9079c] = {
  450. .flags = FL_BASE0|FL_BASE_BARS,
  451. .num_ports = 1,
  452. .base_baud = 921600,
  453. .uart_offset = 8,
  454. },
  455. [wch_ch353_2s1p] = {
  456. .flags = FL_BASE0|FL_BASE_BARS,
  457. .num_ports = 2,
  458. .base_baud = 115200,
  459. .uart_offset = 8,
  460. },
  461. };
  462. struct parport_serial_private {
  463. struct serial_private *serial;
  464. int num_par;
  465. struct parport *port[PARPORT_MAX];
  466. struct parport_pc_pci par;
  467. };
  468. /* Register the serial port(s) of a PCI card. */
  469. static int __devinit serial_register (struct pci_dev *dev,
  470. const struct pci_device_id *id)
  471. {
  472. struct parport_serial_private *priv = pci_get_drvdata (dev);
  473. struct pciserial_board *board;
  474. struct serial_private *serial;
  475. board = &pci_parport_serial_boards[id->driver_data];
  476. if (board->num_ports == 0)
  477. return 0;
  478. serial = pciserial_init_ports(dev, board);
  479. if (IS_ERR(serial))
  480. return PTR_ERR(serial);
  481. priv->serial = serial;
  482. return 0;
  483. }
  484. /* Register the parallel port(s) of a PCI card. */
  485. static int __devinit parport_register (struct pci_dev *dev,
  486. const struct pci_device_id *id)
  487. {
  488. struct parport_pc_pci *card;
  489. struct parport_serial_private *priv = pci_get_drvdata (dev);
  490. int n, success = 0;
  491. priv->par = cards[id->driver_data];
  492. card = &priv->par;
  493. if (card->preinit_hook &&
  494. card->preinit_hook (dev, card, PARPORT_IRQ_NONE, PARPORT_DMA_NONE))
  495. return -ENODEV;
  496. for (n = 0; n < card->numports; n++) {
  497. struct parport *port;
  498. int lo = card->addr[n].lo;
  499. int hi = card->addr[n].hi;
  500. unsigned long io_lo, io_hi;
  501. int irq;
  502. if (priv->num_par == ARRAY_SIZE (priv->port)) {
  503. printk (KERN_WARNING
  504. "parport_serial: %s: only %zu parallel ports "
  505. "supported (%d reported)\n", pci_name (dev),
  506. ARRAY_SIZE(priv->port), card->numports);
  507. break;
  508. }
  509. io_lo = pci_resource_start (dev, lo);
  510. io_hi = 0;
  511. if ((hi >= 0) && (hi <= 6))
  512. io_hi = pci_resource_start (dev, hi);
  513. else if (hi > 6)
  514. io_lo += hi; /* Reinterpret the meaning of
  515. "hi" as an offset (see SYBA
  516. def.) */
  517. /* TODO: test if sharing interrupts works */
  518. irq = dev->irq;
  519. if (irq == IRQ_NONE) {
  520. dev_dbg(&dev->dev,
  521. "PCI parallel port detected: I/O at %#lx(%#lx)\n",
  522. io_lo, io_hi);
  523. irq = PARPORT_IRQ_NONE;
  524. } else {
  525. dev_dbg(&dev->dev,
  526. "PCI parallel port detected: I/O at %#lx(%#lx), IRQ %d\n",
  527. io_lo, io_hi, irq);
  528. }
  529. port = parport_pc_probe_port (io_lo, io_hi, irq,
  530. PARPORT_DMA_NONE, &dev->dev, IRQF_SHARED);
  531. if (port) {
  532. priv->port[priv->num_par++] = port;
  533. success = 1;
  534. }
  535. }
  536. if (card->postinit_hook)
  537. card->postinit_hook (dev, card, !success);
  538. return 0;
  539. }
  540. static int __devinit parport_serial_pci_probe (struct pci_dev *dev,
  541. const struct pci_device_id *id)
  542. {
  543. struct parport_serial_private *priv;
  544. int err;
  545. priv = kzalloc (sizeof *priv, GFP_KERNEL);
  546. if (!priv)
  547. return -ENOMEM;
  548. pci_set_drvdata (dev, priv);
  549. err = pci_enable_device (dev);
  550. if (err) {
  551. pci_set_drvdata (dev, NULL);
  552. kfree (priv);
  553. return err;
  554. }
  555. if (parport_register (dev, id)) {
  556. pci_set_drvdata (dev, NULL);
  557. kfree (priv);
  558. return -ENODEV;
  559. }
  560. if (serial_register (dev, id)) {
  561. int i;
  562. for (i = 0; i < priv->num_par; i++)
  563. parport_pc_unregister_port (priv->port[i]);
  564. pci_set_drvdata (dev, NULL);
  565. kfree (priv);
  566. return -ENODEV;
  567. }
  568. return 0;
  569. }
  570. static void __devexit parport_serial_pci_remove (struct pci_dev *dev)
  571. {
  572. struct parport_serial_private *priv = pci_get_drvdata (dev);
  573. int i;
  574. pci_set_drvdata(dev, NULL);
  575. // Serial ports
  576. if (priv->serial)
  577. pciserial_remove_ports(priv->serial);
  578. // Parallel ports
  579. for (i = 0; i < priv->num_par; i++)
  580. parport_pc_unregister_port (priv->port[i]);
  581. kfree (priv);
  582. return;
  583. }
  584. #ifdef CONFIG_PM
  585. static int parport_serial_pci_suspend(struct pci_dev *dev, pm_message_t state)
  586. {
  587. struct parport_serial_private *priv = pci_get_drvdata(dev);
  588. if (priv->serial)
  589. pciserial_suspend_ports(priv->serial);
  590. /* FIXME: What about parport? */
  591. pci_save_state(dev);
  592. pci_set_power_state(dev, pci_choose_state(dev, state));
  593. return 0;
  594. }
  595. static int parport_serial_pci_resume(struct pci_dev *dev)
  596. {
  597. struct parport_serial_private *priv = pci_get_drvdata(dev);
  598. int err;
  599. pci_set_power_state(dev, PCI_D0);
  600. pci_restore_state(dev);
  601. /*
  602. * The device may have been disabled. Re-enable it.
  603. */
  604. err = pci_enable_device(dev);
  605. if (err) {
  606. printk(KERN_ERR "parport_serial: %s: error enabling "
  607. "device for resume (%d)\n", pci_name(dev), err);
  608. return err;
  609. }
  610. if (priv->serial)
  611. pciserial_resume_ports(priv->serial);
  612. /* FIXME: What about parport? */
  613. return 0;
  614. }
  615. #endif
  616. static struct pci_driver parport_serial_pci_driver = {
  617. .name = "parport_serial",
  618. .id_table = parport_serial_pci_tbl,
  619. .probe = parport_serial_pci_probe,
  620. .remove = __devexit_p(parport_serial_pci_remove),
  621. #ifdef CONFIG_PM
  622. .suspend = parport_serial_pci_suspend,
  623. .resume = parport_serial_pci_resume,
  624. #endif
  625. };
  626. static int __init parport_serial_init (void)
  627. {
  628. return pci_register_driver (&parport_serial_pci_driver);
  629. }
  630. static void __exit parport_serial_exit (void)
  631. {
  632. pci_unregister_driver (&parport_serial_pci_driver);
  633. return;
  634. }
  635. MODULE_AUTHOR("Tim Waugh <twaugh@redhat.com>");
  636. MODULE_DESCRIPTION("Driver for common parallel+serial multi-I/O PCI cards");
  637. MODULE_LICENSE("GPL");
  638. module_init(parport_serial_init);
  639. module_exit(parport_serial_exit);