bcmsdh_sdmmc.c 17 KB

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  1. /*
  2. * Copyright (c) 2010 Broadcom Corporation
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
  11. * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
  13. * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
  14. * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  17. #include <linux/types.h>
  18. #include <linux/netdevice.h>
  19. #include <linux/mmc/sdio.h>
  20. #include <linux/mmc/core.h>
  21. #include <linux/mmc/sdio_func.h>
  22. #include <linux/mmc/sdio_ids.h>
  23. #include <linux/mmc/card.h>
  24. #include <linux/suspend.h>
  25. #include <linux/errno.h>
  26. #include <linux/sched.h> /* request_irq() */
  27. #include <linux/module.h>
  28. #include <linux/platform_device.h>
  29. #include <net/cfg80211.h>
  30. #include <defs.h>
  31. #include <brcm_hw_ids.h>
  32. #include <brcmu_utils.h>
  33. #include <brcmu_wifi.h>
  34. #include "sdio_host.h"
  35. #include "dhd_dbg.h"
  36. #include "dhd_bus.h"
  37. #define SDIO_VENDOR_ID_BROADCOM 0x02d0
  38. #define DMA_ALIGN_MASK 0x03
  39. #define SDIO_DEVICE_ID_BROADCOM_43241 0x4324
  40. #define SDIO_DEVICE_ID_BROADCOM_4329 0x4329
  41. #define SDIO_DEVICE_ID_BROADCOM_4330 0x4330
  42. #define SDIO_DEVICE_ID_BROADCOM_4334 0x4334
  43. #define SDIO_FUNC1_BLOCKSIZE 64
  44. #define SDIO_FUNC2_BLOCKSIZE 512
  45. /* devices we support, null terminated */
  46. static const struct sdio_device_id brcmf_sdmmc_ids[] = {
  47. {SDIO_DEVICE(SDIO_VENDOR_ID_BROADCOM, SDIO_DEVICE_ID_BROADCOM_43241)},
  48. {SDIO_DEVICE(SDIO_VENDOR_ID_BROADCOM, SDIO_DEVICE_ID_BROADCOM_4329)},
  49. {SDIO_DEVICE(SDIO_VENDOR_ID_BROADCOM, SDIO_DEVICE_ID_BROADCOM_4330)},
  50. {SDIO_DEVICE(SDIO_VENDOR_ID_BROADCOM, SDIO_DEVICE_ID_BROADCOM_4334)},
  51. { /* end: all zeroes */ },
  52. };
  53. MODULE_DEVICE_TABLE(sdio, brcmf_sdmmc_ids);
  54. #ifdef CONFIG_BRCMFMAC_SDIO_OOB
  55. static struct list_head oobirq_lh;
  56. struct brcmf_sdio_oobirq {
  57. unsigned int irq;
  58. unsigned long flags;
  59. struct list_head list;
  60. };
  61. #endif /* CONFIG_BRCMFMAC_SDIO_OOB */
  62. static bool
  63. brcmf_pm_resume_error(struct brcmf_sdio_dev *sdiodev)
  64. {
  65. bool is_err = false;
  66. #ifdef CONFIG_PM_SLEEP
  67. is_err = atomic_read(&sdiodev->suspend);
  68. #endif
  69. return is_err;
  70. }
  71. static void
  72. brcmf_pm_resume_wait(struct brcmf_sdio_dev *sdiodev, wait_queue_head_t *wq)
  73. {
  74. #ifdef CONFIG_PM_SLEEP
  75. int retry = 0;
  76. while (atomic_read(&sdiodev->suspend) && retry++ != 30)
  77. wait_event_timeout(*wq, false, HZ/100);
  78. #endif
  79. }
  80. static inline int brcmf_sdioh_f0_write_byte(struct brcmf_sdio_dev *sdiodev,
  81. uint regaddr, u8 *byte)
  82. {
  83. struct sdio_func *sdfunc = sdiodev->func[0];
  84. int err_ret;
  85. /*
  86. * Can only directly write to some F0 registers.
  87. * Handle F2 enable/disable and Abort command
  88. * as a special case.
  89. */
  90. if (regaddr == SDIO_CCCR_IOEx) {
  91. sdfunc = sdiodev->func[2];
  92. if (sdfunc) {
  93. if (*byte & SDIO_FUNC_ENABLE_2) {
  94. /* Enable Function 2 */
  95. err_ret = sdio_enable_func(sdfunc);
  96. if (err_ret)
  97. brcmf_dbg(ERROR,
  98. "enable F2 failed:%d\n",
  99. err_ret);
  100. } else {
  101. /* Disable Function 2 */
  102. err_ret = sdio_disable_func(sdfunc);
  103. if (err_ret)
  104. brcmf_dbg(ERROR,
  105. "Disable F2 failed:%d\n",
  106. err_ret);
  107. }
  108. }
  109. } else if ((regaddr == SDIO_CCCR_ABORT) ||
  110. (regaddr == SDIO_CCCR_IENx)) {
  111. sdfunc = kmemdup(sdiodev->func[0], sizeof(struct sdio_func),
  112. GFP_KERNEL);
  113. if (!sdfunc)
  114. return -ENOMEM;
  115. sdfunc->num = 0;
  116. sdio_writeb(sdfunc, *byte, regaddr, &err_ret);
  117. kfree(sdfunc);
  118. } else if (regaddr < 0xF0) {
  119. brcmf_dbg(ERROR, "F0 Wr:0x%02x: write disallowed\n", regaddr);
  120. err_ret = -EPERM;
  121. } else {
  122. sdio_f0_writeb(sdfunc, *byte, regaddr, &err_ret);
  123. }
  124. return err_ret;
  125. }
  126. int brcmf_sdioh_request_byte(struct brcmf_sdio_dev *sdiodev, uint rw, uint func,
  127. uint regaddr, u8 *byte)
  128. {
  129. int err_ret;
  130. brcmf_dbg(INFO, "rw=%d, func=%d, addr=0x%05x\n", rw, func, regaddr);
  131. brcmf_pm_resume_wait(sdiodev, &sdiodev->request_byte_wait);
  132. if (brcmf_pm_resume_error(sdiodev))
  133. return -EIO;
  134. if (rw && func == 0) {
  135. /* handle F0 separately */
  136. err_ret = brcmf_sdioh_f0_write_byte(sdiodev, regaddr, byte);
  137. } else {
  138. if (rw) /* CMD52 Write */
  139. sdio_writeb(sdiodev->func[func], *byte, regaddr,
  140. &err_ret);
  141. else if (func == 0) {
  142. *byte = sdio_f0_readb(sdiodev->func[func], regaddr,
  143. &err_ret);
  144. } else {
  145. *byte = sdio_readb(sdiodev->func[func], regaddr,
  146. &err_ret);
  147. }
  148. }
  149. if (err_ret)
  150. brcmf_dbg(ERROR, "Failed to %s byte F%d:@0x%05x=%02x, Err: %d\n",
  151. rw ? "write" : "read", func, regaddr, *byte, err_ret);
  152. return err_ret;
  153. }
  154. int brcmf_sdioh_request_word(struct brcmf_sdio_dev *sdiodev,
  155. uint rw, uint func, uint addr, u32 *word,
  156. uint nbytes)
  157. {
  158. int err_ret = -EIO;
  159. if (func == 0) {
  160. brcmf_dbg(ERROR, "Only CMD52 allowed to F0\n");
  161. return -EINVAL;
  162. }
  163. brcmf_dbg(INFO, "rw=%d, func=%d, addr=0x%05x, nbytes=%d\n",
  164. rw, func, addr, nbytes);
  165. brcmf_pm_resume_wait(sdiodev, &sdiodev->request_word_wait);
  166. if (brcmf_pm_resume_error(sdiodev))
  167. return -EIO;
  168. if (rw) { /* CMD52 Write */
  169. if (nbytes == 4)
  170. sdio_writel(sdiodev->func[func], *word, addr,
  171. &err_ret);
  172. else if (nbytes == 2)
  173. sdio_writew(sdiodev->func[func], (*word & 0xFFFF),
  174. addr, &err_ret);
  175. else
  176. brcmf_dbg(ERROR, "Invalid nbytes: %d\n", nbytes);
  177. } else { /* CMD52 Read */
  178. if (nbytes == 4)
  179. *word = sdio_readl(sdiodev->func[func], addr, &err_ret);
  180. else if (nbytes == 2)
  181. *word = sdio_readw(sdiodev->func[func], addr,
  182. &err_ret) & 0xFFFF;
  183. else
  184. brcmf_dbg(ERROR, "Invalid nbytes: %d\n", nbytes);
  185. }
  186. if (err_ret)
  187. brcmf_dbg(ERROR, "Failed to %s word, Err: 0x%08x\n",
  188. rw ? "write" : "read", err_ret);
  189. return err_ret;
  190. }
  191. /* precondition: host controller is claimed */
  192. static int
  193. brcmf_sdioh_request_data(struct brcmf_sdio_dev *sdiodev, uint write, bool fifo,
  194. uint func, uint addr, struct sk_buff *pkt, uint pktlen)
  195. {
  196. int err_ret = 0;
  197. if ((write) && (!fifo)) {
  198. err_ret = sdio_memcpy_toio(sdiodev->func[func], addr,
  199. ((u8 *) (pkt->data)), pktlen);
  200. } else if (write) {
  201. err_ret = sdio_memcpy_toio(sdiodev->func[func], addr,
  202. ((u8 *) (pkt->data)), pktlen);
  203. } else if (fifo) {
  204. err_ret = sdio_readsb(sdiodev->func[func],
  205. ((u8 *) (pkt->data)), addr, pktlen);
  206. } else {
  207. err_ret = sdio_memcpy_fromio(sdiodev->func[func],
  208. ((u8 *) (pkt->data)),
  209. addr, pktlen);
  210. }
  211. return err_ret;
  212. }
  213. /*
  214. * This function takes a queue of packets. The packets on the queue
  215. * are assumed to be properly aligned by the caller.
  216. */
  217. int
  218. brcmf_sdioh_request_chain(struct brcmf_sdio_dev *sdiodev, uint fix_inc,
  219. uint write, uint func, uint addr,
  220. struct sk_buff_head *pktq)
  221. {
  222. bool fifo = (fix_inc == SDIOH_DATA_FIX);
  223. u32 SGCount = 0;
  224. int err_ret = 0;
  225. struct sk_buff *pkt;
  226. brcmf_dbg(TRACE, "Enter\n");
  227. brcmf_pm_resume_wait(sdiodev, &sdiodev->request_chain_wait);
  228. if (brcmf_pm_resume_error(sdiodev))
  229. return -EIO;
  230. skb_queue_walk(pktq, pkt) {
  231. uint pkt_len = pkt->len;
  232. pkt_len += 3;
  233. pkt_len &= 0xFFFFFFFC;
  234. err_ret = brcmf_sdioh_request_data(sdiodev, write, fifo, func,
  235. addr, pkt, pkt_len);
  236. if (err_ret) {
  237. brcmf_dbg(ERROR, "%s FAILED %p[%d], addr=0x%05x, pkt_len=%d, ERR=0x%08x\n",
  238. write ? "TX" : "RX", pkt, SGCount, addr,
  239. pkt_len, err_ret);
  240. } else {
  241. brcmf_dbg(TRACE, "%s xfr'd %p[%d], addr=0x%05x, len=%d\n",
  242. write ? "TX" : "RX", pkt, SGCount, addr,
  243. pkt_len);
  244. }
  245. if (!fifo)
  246. addr += pkt_len;
  247. SGCount++;
  248. }
  249. brcmf_dbg(TRACE, "Exit\n");
  250. return err_ret;
  251. }
  252. /*
  253. * This function takes a single DMA-able packet.
  254. */
  255. int brcmf_sdioh_request_buffer(struct brcmf_sdio_dev *sdiodev,
  256. uint fix_inc, uint write, uint func, uint addr,
  257. struct sk_buff *pkt)
  258. {
  259. int status;
  260. uint pkt_len;
  261. bool fifo = (fix_inc == SDIOH_DATA_FIX);
  262. brcmf_dbg(TRACE, "Enter\n");
  263. if (pkt == NULL)
  264. return -EINVAL;
  265. pkt_len = pkt->len;
  266. brcmf_pm_resume_wait(sdiodev, &sdiodev->request_buffer_wait);
  267. if (brcmf_pm_resume_error(sdiodev))
  268. return -EIO;
  269. pkt_len += 3;
  270. pkt_len &= (uint)~3;
  271. status = brcmf_sdioh_request_data(sdiodev, write, fifo, func,
  272. addr, pkt, pkt_len);
  273. if (status) {
  274. brcmf_dbg(ERROR, "%s FAILED %p, addr=0x%05x, pkt_len=%d, ERR=0x%08x\n",
  275. write ? "TX" : "RX", pkt, addr, pkt_len, status);
  276. } else {
  277. brcmf_dbg(TRACE, "%s xfr'd %p, addr=0x%05x, len=%d\n",
  278. write ? "TX" : "RX", pkt, addr, pkt_len);
  279. }
  280. return status;
  281. }
  282. static int brcmf_sdioh_get_cisaddr(struct brcmf_sdio_dev *sdiodev, u32 regaddr)
  283. {
  284. /* read 24 bits and return valid 17 bit addr */
  285. int i, ret;
  286. u32 scratch, regdata;
  287. __le32 scratch_le;
  288. u8 *ptr = (u8 *)&scratch_le;
  289. for (i = 0; i < 3; i++) {
  290. regdata = brcmf_sdio_regrl(sdiodev, regaddr, &ret);
  291. if (ret != 0)
  292. brcmf_dbg(ERROR, "Can't read!\n");
  293. *ptr++ = (u8) regdata;
  294. regaddr++;
  295. }
  296. /* Only the lower 17-bits are valid */
  297. scratch = le32_to_cpu(scratch_le);
  298. scratch &= 0x0001FFFF;
  299. return scratch;
  300. }
  301. static int brcmf_sdioh_enablefuncs(struct brcmf_sdio_dev *sdiodev)
  302. {
  303. int err_ret;
  304. u32 fbraddr;
  305. u8 func;
  306. brcmf_dbg(TRACE, "\n");
  307. /* Get the Card's common CIS address */
  308. sdiodev->func_cis_ptr[0] = brcmf_sdioh_get_cisaddr(sdiodev,
  309. SDIO_CCCR_CIS);
  310. brcmf_dbg(INFO, "Card's Common CIS Ptr = 0x%x\n",
  311. sdiodev->func_cis_ptr[0]);
  312. /* Get the Card's function CIS (for each function) */
  313. for (fbraddr = SDIO_FBR_BASE(1), func = 1;
  314. func <= sdiodev->num_funcs; func++, fbraddr += SDIOD_FBR_SIZE) {
  315. sdiodev->func_cis_ptr[func] =
  316. brcmf_sdioh_get_cisaddr(sdiodev, SDIO_FBR_CIS + fbraddr);
  317. brcmf_dbg(INFO, "Function %d CIS Ptr = 0x%x\n",
  318. func, sdiodev->func_cis_ptr[func]);
  319. }
  320. /* Enable Function 1 */
  321. sdio_claim_host(sdiodev->func[1]);
  322. err_ret = sdio_enable_func(sdiodev->func[1]);
  323. sdio_release_host(sdiodev->func[1]);
  324. if (err_ret)
  325. brcmf_dbg(ERROR, "Failed to enable F1 Err: 0x%08x\n", err_ret);
  326. return false;
  327. }
  328. /*
  329. * Public entry points & extern's
  330. */
  331. int brcmf_sdioh_attach(struct brcmf_sdio_dev *sdiodev)
  332. {
  333. int err_ret = 0;
  334. brcmf_dbg(TRACE, "\n");
  335. sdiodev->num_funcs = 2;
  336. sdio_claim_host(sdiodev->func[1]);
  337. err_ret = sdio_set_block_size(sdiodev->func[1], SDIO_FUNC1_BLOCKSIZE);
  338. sdio_release_host(sdiodev->func[1]);
  339. if (err_ret) {
  340. brcmf_dbg(ERROR, "Failed to set F1 blocksize\n");
  341. goto out;
  342. }
  343. sdio_claim_host(sdiodev->func[2]);
  344. err_ret = sdio_set_block_size(sdiodev->func[2], SDIO_FUNC2_BLOCKSIZE);
  345. sdio_release_host(sdiodev->func[2]);
  346. if (err_ret) {
  347. brcmf_dbg(ERROR, "Failed to set F2 blocksize\n");
  348. goto out;
  349. }
  350. brcmf_sdioh_enablefuncs(sdiodev);
  351. out:
  352. brcmf_dbg(TRACE, "Done\n");
  353. return err_ret;
  354. }
  355. void brcmf_sdioh_detach(struct brcmf_sdio_dev *sdiodev)
  356. {
  357. brcmf_dbg(TRACE, "\n");
  358. /* Disable Function 2 */
  359. sdio_claim_host(sdiodev->func[2]);
  360. sdio_disable_func(sdiodev->func[2]);
  361. sdio_release_host(sdiodev->func[2]);
  362. /* Disable Function 1 */
  363. sdio_claim_host(sdiodev->func[1]);
  364. sdio_disable_func(sdiodev->func[1]);
  365. sdio_release_host(sdiodev->func[1]);
  366. }
  367. #ifdef CONFIG_BRCMFMAC_SDIO_OOB
  368. static int brcmf_sdio_getintrcfg(struct brcmf_sdio_dev *sdiodev)
  369. {
  370. struct brcmf_sdio_oobirq *oobirq_entry;
  371. if (list_empty(&oobirq_lh)) {
  372. brcmf_dbg(ERROR, "no valid oob irq resource\n");
  373. return -ENXIO;
  374. }
  375. oobirq_entry = list_first_entry(&oobirq_lh, struct brcmf_sdio_oobirq,
  376. list);
  377. sdiodev->irq = oobirq_entry->irq;
  378. sdiodev->irq_flags = oobirq_entry->flags;
  379. list_del(&oobirq_entry->list);
  380. kfree(oobirq_entry);
  381. return 0;
  382. }
  383. #else
  384. static inline int brcmf_sdio_getintrcfg(struct brcmf_sdio_dev *sdiodev)
  385. {
  386. return 0;
  387. }
  388. #endif /* CONFIG_BRCMFMAC_SDIO_OOB */
  389. static int brcmf_ops_sdio_probe(struct sdio_func *func,
  390. const struct sdio_device_id *id)
  391. {
  392. int ret = 0;
  393. struct brcmf_sdio_dev *sdiodev;
  394. struct brcmf_bus *bus_if;
  395. brcmf_dbg(TRACE, "Enter\n");
  396. brcmf_dbg(TRACE, "func->class=%x\n", func->class);
  397. brcmf_dbg(TRACE, "sdio_vendor: 0x%04x\n", func->vendor);
  398. brcmf_dbg(TRACE, "sdio_device: 0x%04x\n", func->device);
  399. brcmf_dbg(TRACE, "Function#: 0x%04x\n", func->num);
  400. if (func->num == 1) {
  401. if (dev_get_drvdata(&func->card->dev)) {
  402. brcmf_dbg(ERROR, "card private drvdata occupied\n");
  403. return -ENXIO;
  404. }
  405. bus_if = kzalloc(sizeof(struct brcmf_bus), GFP_KERNEL);
  406. if (!bus_if)
  407. return -ENOMEM;
  408. sdiodev = kzalloc(sizeof(struct brcmf_sdio_dev), GFP_KERNEL);
  409. if (!sdiodev) {
  410. kfree(bus_if);
  411. return -ENOMEM;
  412. }
  413. sdiodev->func[0] = func;
  414. sdiodev->func[1] = func;
  415. sdiodev->bus_if = bus_if;
  416. bus_if->bus_priv.sdio = sdiodev;
  417. bus_if->type = SDIO_BUS;
  418. bus_if->align = BRCMF_SDALIGN;
  419. dev_set_drvdata(&func->card->dev, sdiodev);
  420. atomic_set(&sdiodev->suspend, false);
  421. init_waitqueue_head(&sdiodev->request_byte_wait);
  422. init_waitqueue_head(&sdiodev->request_word_wait);
  423. init_waitqueue_head(&sdiodev->request_chain_wait);
  424. init_waitqueue_head(&sdiodev->request_buffer_wait);
  425. }
  426. if (func->num == 2) {
  427. sdiodev = dev_get_drvdata(&func->card->dev);
  428. if ((!sdiodev) || (sdiodev->func[1]->card != func->card))
  429. return -ENODEV;
  430. ret = brcmf_sdio_getintrcfg(sdiodev);
  431. if (ret)
  432. return ret;
  433. sdiodev->func[2] = func;
  434. bus_if = sdiodev->bus_if;
  435. sdiodev->dev = &func->dev;
  436. dev_set_drvdata(&func->dev, bus_if);
  437. brcmf_dbg(TRACE, "F2 found, calling brcmf_sdio_probe...\n");
  438. ret = brcmf_sdio_probe(sdiodev);
  439. }
  440. return ret;
  441. }
  442. static void brcmf_ops_sdio_remove(struct sdio_func *func)
  443. {
  444. struct brcmf_bus *bus_if;
  445. struct brcmf_sdio_dev *sdiodev;
  446. brcmf_dbg(TRACE, "Enter\n");
  447. brcmf_dbg(INFO, "func->class=%x\n", func->class);
  448. brcmf_dbg(INFO, "sdio_vendor: 0x%04x\n", func->vendor);
  449. brcmf_dbg(INFO, "sdio_device: 0x%04x\n", func->device);
  450. brcmf_dbg(INFO, "Function#: 0x%04x\n", func->num);
  451. if (func->num == 2) {
  452. bus_if = dev_get_drvdata(&func->dev);
  453. sdiodev = bus_if->bus_priv.sdio;
  454. brcmf_dbg(TRACE, "F2 found, calling brcmf_sdio_remove...\n");
  455. brcmf_sdio_remove(sdiodev);
  456. dev_set_drvdata(&func->card->dev, NULL);
  457. dev_set_drvdata(&func->dev, NULL);
  458. kfree(bus_if);
  459. kfree(sdiodev);
  460. }
  461. }
  462. #ifdef CONFIG_PM_SLEEP
  463. static int brcmf_sdio_suspend(struct device *dev)
  464. {
  465. mmc_pm_flag_t sdio_flags;
  466. struct sdio_func *func = dev_to_sdio_func(dev);
  467. struct brcmf_sdio_dev *sdiodev = dev_get_drvdata(&func->card->dev);
  468. int ret = 0;
  469. brcmf_dbg(TRACE, "\n");
  470. atomic_set(&sdiodev->suspend, true);
  471. sdio_flags = sdio_get_host_pm_caps(sdiodev->func[1]);
  472. if (!(sdio_flags & MMC_PM_KEEP_POWER)) {
  473. brcmf_dbg(ERROR, "Host can't keep power while suspended\n");
  474. return -EINVAL;
  475. }
  476. ret = sdio_set_host_pm_flags(sdiodev->func[1], MMC_PM_KEEP_POWER);
  477. if (ret) {
  478. brcmf_dbg(ERROR, "Failed to set pm_flags\n");
  479. return ret;
  480. }
  481. brcmf_sdio_wdtmr_enable(sdiodev, false);
  482. return ret;
  483. }
  484. static int brcmf_sdio_resume(struct device *dev)
  485. {
  486. struct sdio_func *func = dev_to_sdio_func(dev);
  487. struct brcmf_sdio_dev *sdiodev = dev_get_drvdata(&func->card->dev);
  488. brcmf_sdio_wdtmr_enable(sdiodev, true);
  489. atomic_set(&sdiodev->suspend, false);
  490. return 0;
  491. }
  492. static const struct dev_pm_ops brcmf_sdio_pm_ops = {
  493. .suspend = brcmf_sdio_suspend,
  494. .resume = brcmf_sdio_resume,
  495. };
  496. #endif /* CONFIG_PM_SLEEP */
  497. static struct sdio_driver brcmf_sdmmc_driver = {
  498. .probe = brcmf_ops_sdio_probe,
  499. .remove = brcmf_ops_sdio_remove,
  500. .name = "brcmfmac",
  501. .id_table = brcmf_sdmmc_ids,
  502. #ifdef CONFIG_PM_SLEEP
  503. .drv = {
  504. .pm = &brcmf_sdio_pm_ops,
  505. },
  506. #endif /* CONFIG_PM_SLEEP */
  507. };
  508. #ifdef CONFIG_BRCMFMAC_SDIO_OOB
  509. static int brcmf_sdio_pd_probe(struct platform_device *pdev)
  510. {
  511. struct resource *res;
  512. struct brcmf_sdio_oobirq *oobirq_entry;
  513. int i, ret;
  514. INIT_LIST_HEAD(&oobirq_lh);
  515. for (i = 0; ; i++) {
  516. res = platform_get_resource(pdev, IORESOURCE_IRQ, i);
  517. if (!res)
  518. break;
  519. oobirq_entry = kzalloc(sizeof(struct brcmf_sdio_oobirq),
  520. GFP_KERNEL);
  521. if (!oobirq_entry)
  522. return -ENOMEM;
  523. oobirq_entry->irq = res->start;
  524. oobirq_entry->flags = res->flags & IRQF_TRIGGER_MASK;
  525. list_add_tail(&oobirq_entry->list, &oobirq_lh);
  526. }
  527. if (i == 0)
  528. return -ENXIO;
  529. ret = sdio_register_driver(&brcmf_sdmmc_driver);
  530. if (ret)
  531. brcmf_dbg(ERROR, "sdio_register_driver failed: %d\n", ret);
  532. return ret;
  533. }
  534. static struct platform_driver brcmf_sdio_pd = {
  535. .probe = brcmf_sdio_pd_probe,
  536. .driver = {
  537. .name = "brcmf_sdio_pd"
  538. }
  539. };
  540. void brcmf_sdio_exit(void)
  541. {
  542. brcmf_dbg(TRACE, "Enter\n");
  543. sdio_unregister_driver(&brcmf_sdmmc_driver);
  544. platform_driver_unregister(&brcmf_sdio_pd);
  545. }
  546. void brcmf_sdio_init(void)
  547. {
  548. int ret;
  549. brcmf_dbg(TRACE, "Enter\n");
  550. ret = platform_driver_register(&brcmf_sdio_pd);
  551. if (ret)
  552. brcmf_dbg(ERROR, "platform_driver_register failed: %d\n", ret);
  553. }
  554. #else
  555. void brcmf_sdio_exit(void)
  556. {
  557. brcmf_dbg(TRACE, "Enter\n");
  558. sdio_unregister_driver(&brcmf_sdmmc_driver);
  559. }
  560. void brcmf_sdio_init(void)
  561. {
  562. int ret;
  563. brcmf_dbg(TRACE, "Enter\n");
  564. ret = sdio_register_driver(&brcmf_sdmmc_driver);
  565. if (ret)
  566. brcmf_dbg(ERROR, "sdio_register_driver failed: %d\n", ret);
  567. }
  568. #endif /* CONFIG_BRCMFMAC_SDIO_OOB */