intel_lvds.c 32 KB

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  1. /*
  2. * Copyright © 2006-2007 Intel Corporation
  3. * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the next
  13. * paragraph) shall be included in all copies or substantial portions of the
  14. * Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22. * DEALINGS IN THE SOFTWARE.
  23. *
  24. * Authors:
  25. * Eric Anholt <eric@anholt.net>
  26. * Dave Airlie <airlied@linux.ie>
  27. * Jesse Barnes <jesse.barnes@intel.com>
  28. */
  29. #include <acpi/button.h>
  30. #include <linux/dmi.h>
  31. #include <linux/i2c.h>
  32. #include <linux/slab.h>
  33. #include <drm/drmP.h>
  34. #include <drm/drm_crtc.h>
  35. #include <drm/drm_edid.h>
  36. #include "intel_drv.h"
  37. #include <drm/i915_drm.h>
  38. #include "i915_drv.h"
  39. #include <linux/acpi.h>
  40. /* Private structure for the integrated LVDS support */
  41. struct intel_lvds {
  42. struct intel_encoder base;
  43. struct edid *edid;
  44. int fitting_mode;
  45. u32 pfit_control;
  46. u32 pfit_pgm_ratios;
  47. bool pfit_dirty;
  48. struct drm_display_mode *fixed_mode;
  49. };
  50. static struct intel_lvds *to_intel_lvds(struct drm_encoder *encoder)
  51. {
  52. return container_of(encoder, struct intel_lvds, base.base);
  53. }
  54. static struct intel_lvds *intel_attached_lvds(struct drm_connector *connector)
  55. {
  56. return container_of(intel_attached_encoder(connector),
  57. struct intel_lvds, base);
  58. }
  59. static bool intel_lvds_get_hw_state(struct intel_encoder *encoder,
  60. enum pipe *pipe)
  61. {
  62. struct drm_device *dev = encoder->base.dev;
  63. struct drm_i915_private *dev_priv = dev->dev_private;
  64. u32 lvds_reg, tmp;
  65. if (HAS_PCH_SPLIT(dev)) {
  66. lvds_reg = PCH_LVDS;
  67. } else {
  68. lvds_reg = LVDS;
  69. }
  70. tmp = I915_READ(lvds_reg);
  71. if (!(tmp & LVDS_PORT_EN))
  72. return false;
  73. if (HAS_PCH_CPT(dev))
  74. *pipe = PORT_TO_PIPE_CPT(tmp);
  75. else
  76. *pipe = PORT_TO_PIPE(tmp);
  77. return true;
  78. }
  79. /**
  80. * Sets the power state for the panel.
  81. */
  82. static void intel_enable_lvds(struct intel_encoder *encoder)
  83. {
  84. struct drm_device *dev = encoder->base.dev;
  85. struct intel_lvds *intel_lvds = to_intel_lvds(&encoder->base);
  86. struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
  87. struct drm_i915_private *dev_priv = dev->dev_private;
  88. u32 ctl_reg, lvds_reg, stat_reg;
  89. if (HAS_PCH_SPLIT(dev)) {
  90. ctl_reg = PCH_PP_CONTROL;
  91. lvds_reg = PCH_LVDS;
  92. stat_reg = PCH_PP_STATUS;
  93. } else {
  94. ctl_reg = PP_CONTROL;
  95. lvds_reg = LVDS;
  96. stat_reg = PP_STATUS;
  97. }
  98. I915_WRITE(lvds_reg, I915_READ(lvds_reg) | LVDS_PORT_EN);
  99. if (intel_lvds->pfit_dirty) {
  100. /*
  101. * Enable automatic panel scaling so that non-native modes
  102. * fill the screen. The panel fitter should only be
  103. * adjusted whilst the pipe is disabled, according to
  104. * register description and PRM.
  105. */
  106. DRM_DEBUG_KMS("applying panel-fitter: %x, %x\n",
  107. intel_lvds->pfit_control,
  108. intel_lvds->pfit_pgm_ratios);
  109. I915_WRITE(PFIT_PGM_RATIOS, intel_lvds->pfit_pgm_ratios);
  110. I915_WRITE(PFIT_CONTROL, intel_lvds->pfit_control);
  111. intel_lvds->pfit_dirty = false;
  112. }
  113. I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
  114. POSTING_READ(lvds_reg);
  115. if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
  116. DRM_ERROR("timed out waiting for panel to power on\n");
  117. intel_panel_enable_backlight(dev, intel_crtc->pipe);
  118. }
  119. static void intel_disable_lvds(struct intel_encoder *encoder)
  120. {
  121. struct drm_device *dev = encoder->base.dev;
  122. struct intel_lvds *intel_lvds = to_intel_lvds(&encoder->base);
  123. struct drm_i915_private *dev_priv = dev->dev_private;
  124. u32 ctl_reg, lvds_reg, stat_reg;
  125. if (HAS_PCH_SPLIT(dev)) {
  126. ctl_reg = PCH_PP_CONTROL;
  127. lvds_reg = PCH_LVDS;
  128. stat_reg = PCH_PP_STATUS;
  129. } else {
  130. ctl_reg = PP_CONTROL;
  131. lvds_reg = LVDS;
  132. stat_reg = PP_STATUS;
  133. }
  134. intel_panel_disable_backlight(dev);
  135. I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
  136. if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
  137. DRM_ERROR("timed out waiting for panel to power off\n");
  138. if (intel_lvds->pfit_control) {
  139. I915_WRITE(PFIT_CONTROL, 0);
  140. intel_lvds->pfit_dirty = true;
  141. }
  142. I915_WRITE(lvds_reg, I915_READ(lvds_reg) & ~LVDS_PORT_EN);
  143. POSTING_READ(lvds_reg);
  144. }
  145. static int intel_lvds_mode_valid(struct drm_connector *connector,
  146. struct drm_display_mode *mode)
  147. {
  148. struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
  149. struct drm_display_mode *fixed_mode = intel_lvds->fixed_mode;
  150. if (mode->hdisplay > fixed_mode->hdisplay)
  151. return MODE_PANEL;
  152. if (mode->vdisplay > fixed_mode->vdisplay)
  153. return MODE_PANEL;
  154. return MODE_OK;
  155. }
  156. static void
  157. centre_horizontally(struct drm_display_mode *mode,
  158. int width)
  159. {
  160. u32 border, sync_pos, blank_width, sync_width;
  161. /* keep the hsync and hblank widths constant */
  162. sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
  163. blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
  164. sync_pos = (blank_width - sync_width + 1) / 2;
  165. border = (mode->hdisplay - width + 1) / 2;
  166. border += border & 1; /* make the border even */
  167. mode->crtc_hdisplay = width;
  168. mode->crtc_hblank_start = width + border;
  169. mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
  170. mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
  171. mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
  172. mode->private_flags |= INTEL_MODE_CRTC_TIMINGS_SET;
  173. }
  174. static void
  175. centre_vertically(struct drm_display_mode *mode,
  176. int height)
  177. {
  178. u32 border, sync_pos, blank_width, sync_width;
  179. /* keep the vsync and vblank widths constant */
  180. sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
  181. blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
  182. sync_pos = (blank_width - sync_width + 1) / 2;
  183. border = (mode->vdisplay - height + 1) / 2;
  184. mode->crtc_vdisplay = height;
  185. mode->crtc_vblank_start = height + border;
  186. mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
  187. mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
  188. mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
  189. mode->private_flags |= INTEL_MODE_CRTC_TIMINGS_SET;
  190. }
  191. static inline u32 panel_fitter_scaling(u32 source, u32 target)
  192. {
  193. /*
  194. * Floating point operation is not supported. So the FACTOR
  195. * is defined, which can avoid the floating point computation
  196. * when calculating the panel ratio.
  197. */
  198. #define ACCURACY 12
  199. #define FACTOR (1 << ACCURACY)
  200. u32 ratio = source * FACTOR / target;
  201. return (FACTOR * ratio + FACTOR/2) / FACTOR;
  202. }
  203. static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
  204. const struct drm_display_mode *mode,
  205. struct drm_display_mode *adjusted_mode)
  206. {
  207. struct drm_device *dev = encoder->dev;
  208. struct drm_i915_private *dev_priv = dev->dev_private;
  209. struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
  210. struct intel_crtc *intel_crtc = intel_lvds->base.new_crtc;
  211. u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
  212. int pipe;
  213. /* Should never happen!! */
  214. if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
  215. DRM_ERROR("Can't support LVDS on pipe A\n");
  216. return false;
  217. }
  218. if (intel_encoder_check_is_cloned(&intel_lvds->base))
  219. return false;
  220. /*
  221. * We have timings from the BIOS for the panel, put them in
  222. * to the adjusted mode. The CRTC will be set up for this mode,
  223. * with the panel scaling set up to source from the H/VDisplay
  224. * of the original mode.
  225. */
  226. intel_fixed_panel_mode(intel_lvds->fixed_mode, adjusted_mode);
  227. if (HAS_PCH_SPLIT(dev)) {
  228. intel_pch_panel_fitting(dev, intel_lvds->fitting_mode,
  229. mode, adjusted_mode);
  230. return true;
  231. }
  232. /* Native modes don't need fitting */
  233. if (adjusted_mode->hdisplay == mode->hdisplay &&
  234. adjusted_mode->vdisplay == mode->vdisplay)
  235. goto out;
  236. /* 965+ wants fuzzy fitting */
  237. if (INTEL_INFO(dev)->gen >= 4)
  238. pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
  239. PFIT_FILTER_FUZZY);
  240. /*
  241. * Enable automatic panel scaling for non-native modes so that they fill
  242. * the screen. Should be enabled before the pipe is enabled, according
  243. * to register description and PRM.
  244. * Change the value here to see the borders for debugging
  245. */
  246. for_each_pipe(pipe)
  247. I915_WRITE(BCLRPAT(pipe), 0);
  248. drm_mode_set_crtcinfo(adjusted_mode, 0);
  249. switch (intel_lvds->fitting_mode) {
  250. case DRM_MODE_SCALE_CENTER:
  251. /*
  252. * For centered modes, we have to calculate border widths &
  253. * heights and modify the values programmed into the CRTC.
  254. */
  255. centre_horizontally(adjusted_mode, mode->hdisplay);
  256. centre_vertically(adjusted_mode, mode->vdisplay);
  257. border = LVDS_BORDER_ENABLE;
  258. break;
  259. case DRM_MODE_SCALE_ASPECT:
  260. /* Scale but preserve the aspect ratio */
  261. if (INTEL_INFO(dev)->gen >= 4) {
  262. u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
  263. u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
  264. /* 965+ is easy, it does everything in hw */
  265. if (scaled_width > scaled_height)
  266. pfit_control |= PFIT_ENABLE | PFIT_SCALING_PILLAR;
  267. else if (scaled_width < scaled_height)
  268. pfit_control |= PFIT_ENABLE | PFIT_SCALING_LETTER;
  269. else if (adjusted_mode->hdisplay != mode->hdisplay)
  270. pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
  271. } else {
  272. u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
  273. u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
  274. /*
  275. * For earlier chips we have to calculate the scaling
  276. * ratio by hand and program it into the
  277. * PFIT_PGM_RATIO register
  278. */
  279. if (scaled_width > scaled_height) { /* pillar */
  280. centre_horizontally(adjusted_mode, scaled_height / mode->vdisplay);
  281. border = LVDS_BORDER_ENABLE;
  282. if (mode->vdisplay != adjusted_mode->vdisplay) {
  283. u32 bits = panel_fitter_scaling(mode->vdisplay, adjusted_mode->vdisplay);
  284. pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
  285. bits << PFIT_VERT_SCALE_SHIFT);
  286. pfit_control |= (PFIT_ENABLE |
  287. VERT_INTERP_BILINEAR |
  288. HORIZ_INTERP_BILINEAR);
  289. }
  290. } else if (scaled_width < scaled_height) { /* letter */
  291. centre_vertically(adjusted_mode, scaled_width / mode->hdisplay);
  292. border = LVDS_BORDER_ENABLE;
  293. if (mode->hdisplay != adjusted_mode->hdisplay) {
  294. u32 bits = panel_fitter_scaling(mode->hdisplay, adjusted_mode->hdisplay);
  295. pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
  296. bits << PFIT_VERT_SCALE_SHIFT);
  297. pfit_control |= (PFIT_ENABLE |
  298. VERT_INTERP_BILINEAR |
  299. HORIZ_INTERP_BILINEAR);
  300. }
  301. } else
  302. /* Aspects match, Let hw scale both directions */
  303. pfit_control |= (PFIT_ENABLE |
  304. VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
  305. VERT_INTERP_BILINEAR |
  306. HORIZ_INTERP_BILINEAR);
  307. }
  308. break;
  309. case DRM_MODE_SCALE_FULLSCREEN:
  310. /*
  311. * Full scaling, even if it changes the aspect ratio.
  312. * Fortunately this is all done for us in hw.
  313. */
  314. if (mode->vdisplay != adjusted_mode->vdisplay ||
  315. mode->hdisplay != adjusted_mode->hdisplay) {
  316. pfit_control |= PFIT_ENABLE;
  317. if (INTEL_INFO(dev)->gen >= 4)
  318. pfit_control |= PFIT_SCALING_AUTO;
  319. else
  320. pfit_control |= (VERT_AUTO_SCALE |
  321. VERT_INTERP_BILINEAR |
  322. HORIZ_AUTO_SCALE |
  323. HORIZ_INTERP_BILINEAR);
  324. }
  325. break;
  326. default:
  327. break;
  328. }
  329. out:
  330. /* If not enabling scaling, be consistent and always use 0. */
  331. if ((pfit_control & PFIT_ENABLE) == 0) {
  332. pfit_control = 0;
  333. pfit_pgm_ratios = 0;
  334. }
  335. /* Make sure pre-965 set dither correctly */
  336. if (INTEL_INFO(dev)->gen < 4 && dev_priv->lvds_dither)
  337. pfit_control |= PANEL_8TO6_DITHER_ENABLE;
  338. if (pfit_control != intel_lvds->pfit_control ||
  339. pfit_pgm_ratios != intel_lvds->pfit_pgm_ratios) {
  340. intel_lvds->pfit_control = pfit_control;
  341. intel_lvds->pfit_pgm_ratios = pfit_pgm_ratios;
  342. intel_lvds->pfit_dirty = true;
  343. }
  344. dev_priv->lvds_border_bits = border;
  345. /*
  346. * XXX: It would be nice to support lower refresh rates on the
  347. * panels to reduce power consumption, and perhaps match the
  348. * user's requested refresh rate.
  349. */
  350. return true;
  351. }
  352. static void intel_lvds_mode_set(struct drm_encoder *encoder,
  353. struct drm_display_mode *mode,
  354. struct drm_display_mode *adjusted_mode)
  355. {
  356. /*
  357. * The LVDS pin pair will already have been turned on in the
  358. * intel_crtc_mode_set since it has a large impact on the DPLL
  359. * settings.
  360. */
  361. }
  362. /**
  363. * Detect the LVDS connection.
  364. *
  365. * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means
  366. * connected and closed means disconnected. We also send hotplug events as
  367. * needed, using lid status notification from the input layer.
  368. */
  369. static enum drm_connector_status
  370. intel_lvds_detect(struct drm_connector *connector, bool force)
  371. {
  372. struct drm_device *dev = connector->dev;
  373. enum drm_connector_status status;
  374. status = intel_panel_detect(dev);
  375. if (status != connector_status_unknown)
  376. return status;
  377. return connector_status_connected;
  378. }
  379. /**
  380. * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
  381. */
  382. static int intel_lvds_get_modes(struct drm_connector *connector)
  383. {
  384. struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
  385. struct drm_device *dev = connector->dev;
  386. struct drm_display_mode *mode;
  387. if (intel_lvds->edid)
  388. return drm_add_edid_modes(connector, intel_lvds->edid);
  389. mode = drm_mode_duplicate(dev, intel_lvds->fixed_mode);
  390. if (mode == NULL)
  391. return 0;
  392. drm_mode_probed_add(connector, mode);
  393. return 1;
  394. }
  395. static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
  396. {
  397. DRM_INFO("Skipping forced modeset for %s\n", id->ident);
  398. return 1;
  399. }
  400. /* The GPU hangs up on these systems if modeset is performed on LID open */
  401. static const struct dmi_system_id intel_no_modeset_on_lid[] = {
  402. {
  403. .callback = intel_no_modeset_on_lid_dmi_callback,
  404. .ident = "Toshiba Tecra A11",
  405. .matches = {
  406. DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
  407. DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
  408. },
  409. },
  410. { } /* terminating entry */
  411. };
  412. /*
  413. * Lid events. Note the use of 'modeset_on_lid':
  414. * - we set it on lid close, and reset it on open
  415. * - we use it as a "only once" bit (ie we ignore
  416. * duplicate events where it was already properly
  417. * set/reset)
  418. * - the suspend/resume paths will also set it to
  419. * zero, since they restore the mode ("lid open").
  420. */
  421. static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
  422. void *unused)
  423. {
  424. struct drm_i915_private *dev_priv =
  425. container_of(nb, struct drm_i915_private, lid_notifier);
  426. struct drm_device *dev = dev_priv->dev;
  427. struct drm_connector *connector = dev_priv->int_lvds_connector;
  428. if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
  429. return NOTIFY_OK;
  430. /*
  431. * check and update the status of LVDS connector after receiving
  432. * the LID nofication event.
  433. */
  434. if (connector)
  435. connector->status = connector->funcs->detect(connector,
  436. false);
  437. /* Don't force modeset on machines where it causes a GPU lockup */
  438. if (dmi_check_system(intel_no_modeset_on_lid))
  439. return NOTIFY_OK;
  440. if (!acpi_lid_open()) {
  441. dev_priv->modeset_on_lid = 1;
  442. return NOTIFY_OK;
  443. }
  444. if (!dev_priv->modeset_on_lid)
  445. return NOTIFY_OK;
  446. dev_priv->modeset_on_lid = 0;
  447. mutex_lock(&dev->mode_config.mutex);
  448. intel_modeset_check_state(dev);
  449. mutex_unlock(&dev->mode_config.mutex);
  450. return NOTIFY_OK;
  451. }
  452. /**
  453. * intel_lvds_destroy - unregister and free LVDS structures
  454. * @connector: connector to free
  455. *
  456. * Unregister the DDC bus for this connector then free the driver private
  457. * structure.
  458. */
  459. static void intel_lvds_destroy(struct drm_connector *connector)
  460. {
  461. struct drm_device *dev = connector->dev;
  462. struct drm_i915_private *dev_priv = dev->dev_private;
  463. intel_panel_destroy_backlight(dev);
  464. if (dev_priv->lid_notifier.notifier_call)
  465. acpi_lid_notifier_unregister(&dev_priv->lid_notifier);
  466. drm_sysfs_connector_remove(connector);
  467. drm_connector_cleanup(connector);
  468. kfree(connector);
  469. }
  470. static int intel_lvds_set_property(struct drm_connector *connector,
  471. struct drm_property *property,
  472. uint64_t value)
  473. {
  474. struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
  475. struct drm_device *dev = connector->dev;
  476. if (property == dev->mode_config.scaling_mode_property) {
  477. struct drm_crtc *crtc = intel_lvds->base.base.crtc;
  478. if (value == DRM_MODE_SCALE_NONE) {
  479. DRM_DEBUG_KMS("no scaling not supported\n");
  480. return -EINVAL;
  481. }
  482. if (intel_lvds->fitting_mode == value) {
  483. /* the LVDS scaling property is not changed */
  484. return 0;
  485. }
  486. intel_lvds->fitting_mode = value;
  487. if (crtc && crtc->enabled) {
  488. /*
  489. * If the CRTC is enabled, the display will be changed
  490. * according to the new panel fitting mode.
  491. */
  492. intel_set_mode(crtc, &crtc->mode,
  493. crtc->x, crtc->y, crtc->fb);
  494. }
  495. }
  496. return 0;
  497. }
  498. static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
  499. .mode_fixup = intel_lvds_mode_fixup,
  500. .mode_set = intel_lvds_mode_set,
  501. .disable = intel_encoder_noop,
  502. };
  503. static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
  504. .get_modes = intel_lvds_get_modes,
  505. .mode_valid = intel_lvds_mode_valid,
  506. .best_encoder = intel_best_encoder,
  507. };
  508. static const struct drm_connector_funcs intel_lvds_connector_funcs = {
  509. .dpms = intel_connector_dpms,
  510. .detect = intel_lvds_detect,
  511. .fill_modes = drm_helper_probe_single_connector_modes,
  512. .set_property = intel_lvds_set_property,
  513. .destroy = intel_lvds_destroy,
  514. };
  515. static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
  516. .destroy = intel_encoder_destroy,
  517. };
  518. static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
  519. {
  520. DRM_INFO("Skipping LVDS initialization for %s\n", id->ident);
  521. return 1;
  522. }
  523. /* These systems claim to have LVDS, but really don't */
  524. static const struct dmi_system_id intel_no_lvds[] = {
  525. {
  526. .callback = intel_no_lvds_dmi_callback,
  527. .ident = "Apple Mac Mini (Core series)",
  528. .matches = {
  529. DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  530. DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
  531. },
  532. },
  533. {
  534. .callback = intel_no_lvds_dmi_callback,
  535. .ident = "Apple Mac Mini (Core 2 series)",
  536. .matches = {
  537. DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  538. DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
  539. },
  540. },
  541. {
  542. .callback = intel_no_lvds_dmi_callback,
  543. .ident = "MSI IM-945GSE-A",
  544. .matches = {
  545. DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
  546. DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
  547. },
  548. },
  549. {
  550. .callback = intel_no_lvds_dmi_callback,
  551. .ident = "Dell Studio Hybrid",
  552. .matches = {
  553. DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  554. DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
  555. },
  556. },
  557. {
  558. .callback = intel_no_lvds_dmi_callback,
  559. .ident = "Dell OptiPlex FX170",
  560. .matches = {
  561. DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  562. DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
  563. },
  564. },
  565. {
  566. .callback = intel_no_lvds_dmi_callback,
  567. .ident = "AOpen Mini PC",
  568. .matches = {
  569. DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
  570. DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
  571. },
  572. },
  573. {
  574. .callback = intel_no_lvds_dmi_callback,
  575. .ident = "AOpen Mini PC MP915",
  576. .matches = {
  577. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  578. DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
  579. },
  580. },
  581. {
  582. .callback = intel_no_lvds_dmi_callback,
  583. .ident = "AOpen i915GMm-HFS",
  584. .matches = {
  585. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  586. DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
  587. },
  588. },
  589. {
  590. .callback = intel_no_lvds_dmi_callback,
  591. .ident = "AOpen i45GMx-I",
  592. .matches = {
  593. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  594. DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
  595. },
  596. },
  597. {
  598. .callback = intel_no_lvds_dmi_callback,
  599. .ident = "Aopen i945GTt-VFA",
  600. .matches = {
  601. DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
  602. },
  603. },
  604. {
  605. .callback = intel_no_lvds_dmi_callback,
  606. .ident = "Clientron U800",
  607. .matches = {
  608. DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
  609. DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
  610. },
  611. },
  612. {
  613. .callback = intel_no_lvds_dmi_callback,
  614. .ident = "Clientron E830",
  615. .matches = {
  616. DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
  617. DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
  618. },
  619. },
  620. {
  621. .callback = intel_no_lvds_dmi_callback,
  622. .ident = "Asus EeeBox PC EB1007",
  623. .matches = {
  624. DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
  625. DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
  626. },
  627. },
  628. {
  629. .callback = intel_no_lvds_dmi_callback,
  630. .ident = "Asus AT5NM10T-I",
  631. .matches = {
  632. DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
  633. DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
  634. },
  635. },
  636. {
  637. .callback = intel_no_lvds_dmi_callback,
  638. .ident = "Hewlett-Packard HP t5740e Thin Client",
  639. .matches = {
  640. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  641. DMI_MATCH(DMI_PRODUCT_NAME, "HP t5740e Thin Client"),
  642. },
  643. },
  644. {
  645. .callback = intel_no_lvds_dmi_callback,
  646. .ident = "Hewlett-Packard t5745",
  647. .matches = {
  648. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  649. DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
  650. },
  651. },
  652. {
  653. .callback = intel_no_lvds_dmi_callback,
  654. .ident = "Hewlett-Packard st5747",
  655. .matches = {
  656. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  657. DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
  658. },
  659. },
  660. {
  661. .callback = intel_no_lvds_dmi_callback,
  662. .ident = "MSI Wind Box DC500",
  663. .matches = {
  664. DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
  665. DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
  666. },
  667. },
  668. {
  669. .callback = intel_no_lvds_dmi_callback,
  670. .ident = "ZOTAC ZBOXSD-ID12/ID13",
  671. .matches = {
  672. DMI_MATCH(DMI_BOARD_VENDOR, "ZOTAC"),
  673. DMI_MATCH(DMI_BOARD_NAME, "ZBOXSD-ID12/ID13"),
  674. },
  675. },
  676. {
  677. .callback = intel_no_lvds_dmi_callback,
  678. .ident = "Gigabyte GA-D525TUD",
  679. .matches = {
  680. DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."),
  681. DMI_MATCH(DMI_BOARD_NAME, "D525TUD"),
  682. },
  683. },
  684. {
  685. .callback = intel_no_lvds_dmi_callback,
  686. .ident = "Supermicro X7SPA-H",
  687. .matches = {
  688. DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
  689. DMI_MATCH(DMI_PRODUCT_NAME, "X7SPA-H"),
  690. },
  691. },
  692. { } /* terminating entry */
  693. };
  694. /**
  695. * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
  696. * @dev: drm device
  697. * @connector: LVDS connector
  698. *
  699. * Find the reduced downclock for LVDS in EDID.
  700. */
  701. static void intel_find_lvds_downclock(struct drm_device *dev,
  702. struct drm_display_mode *fixed_mode,
  703. struct drm_connector *connector)
  704. {
  705. struct drm_i915_private *dev_priv = dev->dev_private;
  706. struct drm_display_mode *scan;
  707. int temp_downclock;
  708. temp_downclock = fixed_mode->clock;
  709. list_for_each_entry(scan, &connector->probed_modes, head) {
  710. /*
  711. * If one mode has the same resolution with the fixed_panel
  712. * mode while they have the different refresh rate, it means
  713. * that the reduced downclock is found for the LVDS. In such
  714. * case we can set the different FPx0/1 to dynamically select
  715. * between low and high frequency.
  716. */
  717. if (scan->hdisplay == fixed_mode->hdisplay &&
  718. scan->hsync_start == fixed_mode->hsync_start &&
  719. scan->hsync_end == fixed_mode->hsync_end &&
  720. scan->htotal == fixed_mode->htotal &&
  721. scan->vdisplay == fixed_mode->vdisplay &&
  722. scan->vsync_start == fixed_mode->vsync_start &&
  723. scan->vsync_end == fixed_mode->vsync_end &&
  724. scan->vtotal == fixed_mode->vtotal) {
  725. if (scan->clock < temp_downclock) {
  726. /*
  727. * The downclock is already found. But we
  728. * expect to find the lower downclock.
  729. */
  730. temp_downclock = scan->clock;
  731. }
  732. }
  733. }
  734. if (temp_downclock < fixed_mode->clock && i915_lvds_downclock) {
  735. /* We found the downclock for LVDS. */
  736. dev_priv->lvds_downclock_avail = 1;
  737. dev_priv->lvds_downclock = temp_downclock;
  738. DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
  739. "Normal clock %dKhz, downclock %dKhz\n",
  740. fixed_mode->clock, temp_downclock);
  741. }
  742. }
  743. /*
  744. * Enumerate the child dev array parsed from VBT to check whether
  745. * the LVDS is present.
  746. * If it is present, return 1.
  747. * If it is not present, return false.
  748. * If no child dev is parsed from VBT, it assumes that the LVDS is present.
  749. */
  750. static bool lvds_is_present_in_vbt(struct drm_device *dev,
  751. u8 *i2c_pin)
  752. {
  753. struct drm_i915_private *dev_priv = dev->dev_private;
  754. int i;
  755. if (!dev_priv->child_dev_num)
  756. return true;
  757. for (i = 0; i < dev_priv->child_dev_num; i++) {
  758. struct child_device_config *child = dev_priv->child_dev + i;
  759. /* If the device type is not LFP, continue.
  760. * We have to check both the new identifiers as well as the
  761. * old for compatibility with some BIOSes.
  762. */
  763. if (child->device_type != DEVICE_TYPE_INT_LFP &&
  764. child->device_type != DEVICE_TYPE_LFP)
  765. continue;
  766. if (intel_gmbus_is_port_valid(child->i2c_pin))
  767. *i2c_pin = child->i2c_pin;
  768. /* However, we cannot trust the BIOS writers to populate
  769. * the VBT correctly. Since LVDS requires additional
  770. * information from AIM blocks, a non-zero addin offset is
  771. * a good indicator that the LVDS is actually present.
  772. */
  773. if (child->addin_offset)
  774. return true;
  775. /* But even then some BIOS writers perform some black magic
  776. * and instantiate the device without reference to any
  777. * additional data. Trust that if the VBT was written into
  778. * the OpRegion then they have validated the LVDS's existence.
  779. */
  780. if (dev_priv->opregion.vbt)
  781. return true;
  782. }
  783. return false;
  784. }
  785. static bool intel_lvds_supported(struct drm_device *dev)
  786. {
  787. /* With the introduction of the PCH we gained a dedicated
  788. * LVDS presence pin, use it. */
  789. if (HAS_PCH_SPLIT(dev))
  790. return true;
  791. /* Otherwise LVDS was only attached to mobile products,
  792. * except for the inglorious 830gm */
  793. return IS_MOBILE(dev) && !IS_I830(dev);
  794. }
  795. /**
  796. * intel_lvds_init - setup LVDS connectors on this device
  797. * @dev: drm device
  798. *
  799. * Create the connector, register the LVDS DDC bus, and try to figure out what
  800. * modes we can display on the LVDS panel (if present).
  801. */
  802. bool intel_lvds_init(struct drm_device *dev)
  803. {
  804. struct drm_i915_private *dev_priv = dev->dev_private;
  805. struct intel_lvds *intel_lvds;
  806. struct intel_encoder *intel_encoder;
  807. struct intel_connector *intel_connector;
  808. struct drm_connector *connector;
  809. struct drm_encoder *encoder;
  810. struct drm_display_mode *scan; /* *modes, *bios_mode; */
  811. struct drm_crtc *crtc;
  812. u32 lvds;
  813. int pipe;
  814. u8 pin;
  815. if (!intel_lvds_supported(dev))
  816. return false;
  817. /* Skip init on machines we know falsely report LVDS */
  818. if (dmi_check_system(intel_no_lvds))
  819. return false;
  820. pin = GMBUS_PORT_PANEL;
  821. if (!lvds_is_present_in_vbt(dev, &pin)) {
  822. DRM_DEBUG_KMS("LVDS is not present in VBT\n");
  823. return false;
  824. }
  825. if (HAS_PCH_SPLIT(dev)) {
  826. if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
  827. return false;
  828. if (dev_priv->edp.support) {
  829. DRM_DEBUG_KMS("disable LVDS for eDP support\n");
  830. return false;
  831. }
  832. }
  833. intel_lvds = kzalloc(sizeof(struct intel_lvds), GFP_KERNEL);
  834. if (!intel_lvds) {
  835. return false;
  836. }
  837. intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
  838. if (!intel_connector) {
  839. kfree(intel_lvds);
  840. return false;
  841. }
  842. if (!HAS_PCH_SPLIT(dev)) {
  843. intel_lvds->pfit_control = I915_READ(PFIT_CONTROL);
  844. }
  845. intel_encoder = &intel_lvds->base;
  846. encoder = &intel_encoder->base;
  847. connector = &intel_connector->base;
  848. drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
  849. DRM_MODE_CONNECTOR_LVDS);
  850. drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
  851. DRM_MODE_ENCODER_LVDS);
  852. intel_encoder->enable = intel_enable_lvds;
  853. intel_encoder->disable = intel_disable_lvds;
  854. intel_encoder->get_hw_state = intel_lvds_get_hw_state;
  855. intel_connector->get_hw_state = intel_connector_get_hw_state;
  856. intel_connector_attach_encoder(intel_connector, intel_encoder);
  857. intel_encoder->type = INTEL_OUTPUT_LVDS;
  858. intel_encoder->cloneable = false;
  859. if (HAS_PCH_SPLIT(dev))
  860. intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
  861. else if (IS_GEN4(dev))
  862. intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
  863. else
  864. intel_encoder->crtc_mask = (1 << 1);
  865. drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
  866. drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
  867. connector->display_info.subpixel_order = SubPixelHorizontalRGB;
  868. connector->interlace_allowed = false;
  869. connector->doublescan_allowed = false;
  870. /* create the scaling mode property */
  871. drm_mode_create_scaling_mode_property(dev);
  872. /*
  873. * the initial panel fitting mode will be FULL_SCREEN.
  874. */
  875. drm_connector_attach_property(&intel_connector->base,
  876. dev->mode_config.scaling_mode_property,
  877. DRM_MODE_SCALE_ASPECT);
  878. intel_lvds->fitting_mode = DRM_MODE_SCALE_ASPECT;
  879. /*
  880. * LVDS discovery:
  881. * 1) check for EDID on DDC
  882. * 2) check for VBT data
  883. * 3) check to see if LVDS is already on
  884. * if none of the above, no panel
  885. * 4) make sure lid is open
  886. * if closed, act like it's not there for now
  887. */
  888. /*
  889. * Attempt to get the fixed panel mode from DDC. Assume that the
  890. * preferred mode is the right one.
  891. */
  892. intel_lvds->edid = drm_get_edid(connector,
  893. intel_gmbus_get_adapter(dev_priv,
  894. pin));
  895. if (intel_lvds->edid) {
  896. if (drm_add_edid_modes(connector,
  897. intel_lvds->edid)) {
  898. drm_mode_connector_update_edid_property(connector,
  899. intel_lvds->edid);
  900. } else {
  901. kfree(intel_lvds->edid);
  902. intel_lvds->edid = NULL;
  903. }
  904. }
  905. if (!intel_lvds->edid) {
  906. /* Didn't get an EDID, so
  907. * Set wide sync ranges so we get all modes
  908. * handed to valid_mode for checking
  909. */
  910. connector->display_info.min_vfreq = 0;
  911. connector->display_info.max_vfreq = 200;
  912. connector->display_info.min_hfreq = 0;
  913. connector->display_info.max_hfreq = 200;
  914. }
  915. list_for_each_entry(scan, &connector->probed_modes, head) {
  916. if (scan->type & DRM_MODE_TYPE_PREFERRED) {
  917. intel_lvds->fixed_mode =
  918. drm_mode_duplicate(dev, scan);
  919. intel_find_lvds_downclock(dev,
  920. intel_lvds->fixed_mode,
  921. connector);
  922. goto out;
  923. }
  924. }
  925. /* Failed to get EDID, what about VBT? */
  926. if (dev_priv->lfp_lvds_vbt_mode) {
  927. intel_lvds->fixed_mode =
  928. drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
  929. if (intel_lvds->fixed_mode) {
  930. intel_lvds->fixed_mode->type |=
  931. DRM_MODE_TYPE_PREFERRED;
  932. goto out;
  933. }
  934. }
  935. /*
  936. * If we didn't get EDID, try checking if the panel is already turned
  937. * on. If so, assume that whatever is currently programmed is the
  938. * correct mode.
  939. */
  940. /* Ironlake: FIXME if still fail, not try pipe mode now */
  941. if (HAS_PCH_SPLIT(dev))
  942. goto failed;
  943. lvds = I915_READ(LVDS);
  944. pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
  945. crtc = intel_get_crtc_for_pipe(dev, pipe);
  946. if (crtc && (lvds & LVDS_PORT_EN)) {
  947. intel_lvds->fixed_mode = intel_crtc_mode_get(dev, crtc);
  948. if (intel_lvds->fixed_mode) {
  949. intel_lvds->fixed_mode->type |=
  950. DRM_MODE_TYPE_PREFERRED;
  951. goto out;
  952. }
  953. }
  954. /* If we still don't have a mode after all that, give up. */
  955. if (!intel_lvds->fixed_mode)
  956. goto failed;
  957. out:
  958. /*
  959. * Unlock registers and just
  960. * leave them unlocked
  961. */
  962. if (HAS_PCH_SPLIT(dev)) {
  963. I915_WRITE(PCH_PP_CONTROL,
  964. I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
  965. } else {
  966. I915_WRITE(PP_CONTROL,
  967. I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
  968. }
  969. dev_priv->lid_notifier.notifier_call = intel_lid_notify;
  970. if (acpi_lid_notifier_register(&dev_priv->lid_notifier)) {
  971. DRM_DEBUG_KMS("lid notifier registration failed\n");
  972. dev_priv->lid_notifier.notifier_call = NULL;
  973. }
  974. /* keep the LVDS connector */
  975. dev_priv->int_lvds_connector = connector;
  976. drm_sysfs_connector_add(connector);
  977. intel_panel_setup_backlight(dev);
  978. return true;
  979. failed:
  980. DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
  981. drm_connector_cleanup(connector);
  982. drm_encoder_cleanup(encoder);
  983. kfree(intel_lvds);
  984. kfree(intel_connector);
  985. return false;
  986. }