irq.c 7.6 KB

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  1. /*
  2. * Copyright IBM Corp. 2004, 2011
  3. * Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>,
  4. * Holger Smolinski <Holger.Smolinski@de.ibm.com>,
  5. * Thomas Spatzier <tspat@de.ibm.com>,
  6. *
  7. * This file contains interrupt related functions.
  8. */
  9. #include <linux/kernel_stat.h>
  10. #include <linux/interrupt.h>
  11. #include <linux/seq_file.h>
  12. #include <linux/proc_fs.h>
  13. #include <linux/profile.h>
  14. #include <linux/module.h>
  15. #include <linux/kernel.h>
  16. #include <linux/ftrace.h>
  17. #include <linux/errno.h>
  18. #include <linux/slab.h>
  19. #include <linux/cpu.h>
  20. #include <asm/irq_regs.h>
  21. #include <asm/cputime.h>
  22. #include <asm/lowcore.h>
  23. #include <asm/irq.h>
  24. #include "entry.h"
  25. struct irq_class {
  26. char *name;
  27. char *desc;
  28. };
  29. static const struct irq_class intrclass_names[] = {
  30. [EXTERNAL_INTERRUPT] = {.name = "EXT"},
  31. [IO_INTERRUPT] = {.name = "I/O"},
  32. [EXTINT_CLK] = {.name = "CLK", .desc = "[EXT] Clock Comparator"},
  33. [EXTINT_EXC] = {.name = "EXC", .desc = "[EXT] External Call"},
  34. [EXTINT_EMS] = {.name = "EMS", .desc = "[EXT] Emergency Signal"},
  35. [EXTINT_TMR] = {.name = "TMR", .desc = "[EXT] CPU Timer"},
  36. [EXTINT_TLA] = {.name = "TAL", .desc = "[EXT] Timing Alert"},
  37. [EXTINT_PFL] = {.name = "PFL", .desc = "[EXT] Pseudo Page Fault"},
  38. [EXTINT_DSD] = {.name = "DSD", .desc = "[EXT] DASD Diag"},
  39. [EXTINT_VRT] = {.name = "VRT", .desc = "[EXT] Virtio"},
  40. [EXTINT_SCP] = {.name = "SCP", .desc = "[EXT] Service Call"},
  41. [EXTINT_IUC] = {.name = "IUC", .desc = "[EXT] IUCV"},
  42. [EXTINT_CMS] = {.name = "CMS", .desc = "[EXT] CPU-Measurement: Sampling"},
  43. [EXTINT_CMC] = {.name = "CMC", .desc = "[EXT] CPU-Measurement: Counter"},
  44. [EXTINT_CMR] = {.name = "CMR", .desc = "[EXT] CPU-Measurement: RI"},
  45. [IOINT_CIO] = {.name = "CIO", .desc = "[I/O] Common I/O Layer Interrupt"},
  46. [IOINT_QAI] = {.name = "QAI", .desc = "[I/O] QDIO Adapter Interrupt"},
  47. [IOINT_DAS] = {.name = "DAS", .desc = "[I/O] DASD"},
  48. [IOINT_C15] = {.name = "C15", .desc = "[I/O] 3215"},
  49. [IOINT_C70] = {.name = "C70", .desc = "[I/O] 3270"},
  50. [IOINT_TAP] = {.name = "TAP", .desc = "[I/O] Tape"},
  51. [IOINT_VMR] = {.name = "VMR", .desc = "[I/O] Unit Record Devices"},
  52. [IOINT_LCS] = {.name = "LCS", .desc = "[I/O] LCS"},
  53. [IOINT_CLW] = {.name = "CLW", .desc = "[I/O] CLAW"},
  54. [IOINT_CTC] = {.name = "CTC", .desc = "[I/O] CTC"},
  55. [IOINT_APB] = {.name = "APB", .desc = "[I/O] AP Bus"},
  56. [IOINT_ADM] = {.name = "ADM", .desc = "[I/O] EADM Subchannel"},
  57. [IOINT_CSC] = {.name = "CSC", .desc = "[I/O] CHSC Subchannel"},
  58. [NMI_NMI] = {.name = "NMI", .desc = "[NMI] Machine Check"},
  59. };
  60. /*
  61. * show_interrupts is needed by /proc/interrupts.
  62. */
  63. int show_interrupts(struct seq_file *p, void *v)
  64. {
  65. int i = *(loff_t *) v, j;
  66. get_online_cpus();
  67. if (i == 0) {
  68. seq_puts(p, " ");
  69. for_each_online_cpu(j)
  70. seq_printf(p, "CPU%d ",j);
  71. seq_putc(p, '\n');
  72. }
  73. if (i < NR_IRQS) {
  74. seq_printf(p, "%s: ", intrclass_names[i].name);
  75. #ifndef CONFIG_SMP
  76. seq_printf(p, "%10u ", kstat_irqs(i));
  77. #else
  78. for_each_online_cpu(j)
  79. seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
  80. #endif
  81. if (intrclass_names[i].desc)
  82. seq_printf(p, " %s", intrclass_names[i].desc);
  83. seq_putc(p, '\n');
  84. }
  85. put_online_cpus();
  86. return 0;
  87. }
  88. /*
  89. * Switch to the asynchronous interrupt stack for softirq execution.
  90. */
  91. asmlinkage void do_softirq(void)
  92. {
  93. unsigned long flags, old, new;
  94. if (in_interrupt())
  95. return;
  96. local_irq_save(flags);
  97. if (local_softirq_pending()) {
  98. /* Get current stack pointer. */
  99. asm volatile("la %0,0(15)" : "=a" (old));
  100. /* Check against async. stack address range. */
  101. new = S390_lowcore.async_stack;
  102. if (((new - old) >> (PAGE_SHIFT + THREAD_ORDER)) != 0) {
  103. /* Need to switch to the async. stack. */
  104. new -= STACK_FRAME_OVERHEAD;
  105. ((struct stack_frame *) new)->back_chain = old;
  106. asm volatile(" la 15,0(%0)\n"
  107. " basr 14,%2\n"
  108. " la 15,0(%1)\n"
  109. : : "a" (new), "a" (old),
  110. "a" (__do_softirq)
  111. : "0", "1", "2", "3", "4", "5", "14",
  112. "cc", "memory" );
  113. } else {
  114. /* We are already on the async stack. */
  115. __do_softirq();
  116. }
  117. }
  118. local_irq_restore(flags);
  119. }
  120. #ifdef CONFIG_PROC_FS
  121. void init_irq_proc(void)
  122. {
  123. struct proc_dir_entry *root_irq_dir;
  124. root_irq_dir = proc_mkdir("irq", NULL);
  125. create_prof_cpu_mask(root_irq_dir);
  126. }
  127. #endif
  128. /*
  129. * ext_int_hash[index] is the list head for all external interrupts that hash
  130. * to this index.
  131. */
  132. static struct list_head ext_int_hash[256];
  133. struct ext_int_info {
  134. ext_int_handler_t handler;
  135. u16 code;
  136. struct list_head entry;
  137. struct rcu_head rcu;
  138. };
  139. /* ext_int_hash_lock protects the handler lists for external interrupts */
  140. DEFINE_SPINLOCK(ext_int_hash_lock);
  141. static void __init init_external_interrupts(void)
  142. {
  143. int idx;
  144. for (idx = 0; idx < ARRAY_SIZE(ext_int_hash); idx++)
  145. INIT_LIST_HEAD(&ext_int_hash[idx]);
  146. }
  147. static inline int ext_hash(u16 code)
  148. {
  149. return (code + (code >> 9)) & 0xff;
  150. }
  151. int register_external_interrupt(u16 code, ext_int_handler_t handler)
  152. {
  153. struct ext_int_info *p;
  154. unsigned long flags;
  155. int index;
  156. p = kmalloc(sizeof(*p), GFP_ATOMIC);
  157. if (!p)
  158. return -ENOMEM;
  159. p->code = code;
  160. p->handler = handler;
  161. index = ext_hash(code);
  162. spin_lock_irqsave(&ext_int_hash_lock, flags);
  163. list_add_rcu(&p->entry, &ext_int_hash[index]);
  164. spin_unlock_irqrestore(&ext_int_hash_lock, flags);
  165. return 0;
  166. }
  167. EXPORT_SYMBOL(register_external_interrupt);
  168. int unregister_external_interrupt(u16 code, ext_int_handler_t handler)
  169. {
  170. struct ext_int_info *p;
  171. unsigned long flags;
  172. int index = ext_hash(code);
  173. spin_lock_irqsave(&ext_int_hash_lock, flags);
  174. list_for_each_entry_rcu(p, &ext_int_hash[index], entry) {
  175. if (p->code == code && p->handler == handler) {
  176. list_del_rcu(&p->entry);
  177. kfree_rcu(p, rcu);
  178. }
  179. }
  180. spin_unlock_irqrestore(&ext_int_hash_lock, flags);
  181. return 0;
  182. }
  183. EXPORT_SYMBOL(unregister_external_interrupt);
  184. void __irq_entry do_extint(struct pt_regs *regs, struct ext_code ext_code,
  185. unsigned int param32, unsigned long param64)
  186. {
  187. struct pt_regs *old_regs;
  188. struct ext_int_info *p;
  189. int index;
  190. old_regs = set_irq_regs(regs);
  191. irq_enter();
  192. if (S390_lowcore.int_clock >= S390_lowcore.clock_comparator) {
  193. /* Serve timer interrupts first. */
  194. clock_comparator_work();
  195. }
  196. kstat_cpu(smp_processor_id()).irqs[EXTERNAL_INTERRUPT]++;
  197. if (ext_code.code != 0x1004)
  198. __get_cpu_var(s390_idle).nohz_delay = 1;
  199. index = ext_hash(ext_code.code);
  200. rcu_read_lock();
  201. list_for_each_entry_rcu(p, &ext_int_hash[index], entry)
  202. if (likely(p->code == ext_code.code))
  203. p->handler(ext_code, param32, param64);
  204. rcu_read_unlock();
  205. irq_exit();
  206. set_irq_regs(old_regs);
  207. }
  208. void __init init_IRQ(void)
  209. {
  210. init_external_interrupts();
  211. }
  212. static DEFINE_SPINLOCK(sc_irq_lock);
  213. static int sc_irq_refcount;
  214. void service_subclass_irq_register(void)
  215. {
  216. spin_lock(&sc_irq_lock);
  217. if (!sc_irq_refcount)
  218. ctl_set_bit(0, 9);
  219. sc_irq_refcount++;
  220. spin_unlock(&sc_irq_lock);
  221. }
  222. EXPORT_SYMBOL(service_subclass_irq_register);
  223. void service_subclass_irq_unregister(void)
  224. {
  225. spin_lock(&sc_irq_lock);
  226. sc_irq_refcount--;
  227. if (!sc_irq_refcount)
  228. ctl_clear_bit(0, 9);
  229. spin_unlock(&sc_irq_lock);
  230. }
  231. EXPORT_SYMBOL(service_subclass_irq_unregister);
  232. static DEFINE_SPINLOCK(ma_subclass_lock);
  233. static int ma_subclass_refcount;
  234. void measurement_alert_subclass_register(void)
  235. {
  236. spin_lock(&ma_subclass_lock);
  237. if (!ma_subclass_refcount)
  238. ctl_set_bit(0, 5);
  239. ma_subclass_refcount++;
  240. spin_unlock(&ma_subclass_lock);
  241. }
  242. EXPORT_SYMBOL(measurement_alert_subclass_register);
  243. void measurement_alert_subclass_unregister(void)
  244. {
  245. spin_lock(&ma_subclass_lock);
  246. ma_subclass_refcount--;
  247. if (!ma_subclass_refcount)
  248. ctl_clear_bit(0, 5);
  249. spin_unlock(&ma_subclass_lock);
  250. }
  251. EXPORT_SYMBOL(measurement_alert_subclass_unregister);