exynos4210.dtsi 6.9 KB

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  1. /*
  2. * Samsung's Exynos4210 SoC device tree source
  3. *
  4. * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
  5. * http://www.samsung.com
  6. * Copyright (c) 2010-2011 Linaro Ltd.
  7. * www.linaro.org
  8. *
  9. * Samsung's Exynos4210 SoC device nodes are listed in this file. Exynos4210
  10. * based board files can include this file and provide values for board specfic
  11. * bindings.
  12. *
  13. * Note: This file does not include device nodes for all the controllers in
  14. * Exynos4210 SoC. As device tree coverage for Exynos4210 increases, additional
  15. * nodes can be added to this file.
  16. *
  17. * This program is free software; you can redistribute it and/or modify
  18. * it under the terms of the GNU General Public License version 2 as
  19. * published by the Free Software Foundation.
  20. */
  21. /include/ "exynos4.dtsi"
  22. /include/ "exynos4210-pinctrl.dtsi"
  23. / {
  24. compatible = "samsung,exynos4210";
  25. aliases {
  26. pinctrl0 = &pinctrl_0;
  27. pinctrl1 = &pinctrl_1;
  28. pinctrl2 = &pinctrl_2;
  29. };
  30. gic:interrupt-controller@10490000 {
  31. cpu-offset = <0x8000>;
  32. };
  33. combiner:interrupt-controller@10440000 {
  34. interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
  35. <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
  36. <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
  37. <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>;
  38. };
  39. pinctrl_0: pinctrl@11400000 {
  40. compatible = "samsung,pinctrl-exynos4210";
  41. reg = <0x11400000 0x1000>;
  42. interrupts = <0 47 0>;
  43. interrupt-controller;
  44. #interrupt-cells = <2>;
  45. };
  46. pinctrl_1: pinctrl@11000000 {
  47. compatible = "samsung,pinctrl-exynos4210";
  48. reg = <0x11000000 0x1000>;
  49. interrupts = <0 46 0>;
  50. interrupt-controller;
  51. #interrupt-cells = <2>;
  52. wakup_eint: wakeup-interrupt-controller {
  53. compatible = "samsung,exynos4210-wakeup-eint";
  54. interrupt-parent = <&gic>;
  55. interrupt-controller;
  56. #interrupt-cells = <2>;
  57. interrupts = <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
  58. <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>,
  59. <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>,
  60. <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>,
  61. <0 32 0>;
  62. };
  63. };
  64. pinctrl_2: pinctrl@03860000 {
  65. compatible = "samsung,pinctrl-exynos4210";
  66. reg = <0x03860000 0x1000>;
  67. };
  68. gpio-controllers {
  69. #address-cells = <1>;
  70. #size-cells = <1>;
  71. gpio-controller;
  72. ranges;
  73. gpa0: gpio-controller@11400000 {
  74. compatible = "samsung,exynos4-gpio";
  75. reg = <0x11400000 0x20>;
  76. #gpio-cells = <4>;
  77. };
  78. gpa1: gpio-controller@11400020 {
  79. compatible = "samsung,exynos4-gpio";
  80. reg = <0x11400020 0x20>;
  81. #gpio-cells = <4>;
  82. };
  83. gpb: gpio-controller@11400040 {
  84. compatible = "samsung,exynos4-gpio";
  85. reg = <0x11400040 0x20>;
  86. #gpio-cells = <4>;
  87. };
  88. gpc0: gpio-controller@11400060 {
  89. compatible = "samsung,exynos4-gpio";
  90. reg = <0x11400060 0x20>;
  91. #gpio-cells = <4>;
  92. };
  93. gpc1: gpio-controller@11400080 {
  94. compatible = "samsung,exynos4-gpio";
  95. reg = <0x11400080 0x20>;
  96. #gpio-cells = <4>;
  97. };
  98. gpd0: gpio-controller@114000A0 {
  99. compatible = "samsung,exynos4-gpio";
  100. reg = <0x114000A0 0x20>;
  101. #gpio-cells = <4>;
  102. };
  103. gpd1: gpio-controller@114000C0 {
  104. compatible = "samsung,exynos4-gpio";
  105. reg = <0x114000C0 0x20>;
  106. #gpio-cells = <4>;
  107. };
  108. gpe0: gpio-controller@114000E0 {
  109. compatible = "samsung,exynos4-gpio";
  110. reg = <0x114000E0 0x20>;
  111. #gpio-cells = <4>;
  112. };
  113. gpe1: gpio-controller@11400100 {
  114. compatible = "samsung,exynos4-gpio";
  115. reg = <0x11400100 0x20>;
  116. #gpio-cells = <4>;
  117. };
  118. gpe2: gpio-controller@11400120 {
  119. compatible = "samsung,exynos4-gpio";
  120. reg = <0x11400120 0x20>;
  121. #gpio-cells = <4>;
  122. };
  123. gpe3: gpio-controller@11400140 {
  124. compatible = "samsung,exynos4-gpio";
  125. reg = <0x11400140 0x20>;
  126. #gpio-cells = <4>;
  127. };
  128. gpe4: gpio-controller@11400160 {
  129. compatible = "samsung,exynos4-gpio";
  130. reg = <0x11400160 0x20>;
  131. #gpio-cells = <4>;
  132. };
  133. gpf0: gpio-controller@11400180 {
  134. compatible = "samsung,exynos4-gpio";
  135. reg = <0x11400180 0x20>;
  136. #gpio-cells = <4>;
  137. };
  138. gpf1: gpio-controller@114001A0 {
  139. compatible = "samsung,exynos4-gpio";
  140. reg = <0x114001A0 0x20>;
  141. #gpio-cells = <4>;
  142. };
  143. gpf2: gpio-controller@114001C0 {
  144. compatible = "samsung,exynos4-gpio";
  145. reg = <0x114001C0 0x20>;
  146. #gpio-cells = <4>;
  147. };
  148. gpf3: gpio-controller@114001E0 {
  149. compatible = "samsung,exynos4-gpio";
  150. reg = <0x114001E0 0x20>;
  151. #gpio-cells = <4>;
  152. };
  153. gpj0: gpio-controller@11000000 {
  154. compatible = "samsung,exynos4-gpio";
  155. reg = <0x11000000 0x20>;
  156. #gpio-cells = <4>;
  157. };
  158. gpj1: gpio-controller@11000020 {
  159. compatible = "samsung,exynos4-gpio";
  160. reg = <0x11000020 0x20>;
  161. #gpio-cells = <4>;
  162. };
  163. gpk0: gpio-controller@11000040 {
  164. compatible = "samsung,exynos4-gpio";
  165. reg = <0x11000040 0x20>;
  166. #gpio-cells = <4>;
  167. };
  168. gpk1: gpio-controller@11000060 {
  169. compatible = "samsung,exynos4-gpio";
  170. reg = <0x11000060 0x20>;
  171. #gpio-cells = <4>;
  172. };
  173. gpk2: gpio-controller@11000080 {
  174. compatible = "samsung,exynos4-gpio";
  175. reg = <0x11000080 0x20>;
  176. #gpio-cells = <4>;
  177. };
  178. gpk3: gpio-controller@110000A0 {
  179. compatible = "samsung,exynos4-gpio";
  180. reg = <0x110000A0 0x20>;
  181. #gpio-cells = <4>;
  182. };
  183. gpl0: gpio-controller@110000C0 {
  184. compatible = "samsung,exynos4-gpio";
  185. reg = <0x110000C0 0x20>;
  186. #gpio-cells = <4>;
  187. };
  188. gpl1: gpio-controller@110000E0 {
  189. compatible = "samsung,exynos4-gpio";
  190. reg = <0x110000E0 0x20>;
  191. #gpio-cells = <4>;
  192. };
  193. gpl2: gpio-controller@11000100 {
  194. compatible = "samsung,exynos4-gpio";
  195. reg = <0x11000100 0x20>;
  196. #gpio-cells = <4>;
  197. };
  198. gpy0: gpio-controller@11000120 {
  199. compatible = "samsung,exynos4-gpio";
  200. reg = <0x11000120 0x20>;
  201. #gpio-cells = <4>;
  202. };
  203. gpy1: gpio-controller@11000140 {
  204. compatible = "samsung,exynos4-gpio";
  205. reg = <0x11000140 0x20>;
  206. #gpio-cells = <4>;
  207. };
  208. gpy2: gpio-controller@11000160 {
  209. compatible = "samsung,exynos4-gpio";
  210. reg = <0x11000160 0x20>;
  211. #gpio-cells = <4>;
  212. };
  213. gpy3: gpio-controller@11000180 {
  214. compatible = "samsung,exynos4-gpio";
  215. reg = <0x11000180 0x20>;
  216. #gpio-cells = <4>;
  217. };
  218. gpy4: gpio-controller@110001A0 {
  219. compatible = "samsung,exynos4-gpio";
  220. reg = <0x110001A0 0x20>;
  221. #gpio-cells = <4>;
  222. };
  223. gpy5: gpio-controller@110001C0 {
  224. compatible = "samsung,exynos4-gpio";
  225. reg = <0x110001C0 0x20>;
  226. #gpio-cells = <4>;
  227. };
  228. gpy6: gpio-controller@110001E0 {
  229. compatible = "samsung,exynos4-gpio";
  230. reg = <0x110001E0 0x20>;
  231. #gpio-cells = <4>;
  232. };
  233. gpx0: gpio-controller@11000C00 {
  234. compatible = "samsung,exynos4-gpio";
  235. reg = <0x11000C00 0x20>;
  236. #gpio-cells = <4>;
  237. };
  238. gpx1: gpio-controller@11000C20 {
  239. compatible = "samsung,exynos4-gpio";
  240. reg = <0x11000C20 0x20>;
  241. #gpio-cells = <4>;
  242. };
  243. gpx2: gpio-controller@11000C40 {
  244. compatible = "samsung,exynos4-gpio";
  245. reg = <0x11000C40 0x20>;
  246. #gpio-cells = <4>;
  247. };
  248. gpx3: gpio-controller@11000C60 {
  249. compatible = "samsung,exynos4-gpio";
  250. reg = <0x11000C60 0x20>;
  251. #gpio-cells = <4>;
  252. };
  253. gpz: gpio-controller@03860000 {
  254. compatible = "samsung,exynos4-gpio";
  255. reg = <0x03860000 0x20>;
  256. #gpio-cells = <4>;
  257. };
  258. };
  259. };