qib_qp.c 31 KB

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  1. /*
  2. * Copyright (c) 2006, 2007, 2008, 2009, 2010 QLogic Corporation.
  3. * All rights reserved.
  4. * Copyright (c) 2005, 2006 PathScale, Inc. All rights reserved.
  5. *
  6. * This software is available to you under a choice of one of two
  7. * licenses. You may choose to be licensed under the terms of the GNU
  8. * General Public License (GPL) Version 2, available from the file
  9. * COPYING in the main directory of this source tree, or the
  10. * OpenIB.org BSD license below:
  11. *
  12. * Redistribution and use in source and binary forms, with or
  13. * without modification, are permitted provided that the following
  14. * conditions are met:
  15. *
  16. * - Redistributions of source code must retain the above
  17. * copyright notice, this list of conditions and the following
  18. * disclaimer.
  19. *
  20. * - Redistributions in binary form must reproduce the above
  21. * copyright notice, this list of conditions and the following
  22. * disclaimer in the documentation and/or other materials
  23. * provided with the distribution.
  24. *
  25. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  26. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  27. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  28. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  29. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  30. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  31. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  32. * SOFTWARE.
  33. */
  34. #include <linux/err.h>
  35. #include <linux/vmalloc.h>
  36. #include "qib.h"
  37. #define BITS_PER_PAGE (PAGE_SIZE*BITS_PER_BYTE)
  38. #define BITS_PER_PAGE_MASK (BITS_PER_PAGE-1)
  39. static inline unsigned mk_qpn(struct qib_qpn_table *qpt,
  40. struct qpn_map *map, unsigned off)
  41. {
  42. return (map - qpt->map) * BITS_PER_PAGE + off;
  43. }
  44. static inline unsigned find_next_offset(struct qib_qpn_table *qpt,
  45. struct qpn_map *map, unsigned off,
  46. unsigned r)
  47. {
  48. if (qpt->mask) {
  49. off++;
  50. if ((off & qpt->mask) >> 1 != r)
  51. off = ((off & qpt->mask) ?
  52. (off | qpt->mask) + 1 : off) | (r << 1);
  53. } else
  54. off = find_next_zero_bit(map->page, BITS_PER_PAGE, off);
  55. return off;
  56. }
  57. /*
  58. * Convert the AETH credit code into the number of credits.
  59. */
  60. static u32 credit_table[31] = {
  61. 0, /* 0 */
  62. 1, /* 1 */
  63. 2, /* 2 */
  64. 3, /* 3 */
  65. 4, /* 4 */
  66. 6, /* 5 */
  67. 8, /* 6 */
  68. 12, /* 7 */
  69. 16, /* 8 */
  70. 24, /* 9 */
  71. 32, /* A */
  72. 48, /* B */
  73. 64, /* C */
  74. 96, /* D */
  75. 128, /* E */
  76. 192, /* F */
  77. 256, /* 10 */
  78. 384, /* 11 */
  79. 512, /* 12 */
  80. 768, /* 13 */
  81. 1024, /* 14 */
  82. 1536, /* 15 */
  83. 2048, /* 16 */
  84. 3072, /* 17 */
  85. 4096, /* 18 */
  86. 6144, /* 19 */
  87. 8192, /* 1A */
  88. 12288, /* 1B */
  89. 16384, /* 1C */
  90. 24576, /* 1D */
  91. 32768 /* 1E */
  92. };
  93. static void get_map_page(struct qib_qpn_table *qpt, struct qpn_map *map)
  94. {
  95. unsigned long page = get_zeroed_page(GFP_KERNEL);
  96. /*
  97. * Free the page if someone raced with us installing it.
  98. */
  99. spin_lock(&qpt->lock);
  100. if (map->page)
  101. free_page(page);
  102. else
  103. map->page = (void *)page;
  104. spin_unlock(&qpt->lock);
  105. }
  106. /*
  107. * Allocate the next available QPN or
  108. * zero/one for QP type IB_QPT_SMI/IB_QPT_GSI.
  109. */
  110. static int alloc_qpn(struct qib_devdata *dd, struct qib_qpn_table *qpt,
  111. enum ib_qp_type type, u8 port)
  112. {
  113. u32 i, offset, max_scan, qpn;
  114. struct qpn_map *map;
  115. u32 ret;
  116. int r;
  117. if (type == IB_QPT_SMI || type == IB_QPT_GSI) {
  118. unsigned n;
  119. ret = type == IB_QPT_GSI;
  120. n = 1 << (ret + 2 * (port - 1));
  121. spin_lock(&qpt->lock);
  122. if (qpt->flags & n)
  123. ret = -EINVAL;
  124. else
  125. qpt->flags |= n;
  126. spin_unlock(&qpt->lock);
  127. goto bail;
  128. }
  129. r = smp_processor_id();
  130. if (r >= dd->n_krcv_queues)
  131. r %= dd->n_krcv_queues;
  132. qpn = qpt->last + 1;
  133. if (qpn >= QPN_MAX)
  134. qpn = 2;
  135. if (qpt->mask && ((qpn & qpt->mask) >> 1) != r)
  136. qpn = ((qpn & qpt->mask) ? (qpn | qpt->mask) + 1 : qpn) |
  137. (r << 1);
  138. offset = qpn & BITS_PER_PAGE_MASK;
  139. map = &qpt->map[qpn / BITS_PER_PAGE];
  140. max_scan = qpt->nmaps - !offset;
  141. for (i = 0;;) {
  142. if (unlikely(!map->page)) {
  143. get_map_page(qpt, map);
  144. if (unlikely(!map->page))
  145. break;
  146. }
  147. do {
  148. if (!test_and_set_bit(offset, map->page)) {
  149. qpt->last = qpn;
  150. ret = qpn;
  151. goto bail;
  152. }
  153. offset = find_next_offset(qpt, map, offset, r);
  154. qpn = mk_qpn(qpt, map, offset);
  155. /*
  156. * This test differs from alloc_pidmap().
  157. * If find_next_offset() does find a zero
  158. * bit, we don't need to check for QPN
  159. * wrapping around past our starting QPN.
  160. * We just need to be sure we don't loop
  161. * forever.
  162. */
  163. } while (offset < BITS_PER_PAGE && qpn < QPN_MAX);
  164. /*
  165. * In order to keep the number of pages allocated to a
  166. * minimum, we scan the all existing pages before increasing
  167. * the size of the bitmap table.
  168. */
  169. if (++i > max_scan) {
  170. if (qpt->nmaps == QPNMAP_ENTRIES)
  171. break;
  172. map = &qpt->map[qpt->nmaps++];
  173. offset = qpt->mask ? (r << 1) : 0;
  174. } else if (map < &qpt->map[qpt->nmaps]) {
  175. ++map;
  176. offset = qpt->mask ? (r << 1) : 0;
  177. } else {
  178. map = &qpt->map[0];
  179. offset = qpt->mask ? (r << 1) : 2;
  180. }
  181. qpn = mk_qpn(qpt, map, offset);
  182. }
  183. ret = -ENOMEM;
  184. bail:
  185. return ret;
  186. }
  187. static void free_qpn(struct qib_qpn_table *qpt, u32 qpn)
  188. {
  189. struct qpn_map *map;
  190. map = qpt->map + qpn / BITS_PER_PAGE;
  191. if (map->page)
  192. clear_bit(qpn & BITS_PER_PAGE_MASK, map->page);
  193. }
  194. /*
  195. * Put the QP into the hash table.
  196. * The hash table holds a reference to the QP.
  197. */
  198. static void insert_qp(struct qib_ibdev *dev, struct qib_qp *qp)
  199. {
  200. struct qib_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num);
  201. unsigned n = qp->ibqp.qp_num % dev->qp_table_size;
  202. unsigned long flags;
  203. spin_lock_irqsave(&dev->qpt_lock, flags);
  204. if (qp->ibqp.qp_num == 0)
  205. ibp->qp0 = qp;
  206. else if (qp->ibqp.qp_num == 1)
  207. ibp->qp1 = qp;
  208. else {
  209. qp->next = dev->qp_table[n];
  210. dev->qp_table[n] = qp;
  211. }
  212. atomic_inc(&qp->refcount);
  213. spin_unlock_irqrestore(&dev->qpt_lock, flags);
  214. }
  215. /*
  216. * Remove the QP from the table so it can't be found asynchronously by
  217. * the receive interrupt routine.
  218. */
  219. static void remove_qp(struct qib_ibdev *dev, struct qib_qp *qp)
  220. {
  221. struct qib_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num);
  222. struct qib_qp *q, **qpp;
  223. unsigned long flags;
  224. qpp = &dev->qp_table[qp->ibqp.qp_num % dev->qp_table_size];
  225. spin_lock_irqsave(&dev->qpt_lock, flags);
  226. if (ibp->qp0 == qp) {
  227. ibp->qp0 = NULL;
  228. atomic_dec(&qp->refcount);
  229. } else if (ibp->qp1 == qp) {
  230. ibp->qp1 = NULL;
  231. atomic_dec(&qp->refcount);
  232. } else
  233. for (; (q = *qpp) != NULL; qpp = &q->next)
  234. if (q == qp) {
  235. *qpp = qp->next;
  236. qp->next = NULL;
  237. atomic_dec(&qp->refcount);
  238. break;
  239. }
  240. spin_unlock_irqrestore(&dev->qpt_lock, flags);
  241. }
  242. /**
  243. * qib_free_all_qps - check for QPs still in use
  244. * @qpt: the QP table to empty
  245. *
  246. * There should not be any QPs still in use.
  247. * Free memory for table.
  248. */
  249. unsigned qib_free_all_qps(struct qib_devdata *dd)
  250. {
  251. struct qib_ibdev *dev = &dd->verbs_dev;
  252. unsigned long flags;
  253. struct qib_qp *qp;
  254. unsigned n, qp_inuse = 0;
  255. for (n = 0; n < dd->num_pports; n++) {
  256. struct qib_ibport *ibp = &dd->pport[n].ibport_data;
  257. if (!qib_mcast_tree_empty(ibp))
  258. qp_inuse++;
  259. if (ibp->qp0)
  260. qp_inuse++;
  261. if (ibp->qp1)
  262. qp_inuse++;
  263. }
  264. spin_lock_irqsave(&dev->qpt_lock, flags);
  265. for (n = 0; n < dev->qp_table_size; n++) {
  266. qp = dev->qp_table[n];
  267. dev->qp_table[n] = NULL;
  268. for (; qp; qp = qp->next)
  269. qp_inuse++;
  270. }
  271. spin_unlock_irqrestore(&dev->qpt_lock, flags);
  272. return qp_inuse;
  273. }
  274. /**
  275. * qib_lookup_qpn - return the QP with the given QPN
  276. * @qpt: the QP table
  277. * @qpn: the QP number to look up
  278. *
  279. * The caller is responsible for decrementing the QP reference count
  280. * when done.
  281. */
  282. struct qib_qp *qib_lookup_qpn(struct qib_ibport *ibp, u32 qpn)
  283. {
  284. struct qib_ibdev *dev = &ppd_from_ibp(ibp)->dd->verbs_dev;
  285. unsigned long flags;
  286. struct qib_qp *qp;
  287. spin_lock_irqsave(&dev->qpt_lock, flags);
  288. if (qpn == 0)
  289. qp = ibp->qp0;
  290. else if (qpn == 1)
  291. qp = ibp->qp1;
  292. else
  293. for (qp = dev->qp_table[qpn % dev->qp_table_size]; qp;
  294. qp = qp->next)
  295. if (qp->ibqp.qp_num == qpn)
  296. break;
  297. if (qp)
  298. atomic_inc(&qp->refcount);
  299. spin_unlock_irqrestore(&dev->qpt_lock, flags);
  300. return qp;
  301. }
  302. /**
  303. * qib_reset_qp - initialize the QP state to the reset state
  304. * @qp: the QP to reset
  305. * @type: the QP type
  306. */
  307. static void qib_reset_qp(struct qib_qp *qp, enum ib_qp_type type)
  308. {
  309. qp->remote_qpn = 0;
  310. qp->qkey = 0;
  311. qp->qp_access_flags = 0;
  312. atomic_set(&qp->s_dma_busy, 0);
  313. qp->s_flags &= QIB_S_SIGNAL_REQ_WR;
  314. qp->s_hdrwords = 0;
  315. qp->s_wqe = NULL;
  316. qp->s_draining = 0;
  317. qp->s_next_psn = 0;
  318. qp->s_last_psn = 0;
  319. qp->s_sending_psn = 0;
  320. qp->s_sending_hpsn = 0;
  321. qp->s_psn = 0;
  322. qp->r_psn = 0;
  323. qp->r_msn = 0;
  324. if (type == IB_QPT_RC) {
  325. qp->s_state = IB_OPCODE_RC_SEND_LAST;
  326. qp->r_state = IB_OPCODE_RC_SEND_LAST;
  327. } else {
  328. qp->s_state = IB_OPCODE_UC_SEND_LAST;
  329. qp->r_state = IB_OPCODE_UC_SEND_LAST;
  330. }
  331. qp->s_ack_state = IB_OPCODE_RC_ACKNOWLEDGE;
  332. qp->r_nak_state = 0;
  333. qp->r_aflags = 0;
  334. qp->r_flags = 0;
  335. qp->s_head = 0;
  336. qp->s_tail = 0;
  337. qp->s_cur = 0;
  338. qp->s_acked = 0;
  339. qp->s_last = 0;
  340. qp->s_ssn = 1;
  341. qp->s_lsn = 0;
  342. qp->s_mig_state = IB_MIG_MIGRATED;
  343. memset(qp->s_ack_queue, 0, sizeof(qp->s_ack_queue));
  344. qp->r_head_ack_queue = 0;
  345. qp->s_tail_ack_queue = 0;
  346. qp->s_num_rd_atomic = 0;
  347. if (qp->r_rq.wq) {
  348. qp->r_rq.wq->head = 0;
  349. qp->r_rq.wq->tail = 0;
  350. }
  351. qp->r_sge.num_sge = 0;
  352. }
  353. static void clear_mr_refs(struct qib_qp *qp, int clr_sends)
  354. {
  355. unsigned n;
  356. if (test_and_clear_bit(QIB_R_REWIND_SGE, &qp->r_aflags))
  357. while (qp->s_rdma_read_sge.num_sge) {
  358. atomic_dec(&qp->s_rdma_read_sge.sge.mr->refcount);
  359. if (--qp->s_rdma_read_sge.num_sge)
  360. qp->s_rdma_read_sge.sge =
  361. *qp->s_rdma_read_sge.sg_list++;
  362. }
  363. while (qp->r_sge.num_sge) {
  364. atomic_dec(&qp->r_sge.sge.mr->refcount);
  365. if (--qp->r_sge.num_sge)
  366. qp->r_sge.sge = *qp->r_sge.sg_list++;
  367. }
  368. if (clr_sends) {
  369. while (qp->s_last != qp->s_head) {
  370. struct qib_swqe *wqe = get_swqe_ptr(qp, qp->s_last);
  371. unsigned i;
  372. for (i = 0; i < wqe->wr.num_sge; i++) {
  373. struct qib_sge *sge = &wqe->sg_list[i];
  374. atomic_dec(&sge->mr->refcount);
  375. }
  376. if (qp->ibqp.qp_type == IB_QPT_UD ||
  377. qp->ibqp.qp_type == IB_QPT_SMI ||
  378. qp->ibqp.qp_type == IB_QPT_GSI)
  379. atomic_dec(&to_iah(wqe->wr.wr.ud.ah)->refcount);
  380. if (++qp->s_last >= qp->s_size)
  381. qp->s_last = 0;
  382. }
  383. if (qp->s_rdma_mr) {
  384. atomic_dec(&qp->s_rdma_mr->refcount);
  385. qp->s_rdma_mr = NULL;
  386. }
  387. }
  388. if (qp->ibqp.qp_type != IB_QPT_RC)
  389. return;
  390. for (n = 0; n < ARRAY_SIZE(qp->s_ack_queue); n++) {
  391. struct qib_ack_entry *e = &qp->s_ack_queue[n];
  392. if (e->opcode == IB_OPCODE_RC_RDMA_READ_REQUEST &&
  393. e->rdma_sge.mr) {
  394. atomic_dec(&e->rdma_sge.mr->refcount);
  395. e->rdma_sge.mr = NULL;
  396. }
  397. }
  398. }
  399. /**
  400. * qib_error_qp - put a QP into the error state
  401. * @qp: the QP to put into the error state
  402. * @err: the receive completion error to signal if a RWQE is active
  403. *
  404. * Flushes both send and receive work queues.
  405. * Returns true if last WQE event should be generated.
  406. * The QP r_lock and s_lock should be held and interrupts disabled.
  407. * If we are already in error state, just return.
  408. */
  409. int qib_error_qp(struct qib_qp *qp, enum ib_wc_status err)
  410. {
  411. struct qib_ibdev *dev = to_idev(qp->ibqp.device);
  412. struct ib_wc wc;
  413. int ret = 0;
  414. if (qp->state == IB_QPS_ERR || qp->state == IB_QPS_RESET)
  415. goto bail;
  416. qp->state = IB_QPS_ERR;
  417. if (qp->s_flags & (QIB_S_TIMER | QIB_S_WAIT_RNR)) {
  418. qp->s_flags &= ~(QIB_S_TIMER | QIB_S_WAIT_RNR);
  419. del_timer(&qp->s_timer);
  420. }
  421. if (qp->s_flags & QIB_S_ANY_WAIT_SEND)
  422. qp->s_flags &= ~QIB_S_ANY_WAIT_SEND;
  423. spin_lock(&dev->pending_lock);
  424. if (!list_empty(&qp->iowait) && !(qp->s_flags & QIB_S_BUSY)) {
  425. qp->s_flags &= ~QIB_S_ANY_WAIT_IO;
  426. list_del_init(&qp->iowait);
  427. }
  428. spin_unlock(&dev->pending_lock);
  429. if (!(qp->s_flags & QIB_S_BUSY)) {
  430. qp->s_hdrwords = 0;
  431. if (qp->s_rdma_mr) {
  432. atomic_dec(&qp->s_rdma_mr->refcount);
  433. qp->s_rdma_mr = NULL;
  434. }
  435. if (qp->s_tx) {
  436. qib_put_txreq(qp->s_tx);
  437. qp->s_tx = NULL;
  438. }
  439. }
  440. /* Schedule the sending tasklet to drain the send work queue. */
  441. if (qp->s_last != qp->s_head)
  442. qib_schedule_send(qp);
  443. clear_mr_refs(qp, 0);
  444. memset(&wc, 0, sizeof(wc));
  445. wc.qp = &qp->ibqp;
  446. wc.opcode = IB_WC_RECV;
  447. if (test_and_clear_bit(QIB_R_WRID_VALID, &qp->r_aflags)) {
  448. wc.wr_id = qp->r_wr_id;
  449. wc.status = err;
  450. qib_cq_enter(to_icq(qp->ibqp.recv_cq), &wc, 1);
  451. }
  452. wc.status = IB_WC_WR_FLUSH_ERR;
  453. if (qp->r_rq.wq) {
  454. struct qib_rwq *wq;
  455. u32 head;
  456. u32 tail;
  457. spin_lock(&qp->r_rq.lock);
  458. /* sanity check pointers before trusting them */
  459. wq = qp->r_rq.wq;
  460. head = wq->head;
  461. if (head >= qp->r_rq.size)
  462. head = 0;
  463. tail = wq->tail;
  464. if (tail >= qp->r_rq.size)
  465. tail = 0;
  466. while (tail != head) {
  467. wc.wr_id = get_rwqe_ptr(&qp->r_rq, tail)->wr_id;
  468. if (++tail >= qp->r_rq.size)
  469. tail = 0;
  470. qib_cq_enter(to_icq(qp->ibqp.recv_cq), &wc, 1);
  471. }
  472. wq->tail = tail;
  473. spin_unlock(&qp->r_rq.lock);
  474. } else if (qp->ibqp.event_handler)
  475. ret = 1;
  476. bail:
  477. return ret;
  478. }
  479. /**
  480. * qib_modify_qp - modify the attributes of a queue pair
  481. * @ibqp: the queue pair who's attributes we're modifying
  482. * @attr: the new attributes
  483. * @attr_mask: the mask of attributes to modify
  484. * @udata: user data for libibverbs.so
  485. *
  486. * Returns 0 on success, otherwise returns an errno.
  487. */
  488. int qib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
  489. int attr_mask, struct ib_udata *udata)
  490. {
  491. struct qib_ibdev *dev = to_idev(ibqp->device);
  492. struct qib_qp *qp = to_iqp(ibqp);
  493. enum ib_qp_state cur_state, new_state;
  494. struct ib_event ev;
  495. int lastwqe = 0;
  496. int mig = 0;
  497. int ret;
  498. u32 pmtu = 0; /* for gcc warning only */
  499. spin_lock_irq(&qp->r_lock);
  500. spin_lock(&qp->s_lock);
  501. cur_state = attr_mask & IB_QP_CUR_STATE ?
  502. attr->cur_qp_state : qp->state;
  503. new_state = attr_mask & IB_QP_STATE ? attr->qp_state : cur_state;
  504. if (!ib_modify_qp_is_ok(cur_state, new_state, ibqp->qp_type,
  505. attr_mask))
  506. goto inval;
  507. if (attr_mask & IB_QP_AV) {
  508. if (attr->ah_attr.dlid >= QIB_MULTICAST_LID_BASE)
  509. goto inval;
  510. if (qib_check_ah(qp->ibqp.device, &attr->ah_attr))
  511. goto inval;
  512. }
  513. if (attr_mask & IB_QP_ALT_PATH) {
  514. if (attr->alt_ah_attr.dlid >= QIB_MULTICAST_LID_BASE)
  515. goto inval;
  516. if (qib_check_ah(qp->ibqp.device, &attr->alt_ah_attr))
  517. goto inval;
  518. if (attr->alt_pkey_index >= qib_get_npkeys(dd_from_dev(dev)))
  519. goto inval;
  520. }
  521. if (attr_mask & IB_QP_PKEY_INDEX)
  522. if (attr->pkey_index >= qib_get_npkeys(dd_from_dev(dev)))
  523. goto inval;
  524. if (attr_mask & IB_QP_MIN_RNR_TIMER)
  525. if (attr->min_rnr_timer > 31)
  526. goto inval;
  527. if (attr_mask & IB_QP_PORT)
  528. if (qp->ibqp.qp_type == IB_QPT_SMI ||
  529. qp->ibqp.qp_type == IB_QPT_GSI ||
  530. attr->port_num == 0 ||
  531. attr->port_num > ibqp->device->phys_port_cnt)
  532. goto inval;
  533. if (attr_mask & IB_QP_DEST_QPN)
  534. if (attr->dest_qp_num > QIB_QPN_MASK)
  535. goto inval;
  536. if (attr_mask & IB_QP_RETRY_CNT)
  537. if (attr->retry_cnt > 7)
  538. goto inval;
  539. if (attr_mask & IB_QP_RNR_RETRY)
  540. if (attr->rnr_retry > 7)
  541. goto inval;
  542. /*
  543. * Don't allow invalid path_mtu values. OK to set greater
  544. * than the active mtu (or even the max_cap, if we have tuned
  545. * that to a small mtu. We'll set qp->path_mtu
  546. * to the lesser of requested attribute mtu and active,
  547. * for packetizing messages.
  548. * Note that the QP port has to be set in INIT and MTU in RTR.
  549. */
  550. if (attr_mask & IB_QP_PATH_MTU) {
  551. struct qib_devdata *dd = dd_from_dev(dev);
  552. int mtu, pidx = qp->port_num - 1;
  553. mtu = ib_mtu_enum_to_int(attr->path_mtu);
  554. if (mtu == -1)
  555. goto inval;
  556. if (mtu > dd->pport[pidx].ibmtu) {
  557. switch (dd->pport[pidx].ibmtu) {
  558. case 4096:
  559. pmtu = IB_MTU_4096;
  560. break;
  561. case 2048:
  562. pmtu = IB_MTU_2048;
  563. break;
  564. case 1024:
  565. pmtu = IB_MTU_1024;
  566. break;
  567. case 512:
  568. pmtu = IB_MTU_512;
  569. break;
  570. case 256:
  571. pmtu = IB_MTU_256;
  572. break;
  573. default:
  574. pmtu = IB_MTU_2048;
  575. }
  576. } else
  577. pmtu = attr->path_mtu;
  578. }
  579. if (attr_mask & IB_QP_PATH_MIG_STATE) {
  580. if (attr->path_mig_state == IB_MIG_REARM) {
  581. if (qp->s_mig_state == IB_MIG_ARMED)
  582. goto inval;
  583. if (new_state != IB_QPS_RTS)
  584. goto inval;
  585. } else if (attr->path_mig_state == IB_MIG_MIGRATED) {
  586. if (qp->s_mig_state == IB_MIG_REARM)
  587. goto inval;
  588. if (new_state != IB_QPS_RTS && new_state != IB_QPS_SQD)
  589. goto inval;
  590. if (qp->s_mig_state == IB_MIG_ARMED)
  591. mig = 1;
  592. } else
  593. goto inval;
  594. }
  595. if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC)
  596. if (attr->max_dest_rd_atomic > QIB_MAX_RDMA_ATOMIC)
  597. goto inval;
  598. switch (new_state) {
  599. case IB_QPS_RESET:
  600. if (qp->state != IB_QPS_RESET) {
  601. qp->state = IB_QPS_RESET;
  602. spin_lock(&dev->pending_lock);
  603. if (!list_empty(&qp->iowait))
  604. list_del_init(&qp->iowait);
  605. spin_unlock(&dev->pending_lock);
  606. qp->s_flags &= ~(QIB_S_TIMER | QIB_S_ANY_WAIT);
  607. spin_unlock(&qp->s_lock);
  608. spin_unlock_irq(&qp->r_lock);
  609. /* Stop the sending work queue and retry timer */
  610. cancel_work_sync(&qp->s_work);
  611. del_timer_sync(&qp->s_timer);
  612. wait_event(qp->wait_dma, !atomic_read(&qp->s_dma_busy));
  613. if (qp->s_tx) {
  614. qib_put_txreq(qp->s_tx);
  615. qp->s_tx = NULL;
  616. }
  617. remove_qp(dev, qp);
  618. wait_event(qp->wait, !atomic_read(&qp->refcount));
  619. spin_lock_irq(&qp->r_lock);
  620. spin_lock(&qp->s_lock);
  621. clear_mr_refs(qp, 1);
  622. qib_reset_qp(qp, ibqp->qp_type);
  623. }
  624. break;
  625. case IB_QPS_RTR:
  626. /* Allow event to retrigger if QP set to RTR more than once */
  627. qp->r_flags &= ~QIB_R_COMM_EST;
  628. qp->state = new_state;
  629. break;
  630. case IB_QPS_SQD:
  631. qp->s_draining = qp->s_last != qp->s_cur;
  632. qp->state = new_state;
  633. break;
  634. case IB_QPS_SQE:
  635. if (qp->ibqp.qp_type == IB_QPT_RC)
  636. goto inval;
  637. qp->state = new_state;
  638. break;
  639. case IB_QPS_ERR:
  640. lastwqe = qib_error_qp(qp, IB_WC_WR_FLUSH_ERR);
  641. break;
  642. default:
  643. qp->state = new_state;
  644. break;
  645. }
  646. if (attr_mask & IB_QP_PKEY_INDEX)
  647. qp->s_pkey_index = attr->pkey_index;
  648. if (attr_mask & IB_QP_PORT)
  649. qp->port_num = attr->port_num;
  650. if (attr_mask & IB_QP_DEST_QPN)
  651. qp->remote_qpn = attr->dest_qp_num;
  652. if (attr_mask & IB_QP_SQ_PSN) {
  653. qp->s_next_psn = attr->sq_psn & QIB_PSN_MASK;
  654. qp->s_psn = qp->s_next_psn;
  655. qp->s_sending_psn = qp->s_next_psn;
  656. qp->s_last_psn = qp->s_next_psn - 1;
  657. qp->s_sending_hpsn = qp->s_last_psn;
  658. }
  659. if (attr_mask & IB_QP_RQ_PSN)
  660. qp->r_psn = attr->rq_psn & QIB_PSN_MASK;
  661. if (attr_mask & IB_QP_ACCESS_FLAGS)
  662. qp->qp_access_flags = attr->qp_access_flags;
  663. if (attr_mask & IB_QP_AV) {
  664. qp->remote_ah_attr = attr->ah_attr;
  665. qp->s_srate = attr->ah_attr.static_rate;
  666. }
  667. if (attr_mask & IB_QP_ALT_PATH) {
  668. qp->alt_ah_attr = attr->alt_ah_attr;
  669. qp->s_alt_pkey_index = attr->alt_pkey_index;
  670. }
  671. if (attr_mask & IB_QP_PATH_MIG_STATE) {
  672. qp->s_mig_state = attr->path_mig_state;
  673. if (mig) {
  674. qp->remote_ah_attr = qp->alt_ah_attr;
  675. qp->port_num = qp->alt_ah_attr.port_num;
  676. qp->s_pkey_index = qp->s_alt_pkey_index;
  677. }
  678. }
  679. if (attr_mask & IB_QP_PATH_MTU)
  680. qp->path_mtu = pmtu;
  681. if (attr_mask & IB_QP_RETRY_CNT) {
  682. qp->s_retry_cnt = attr->retry_cnt;
  683. qp->s_retry = attr->retry_cnt;
  684. }
  685. if (attr_mask & IB_QP_RNR_RETRY) {
  686. qp->s_rnr_retry_cnt = attr->rnr_retry;
  687. qp->s_rnr_retry = attr->rnr_retry;
  688. }
  689. if (attr_mask & IB_QP_MIN_RNR_TIMER)
  690. qp->r_min_rnr_timer = attr->min_rnr_timer;
  691. if (attr_mask & IB_QP_TIMEOUT)
  692. qp->timeout = attr->timeout;
  693. if (attr_mask & IB_QP_QKEY)
  694. qp->qkey = attr->qkey;
  695. if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC)
  696. qp->r_max_rd_atomic = attr->max_dest_rd_atomic;
  697. if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC)
  698. qp->s_max_rd_atomic = attr->max_rd_atomic;
  699. spin_unlock(&qp->s_lock);
  700. spin_unlock_irq(&qp->r_lock);
  701. if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT)
  702. insert_qp(dev, qp);
  703. if (lastwqe) {
  704. ev.device = qp->ibqp.device;
  705. ev.element.qp = &qp->ibqp;
  706. ev.event = IB_EVENT_QP_LAST_WQE_REACHED;
  707. qp->ibqp.event_handler(&ev, qp->ibqp.qp_context);
  708. }
  709. if (mig) {
  710. ev.device = qp->ibqp.device;
  711. ev.element.qp = &qp->ibqp;
  712. ev.event = IB_EVENT_PATH_MIG;
  713. qp->ibqp.event_handler(&ev, qp->ibqp.qp_context);
  714. }
  715. ret = 0;
  716. goto bail;
  717. inval:
  718. spin_unlock(&qp->s_lock);
  719. spin_unlock_irq(&qp->r_lock);
  720. ret = -EINVAL;
  721. bail:
  722. return ret;
  723. }
  724. int qib_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
  725. int attr_mask, struct ib_qp_init_attr *init_attr)
  726. {
  727. struct qib_qp *qp = to_iqp(ibqp);
  728. attr->qp_state = qp->state;
  729. attr->cur_qp_state = attr->qp_state;
  730. attr->path_mtu = qp->path_mtu;
  731. attr->path_mig_state = qp->s_mig_state;
  732. attr->qkey = qp->qkey;
  733. attr->rq_psn = qp->r_psn & QIB_PSN_MASK;
  734. attr->sq_psn = qp->s_next_psn & QIB_PSN_MASK;
  735. attr->dest_qp_num = qp->remote_qpn;
  736. attr->qp_access_flags = qp->qp_access_flags;
  737. attr->cap.max_send_wr = qp->s_size - 1;
  738. attr->cap.max_recv_wr = qp->ibqp.srq ? 0 : qp->r_rq.size - 1;
  739. attr->cap.max_send_sge = qp->s_max_sge;
  740. attr->cap.max_recv_sge = qp->r_rq.max_sge;
  741. attr->cap.max_inline_data = 0;
  742. attr->ah_attr = qp->remote_ah_attr;
  743. attr->alt_ah_attr = qp->alt_ah_attr;
  744. attr->pkey_index = qp->s_pkey_index;
  745. attr->alt_pkey_index = qp->s_alt_pkey_index;
  746. attr->en_sqd_async_notify = 0;
  747. attr->sq_draining = qp->s_draining;
  748. attr->max_rd_atomic = qp->s_max_rd_atomic;
  749. attr->max_dest_rd_atomic = qp->r_max_rd_atomic;
  750. attr->min_rnr_timer = qp->r_min_rnr_timer;
  751. attr->port_num = qp->port_num;
  752. attr->timeout = qp->timeout;
  753. attr->retry_cnt = qp->s_retry_cnt;
  754. attr->rnr_retry = qp->s_rnr_retry_cnt;
  755. attr->alt_port_num = qp->alt_ah_attr.port_num;
  756. attr->alt_timeout = qp->alt_timeout;
  757. init_attr->event_handler = qp->ibqp.event_handler;
  758. init_attr->qp_context = qp->ibqp.qp_context;
  759. init_attr->send_cq = qp->ibqp.send_cq;
  760. init_attr->recv_cq = qp->ibqp.recv_cq;
  761. init_attr->srq = qp->ibqp.srq;
  762. init_attr->cap = attr->cap;
  763. if (qp->s_flags & QIB_S_SIGNAL_REQ_WR)
  764. init_attr->sq_sig_type = IB_SIGNAL_REQ_WR;
  765. else
  766. init_attr->sq_sig_type = IB_SIGNAL_ALL_WR;
  767. init_attr->qp_type = qp->ibqp.qp_type;
  768. init_attr->port_num = qp->port_num;
  769. return 0;
  770. }
  771. /**
  772. * qib_compute_aeth - compute the AETH (syndrome + MSN)
  773. * @qp: the queue pair to compute the AETH for
  774. *
  775. * Returns the AETH.
  776. */
  777. __be32 qib_compute_aeth(struct qib_qp *qp)
  778. {
  779. u32 aeth = qp->r_msn & QIB_MSN_MASK;
  780. if (qp->ibqp.srq) {
  781. /*
  782. * Shared receive queues don't generate credits.
  783. * Set the credit field to the invalid value.
  784. */
  785. aeth |= QIB_AETH_CREDIT_INVAL << QIB_AETH_CREDIT_SHIFT;
  786. } else {
  787. u32 min, max, x;
  788. u32 credits;
  789. struct qib_rwq *wq = qp->r_rq.wq;
  790. u32 head;
  791. u32 tail;
  792. /* sanity check pointers before trusting them */
  793. head = wq->head;
  794. if (head >= qp->r_rq.size)
  795. head = 0;
  796. tail = wq->tail;
  797. if (tail >= qp->r_rq.size)
  798. tail = 0;
  799. /*
  800. * Compute the number of credits available (RWQEs).
  801. * XXX Not holding the r_rq.lock here so there is a small
  802. * chance that the pair of reads are not atomic.
  803. */
  804. credits = head - tail;
  805. if ((int)credits < 0)
  806. credits += qp->r_rq.size;
  807. /*
  808. * Binary search the credit table to find the code to
  809. * use.
  810. */
  811. min = 0;
  812. max = 31;
  813. for (;;) {
  814. x = (min + max) / 2;
  815. if (credit_table[x] == credits)
  816. break;
  817. if (credit_table[x] > credits)
  818. max = x;
  819. else if (min == x)
  820. break;
  821. else
  822. min = x;
  823. }
  824. aeth |= x << QIB_AETH_CREDIT_SHIFT;
  825. }
  826. return cpu_to_be32(aeth);
  827. }
  828. /**
  829. * qib_create_qp - create a queue pair for a device
  830. * @ibpd: the protection domain who's device we create the queue pair for
  831. * @init_attr: the attributes of the queue pair
  832. * @udata: user data for libibverbs.so
  833. *
  834. * Returns the queue pair on success, otherwise returns an errno.
  835. *
  836. * Called by the ib_create_qp() core verbs function.
  837. */
  838. struct ib_qp *qib_create_qp(struct ib_pd *ibpd,
  839. struct ib_qp_init_attr *init_attr,
  840. struct ib_udata *udata)
  841. {
  842. struct qib_qp *qp;
  843. int err;
  844. struct qib_swqe *swq = NULL;
  845. struct qib_ibdev *dev;
  846. struct qib_devdata *dd;
  847. size_t sz;
  848. size_t sg_list_sz;
  849. struct ib_qp *ret;
  850. if (init_attr->cap.max_send_sge > ib_qib_max_sges ||
  851. init_attr->cap.max_send_wr > ib_qib_max_qp_wrs) {
  852. ret = ERR_PTR(-EINVAL);
  853. goto bail;
  854. }
  855. /* Check receive queue parameters if no SRQ is specified. */
  856. if (!init_attr->srq) {
  857. if (init_attr->cap.max_recv_sge > ib_qib_max_sges ||
  858. init_attr->cap.max_recv_wr > ib_qib_max_qp_wrs) {
  859. ret = ERR_PTR(-EINVAL);
  860. goto bail;
  861. }
  862. if (init_attr->cap.max_send_sge +
  863. init_attr->cap.max_send_wr +
  864. init_attr->cap.max_recv_sge +
  865. init_attr->cap.max_recv_wr == 0) {
  866. ret = ERR_PTR(-EINVAL);
  867. goto bail;
  868. }
  869. }
  870. switch (init_attr->qp_type) {
  871. case IB_QPT_SMI:
  872. case IB_QPT_GSI:
  873. if (init_attr->port_num == 0 ||
  874. init_attr->port_num > ibpd->device->phys_port_cnt) {
  875. ret = ERR_PTR(-EINVAL);
  876. goto bail;
  877. }
  878. case IB_QPT_UC:
  879. case IB_QPT_RC:
  880. case IB_QPT_UD:
  881. sz = sizeof(struct qib_sge) *
  882. init_attr->cap.max_send_sge +
  883. sizeof(struct qib_swqe);
  884. swq = vmalloc((init_attr->cap.max_send_wr + 1) * sz);
  885. if (swq == NULL) {
  886. ret = ERR_PTR(-ENOMEM);
  887. goto bail;
  888. }
  889. sz = sizeof(*qp);
  890. sg_list_sz = 0;
  891. if (init_attr->srq) {
  892. struct qib_srq *srq = to_isrq(init_attr->srq);
  893. if (srq->rq.max_sge > 1)
  894. sg_list_sz = sizeof(*qp->r_sg_list) *
  895. (srq->rq.max_sge - 1);
  896. } else if (init_attr->cap.max_recv_sge > 1)
  897. sg_list_sz = sizeof(*qp->r_sg_list) *
  898. (init_attr->cap.max_recv_sge - 1);
  899. qp = kzalloc(sz + sg_list_sz, GFP_KERNEL);
  900. if (!qp) {
  901. ret = ERR_PTR(-ENOMEM);
  902. goto bail_swq;
  903. }
  904. if (init_attr->srq)
  905. sz = 0;
  906. else {
  907. qp->r_rq.size = init_attr->cap.max_recv_wr + 1;
  908. qp->r_rq.max_sge = init_attr->cap.max_recv_sge;
  909. sz = (sizeof(struct ib_sge) * qp->r_rq.max_sge) +
  910. sizeof(struct qib_rwqe);
  911. qp->r_rq.wq = vmalloc_user(sizeof(struct qib_rwq) +
  912. qp->r_rq.size * sz);
  913. if (!qp->r_rq.wq) {
  914. ret = ERR_PTR(-ENOMEM);
  915. goto bail_qp;
  916. }
  917. }
  918. /*
  919. * ib_create_qp() will initialize qp->ibqp
  920. * except for qp->ibqp.qp_num.
  921. */
  922. spin_lock_init(&qp->r_lock);
  923. spin_lock_init(&qp->s_lock);
  924. spin_lock_init(&qp->r_rq.lock);
  925. atomic_set(&qp->refcount, 0);
  926. init_waitqueue_head(&qp->wait);
  927. init_waitqueue_head(&qp->wait_dma);
  928. init_timer(&qp->s_timer);
  929. qp->s_timer.data = (unsigned long)qp;
  930. INIT_WORK(&qp->s_work, qib_do_send);
  931. INIT_LIST_HEAD(&qp->iowait);
  932. INIT_LIST_HEAD(&qp->rspwait);
  933. qp->state = IB_QPS_RESET;
  934. qp->s_wq = swq;
  935. qp->s_size = init_attr->cap.max_send_wr + 1;
  936. qp->s_max_sge = init_attr->cap.max_send_sge;
  937. if (init_attr->sq_sig_type == IB_SIGNAL_REQ_WR)
  938. qp->s_flags = QIB_S_SIGNAL_REQ_WR;
  939. dev = to_idev(ibpd->device);
  940. dd = dd_from_dev(dev);
  941. err = alloc_qpn(dd, &dev->qpn_table, init_attr->qp_type,
  942. init_attr->port_num);
  943. if (err < 0) {
  944. ret = ERR_PTR(err);
  945. vfree(qp->r_rq.wq);
  946. goto bail_qp;
  947. }
  948. qp->ibqp.qp_num = err;
  949. qp->port_num = init_attr->port_num;
  950. qp->processor_id = smp_processor_id();
  951. qib_reset_qp(qp, init_attr->qp_type);
  952. break;
  953. default:
  954. /* Don't support raw QPs */
  955. ret = ERR_PTR(-ENOSYS);
  956. goto bail;
  957. }
  958. init_attr->cap.max_inline_data = 0;
  959. /*
  960. * Return the address of the RWQ as the offset to mmap.
  961. * See qib_mmap() for details.
  962. */
  963. if (udata && udata->outlen >= sizeof(__u64)) {
  964. if (!qp->r_rq.wq) {
  965. __u64 offset = 0;
  966. err = ib_copy_to_udata(udata, &offset,
  967. sizeof(offset));
  968. if (err) {
  969. ret = ERR_PTR(err);
  970. goto bail_ip;
  971. }
  972. } else {
  973. u32 s = sizeof(struct qib_rwq) + qp->r_rq.size * sz;
  974. qp->ip = qib_create_mmap_info(dev, s,
  975. ibpd->uobject->context,
  976. qp->r_rq.wq);
  977. if (!qp->ip) {
  978. ret = ERR_PTR(-ENOMEM);
  979. goto bail_ip;
  980. }
  981. err = ib_copy_to_udata(udata, &(qp->ip->offset),
  982. sizeof(qp->ip->offset));
  983. if (err) {
  984. ret = ERR_PTR(err);
  985. goto bail_ip;
  986. }
  987. }
  988. }
  989. spin_lock(&dev->n_qps_lock);
  990. if (dev->n_qps_allocated == ib_qib_max_qps) {
  991. spin_unlock(&dev->n_qps_lock);
  992. ret = ERR_PTR(-ENOMEM);
  993. goto bail_ip;
  994. }
  995. dev->n_qps_allocated++;
  996. spin_unlock(&dev->n_qps_lock);
  997. if (qp->ip) {
  998. spin_lock_irq(&dev->pending_lock);
  999. list_add(&qp->ip->pending_mmaps, &dev->pending_mmaps);
  1000. spin_unlock_irq(&dev->pending_lock);
  1001. }
  1002. ret = &qp->ibqp;
  1003. goto bail;
  1004. bail_ip:
  1005. if (qp->ip)
  1006. kref_put(&qp->ip->ref, qib_release_mmap_info);
  1007. else
  1008. vfree(qp->r_rq.wq);
  1009. free_qpn(&dev->qpn_table, qp->ibqp.qp_num);
  1010. bail_qp:
  1011. kfree(qp);
  1012. bail_swq:
  1013. vfree(swq);
  1014. bail:
  1015. return ret;
  1016. }
  1017. /**
  1018. * qib_destroy_qp - destroy a queue pair
  1019. * @ibqp: the queue pair to destroy
  1020. *
  1021. * Returns 0 on success.
  1022. *
  1023. * Note that this can be called while the QP is actively sending or
  1024. * receiving!
  1025. */
  1026. int qib_destroy_qp(struct ib_qp *ibqp)
  1027. {
  1028. struct qib_qp *qp = to_iqp(ibqp);
  1029. struct qib_ibdev *dev = to_idev(ibqp->device);
  1030. /* Make sure HW and driver activity is stopped. */
  1031. spin_lock_irq(&qp->s_lock);
  1032. if (qp->state != IB_QPS_RESET) {
  1033. qp->state = IB_QPS_RESET;
  1034. spin_lock(&dev->pending_lock);
  1035. if (!list_empty(&qp->iowait))
  1036. list_del_init(&qp->iowait);
  1037. spin_unlock(&dev->pending_lock);
  1038. qp->s_flags &= ~(QIB_S_TIMER | QIB_S_ANY_WAIT);
  1039. spin_unlock_irq(&qp->s_lock);
  1040. cancel_work_sync(&qp->s_work);
  1041. del_timer_sync(&qp->s_timer);
  1042. wait_event(qp->wait_dma, !atomic_read(&qp->s_dma_busy));
  1043. if (qp->s_tx) {
  1044. qib_put_txreq(qp->s_tx);
  1045. qp->s_tx = NULL;
  1046. }
  1047. remove_qp(dev, qp);
  1048. wait_event(qp->wait, !atomic_read(&qp->refcount));
  1049. clear_mr_refs(qp, 1);
  1050. } else
  1051. spin_unlock_irq(&qp->s_lock);
  1052. /* all user's cleaned up, mark it available */
  1053. free_qpn(&dev->qpn_table, qp->ibqp.qp_num);
  1054. spin_lock(&dev->n_qps_lock);
  1055. dev->n_qps_allocated--;
  1056. spin_unlock(&dev->n_qps_lock);
  1057. if (qp->ip)
  1058. kref_put(&qp->ip->ref, qib_release_mmap_info);
  1059. else
  1060. vfree(qp->r_rq.wq);
  1061. vfree(qp->s_wq);
  1062. kfree(qp);
  1063. return 0;
  1064. }
  1065. /**
  1066. * qib_init_qpn_table - initialize the QP number table for a device
  1067. * @qpt: the QPN table
  1068. */
  1069. void qib_init_qpn_table(struct qib_devdata *dd, struct qib_qpn_table *qpt)
  1070. {
  1071. spin_lock_init(&qpt->lock);
  1072. qpt->last = 1; /* start with QPN 2 */
  1073. qpt->nmaps = 1;
  1074. qpt->mask = dd->qpn_mask;
  1075. }
  1076. /**
  1077. * qib_free_qpn_table - free the QP number table for a device
  1078. * @qpt: the QPN table
  1079. */
  1080. void qib_free_qpn_table(struct qib_qpn_table *qpt)
  1081. {
  1082. int i;
  1083. for (i = 0; i < ARRAY_SIZE(qpt->map); i++)
  1084. if (qpt->map[i].page)
  1085. free_page((unsigned long) qpt->map[i].page);
  1086. }
  1087. /**
  1088. * qib_get_credit - flush the send work queue of a QP
  1089. * @qp: the qp who's send work queue to flush
  1090. * @aeth: the Acknowledge Extended Transport Header
  1091. *
  1092. * The QP s_lock should be held.
  1093. */
  1094. void qib_get_credit(struct qib_qp *qp, u32 aeth)
  1095. {
  1096. u32 credit = (aeth >> QIB_AETH_CREDIT_SHIFT) & QIB_AETH_CREDIT_MASK;
  1097. /*
  1098. * If the credit is invalid, we can send
  1099. * as many packets as we like. Otherwise, we have to
  1100. * honor the credit field.
  1101. */
  1102. if (credit == QIB_AETH_CREDIT_INVAL) {
  1103. if (!(qp->s_flags & QIB_S_UNLIMITED_CREDIT)) {
  1104. qp->s_flags |= QIB_S_UNLIMITED_CREDIT;
  1105. if (qp->s_flags & QIB_S_WAIT_SSN_CREDIT) {
  1106. qp->s_flags &= ~QIB_S_WAIT_SSN_CREDIT;
  1107. qib_schedule_send(qp);
  1108. }
  1109. }
  1110. } else if (!(qp->s_flags & QIB_S_UNLIMITED_CREDIT)) {
  1111. /* Compute new LSN (i.e., MSN + credit) */
  1112. credit = (aeth + credit_table[credit]) & QIB_MSN_MASK;
  1113. if (qib_cmp24(credit, qp->s_lsn) > 0) {
  1114. qp->s_lsn = credit;
  1115. if (qp->s_flags & QIB_S_WAIT_SSN_CREDIT) {
  1116. qp->s_flags &= ~QIB_S_WAIT_SSN_CREDIT;
  1117. qib_schedule_send(qp);
  1118. }
  1119. }
  1120. }
  1121. }