cciss.c 138 KB

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  1. /*
  2. * Disk Array driver for HP Smart Array controllers.
  3. * (C) Copyright 2000, 2007 Hewlett-Packard Development Company, L.P.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; version 2 of the License.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  12. * General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
  17. * 02111-1307, USA.
  18. *
  19. * Questions/Comments/Bugfixes to iss_storagedev@hp.com
  20. *
  21. */
  22. #include <linux/module.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/types.h>
  25. #include <linux/pci.h>
  26. #include <linux/kernel.h>
  27. #include <linux/slab.h>
  28. #include <linux/delay.h>
  29. #include <linux/major.h>
  30. #include <linux/fs.h>
  31. #include <linux/bio.h>
  32. #include <linux/blkpg.h>
  33. #include <linux/timer.h>
  34. #include <linux/proc_fs.h>
  35. #include <linux/seq_file.h>
  36. #include <linux/init.h>
  37. #include <linux/jiffies.h>
  38. #include <linux/hdreg.h>
  39. #include <linux/spinlock.h>
  40. #include <linux/compat.h>
  41. #include <linux/mutex.h>
  42. #include <asm/uaccess.h>
  43. #include <asm/io.h>
  44. #include <linux/dma-mapping.h>
  45. #include <linux/blkdev.h>
  46. #include <linux/genhd.h>
  47. #include <linux/completion.h>
  48. #include <scsi/scsi.h>
  49. #include <scsi/sg.h>
  50. #include <scsi/scsi_ioctl.h>
  51. #include <linux/cdrom.h>
  52. #include <linux/scatterlist.h>
  53. #include <linux/kthread.h>
  54. #define CCISS_DRIVER_VERSION(maj,min,submin) ((maj<<16)|(min<<8)|(submin))
  55. #define DRIVER_NAME "HP CISS Driver (v 3.6.26)"
  56. #define DRIVER_VERSION CCISS_DRIVER_VERSION(3, 6, 26)
  57. /* Embedded module documentation macros - see modules.h */
  58. MODULE_AUTHOR("Hewlett-Packard Company");
  59. MODULE_DESCRIPTION("Driver for HP Smart Array Controllers");
  60. MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
  61. MODULE_VERSION("3.6.26");
  62. MODULE_LICENSE("GPL");
  63. static DEFINE_MUTEX(cciss_mutex);
  64. static struct proc_dir_entry *proc_cciss;
  65. #include "cciss_cmd.h"
  66. #include "cciss.h"
  67. #include <linux/cciss_ioctl.h>
  68. /* define the PCI info for the cards we can control */
  69. static const struct pci_device_id cciss_pci_device_id[] = {
  70. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISS, 0x0E11, 0x4070},
  71. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4080},
  72. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4082},
  73. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4083},
  74. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x4091},
  75. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409A},
  76. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409B},
  77. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409C},
  78. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409D},
  79. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSA, 0x103C, 0x3225},
  80. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3223},
  81. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3234},
  82. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3235},
  83. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3211},
  84. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3212},
  85. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3213},
  86. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3214},
  87. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3215},
  88. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3237},
  89. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x323D},
  90. {0,}
  91. };
  92. MODULE_DEVICE_TABLE(pci, cciss_pci_device_id);
  93. /* board_id = Subsystem Device ID & Vendor ID
  94. * product = Marketing Name for the board
  95. * access = Address of the struct of function pointers
  96. */
  97. static struct board_type products[] = {
  98. {0x40700E11, "Smart Array 5300", &SA5_access},
  99. {0x40800E11, "Smart Array 5i", &SA5B_access},
  100. {0x40820E11, "Smart Array 532", &SA5B_access},
  101. {0x40830E11, "Smart Array 5312", &SA5B_access},
  102. {0x409A0E11, "Smart Array 641", &SA5_access},
  103. {0x409B0E11, "Smart Array 642", &SA5_access},
  104. {0x409C0E11, "Smart Array 6400", &SA5_access},
  105. {0x409D0E11, "Smart Array 6400 EM", &SA5_access},
  106. {0x40910E11, "Smart Array 6i", &SA5_access},
  107. {0x3225103C, "Smart Array P600", &SA5_access},
  108. {0x3223103C, "Smart Array P800", &SA5_access},
  109. {0x3234103C, "Smart Array P400", &SA5_access},
  110. {0x3235103C, "Smart Array P400i", &SA5_access},
  111. {0x3211103C, "Smart Array E200i", &SA5_access},
  112. {0x3212103C, "Smart Array E200", &SA5_access},
  113. {0x3213103C, "Smart Array E200i", &SA5_access},
  114. {0x3214103C, "Smart Array E200i", &SA5_access},
  115. {0x3215103C, "Smart Array E200i", &SA5_access},
  116. {0x3237103C, "Smart Array E500", &SA5_access},
  117. {0x3223103C, "Smart Array P800", &SA5_access},
  118. {0x3234103C, "Smart Array P400", &SA5_access},
  119. {0x323D103C, "Smart Array P700m", &SA5_access},
  120. };
  121. /* How long to wait (in milliseconds) for board to go into simple mode */
  122. #define MAX_CONFIG_WAIT 30000
  123. #define MAX_IOCTL_CONFIG_WAIT 1000
  124. /*define how many times we will try a command because of bus resets */
  125. #define MAX_CMD_RETRIES 3
  126. #define MAX_CTLR 32
  127. /* Originally cciss driver only supports 8 major numbers */
  128. #define MAX_CTLR_ORIG 8
  129. static ctlr_info_t *hba[MAX_CTLR];
  130. static struct task_struct *cciss_scan_thread;
  131. static DEFINE_MUTEX(scan_mutex);
  132. static LIST_HEAD(scan_q);
  133. static void do_cciss_request(struct request_queue *q);
  134. static irqreturn_t do_cciss_intx(int irq, void *dev_id);
  135. static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id);
  136. static int cciss_open(struct block_device *bdev, fmode_t mode);
  137. static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode);
  138. static int cciss_release(struct gendisk *disk, fmode_t mode);
  139. static int do_ioctl(struct block_device *bdev, fmode_t mode,
  140. unsigned int cmd, unsigned long arg);
  141. static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
  142. unsigned int cmd, unsigned long arg);
  143. static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo);
  144. static int cciss_revalidate(struct gendisk *disk);
  145. static int rebuild_lun_table(ctlr_info_t *h, int first_time, int via_ioctl);
  146. static int deregister_disk(ctlr_info_t *h, int drv_index,
  147. int clear_all, int via_ioctl);
  148. static void cciss_read_capacity(ctlr_info_t *h, int logvol,
  149. sector_t *total_size, unsigned int *block_size);
  150. static void cciss_read_capacity_16(ctlr_info_t *h, int logvol,
  151. sector_t *total_size, unsigned int *block_size);
  152. static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol,
  153. sector_t total_size,
  154. unsigned int block_size, InquiryData_struct *inq_buff,
  155. drive_info_struct *drv);
  156. static void __devinit cciss_interrupt_mode(ctlr_info_t *);
  157. static void start_io(ctlr_info_t *h);
  158. static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size,
  159. __u8 page_code, unsigned char scsi3addr[],
  160. int cmd_type);
  161. static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
  162. int attempt_retry);
  163. static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c);
  164. static int add_to_scan_list(struct ctlr_info *h);
  165. static int scan_thread(void *data);
  166. static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c);
  167. static void cciss_hba_release(struct device *dev);
  168. static void cciss_device_release(struct device *dev);
  169. static void cciss_free_gendisk(ctlr_info_t *h, int drv_index);
  170. static void cciss_free_drive_info(ctlr_info_t *h, int drv_index);
  171. static inline u32 next_command(ctlr_info_t *h);
  172. static int __devinit cciss_find_cfg_addrs(struct pci_dev *pdev,
  173. void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
  174. u64 *cfg_offset);
  175. static int __devinit cciss_pci_find_memory_BAR(struct pci_dev *pdev,
  176. unsigned long *memory_bar);
  177. static inline u32 cciss_tag_discard_error_bits(ctlr_info_t *h, u32 tag);
  178. /* performant mode helper functions */
  179. static void calc_bucket_map(int *bucket, int num_buckets, int nsgs,
  180. int *bucket_map);
  181. static void cciss_put_controller_into_performant_mode(ctlr_info_t *h);
  182. #ifdef CONFIG_PROC_FS
  183. static void cciss_procinit(ctlr_info_t *h);
  184. #else
  185. static void cciss_procinit(ctlr_info_t *h)
  186. {
  187. }
  188. #endif /* CONFIG_PROC_FS */
  189. #ifdef CONFIG_COMPAT
  190. static int cciss_compat_ioctl(struct block_device *, fmode_t,
  191. unsigned, unsigned long);
  192. #endif
  193. static const struct block_device_operations cciss_fops = {
  194. .owner = THIS_MODULE,
  195. .open = cciss_unlocked_open,
  196. .release = cciss_release,
  197. .ioctl = do_ioctl,
  198. .getgeo = cciss_getgeo,
  199. #ifdef CONFIG_COMPAT
  200. .compat_ioctl = cciss_compat_ioctl,
  201. #endif
  202. .revalidate_disk = cciss_revalidate,
  203. };
  204. /* set_performant_mode: Modify the tag for cciss performant
  205. * set bit 0 for pull model, bits 3-1 for block fetch
  206. * register number
  207. */
  208. static void set_performant_mode(ctlr_info_t *h, CommandList_struct *c)
  209. {
  210. if (likely(h->transMethod & CFGTBL_Trans_Performant))
  211. c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
  212. }
  213. /*
  214. * Enqueuing and dequeuing functions for cmdlists.
  215. */
  216. static inline void addQ(struct list_head *list, CommandList_struct *c)
  217. {
  218. list_add_tail(&c->list, list);
  219. }
  220. static inline void removeQ(CommandList_struct *c)
  221. {
  222. /*
  223. * After kexec/dump some commands might still
  224. * be in flight, which the firmware will try
  225. * to complete. Resetting the firmware doesn't work
  226. * with old fw revisions, so we have to mark
  227. * them off as 'stale' to prevent the driver from
  228. * falling over.
  229. */
  230. if (WARN_ON(list_empty(&c->list))) {
  231. c->cmd_type = CMD_MSG_STALE;
  232. return;
  233. }
  234. list_del_init(&c->list);
  235. }
  236. static void enqueue_cmd_and_start_io(ctlr_info_t *h,
  237. CommandList_struct *c)
  238. {
  239. unsigned long flags;
  240. set_performant_mode(h, c);
  241. spin_lock_irqsave(&h->lock, flags);
  242. addQ(&h->reqQ, c);
  243. h->Qdepth++;
  244. if (h->Qdepth > h->maxQsinceinit)
  245. h->maxQsinceinit = h->Qdepth;
  246. start_io(h);
  247. spin_unlock_irqrestore(&h->lock, flags);
  248. }
  249. static void cciss_free_sg_chain_blocks(SGDescriptor_struct **cmd_sg_list,
  250. int nr_cmds)
  251. {
  252. int i;
  253. if (!cmd_sg_list)
  254. return;
  255. for (i = 0; i < nr_cmds; i++) {
  256. kfree(cmd_sg_list[i]);
  257. cmd_sg_list[i] = NULL;
  258. }
  259. kfree(cmd_sg_list);
  260. }
  261. static SGDescriptor_struct **cciss_allocate_sg_chain_blocks(
  262. ctlr_info_t *h, int chainsize, int nr_cmds)
  263. {
  264. int j;
  265. SGDescriptor_struct **cmd_sg_list;
  266. if (chainsize <= 0)
  267. return NULL;
  268. cmd_sg_list = kmalloc(sizeof(*cmd_sg_list) * nr_cmds, GFP_KERNEL);
  269. if (!cmd_sg_list)
  270. return NULL;
  271. /* Build up chain blocks for each command */
  272. for (j = 0; j < nr_cmds; j++) {
  273. /* Need a block of chainsized s/g elements. */
  274. cmd_sg_list[j] = kmalloc((chainsize *
  275. sizeof(*cmd_sg_list[j])), GFP_KERNEL);
  276. if (!cmd_sg_list[j]) {
  277. dev_err(&h->pdev->dev, "Cannot get memory "
  278. "for s/g chains.\n");
  279. goto clean;
  280. }
  281. }
  282. return cmd_sg_list;
  283. clean:
  284. cciss_free_sg_chain_blocks(cmd_sg_list, nr_cmds);
  285. return NULL;
  286. }
  287. static void cciss_unmap_sg_chain_block(ctlr_info_t *h, CommandList_struct *c)
  288. {
  289. SGDescriptor_struct *chain_sg;
  290. u64bit temp64;
  291. if (c->Header.SGTotal <= h->max_cmd_sgentries)
  292. return;
  293. chain_sg = &c->SG[h->max_cmd_sgentries - 1];
  294. temp64.val32.lower = chain_sg->Addr.lower;
  295. temp64.val32.upper = chain_sg->Addr.upper;
  296. pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
  297. }
  298. static void cciss_map_sg_chain_block(ctlr_info_t *h, CommandList_struct *c,
  299. SGDescriptor_struct *chain_block, int len)
  300. {
  301. SGDescriptor_struct *chain_sg;
  302. u64bit temp64;
  303. chain_sg = &c->SG[h->max_cmd_sgentries - 1];
  304. chain_sg->Ext = CCISS_SG_CHAIN;
  305. chain_sg->Len = len;
  306. temp64.val = pci_map_single(h->pdev, chain_block, len,
  307. PCI_DMA_TODEVICE);
  308. chain_sg->Addr.lower = temp64.val32.lower;
  309. chain_sg->Addr.upper = temp64.val32.upper;
  310. }
  311. #include "cciss_scsi.c" /* For SCSI tape support */
  312. static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
  313. "UNKNOWN"
  314. };
  315. #define RAID_UNKNOWN (ARRAY_SIZE(raid_label)-1)
  316. #ifdef CONFIG_PROC_FS
  317. /*
  318. * Report information about this controller.
  319. */
  320. #define ENG_GIG 1000000000
  321. #define ENG_GIG_FACTOR (ENG_GIG/512)
  322. #define ENGAGE_SCSI "engage scsi"
  323. static void cciss_seq_show_header(struct seq_file *seq)
  324. {
  325. ctlr_info_t *h = seq->private;
  326. seq_printf(seq, "%s: HP %s Controller\n"
  327. "Board ID: 0x%08lx\n"
  328. "Firmware Version: %c%c%c%c\n"
  329. "IRQ: %d\n"
  330. "Logical drives: %d\n"
  331. "Current Q depth: %d\n"
  332. "Current # commands on controller: %d\n"
  333. "Max Q depth since init: %d\n"
  334. "Max # commands on controller since init: %d\n"
  335. "Max SG entries since init: %d\n",
  336. h->devname,
  337. h->product_name,
  338. (unsigned long)h->board_id,
  339. h->firm_ver[0], h->firm_ver[1], h->firm_ver[2],
  340. h->firm_ver[3], (unsigned int)h->intr[PERF_MODE_INT],
  341. h->num_luns,
  342. h->Qdepth, h->commands_outstanding,
  343. h->maxQsinceinit, h->max_outstanding, h->maxSG);
  344. #ifdef CONFIG_CISS_SCSI_TAPE
  345. cciss_seq_tape_report(seq, h);
  346. #endif /* CONFIG_CISS_SCSI_TAPE */
  347. }
  348. static void *cciss_seq_start(struct seq_file *seq, loff_t *pos)
  349. {
  350. ctlr_info_t *h = seq->private;
  351. unsigned long flags;
  352. /* prevent displaying bogus info during configuration
  353. * or deconfiguration of a logical volume
  354. */
  355. spin_lock_irqsave(&h->lock, flags);
  356. if (h->busy_configuring) {
  357. spin_unlock_irqrestore(&h->lock, flags);
  358. return ERR_PTR(-EBUSY);
  359. }
  360. h->busy_configuring = 1;
  361. spin_unlock_irqrestore(&h->lock, flags);
  362. if (*pos == 0)
  363. cciss_seq_show_header(seq);
  364. return pos;
  365. }
  366. static int cciss_seq_show(struct seq_file *seq, void *v)
  367. {
  368. sector_t vol_sz, vol_sz_frac;
  369. ctlr_info_t *h = seq->private;
  370. unsigned ctlr = h->ctlr;
  371. loff_t *pos = v;
  372. drive_info_struct *drv = h->drv[*pos];
  373. if (*pos > h->highest_lun)
  374. return 0;
  375. if (drv == NULL) /* it's possible for h->drv[] to have holes. */
  376. return 0;
  377. if (drv->heads == 0)
  378. return 0;
  379. vol_sz = drv->nr_blocks;
  380. vol_sz_frac = sector_div(vol_sz, ENG_GIG_FACTOR);
  381. vol_sz_frac *= 100;
  382. sector_div(vol_sz_frac, ENG_GIG_FACTOR);
  383. if (drv->raid_level < 0 || drv->raid_level > RAID_UNKNOWN)
  384. drv->raid_level = RAID_UNKNOWN;
  385. seq_printf(seq, "cciss/c%dd%d:"
  386. "\t%4u.%02uGB\tRAID %s\n",
  387. ctlr, (int) *pos, (int)vol_sz, (int)vol_sz_frac,
  388. raid_label[drv->raid_level]);
  389. return 0;
  390. }
  391. static void *cciss_seq_next(struct seq_file *seq, void *v, loff_t *pos)
  392. {
  393. ctlr_info_t *h = seq->private;
  394. if (*pos > h->highest_lun)
  395. return NULL;
  396. *pos += 1;
  397. return pos;
  398. }
  399. static void cciss_seq_stop(struct seq_file *seq, void *v)
  400. {
  401. ctlr_info_t *h = seq->private;
  402. /* Only reset h->busy_configuring if we succeeded in setting
  403. * it during cciss_seq_start. */
  404. if (v == ERR_PTR(-EBUSY))
  405. return;
  406. h->busy_configuring = 0;
  407. }
  408. static const struct seq_operations cciss_seq_ops = {
  409. .start = cciss_seq_start,
  410. .show = cciss_seq_show,
  411. .next = cciss_seq_next,
  412. .stop = cciss_seq_stop,
  413. };
  414. static int cciss_seq_open(struct inode *inode, struct file *file)
  415. {
  416. int ret = seq_open(file, &cciss_seq_ops);
  417. struct seq_file *seq = file->private_data;
  418. if (!ret)
  419. seq->private = PDE(inode)->data;
  420. return ret;
  421. }
  422. static ssize_t
  423. cciss_proc_write(struct file *file, const char __user *buf,
  424. size_t length, loff_t *ppos)
  425. {
  426. int err;
  427. char *buffer;
  428. #ifndef CONFIG_CISS_SCSI_TAPE
  429. return -EINVAL;
  430. #endif
  431. if (!buf || length > PAGE_SIZE - 1)
  432. return -EINVAL;
  433. buffer = (char *)__get_free_page(GFP_KERNEL);
  434. if (!buffer)
  435. return -ENOMEM;
  436. err = -EFAULT;
  437. if (copy_from_user(buffer, buf, length))
  438. goto out;
  439. buffer[length] = '\0';
  440. #ifdef CONFIG_CISS_SCSI_TAPE
  441. if (strncmp(ENGAGE_SCSI, buffer, sizeof ENGAGE_SCSI - 1) == 0) {
  442. struct seq_file *seq = file->private_data;
  443. ctlr_info_t *h = seq->private;
  444. err = cciss_engage_scsi(h);
  445. if (err == 0)
  446. err = length;
  447. } else
  448. #endif /* CONFIG_CISS_SCSI_TAPE */
  449. err = -EINVAL;
  450. /* might be nice to have "disengage" too, but it's not
  451. safely possible. (only 1 module use count, lock issues.) */
  452. out:
  453. free_page((unsigned long)buffer);
  454. return err;
  455. }
  456. static const struct file_operations cciss_proc_fops = {
  457. .owner = THIS_MODULE,
  458. .open = cciss_seq_open,
  459. .read = seq_read,
  460. .llseek = seq_lseek,
  461. .release = seq_release,
  462. .write = cciss_proc_write,
  463. };
  464. static void __devinit cciss_procinit(ctlr_info_t *h)
  465. {
  466. struct proc_dir_entry *pde;
  467. if (proc_cciss == NULL)
  468. proc_cciss = proc_mkdir("driver/cciss", NULL);
  469. if (!proc_cciss)
  470. return;
  471. pde = proc_create_data(h->devname, S_IWUSR | S_IRUSR | S_IRGRP |
  472. S_IROTH, proc_cciss,
  473. &cciss_proc_fops, h);
  474. }
  475. #endif /* CONFIG_PROC_FS */
  476. #define MAX_PRODUCT_NAME_LEN 19
  477. #define to_hba(n) container_of(n, struct ctlr_info, dev)
  478. #define to_drv(n) container_of(n, drive_info_struct, dev)
  479. /* List of controllers which cannot be reset on kexec with reset_devices */
  480. static u32 unresettable_controller[] = {
  481. 0x324a103C, /* Smart Array P712m */
  482. 0x324b103C, /* SmartArray P711m */
  483. 0x3223103C, /* Smart Array P800 */
  484. 0x3234103C, /* Smart Array P400 */
  485. 0x3235103C, /* Smart Array P400i */
  486. 0x3211103C, /* Smart Array E200i */
  487. 0x3212103C, /* Smart Array E200 */
  488. 0x3213103C, /* Smart Array E200i */
  489. 0x3214103C, /* Smart Array E200i */
  490. 0x3215103C, /* Smart Array E200i */
  491. 0x3237103C, /* Smart Array E500 */
  492. 0x323D103C, /* Smart Array P700m */
  493. 0x409C0E11, /* Smart Array 6400 */
  494. 0x409D0E11, /* Smart Array 6400 EM */
  495. };
  496. static int ctlr_is_resettable(struct ctlr_info *h)
  497. {
  498. int i;
  499. for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++)
  500. if (unresettable_controller[i] == h->board_id)
  501. return 0;
  502. return 1;
  503. }
  504. static ssize_t host_show_resettable(struct device *dev,
  505. struct device_attribute *attr,
  506. char *buf)
  507. {
  508. struct ctlr_info *h = to_hba(dev);
  509. return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h));
  510. }
  511. static DEVICE_ATTR(resettable, S_IRUGO, host_show_resettable, NULL);
  512. static ssize_t host_store_rescan(struct device *dev,
  513. struct device_attribute *attr,
  514. const char *buf, size_t count)
  515. {
  516. struct ctlr_info *h = to_hba(dev);
  517. add_to_scan_list(h);
  518. wake_up_process(cciss_scan_thread);
  519. wait_for_completion_interruptible(&h->scan_wait);
  520. return count;
  521. }
  522. static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
  523. static ssize_t dev_show_unique_id(struct device *dev,
  524. struct device_attribute *attr,
  525. char *buf)
  526. {
  527. drive_info_struct *drv = to_drv(dev);
  528. struct ctlr_info *h = to_hba(drv->dev.parent);
  529. __u8 sn[16];
  530. unsigned long flags;
  531. int ret = 0;
  532. spin_lock_irqsave(&h->lock, flags);
  533. if (h->busy_configuring)
  534. ret = -EBUSY;
  535. else
  536. memcpy(sn, drv->serial_no, sizeof(sn));
  537. spin_unlock_irqrestore(&h->lock, flags);
  538. if (ret)
  539. return ret;
  540. else
  541. return snprintf(buf, 16 * 2 + 2,
  542. "%02X%02X%02X%02X%02X%02X%02X%02X"
  543. "%02X%02X%02X%02X%02X%02X%02X%02X\n",
  544. sn[0], sn[1], sn[2], sn[3],
  545. sn[4], sn[5], sn[6], sn[7],
  546. sn[8], sn[9], sn[10], sn[11],
  547. sn[12], sn[13], sn[14], sn[15]);
  548. }
  549. static DEVICE_ATTR(unique_id, S_IRUGO, dev_show_unique_id, NULL);
  550. static ssize_t dev_show_vendor(struct device *dev,
  551. struct device_attribute *attr,
  552. char *buf)
  553. {
  554. drive_info_struct *drv = to_drv(dev);
  555. struct ctlr_info *h = to_hba(drv->dev.parent);
  556. char vendor[VENDOR_LEN + 1];
  557. unsigned long flags;
  558. int ret = 0;
  559. spin_lock_irqsave(&h->lock, flags);
  560. if (h->busy_configuring)
  561. ret = -EBUSY;
  562. else
  563. memcpy(vendor, drv->vendor, VENDOR_LEN + 1);
  564. spin_unlock_irqrestore(&h->lock, flags);
  565. if (ret)
  566. return ret;
  567. else
  568. return snprintf(buf, sizeof(vendor) + 1, "%s\n", drv->vendor);
  569. }
  570. static DEVICE_ATTR(vendor, S_IRUGO, dev_show_vendor, NULL);
  571. static ssize_t dev_show_model(struct device *dev,
  572. struct device_attribute *attr,
  573. char *buf)
  574. {
  575. drive_info_struct *drv = to_drv(dev);
  576. struct ctlr_info *h = to_hba(drv->dev.parent);
  577. char model[MODEL_LEN + 1];
  578. unsigned long flags;
  579. int ret = 0;
  580. spin_lock_irqsave(&h->lock, flags);
  581. if (h->busy_configuring)
  582. ret = -EBUSY;
  583. else
  584. memcpy(model, drv->model, MODEL_LEN + 1);
  585. spin_unlock_irqrestore(&h->lock, flags);
  586. if (ret)
  587. return ret;
  588. else
  589. return snprintf(buf, sizeof(model) + 1, "%s\n", drv->model);
  590. }
  591. static DEVICE_ATTR(model, S_IRUGO, dev_show_model, NULL);
  592. static ssize_t dev_show_rev(struct device *dev,
  593. struct device_attribute *attr,
  594. char *buf)
  595. {
  596. drive_info_struct *drv = to_drv(dev);
  597. struct ctlr_info *h = to_hba(drv->dev.parent);
  598. char rev[REV_LEN + 1];
  599. unsigned long flags;
  600. int ret = 0;
  601. spin_lock_irqsave(&h->lock, flags);
  602. if (h->busy_configuring)
  603. ret = -EBUSY;
  604. else
  605. memcpy(rev, drv->rev, REV_LEN + 1);
  606. spin_unlock_irqrestore(&h->lock, flags);
  607. if (ret)
  608. return ret;
  609. else
  610. return snprintf(buf, sizeof(rev) + 1, "%s\n", drv->rev);
  611. }
  612. static DEVICE_ATTR(rev, S_IRUGO, dev_show_rev, NULL);
  613. static ssize_t cciss_show_lunid(struct device *dev,
  614. struct device_attribute *attr, char *buf)
  615. {
  616. drive_info_struct *drv = to_drv(dev);
  617. struct ctlr_info *h = to_hba(drv->dev.parent);
  618. unsigned long flags;
  619. unsigned char lunid[8];
  620. spin_lock_irqsave(&h->lock, flags);
  621. if (h->busy_configuring) {
  622. spin_unlock_irqrestore(&h->lock, flags);
  623. return -EBUSY;
  624. }
  625. if (!drv->heads) {
  626. spin_unlock_irqrestore(&h->lock, flags);
  627. return -ENOTTY;
  628. }
  629. memcpy(lunid, drv->LunID, sizeof(lunid));
  630. spin_unlock_irqrestore(&h->lock, flags);
  631. return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
  632. lunid[0], lunid[1], lunid[2], lunid[3],
  633. lunid[4], lunid[5], lunid[6], lunid[7]);
  634. }
  635. static DEVICE_ATTR(lunid, S_IRUGO, cciss_show_lunid, NULL);
  636. static ssize_t cciss_show_raid_level(struct device *dev,
  637. struct device_attribute *attr, char *buf)
  638. {
  639. drive_info_struct *drv = to_drv(dev);
  640. struct ctlr_info *h = to_hba(drv->dev.parent);
  641. int raid;
  642. unsigned long flags;
  643. spin_lock_irqsave(&h->lock, flags);
  644. if (h->busy_configuring) {
  645. spin_unlock_irqrestore(&h->lock, flags);
  646. return -EBUSY;
  647. }
  648. raid = drv->raid_level;
  649. spin_unlock_irqrestore(&h->lock, flags);
  650. if (raid < 0 || raid > RAID_UNKNOWN)
  651. raid = RAID_UNKNOWN;
  652. return snprintf(buf, strlen(raid_label[raid]) + 7, "RAID %s\n",
  653. raid_label[raid]);
  654. }
  655. static DEVICE_ATTR(raid_level, S_IRUGO, cciss_show_raid_level, NULL);
  656. static ssize_t cciss_show_usage_count(struct device *dev,
  657. struct device_attribute *attr, char *buf)
  658. {
  659. drive_info_struct *drv = to_drv(dev);
  660. struct ctlr_info *h = to_hba(drv->dev.parent);
  661. unsigned long flags;
  662. int count;
  663. spin_lock_irqsave(&h->lock, flags);
  664. if (h->busy_configuring) {
  665. spin_unlock_irqrestore(&h->lock, flags);
  666. return -EBUSY;
  667. }
  668. count = drv->usage_count;
  669. spin_unlock_irqrestore(&h->lock, flags);
  670. return snprintf(buf, 20, "%d\n", count);
  671. }
  672. static DEVICE_ATTR(usage_count, S_IRUGO, cciss_show_usage_count, NULL);
  673. static struct attribute *cciss_host_attrs[] = {
  674. &dev_attr_rescan.attr,
  675. &dev_attr_resettable.attr,
  676. NULL
  677. };
  678. static struct attribute_group cciss_host_attr_group = {
  679. .attrs = cciss_host_attrs,
  680. };
  681. static const struct attribute_group *cciss_host_attr_groups[] = {
  682. &cciss_host_attr_group,
  683. NULL
  684. };
  685. static struct device_type cciss_host_type = {
  686. .name = "cciss_host",
  687. .groups = cciss_host_attr_groups,
  688. .release = cciss_hba_release,
  689. };
  690. static struct attribute *cciss_dev_attrs[] = {
  691. &dev_attr_unique_id.attr,
  692. &dev_attr_model.attr,
  693. &dev_attr_vendor.attr,
  694. &dev_attr_rev.attr,
  695. &dev_attr_lunid.attr,
  696. &dev_attr_raid_level.attr,
  697. &dev_attr_usage_count.attr,
  698. NULL
  699. };
  700. static struct attribute_group cciss_dev_attr_group = {
  701. .attrs = cciss_dev_attrs,
  702. };
  703. static const struct attribute_group *cciss_dev_attr_groups[] = {
  704. &cciss_dev_attr_group,
  705. NULL
  706. };
  707. static struct device_type cciss_dev_type = {
  708. .name = "cciss_device",
  709. .groups = cciss_dev_attr_groups,
  710. .release = cciss_device_release,
  711. };
  712. static struct bus_type cciss_bus_type = {
  713. .name = "cciss",
  714. };
  715. /*
  716. * cciss_hba_release is called when the reference count
  717. * of h->dev goes to zero.
  718. */
  719. static void cciss_hba_release(struct device *dev)
  720. {
  721. /*
  722. * nothing to do, but need this to avoid a warning
  723. * about not having a release handler from lib/kref.c.
  724. */
  725. }
  726. /*
  727. * Initialize sysfs entry for each controller. This sets up and registers
  728. * the 'cciss#' directory for each individual controller under
  729. * /sys/bus/pci/devices/<dev>/.
  730. */
  731. static int cciss_create_hba_sysfs_entry(struct ctlr_info *h)
  732. {
  733. device_initialize(&h->dev);
  734. h->dev.type = &cciss_host_type;
  735. h->dev.bus = &cciss_bus_type;
  736. dev_set_name(&h->dev, "%s", h->devname);
  737. h->dev.parent = &h->pdev->dev;
  738. return device_add(&h->dev);
  739. }
  740. /*
  741. * Remove sysfs entries for an hba.
  742. */
  743. static void cciss_destroy_hba_sysfs_entry(struct ctlr_info *h)
  744. {
  745. device_del(&h->dev);
  746. put_device(&h->dev); /* final put. */
  747. }
  748. /* cciss_device_release is called when the reference count
  749. * of h->drv[x]dev goes to zero.
  750. */
  751. static void cciss_device_release(struct device *dev)
  752. {
  753. drive_info_struct *drv = to_drv(dev);
  754. kfree(drv);
  755. }
  756. /*
  757. * Initialize sysfs for each logical drive. This sets up and registers
  758. * the 'c#d#' directory for each individual logical drive under
  759. * /sys/bus/pci/devices/<dev/ccis#/. We also create a link from
  760. * /sys/block/cciss!c#d# to this entry.
  761. */
  762. static long cciss_create_ld_sysfs_entry(struct ctlr_info *h,
  763. int drv_index)
  764. {
  765. struct device *dev;
  766. if (h->drv[drv_index]->device_initialized)
  767. return 0;
  768. dev = &h->drv[drv_index]->dev;
  769. device_initialize(dev);
  770. dev->type = &cciss_dev_type;
  771. dev->bus = &cciss_bus_type;
  772. dev_set_name(dev, "c%dd%d", h->ctlr, drv_index);
  773. dev->parent = &h->dev;
  774. h->drv[drv_index]->device_initialized = 1;
  775. return device_add(dev);
  776. }
  777. /*
  778. * Remove sysfs entries for a logical drive.
  779. */
  780. static void cciss_destroy_ld_sysfs_entry(struct ctlr_info *h, int drv_index,
  781. int ctlr_exiting)
  782. {
  783. struct device *dev = &h->drv[drv_index]->dev;
  784. /* special case for c*d0, we only destroy it on controller exit */
  785. if (drv_index == 0 && !ctlr_exiting)
  786. return;
  787. device_del(dev);
  788. put_device(dev); /* the "final" put. */
  789. h->drv[drv_index] = NULL;
  790. }
  791. /*
  792. * For operations that cannot sleep, a command block is allocated at init,
  793. * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
  794. * which ones are free or in use.
  795. */
  796. static CommandList_struct *cmd_alloc(ctlr_info_t *h)
  797. {
  798. CommandList_struct *c;
  799. int i;
  800. u64bit temp64;
  801. dma_addr_t cmd_dma_handle, err_dma_handle;
  802. do {
  803. i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
  804. if (i == h->nr_cmds)
  805. return NULL;
  806. } while (test_and_set_bit(i & (BITS_PER_LONG - 1),
  807. h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
  808. c = h->cmd_pool + i;
  809. memset(c, 0, sizeof(CommandList_struct));
  810. cmd_dma_handle = h->cmd_pool_dhandle + i * sizeof(CommandList_struct);
  811. c->err_info = h->errinfo_pool + i;
  812. memset(c->err_info, 0, sizeof(ErrorInfo_struct));
  813. err_dma_handle = h->errinfo_pool_dhandle
  814. + i * sizeof(ErrorInfo_struct);
  815. h->nr_allocs++;
  816. c->cmdindex = i;
  817. INIT_LIST_HEAD(&c->list);
  818. c->busaddr = (__u32) cmd_dma_handle;
  819. temp64.val = (__u64) err_dma_handle;
  820. c->ErrDesc.Addr.lower = temp64.val32.lower;
  821. c->ErrDesc.Addr.upper = temp64.val32.upper;
  822. c->ErrDesc.Len = sizeof(ErrorInfo_struct);
  823. c->ctlr = h->ctlr;
  824. return c;
  825. }
  826. /* allocate a command using pci_alloc_consistent, used for ioctls,
  827. * etc., not for the main i/o path.
  828. */
  829. static CommandList_struct *cmd_special_alloc(ctlr_info_t *h)
  830. {
  831. CommandList_struct *c;
  832. u64bit temp64;
  833. dma_addr_t cmd_dma_handle, err_dma_handle;
  834. c = (CommandList_struct *) pci_alloc_consistent(h->pdev,
  835. sizeof(CommandList_struct), &cmd_dma_handle);
  836. if (c == NULL)
  837. return NULL;
  838. memset(c, 0, sizeof(CommandList_struct));
  839. c->cmdindex = -1;
  840. c->err_info = (ErrorInfo_struct *)
  841. pci_alloc_consistent(h->pdev, sizeof(ErrorInfo_struct),
  842. &err_dma_handle);
  843. if (c->err_info == NULL) {
  844. pci_free_consistent(h->pdev,
  845. sizeof(CommandList_struct), c, cmd_dma_handle);
  846. return NULL;
  847. }
  848. memset(c->err_info, 0, sizeof(ErrorInfo_struct));
  849. INIT_LIST_HEAD(&c->list);
  850. c->busaddr = (__u32) cmd_dma_handle;
  851. temp64.val = (__u64) err_dma_handle;
  852. c->ErrDesc.Addr.lower = temp64.val32.lower;
  853. c->ErrDesc.Addr.upper = temp64.val32.upper;
  854. c->ErrDesc.Len = sizeof(ErrorInfo_struct);
  855. c->ctlr = h->ctlr;
  856. return c;
  857. }
  858. static void cmd_free(ctlr_info_t *h, CommandList_struct *c)
  859. {
  860. int i;
  861. i = c - h->cmd_pool;
  862. clear_bit(i & (BITS_PER_LONG - 1),
  863. h->cmd_pool_bits + (i / BITS_PER_LONG));
  864. h->nr_frees++;
  865. }
  866. static void cmd_special_free(ctlr_info_t *h, CommandList_struct *c)
  867. {
  868. u64bit temp64;
  869. temp64.val32.lower = c->ErrDesc.Addr.lower;
  870. temp64.val32.upper = c->ErrDesc.Addr.upper;
  871. pci_free_consistent(h->pdev, sizeof(ErrorInfo_struct),
  872. c->err_info, (dma_addr_t) temp64.val);
  873. pci_free_consistent(h->pdev, sizeof(CommandList_struct), c,
  874. (dma_addr_t) cciss_tag_discard_error_bits(h, (u32) c->busaddr));
  875. }
  876. static inline ctlr_info_t *get_host(struct gendisk *disk)
  877. {
  878. return disk->queue->queuedata;
  879. }
  880. static inline drive_info_struct *get_drv(struct gendisk *disk)
  881. {
  882. return disk->private_data;
  883. }
  884. /*
  885. * Open. Make sure the device is really there.
  886. */
  887. static int cciss_open(struct block_device *bdev, fmode_t mode)
  888. {
  889. ctlr_info_t *h = get_host(bdev->bd_disk);
  890. drive_info_struct *drv = get_drv(bdev->bd_disk);
  891. dev_dbg(&h->pdev->dev, "cciss_open %s\n", bdev->bd_disk->disk_name);
  892. if (drv->busy_configuring)
  893. return -EBUSY;
  894. /*
  895. * Root is allowed to open raw volume zero even if it's not configured
  896. * so array config can still work. Root is also allowed to open any
  897. * volume that has a LUN ID, so it can issue IOCTL to reread the
  898. * disk information. I don't think I really like this
  899. * but I'm already using way to many device nodes to claim another one
  900. * for "raw controller".
  901. */
  902. if (drv->heads == 0) {
  903. if (MINOR(bdev->bd_dev) != 0) { /* not node 0? */
  904. /* if not node 0 make sure it is a partition = 0 */
  905. if (MINOR(bdev->bd_dev) & 0x0f) {
  906. return -ENXIO;
  907. /* if it is, make sure we have a LUN ID */
  908. } else if (memcmp(drv->LunID, CTLR_LUNID,
  909. sizeof(drv->LunID))) {
  910. return -ENXIO;
  911. }
  912. }
  913. if (!capable(CAP_SYS_ADMIN))
  914. return -EPERM;
  915. }
  916. drv->usage_count++;
  917. h->usage_count++;
  918. return 0;
  919. }
  920. static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode)
  921. {
  922. int ret;
  923. mutex_lock(&cciss_mutex);
  924. ret = cciss_open(bdev, mode);
  925. mutex_unlock(&cciss_mutex);
  926. return ret;
  927. }
  928. /*
  929. * Close. Sync first.
  930. */
  931. static int cciss_release(struct gendisk *disk, fmode_t mode)
  932. {
  933. ctlr_info_t *h;
  934. drive_info_struct *drv;
  935. mutex_lock(&cciss_mutex);
  936. h = get_host(disk);
  937. drv = get_drv(disk);
  938. dev_dbg(&h->pdev->dev, "cciss_release %s\n", disk->disk_name);
  939. drv->usage_count--;
  940. h->usage_count--;
  941. mutex_unlock(&cciss_mutex);
  942. return 0;
  943. }
  944. static int do_ioctl(struct block_device *bdev, fmode_t mode,
  945. unsigned cmd, unsigned long arg)
  946. {
  947. int ret;
  948. mutex_lock(&cciss_mutex);
  949. ret = cciss_ioctl(bdev, mode, cmd, arg);
  950. mutex_unlock(&cciss_mutex);
  951. return ret;
  952. }
  953. #ifdef CONFIG_COMPAT
  954. static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
  955. unsigned cmd, unsigned long arg);
  956. static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
  957. unsigned cmd, unsigned long arg);
  958. static int cciss_compat_ioctl(struct block_device *bdev, fmode_t mode,
  959. unsigned cmd, unsigned long arg)
  960. {
  961. switch (cmd) {
  962. case CCISS_GETPCIINFO:
  963. case CCISS_GETINTINFO:
  964. case CCISS_SETINTINFO:
  965. case CCISS_GETNODENAME:
  966. case CCISS_SETNODENAME:
  967. case CCISS_GETHEARTBEAT:
  968. case CCISS_GETBUSTYPES:
  969. case CCISS_GETFIRMVER:
  970. case CCISS_GETDRIVVER:
  971. case CCISS_REVALIDVOLS:
  972. case CCISS_DEREGDISK:
  973. case CCISS_REGNEWDISK:
  974. case CCISS_REGNEWD:
  975. case CCISS_RESCANDISK:
  976. case CCISS_GETLUNINFO:
  977. return do_ioctl(bdev, mode, cmd, arg);
  978. case CCISS_PASSTHRU32:
  979. return cciss_ioctl32_passthru(bdev, mode, cmd, arg);
  980. case CCISS_BIG_PASSTHRU32:
  981. return cciss_ioctl32_big_passthru(bdev, mode, cmd, arg);
  982. default:
  983. return -ENOIOCTLCMD;
  984. }
  985. }
  986. static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
  987. unsigned cmd, unsigned long arg)
  988. {
  989. IOCTL32_Command_struct __user *arg32 =
  990. (IOCTL32_Command_struct __user *) arg;
  991. IOCTL_Command_struct arg64;
  992. IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
  993. int err;
  994. u32 cp;
  995. err = 0;
  996. err |=
  997. copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  998. sizeof(arg64.LUN_info));
  999. err |=
  1000. copy_from_user(&arg64.Request, &arg32->Request,
  1001. sizeof(arg64.Request));
  1002. err |=
  1003. copy_from_user(&arg64.error_info, &arg32->error_info,
  1004. sizeof(arg64.error_info));
  1005. err |= get_user(arg64.buf_size, &arg32->buf_size);
  1006. err |= get_user(cp, &arg32->buf);
  1007. arg64.buf = compat_ptr(cp);
  1008. err |= copy_to_user(p, &arg64, sizeof(arg64));
  1009. if (err)
  1010. return -EFAULT;
  1011. err = do_ioctl(bdev, mode, CCISS_PASSTHRU, (unsigned long)p);
  1012. if (err)
  1013. return err;
  1014. err |=
  1015. copy_in_user(&arg32->error_info, &p->error_info,
  1016. sizeof(arg32->error_info));
  1017. if (err)
  1018. return -EFAULT;
  1019. return err;
  1020. }
  1021. static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
  1022. unsigned cmd, unsigned long arg)
  1023. {
  1024. BIG_IOCTL32_Command_struct __user *arg32 =
  1025. (BIG_IOCTL32_Command_struct __user *) arg;
  1026. BIG_IOCTL_Command_struct arg64;
  1027. BIG_IOCTL_Command_struct __user *p =
  1028. compat_alloc_user_space(sizeof(arg64));
  1029. int err;
  1030. u32 cp;
  1031. memset(&arg64, 0, sizeof(arg64));
  1032. err = 0;
  1033. err |=
  1034. copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  1035. sizeof(arg64.LUN_info));
  1036. err |=
  1037. copy_from_user(&arg64.Request, &arg32->Request,
  1038. sizeof(arg64.Request));
  1039. err |=
  1040. copy_from_user(&arg64.error_info, &arg32->error_info,
  1041. sizeof(arg64.error_info));
  1042. err |= get_user(arg64.buf_size, &arg32->buf_size);
  1043. err |= get_user(arg64.malloc_size, &arg32->malloc_size);
  1044. err |= get_user(cp, &arg32->buf);
  1045. arg64.buf = compat_ptr(cp);
  1046. err |= copy_to_user(p, &arg64, sizeof(arg64));
  1047. if (err)
  1048. return -EFAULT;
  1049. err = do_ioctl(bdev, mode, CCISS_BIG_PASSTHRU, (unsigned long)p);
  1050. if (err)
  1051. return err;
  1052. err |=
  1053. copy_in_user(&arg32->error_info, &p->error_info,
  1054. sizeof(arg32->error_info));
  1055. if (err)
  1056. return -EFAULT;
  1057. return err;
  1058. }
  1059. #endif
  1060. static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo)
  1061. {
  1062. drive_info_struct *drv = get_drv(bdev->bd_disk);
  1063. if (!drv->cylinders)
  1064. return -ENXIO;
  1065. geo->heads = drv->heads;
  1066. geo->sectors = drv->sectors;
  1067. geo->cylinders = drv->cylinders;
  1068. return 0;
  1069. }
  1070. static void check_ioctl_unit_attention(ctlr_info_t *h, CommandList_struct *c)
  1071. {
  1072. if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
  1073. c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
  1074. (void)check_for_unit_attention(h, c);
  1075. }
  1076. static int cciss_getpciinfo(ctlr_info_t *h, void __user *argp)
  1077. {
  1078. cciss_pci_info_struct pciinfo;
  1079. if (!argp)
  1080. return -EINVAL;
  1081. pciinfo.domain = pci_domain_nr(h->pdev->bus);
  1082. pciinfo.bus = h->pdev->bus->number;
  1083. pciinfo.dev_fn = h->pdev->devfn;
  1084. pciinfo.board_id = h->board_id;
  1085. if (copy_to_user(argp, &pciinfo, sizeof(cciss_pci_info_struct)))
  1086. return -EFAULT;
  1087. return 0;
  1088. }
  1089. static int cciss_getintinfo(ctlr_info_t *h, void __user *argp)
  1090. {
  1091. cciss_coalint_struct intinfo;
  1092. if (!argp)
  1093. return -EINVAL;
  1094. intinfo.delay = readl(&h->cfgtable->HostWrite.CoalIntDelay);
  1095. intinfo.count = readl(&h->cfgtable->HostWrite.CoalIntCount);
  1096. if (copy_to_user
  1097. (argp, &intinfo, sizeof(cciss_coalint_struct)))
  1098. return -EFAULT;
  1099. return 0;
  1100. }
  1101. static int cciss_setintinfo(ctlr_info_t *h, void __user *argp)
  1102. {
  1103. cciss_coalint_struct intinfo;
  1104. unsigned long flags;
  1105. int i;
  1106. if (!argp)
  1107. return -EINVAL;
  1108. if (!capable(CAP_SYS_ADMIN))
  1109. return -EPERM;
  1110. if (copy_from_user(&intinfo, argp, sizeof(intinfo)))
  1111. return -EFAULT;
  1112. if ((intinfo.delay == 0) && (intinfo.count == 0))
  1113. return -EINVAL;
  1114. spin_lock_irqsave(&h->lock, flags);
  1115. /* Update the field, and then ring the doorbell */
  1116. writel(intinfo.delay, &(h->cfgtable->HostWrite.CoalIntDelay));
  1117. writel(intinfo.count, &(h->cfgtable->HostWrite.CoalIntCount));
  1118. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  1119. for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
  1120. if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
  1121. break;
  1122. udelay(1000); /* delay and try again */
  1123. }
  1124. spin_unlock_irqrestore(&h->lock, flags);
  1125. if (i >= MAX_IOCTL_CONFIG_WAIT)
  1126. return -EAGAIN;
  1127. return 0;
  1128. }
  1129. static int cciss_getnodename(ctlr_info_t *h, void __user *argp)
  1130. {
  1131. NodeName_type NodeName;
  1132. int i;
  1133. if (!argp)
  1134. return -EINVAL;
  1135. for (i = 0; i < 16; i++)
  1136. NodeName[i] = readb(&h->cfgtable->ServerName[i]);
  1137. if (copy_to_user(argp, NodeName, sizeof(NodeName_type)))
  1138. return -EFAULT;
  1139. return 0;
  1140. }
  1141. static int cciss_setnodename(ctlr_info_t *h, void __user *argp)
  1142. {
  1143. NodeName_type NodeName;
  1144. unsigned long flags;
  1145. int i;
  1146. if (!argp)
  1147. return -EINVAL;
  1148. if (!capable(CAP_SYS_ADMIN))
  1149. return -EPERM;
  1150. if (copy_from_user(NodeName, argp, sizeof(NodeName_type)))
  1151. return -EFAULT;
  1152. spin_lock_irqsave(&h->lock, flags);
  1153. /* Update the field, and then ring the doorbell */
  1154. for (i = 0; i < 16; i++)
  1155. writeb(NodeName[i], &h->cfgtable->ServerName[i]);
  1156. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  1157. for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
  1158. if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
  1159. break;
  1160. udelay(1000); /* delay and try again */
  1161. }
  1162. spin_unlock_irqrestore(&h->lock, flags);
  1163. if (i >= MAX_IOCTL_CONFIG_WAIT)
  1164. return -EAGAIN;
  1165. return 0;
  1166. }
  1167. static int cciss_getheartbeat(ctlr_info_t *h, void __user *argp)
  1168. {
  1169. Heartbeat_type heartbeat;
  1170. if (!argp)
  1171. return -EINVAL;
  1172. heartbeat = readl(&h->cfgtable->HeartBeat);
  1173. if (copy_to_user(argp, &heartbeat, sizeof(Heartbeat_type)))
  1174. return -EFAULT;
  1175. return 0;
  1176. }
  1177. static int cciss_getbustypes(ctlr_info_t *h, void __user *argp)
  1178. {
  1179. BusTypes_type BusTypes;
  1180. if (!argp)
  1181. return -EINVAL;
  1182. BusTypes = readl(&h->cfgtable->BusTypes);
  1183. if (copy_to_user(argp, &BusTypes, sizeof(BusTypes_type)))
  1184. return -EFAULT;
  1185. return 0;
  1186. }
  1187. static int cciss_getfirmver(ctlr_info_t *h, void __user *argp)
  1188. {
  1189. FirmwareVer_type firmware;
  1190. if (!argp)
  1191. return -EINVAL;
  1192. memcpy(firmware, h->firm_ver, 4);
  1193. if (copy_to_user
  1194. (argp, firmware, sizeof(FirmwareVer_type)))
  1195. return -EFAULT;
  1196. return 0;
  1197. }
  1198. static int cciss_getdrivver(ctlr_info_t *h, void __user *argp)
  1199. {
  1200. DriverVer_type DriverVer = DRIVER_VERSION;
  1201. if (!argp)
  1202. return -EINVAL;
  1203. if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
  1204. return -EFAULT;
  1205. return 0;
  1206. }
  1207. static int cciss_getluninfo(ctlr_info_t *h,
  1208. struct gendisk *disk, void __user *argp)
  1209. {
  1210. LogvolInfo_struct luninfo;
  1211. drive_info_struct *drv = get_drv(disk);
  1212. if (!argp)
  1213. return -EINVAL;
  1214. memcpy(&luninfo.LunID, drv->LunID, sizeof(luninfo.LunID));
  1215. luninfo.num_opens = drv->usage_count;
  1216. luninfo.num_parts = 0;
  1217. if (copy_to_user(argp, &luninfo, sizeof(LogvolInfo_struct)))
  1218. return -EFAULT;
  1219. return 0;
  1220. }
  1221. static int cciss_passthru(ctlr_info_t *h, void __user *argp)
  1222. {
  1223. IOCTL_Command_struct iocommand;
  1224. CommandList_struct *c;
  1225. char *buff = NULL;
  1226. u64bit temp64;
  1227. DECLARE_COMPLETION_ONSTACK(wait);
  1228. if (!argp)
  1229. return -EINVAL;
  1230. if (!capable(CAP_SYS_RAWIO))
  1231. return -EPERM;
  1232. if (copy_from_user
  1233. (&iocommand, argp, sizeof(IOCTL_Command_struct)))
  1234. return -EFAULT;
  1235. if ((iocommand.buf_size < 1) &&
  1236. (iocommand.Request.Type.Direction != XFER_NONE)) {
  1237. return -EINVAL;
  1238. }
  1239. if (iocommand.buf_size > 0) {
  1240. buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
  1241. if (buff == NULL)
  1242. return -EFAULT;
  1243. }
  1244. if (iocommand.Request.Type.Direction == XFER_WRITE) {
  1245. /* Copy the data into the buffer we created */
  1246. if (copy_from_user(buff, iocommand.buf, iocommand.buf_size)) {
  1247. kfree(buff);
  1248. return -EFAULT;
  1249. }
  1250. } else {
  1251. memset(buff, 0, iocommand.buf_size);
  1252. }
  1253. c = cmd_special_alloc(h);
  1254. if (!c) {
  1255. kfree(buff);
  1256. return -ENOMEM;
  1257. }
  1258. /* Fill in the command type */
  1259. c->cmd_type = CMD_IOCTL_PEND;
  1260. /* Fill in Command Header */
  1261. c->Header.ReplyQueue = 0; /* unused in simple mode */
  1262. if (iocommand.buf_size > 0) { /* buffer to fill */
  1263. c->Header.SGList = 1;
  1264. c->Header.SGTotal = 1;
  1265. } else { /* no buffers to fill */
  1266. c->Header.SGList = 0;
  1267. c->Header.SGTotal = 0;
  1268. }
  1269. c->Header.LUN = iocommand.LUN_info;
  1270. /* use the kernel address the cmd block for tag */
  1271. c->Header.Tag.lower = c->busaddr;
  1272. /* Fill in Request block */
  1273. c->Request = iocommand.Request;
  1274. /* Fill in the scatter gather information */
  1275. if (iocommand.buf_size > 0) {
  1276. temp64.val = pci_map_single(h->pdev, buff,
  1277. iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
  1278. c->SG[0].Addr.lower = temp64.val32.lower;
  1279. c->SG[0].Addr.upper = temp64.val32.upper;
  1280. c->SG[0].Len = iocommand.buf_size;
  1281. c->SG[0].Ext = 0; /* we are not chaining */
  1282. }
  1283. c->waiting = &wait;
  1284. enqueue_cmd_and_start_io(h, c);
  1285. wait_for_completion(&wait);
  1286. /* unlock the buffers from DMA */
  1287. temp64.val32.lower = c->SG[0].Addr.lower;
  1288. temp64.val32.upper = c->SG[0].Addr.upper;
  1289. pci_unmap_single(h->pdev, (dma_addr_t) temp64.val, iocommand.buf_size,
  1290. PCI_DMA_BIDIRECTIONAL);
  1291. check_ioctl_unit_attention(h, c);
  1292. /* Copy the error information out */
  1293. iocommand.error_info = *(c->err_info);
  1294. if (copy_to_user(argp, &iocommand, sizeof(IOCTL_Command_struct))) {
  1295. kfree(buff);
  1296. cmd_special_free(h, c);
  1297. return -EFAULT;
  1298. }
  1299. if (iocommand.Request.Type.Direction == XFER_READ) {
  1300. /* Copy the data out of the buffer we created */
  1301. if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
  1302. kfree(buff);
  1303. cmd_special_free(h, c);
  1304. return -EFAULT;
  1305. }
  1306. }
  1307. kfree(buff);
  1308. cmd_special_free(h, c);
  1309. return 0;
  1310. }
  1311. static int cciss_bigpassthru(ctlr_info_t *h, void __user *argp)
  1312. {
  1313. BIG_IOCTL_Command_struct *ioc;
  1314. CommandList_struct *c;
  1315. unsigned char **buff = NULL;
  1316. int *buff_size = NULL;
  1317. u64bit temp64;
  1318. BYTE sg_used = 0;
  1319. int status = 0;
  1320. int i;
  1321. DECLARE_COMPLETION_ONSTACK(wait);
  1322. __u32 left;
  1323. __u32 sz;
  1324. BYTE __user *data_ptr;
  1325. if (!argp)
  1326. return -EINVAL;
  1327. if (!capable(CAP_SYS_RAWIO))
  1328. return -EPERM;
  1329. ioc = (BIG_IOCTL_Command_struct *)
  1330. kmalloc(sizeof(*ioc), GFP_KERNEL);
  1331. if (!ioc) {
  1332. status = -ENOMEM;
  1333. goto cleanup1;
  1334. }
  1335. if (copy_from_user(ioc, argp, sizeof(*ioc))) {
  1336. status = -EFAULT;
  1337. goto cleanup1;
  1338. }
  1339. if ((ioc->buf_size < 1) &&
  1340. (ioc->Request.Type.Direction != XFER_NONE)) {
  1341. status = -EINVAL;
  1342. goto cleanup1;
  1343. }
  1344. /* Check kmalloc limits using all SGs */
  1345. if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
  1346. status = -EINVAL;
  1347. goto cleanup1;
  1348. }
  1349. if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
  1350. status = -EINVAL;
  1351. goto cleanup1;
  1352. }
  1353. buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
  1354. if (!buff) {
  1355. status = -ENOMEM;
  1356. goto cleanup1;
  1357. }
  1358. buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL);
  1359. if (!buff_size) {
  1360. status = -ENOMEM;
  1361. goto cleanup1;
  1362. }
  1363. left = ioc->buf_size;
  1364. data_ptr = ioc->buf;
  1365. while (left) {
  1366. sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
  1367. buff_size[sg_used] = sz;
  1368. buff[sg_used] = kmalloc(sz, GFP_KERNEL);
  1369. if (buff[sg_used] == NULL) {
  1370. status = -ENOMEM;
  1371. goto cleanup1;
  1372. }
  1373. if (ioc->Request.Type.Direction == XFER_WRITE) {
  1374. if (copy_from_user(buff[sg_used], data_ptr, sz)) {
  1375. status = -EFAULT;
  1376. goto cleanup1;
  1377. }
  1378. } else {
  1379. memset(buff[sg_used], 0, sz);
  1380. }
  1381. left -= sz;
  1382. data_ptr += sz;
  1383. sg_used++;
  1384. }
  1385. c = cmd_special_alloc(h);
  1386. if (!c) {
  1387. status = -ENOMEM;
  1388. goto cleanup1;
  1389. }
  1390. c->cmd_type = CMD_IOCTL_PEND;
  1391. c->Header.ReplyQueue = 0;
  1392. c->Header.SGList = sg_used;
  1393. c->Header.SGTotal = sg_used;
  1394. c->Header.LUN = ioc->LUN_info;
  1395. c->Header.Tag.lower = c->busaddr;
  1396. c->Request = ioc->Request;
  1397. for (i = 0; i < sg_used; i++) {
  1398. temp64.val = pci_map_single(h->pdev, buff[i], buff_size[i],
  1399. PCI_DMA_BIDIRECTIONAL);
  1400. c->SG[i].Addr.lower = temp64.val32.lower;
  1401. c->SG[i].Addr.upper = temp64.val32.upper;
  1402. c->SG[i].Len = buff_size[i];
  1403. c->SG[i].Ext = 0; /* we are not chaining */
  1404. }
  1405. c->waiting = &wait;
  1406. enqueue_cmd_and_start_io(h, c);
  1407. wait_for_completion(&wait);
  1408. /* unlock the buffers from DMA */
  1409. for (i = 0; i < sg_used; i++) {
  1410. temp64.val32.lower = c->SG[i].Addr.lower;
  1411. temp64.val32.upper = c->SG[i].Addr.upper;
  1412. pci_unmap_single(h->pdev,
  1413. (dma_addr_t) temp64.val, buff_size[i],
  1414. PCI_DMA_BIDIRECTIONAL);
  1415. }
  1416. check_ioctl_unit_attention(h, c);
  1417. /* Copy the error information out */
  1418. ioc->error_info = *(c->err_info);
  1419. if (copy_to_user(argp, ioc, sizeof(*ioc))) {
  1420. cmd_special_free(h, c);
  1421. status = -EFAULT;
  1422. goto cleanup1;
  1423. }
  1424. if (ioc->Request.Type.Direction == XFER_READ) {
  1425. /* Copy the data out of the buffer we created */
  1426. BYTE __user *ptr = ioc->buf;
  1427. for (i = 0; i < sg_used; i++) {
  1428. if (copy_to_user(ptr, buff[i], buff_size[i])) {
  1429. cmd_special_free(h, c);
  1430. status = -EFAULT;
  1431. goto cleanup1;
  1432. }
  1433. ptr += buff_size[i];
  1434. }
  1435. }
  1436. cmd_special_free(h, c);
  1437. status = 0;
  1438. cleanup1:
  1439. if (buff) {
  1440. for (i = 0; i < sg_used; i++)
  1441. kfree(buff[i]);
  1442. kfree(buff);
  1443. }
  1444. kfree(buff_size);
  1445. kfree(ioc);
  1446. return status;
  1447. }
  1448. static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
  1449. unsigned int cmd, unsigned long arg)
  1450. {
  1451. struct gendisk *disk = bdev->bd_disk;
  1452. ctlr_info_t *h = get_host(disk);
  1453. void __user *argp = (void __user *)arg;
  1454. dev_dbg(&h->pdev->dev, "cciss_ioctl: Called with cmd=%x %lx\n",
  1455. cmd, arg);
  1456. switch (cmd) {
  1457. case CCISS_GETPCIINFO:
  1458. return cciss_getpciinfo(h, argp);
  1459. case CCISS_GETINTINFO:
  1460. return cciss_getintinfo(h, argp);
  1461. case CCISS_SETINTINFO:
  1462. return cciss_setintinfo(h, argp);
  1463. case CCISS_GETNODENAME:
  1464. return cciss_getnodename(h, argp);
  1465. case CCISS_SETNODENAME:
  1466. return cciss_setnodename(h, argp);
  1467. case CCISS_GETHEARTBEAT:
  1468. return cciss_getheartbeat(h, argp);
  1469. case CCISS_GETBUSTYPES:
  1470. return cciss_getbustypes(h, argp);
  1471. case CCISS_GETFIRMVER:
  1472. return cciss_getfirmver(h, argp);
  1473. case CCISS_GETDRIVVER:
  1474. return cciss_getdrivver(h, argp);
  1475. case CCISS_DEREGDISK:
  1476. case CCISS_REGNEWD:
  1477. case CCISS_REVALIDVOLS:
  1478. return rebuild_lun_table(h, 0, 1);
  1479. case CCISS_GETLUNINFO:
  1480. return cciss_getluninfo(h, disk, argp);
  1481. case CCISS_PASSTHRU:
  1482. return cciss_passthru(h, argp);
  1483. case CCISS_BIG_PASSTHRU:
  1484. return cciss_bigpassthru(h, argp);
  1485. /* scsi_cmd_ioctl handles these, below, though some are not */
  1486. /* very meaningful for cciss. SG_IO is the main one people want. */
  1487. case SG_GET_VERSION_NUM:
  1488. case SG_SET_TIMEOUT:
  1489. case SG_GET_TIMEOUT:
  1490. case SG_GET_RESERVED_SIZE:
  1491. case SG_SET_RESERVED_SIZE:
  1492. case SG_EMULATED_HOST:
  1493. case SG_IO:
  1494. case SCSI_IOCTL_SEND_COMMAND:
  1495. return scsi_cmd_ioctl(disk->queue, disk, mode, cmd, argp);
  1496. /* scsi_cmd_ioctl would normally handle these, below, but */
  1497. /* they aren't a good fit for cciss, as CD-ROMs are */
  1498. /* not supported, and we don't have any bus/target/lun */
  1499. /* which we present to the kernel. */
  1500. case CDROM_SEND_PACKET:
  1501. case CDROMCLOSETRAY:
  1502. case CDROMEJECT:
  1503. case SCSI_IOCTL_GET_IDLUN:
  1504. case SCSI_IOCTL_GET_BUS_NUMBER:
  1505. default:
  1506. return -ENOTTY;
  1507. }
  1508. }
  1509. static void cciss_check_queues(ctlr_info_t *h)
  1510. {
  1511. int start_queue = h->next_to_run;
  1512. int i;
  1513. /* check to see if we have maxed out the number of commands that can
  1514. * be placed on the queue. If so then exit. We do this check here
  1515. * in case the interrupt we serviced was from an ioctl and did not
  1516. * free any new commands.
  1517. */
  1518. if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds)
  1519. return;
  1520. /* We have room on the queue for more commands. Now we need to queue
  1521. * them up. We will also keep track of the next queue to run so
  1522. * that every queue gets a chance to be started first.
  1523. */
  1524. for (i = 0; i < h->highest_lun + 1; i++) {
  1525. int curr_queue = (start_queue + i) % (h->highest_lun + 1);
  1526. /* make sure the disk has been added and the drive is real
  1527. * because this can be called from the middle of init_one.
  1528. */
  1529. if (!h->drv[curr_queue])
  1530. continue;
  1531. if (!(h->drv[curr_queue]->queue) ||
  1532. !(h->drv[curr_queue]->heads))
  1533. continue;
  1534. blk_start_queue(h->gendisk[curr_queue]->queue);
  1535. /* check to see if we have maxed out the number of commands
  1536. * that can be placed on the queue.
  1537. */
  1538. if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds) {
  1539. if (curr_queue == start_queue) {
  1540. h->next_to_run =
  1541. (start_queue + 1) % (h->highest_lun + 1);
  1542. break;
  1543. } else {
  1544. h->next_to_run = curr_queue;
  1545. break;
  1546. }
  1547. }
  1548. }
  1549. }
  1550. static void cciss_softirq_done(struct request *rq)
  1551. {
  1552. CommandList_struct *c = rq->completion_data;
  1553. ctlr_info_t *h = hba[c->ctlr];
  1554. SGDescriptor_struct *curr_sg = c->SG;
  1555. u64bit temp64;
  1556. unsigned long flags;
  1557. int i, ddir;
  1558. int sg_index = 0;
  1559. if (c->Request.Type.Direction == XFER_READ)
  1560. ddir = PCI_DMA_FROMDEVICE;
  1561. else
  1562. ddir = PCI_DMA_TODEVICE;
  1563. /* command did not need to be retried */
  1564. /* unmap the DMA mapping for all the scatter gather elements */
  1565. for (i = 0; i < c->Header.SGList; i++) {
  1566. if (curr_sg[sg_index].Ext == CCISS_SG_CHAIN) {
  1567. cciss_unmap_sg_chain_block(h, c);
  1568. /* Point to the next block */
  1569. curr_sg = h->cmd_sg_list[c->cmdindex];
  1570. sg_index = 0;
  1571. }
  1572. temp64.val32.lower = curr_sg[sg_index].Addr.lower;
  1573. temp64.val32.upper = curr_sg[sg_index].Addr.upper;
  1574. pci_unmap_page(h->pdev, temp64.val, curr_sg[sg_index].Len,
  1575. ddir);
  1576. ++sg_index;
  1577. }
  1578. dev_dbg(&h->pdev->dev, "Done with %p\n", rq);
  1579. /* set the residual count for pc requests */
  1580. if (rq->cmd_type == REQ_TYPE_BLOCK_PC)
  1581. rq->resid_len = c->err_info->ResidualCnt;
  1582. blk_end_request_all(rq, (rq->errors == 0) ? 0 : -EIO);
  1583. spin_lock_irqsave(&h->lock, flags);
  1584. cmd_free(h, c);
  1585. cciss_check_queues(h);
  1586. spin_unlock_irqrestore(&h->lock, flags);
  1587. }
  1588. static inline void log_unit_to_scsi3addr(ctlr_info_t *h,
  1589. unsigned char scsi3addr[], uint32_t log_unit)
  1590. {
  1591. memcpy(scsi3addr, h->drv[log_unit]->LunID,
  1592. sizeof(h->drv[log_unit]->LunID));
  1593. }
  1594. /* This function gets the SCSI vendor, model, and revision of a logical drive
  1595. * via the inquiry page 0. Model, vendor, and rev are set to empty strings if
  1596. * they cannot be read.
  1597. */
  1598. static void cciss_get_device_descr(ctlr_info_t *h, int logvol,
  1599. char *vendor, char *model, char *rev)
  1600. {
  1601. int rc;
  1602. InquiryData_struct *inq_buf;
  1603. unsigned char scsi3addr[8];
  1604. *vendor = '\0';
  1605. *model = '\0';
  1606. *rev = '\0';
  1607. inq_buf = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
  1608. if (!inq_buf)
  1609. return;
  1610. log_unit_to_scsi3addr(h, scsi3addr, logvol);
  1611. rc = sendcmd_withirq(h, CISS_INQUIRY, inq_buf, sizeof(*inq_buf), 0,
  1612. scsi3addr, TYPE_CMD);
  1613. if (rc == IO_OK) {
  1614. memcpy(vendor, &inq_buf->data_byte[8], VENDOR_LEN);
  1615. vendor[VENDOR_LEN] = '\0';
  1616. memcpy(model, &inq_buf->data_byte[16], MODEL_LEN);
  1617. model[MODEL_LEN] = '\0';
  1618. memcpy(rev, &inq_buf->data_byte[32], REV_LEN);
  1619. rev[REV_LEN] = '\0';
  1620. }
  1621. kfree(inq_buf);
  1622. return;
  1623. }
  1624. /* This function gets the serial number of a logical drive via
  1625. * inquiry page 0x83. Serial no. is 16 bytes. If the serial
  1626. * number cannot be had, for whatever reason, 16 bytes of 0xff
  1627. * are returned instead.
  1628. */
  1629. static void cciss_get_serial_no(ctlr_info_t *h, int logvol,
  1630. unsigned char *serial_no, int buflen)
  1631. {
  1632. #define PAGE_83_INQ_BYTES 64
  1633. int rc;
  1634. unsigned char *buf;
  1635. unsigned char scsi3addr[8];
  1636. if (buflen > 16)
  1637. buflen = 16;
  1638. memset(serial_no, 0xff, buflen);
  1639. buf = kzalloc(PAGE_83_INQ_BYTES, GFP_KERNEL);
  1640. if (!buf)
  1641. return;
  1642. memset(serial_no, 0, buflen);
  1643. log_unit_to_scsi3addr(h, scsi3addr, logvol);
  1644. rc = sendcmd_withirq(h, CISS_INQUIRY, buf,
  1645. PAGE_83_INQ_BYTES, 0x83, scsi3addr, TYPE_CMD);
  1646. if (rc == IO_OK)
  1647. memcpy(serial_no, &buf[8], buflen);
  1648. kfree(buf);
  1649. return;
  1650. }
  1651. /*
  1652. * cciss_add_disk sets up the block device queue for a logical drive
  1653. */
  1654. static int cciss_add_disk(ctlr_info_t *h, struct gendisk *disk,
  1655. int drv_index)
  1656. {
  1657. disk->queue = blk_init_queue(do_cciss_request, &h->lock);
  1658. if (!disk->queue)
  1659. goto init_queue_failure;
  1660. sprintf(disk->disk_name, "cciss/c%dd%d", h->ctlr, drv_index);
  1661. disk->major = h->major;
  1662. disk->first_minor = drv_index << NWD_SHIFT;
  1663. disk->fops = &cciss_fops;
  1664. if (cciss_create_ld_sysfs_entry(h, drv_index))
  1665. goto cleanup_queue;
  1666. disk->private_data = h->drv[drv_index];
  1667. disk->driverfs_dev = &h->drv[drv_index]->dev;
  1668. /* Set up queue information */
  1669. blk_queue_bounce_limit(disk->queue, h->pdev->dma_mask);
  1670. /* This is a hardware imposed limit. */
  1671. blk_queue_max_segments(disk->queue, h->maxsgentries);
  1672. blk_queue_max_hw_sectors(disk->queue, h->cciss_max_sectors);
  1673. blk_queue_softirq_done(disk->queue, cciss_softirq_done);
  1674. disk->queue->queuedata = h;
  1675. blk_queue_logical_block_size(disk->queue,
  1676. h->drv[drv_index]->block_size);
  1677. /* Make sure all queue data is written out before */
  1678. /* setting h->drv[drv_index]->queue, as setting this */
  1679. /* allows the interrupt handler to start the queue */
  1680. wmb();
  1681. h->drv[drv_index]->queue = disk->queue;
  1682. add_disk(disk);
  1683. return 0;
  1684. cleanup_queue:
  1685. blk_cleanup_queue(disk->queue);
  1686. disk->queue = NULL;
  1687. init_queue_failure:
  1688. return -1;
  1689. }
  1690. /* This function will check the usage_count of the drive to be updated/added.
  1691. * If the usage_count is zero and it is a heretofore unknown drive, or,
  1692. * the drive's capacity, geometry, or serial number has changed,
  1693. * then the drive information will be updated and the disk will be
  1694. * re-registered with the kernel. If these conditions don't hold,
  1695. * then it will be left alone for the next reboot. The exception to this
  1696. * is disk 0 which will always be left registered with the kernel since it
  1697. * is also the controller node. Any changes to disk 0 will show up on
  1698. * the next reboot.
  1699. */
  1700. static void cciss_update_drive_info(ctlr_info_t *h, int drv_index,
  1701. int first_time, int via_ioctl)
  1702. {
  1703. struct gendisk *disk;
  1704. InquiryData_struct *inq_buff = NULL;
  1705. unsigned int block_size;
  1706. sector_t total_size;
  1707. unsigned long flags = 0;
  1708. int ret = 0;
  1709. drive_info_struct *drvinfo;
  1710. /* Get information about the disk and modify the driver structure */
  1711. inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
  1712. drvinfo = kzalloc(sizeof(*drvinfo), GFP_KERNEL);
  1713. if (inq_buff == NULL || drvinfo == NULL)
  1714. goto mem_msg;
  1715. /* testing to see if 16-byte CDBs are already being used */
  1716. if (h->cciss_read == CCISS_READ_16) {
  1717. cciss_read_capacity_16(h, drv_index,
  1718. &total_size, &block_size);
  1719. } else {
  1720. cciss_read_capacity(h, drv_index, &total_size, &block_size);
  1721. /* if read_capacity returns all F's this volume is >2TB */
  1722. /* in size so we switch to 16-byte CDB's for all */
  1723. /* read/write ops */
  1724. if (total_size == 0xFFFFFFFFULL) {
  1725. cciss_read_capacity_16(h, drv_index,
  1726. &total_size, &block_size);
  1727. h->cciss_read = CCISS_READ_16;
  1728. h->cciss_write = CCISS_WRITE_16;
  1729. } else {
  1730. h->cciss_read = CCISS_READ_10;
  1731. h->cciss_write = CCISS_WRITE_10;
  1732. }
  1733. }
  1734. cciss_geometry_inquiry(h, drv_index, total_size, block_size,
  1735. inq_buff, drvinfo);
  1736. drvinfo->block_size = block_size;
  1737. drvinfo->nr_blocks = total_size + 1;
  1738. cciss_get_device_descr(h, drv_index, drvinfo->vendor,
  1739. drvinfo->model, drvinfo->rev);
  1740. cciss_get_serial_no(h, drv_index, drvinfo->serial_no,
  1741. sizeof(drvinfo->serial_no));
  1742. /* Save the lunid in case we deregister the disk, below. */
  1743. memcpy(drvinfo->LunID, h->drv[drv_index]->LunID,
  1744. sizeof(drvinfo->LunID));
  1745. /* Is it the same disk we already know, and nothing's changed? */
  1746. if (h->drv[drv_index]->raid_level != -1 &&
  1747. ((memcmp(drvinfo->serial_no,
  1748. h->drv[drv_index]->serial_no, 16) == 0) &&
  1749. drvinfo->block_size == h->drv[drv_index]->block_size &&
  1750. drvinfo->nr_blocks == h->drv[drv_index]->nr_blocks &&
  1751. drvinfo->heads == h->drv[drv_index]->heads &&
  1752. drvinfo->sectors == h->drv[drv_index]->sectors &&
  1753. drvinfo->cylinders == h->drv[drv_index]->cylinders))
  1754. /* The disk is unchanged, nothing to update */
  1755. goto freeret;
  1756. /* If we get here it's not the same disk, or something's changed,
  1757. * so we need to * deregister it, and re-register it, if it's not
  1758. * in use.
  1759. * If the disk already exists then deregister it before proceeding
  1760. * (unless it's the first disk (for the controller node).
  1761. */
  1762. if (h->drv[drv_index]->raid_level != -1 && drv_index != 0) {
  1763. dev_warn(&h->pdev->dev, "disk %d has changed.\n", drv_index);
  1764. spin_lock_irqsave(&h->lock, flags);
  1765. h->drv[drv_index]->busy_configuring = 1;
  1766. spin_unlock_irqrestore(&h->lock, flags);
  1767. /* deregister_disk sets h->drv[drv_index]->queue = NULL
  1768. * which keeps the interrupt handler from starting
  1769. * the queue.
  1770. */
  1771. ret = deregister_disk(h, drv_index, 0, via_ioctl);
  1772. }
  1773. /* If the disk is in use return */
  1774. if (ret)
  1775. goto freeret;
  1776. /* Save the new information from cciss_geometry_inquiry
  1777. * and serial number inquiry. If the disk was deregistered
  1778. * above, then h->drv[drv_index] will be NULL.
  1779. */
  1780. if (h->drv[drv_index] == NULL) {
  1781. drvinfo->device_initialized = 0;
  1782. h->drv[drv_index] = drvinfo;
  1783. drvinfo = NULL; /* so it won't be freed below. */
  1784. } else {
  1785. /* special case for cxd0 */
  1786. h->drv[drv_index]->block_size = drvinfo->block_size;
  1787. h->drv[drv_index]->nr_blocks = drvinfo->nr_blocks;
  1788. h->drv[drv_index]->heads = drvinfo->heads;
  1789. h->drv[drv_index]->sectors = drvinfo->sectors;
  1790. h->drv[drv_index]->cylinders = drvinfo->cylinders;
  1791. h->drv[drv_index]->raid_level = drvinfo->raid_level;
  1792. memcpy(h->drv[drv_index]->serial_no, drvinfo->serial_no, 16);
  1793. memcpy(h->drv[drv_index]->vendor, drvinfo->vendor,
  1794. VENDOR_LEN + 1);
  1795. memcpy(h->drv[drv_index]->model, drvinfo->model, MODEL_LEN + 1);
  1796. memcpy(h->drv[drv_index]->rev, drvinfo->rev, REV_LEN + 1);
  1797. }
  1798. ++h->num_luns;
  1799. disk = h->gendisk[drv_index];
  1800. set_capacity(disk, h->drv[drv_index]->nr_blocks);
  1801. /* If it's not disk 0 (drv_index != 0)
  1802. * or if it was disk 0, but there was previously
  1803. * no actual corresponding configured logical drive
  1804. * (raid_leve == -1) then we want to update the
  1805. * logical drive's information.
  1806. */
  1807. if (drv_index || first_time) {
  1808. if (cciss_add_disk(h, disk, drv_index) != 0) {
  1809. cciss_free_gendisk(h, drv_index);
  1810. cciss_free_drive_info(h, drv_index);
  1811. dev_warn(&h->pdev->dev, "could not update disk %d\n",
  1812. drv_index);
  1813. --h->num_luns;
  1814. }
  1815. }
  1816. freeret:
  1817. kfree(inq_buff);
  1818. kfree(drvinfo);
  1819. return;
  1820. mem_msg:
  1821. dev_err(&h->pdev->dev, "out of memory\n");
  1822. goto freeret;
  1823. }
  1824. /* This function will find the first index of the controllers drive array
  1825. * that has a null drv pointer and allocate the drive info struct and
  1826. * will return that index This is where new drives will be added.
  1827. * If the index to be returned is greater than the highest_lun index for
  1828. * the controller then highest_lun is set * to this new index.
  1829. * If there are no available indexes or if tha allocation fails, then -1
  1830. * is returned. * "controller_node" is used to know if this is a real
  1831. * logical drive, or just the controller node, which determines if this
  1832. * counts towards highest_lun.
  1833. */
  1834. static int cciss_alloc_drive_info(ctlr_info_t *h, int controller_node)
  1835. {
  1836. int i;
  1837. drive_info_struct *drv;
  1838. /* Search for an empty slot for our drive info */
  1839. for (i = 0; i < CISS_MAX_LUN; i++) {
  1840. /* if not cxd0 case, and it's occupied, skip it. */
  1841. if (h->drv[i] && i != 0)
  1842. continue;
  1843. /*
  1844. * If it's cxd0 case, and drv is alloc'ed already, and a
  1845. * disk is configured there, skip it.
  1846. */
  1847. if (i == 0 && h->drv[i] && h->drv[i]->raid_level != -1)
  1848. continue;
  1849. /*
  1850. * We've found an empty slot. Update highest_lun
  1851. * provided this isn't just the fake cxd0 controller node.
  1852. */
  1853. if (i > h->highest_lun && !controller_node)
  1854. h->highest_lun = i;
  1855. /* If adding a real disk at cxd0, and it's already alloc'ed */
  1856. if (i == 0 && h->drv[i] != NULL)
  1857. return i;
  1858. /*
  1859. * Found an empty slot, not already alloc'ed. Allocate it.
  1860. * Mark it with raid_level == -1, so we know it's new later on.
  1861. */
  1862. drv = kzalloc(sizeof(*drv), GFP_KERNEL);
  1863. if (!drv)
  1864. return -1;
  1865. drv->raid_level = -1; /* so we know it's new */
  1866. h->drv[i] = drv;
  1867. return i;
  1868. }
  1869. return -1;
  1870. }
  1871. static void cciss_free_drive_info(ctlr_info_t *h, int drv_index)
  1872. {
  1873. kfree(h->drv[drv_index]);
  1874. h->drv[drv_index] = NULL;
  1875. }
  1876. static void cciss_free_gendisk(ctlr_info_t *h, int drv_index)
  1877. {
  1878. put_disk(h->gendisk[drv_index]);
  1879. h->gendisk[drv_index] = NULL;
  1880. }
  1881. /* cciss_add_gendisk finds a free hba[]->drv structure
  1882. * and allocates a gendisk if needed, and sets the lunid
  1883. * in the drvinfo structure. It returns the index into
  1884. * the ->drv[] array, or -1 if none are free.
  1885. * is_controller_node indicates whether highest_lun should
  1886. * count this disk, or if it's only being added to provide
  1887. * a means to talk to the controller in case no logical
  1888. * drives have yet been configured.
  1889. */
  1890. static int cciss_add_gendisk(ctlr_info_t *h, unsigned char lunid[],
  1891. int controller_node)
  1892. {
  1893. int drv_index;
  1894. drv_index = cciss_alloc_drive_info(h, controller_node);
  1895. if (drv_index == -1)
  1896. return -1;
  1897. /*Check if the gendisk needs to be allocated */
  1898. if (!h->gendisk[drv_index]) {
  1899. h->gendisk[drv_index] =
  1900. alloc_disk(1 << NWD_SHIFT);
  1901. if (!h->gendisk[drv_index]) {
  1902. dev_err(&h->pdev->dev,
  1903. "could not allocate a new disk %d\n",
  1904. drv_index);
  1905. goto err_free_drive_info;
  1906. }
  1907. }
  1908. memcpy(h->drv[drv_index]->LunID, lunid,
  1909. sizeof(h->drv[drv_index]->LunID));
  1910. if (cciss_create_ld_sysfs_entry(h, drv_index))
  1911. goto err_free_disk;
  1912. /* Don't need to mark this busy because nobody */
  1913. /* else knows about this disk yet to contend */
  1914. /* for access to it. */
  1915. h->drv[drv_index]->busy_configuring = 0;
  1916. wmb();
  1917. return drv_index;
  1918. err_free_disk:
  1919. cciss_free_gendisk(h, drv_index);
  1920. err_free_drive_info:
  1921. cciss_free_drive_info(h, drv_index);
  1922. return -1;
  1923. }
  1924. /* This is for the special case of a controller which
  1925. * has no logical drives. In this case, we still need
  1926. * to register a disk so the controller can be accessed
  1927. * by the Array Config Utility.
  1928. */
  1929. static void cciss_add_controller_node(ctlr_info_t *h)
  1930. {
  1931. struct gendisk *disk;
  1932. int drv_index;
  1933. if (h->gendisk[0] != NULL) /* already did this? Then bail. */
  1934. return;
  1935. drv_index = cciss_add_gendisk(h, CTLR_LUNID, 1);
  1936. if (drv_index == -1)
  1937. goto error;
  1938. h->drv[drv_index]->block_size = 512;
  1939. h->drv[drv_index]->nr_blocks = 0;
  1940. h->drv[drv_index]->heads = 0;
  1941. h->drv[drv_index]->sectors = 0;
  1942. h->drv[drv_index]->cylinders = 0;
  1943. h->drv[drv_index]->raid_level = -1;
  1944. memset(h->drv[drv_index]->serial_no, 0, 16);
  1945. disk = h->gendisk[drv_index];
  1946. if (cciss_add_disk(h, disk, drv_index) == 0)
  1947. return;
  1948. cciss_free_gendisk(h, drv_index);
  1949. cciss_free_drive_info(h, drv_index);
  1950. error:
  1951. dev_warn(&h->pdev->dev, "could not add disk 0.\n");
  1952. return;
  1953. }
  1954. /* This function will add and remove logical drives from the Logical
  1955. * drive array of the controller and maintain persistency of ordering
  1956. * so that mount points are preserved until the next reboot. This allows
  1957. * for the removal of logical drives in the middle of the drive array
  1958. * without a re-ordering of those drives.
  1959. * INPUT
  1960. * h = The controller to perform the operations on
  1961. */
  1962. static int rebuild_lun_table(ctlr_info_t *h, int first_time,
  1963. int via_ioctl)
  1964. {
  1965. int num_luns;
  1966. ReportLunData_struct *ld_buff = NULL;
  1967. int return_code;
  1968. int listlength = 0;
  1969. int i;
  1970. int drv_found;
  1971. int drv_index = 0;
  1972. unsigned char lunid[8] = CTLR_LUNID;
  1973. unsigned long flags;
  1974. if (!capable(CAP_SYS_RAWIO))
  1975. return -EPERM;
  1976. /* Set busy_configuring flag for this operation */
  1977. spin_lock_irqsave(&h->lock, flags);
  1978. if (h->busy_configuring) {
  1979. spin_unlock_irqrestore(&h->lock, flags);
  1980. return -EBUSY;
  1981. }
  1982. h->busy_configuring = 1;
  1983. spin_unlock_irqrestore(&h->lock, flags);
  1984. ld_buff = kzalloc(sizeof(ReportLunData_struct), GFP_KERNEL);
  1985. if (ld_buff == NULL)
  1986. goto mem_msg;
  1987. return_code = sendcmd_withirq(h, CISS_REPORT_LOG, ld_buff,
  1988. sizeof(ReportLunData_struct),
  1989. 0, CTLR_LUNID, TYPE_CMD);
  1990. if (return_code == IO_OK)
  1991. listlength = be32_to_cpu(*(__be32 *) ld_buff->LUNListLength);
  1992. else { /* reading number of logical volumes failed */
  1993. dev_warn(&h->pdev->dev,
  1994. "report logical volume command failed\n");
  1995. listlength = 0;
  1996. goto freeret;
  1997. }
  1998. num_luns = listlength / 8; /* 8 bytes per entry */
  1999. if (num_luns > CISS_MAX_LUN) {
  2000. num_luns = CISS_MAX_LUN;
  2001. dev_warn(&h->pdev->dev, "more luns configured"
  2002. " on controller than can be handled by"
  2003. " this driver.\n");
  2004. }
  2005. if (num_luns == 0)
  2006. cciss_add_controller_node(h);
  2007. /* Compare controller drive array to driver's drive array
  2008. * to see if any drives are missing on the controller due
  2009. * to action of Array Config Utility (user deletes drive)
  2010. * and deregister logical drives which have disappeared.
  2011. */
  2012. for (i = 0; i <= h->highest_lun; i++) {
  2013. int j;
  2014. drv_found = 0;
  2015. /* skip holes in the array from already deleted drives */
  2016. if (h->drv[i] == NULL)
  2017. continue;
  2018. for (j = 0; j < num_luns; j++) {
  2019. memcpy(lunid, &ld_buff->LUN[j][0], sizeof(lunid));
  2020. if (memcmp(h->drv[i]->LunID, lunid,
  2021. sizeof(lunid)) == 0) {
  2022. drv_found = 1;
  2023. break;
  2024. }
  2025. }
  2026. if (!drv_found) {
  2027. /* Deregister it from the OS, it's gone. */
  2028. spin_lock_irqsave(&h->lock, flags);
  2029. h->drv[i]->busy_configuring = 1;
  2030. spin_unlock_irqrestore(&h->lock, flags);
  2031. return_code = deregister_disk(h, i, 1, via_ioctl);
  2032. if (h->drv[i] != NULL)
  2033. h->drv[i]->busy_configuring = 0;
  2034. }
  2035. }
  2036. /* Compare controller drive array to driver's drive array.
  2037. * Check for updates in the drive information and any new drives
  2038. * on the controller due to ACU adding logical drives, or changing
  2039. * a logical drive's size, etc. Reregister any new/changed drives
  2040. */
  2041. for (i = 0; i < num_luns; i++) {
  2042. int j;
  2043. drv_found = 0;
  2044. memcpy(lunid, &ld_buff->LUN[i][0], sizeof(lunid));
  2045. /* Find if the LUN is already in the drive array
  2046. * of the driver. If so then update its info
  2047. * if not in use. If it does not exist then find
  2048. * the first free index and add it.
  2049. */
  2050. for (j = 0; j <= h->highest_lun; j++) {
  2051. if (h->drv[j] != NULL &&
  2052. memcmp(h->drv[j]->LunID, lunid,
  2053. sizeof(h->drv[j]->LunID)) == 0) {
  2054. drv_index = j;
  2055. drv_found = 1;
  2056. break;
  2057. }
  2058. }
  2059. /* check if the drive was found already in the array */
  2060. if (!drv_found) {
  2061. drv_index = cciss_add_gendisk(h, lunid, 0);
  2062. if (drv_index == -1)
  2063. goto freeret;
  2064. }
  2065. cciss_update_drive_info(h, drv_index, first_time, via_ioctl);
  2066. } /* end for */
  2067. freeret:
  2068. kfree(ld_buff);
  2069. h->busy_configuring = 0;
  2070. /* We return -1 here to tell the ACU that we have registered/updated
  2071. * all of the drives that we can and to keep it from calling us
  2072. * additional times.
  2073. */
  2074. return -1;
  2075. mem_msg:
  2076. dev_err(&h->pdev->dev, "out of memory\n");
  2077. h->busy_configuring = 0;
  2078. goto freeret;
  2079. }
  2080. static void cciss_clear_drive_info(drive_info_struct *drive_info)
  2081. {
  2082. /* zero out the disk size info */
  2083. drive_info->nr_blocks = 0;
  2084. drive_info->block_size = 0;
  2085. drive_info->heads = 0;
  2086. drive_info->sectors = 0;
  2087. drive_info->cylinders = 0;
  2088. drive_info->raid_level = -1;
  2089. memset(drive_info->serial_no, 0, sizeof(drive_info->serial_no));
  2090. memset(drive_info->model, 0, sizeof(drive_info->model));
  2091. memset(drive_info->rev, 0, sizeof(drive_info->rev));
  2092. memset(drive_info->vendor, 0, sizeof(drive_info->vendor));
  2093. /*
  2094. * don't clear the LUNID though, we need to remember which
  2095. * one this one is.
  2096. */
  2097. }
  2098. /* This function will deregister the disk and it's queue from the
  2099. * kernel. It must be called with the controller lock held and the
  2100. * drv structures busy_configuring flag set. It's parameters are:
  2101. *
  2102. * disk = This is the disk to be deregistered
  2103. * drv = This is the drive_info_struct associated with the disk to be
  2104. * deregistered. It contains information about the disk used
  2105. * by the driver.
  2106. * clear_all = This flag determines whether or not the disk information
  2107. * is going to be completely cleared out and the highest_lun
  2108. * reset. Sometimes we want to clear out information about
  2109. * the disk in preparation for re-adding it. In this case
  2110. * the highest_lun should be left unchanged and the LunID
  2111. * should not be cleared.
  2112. * via_ioctl
  2113. * This indicates whether we've reached this path via ioctl.
  2114. * This affects the maximum usage count allowed for c0d0 to be messed with.
  2115. * If this path is reached via ioctl(), then the max_usage_count will
  2116. * be 1, as the process calling ioctl() has got to have the device open.
  2117. * If we get here via sysfs, then the max usage count will be zero.
  2118. */
  2119. static int deregister_disk(ctlr_info_t *h, int drv_index,
  2120. int clear_all, int via_ioctl)
  2121. {
  2122. int i;
  2123. struct gendisk *disk;
  2124. drive_info_struct *drv;
  2125. int recalculate_highest_lun;
  2126. if (!capable(CAP_SYS_RAWIO))
  2127. return -EPERM;
  2128. drv = h->drv[drv_index];
  2129. disk = h->gendisk[drv_index];
  2130. /* make sure logical volume is NOT is use */
  2131. if (clear_all || (h->gendisk[0] == disk)) {
  2132. if (drv->usage_count > via_ioctl)
  2133. return -EBUSY;
  2134. } else if (drv->usage_count > 0)
  2135. return -EBUSY;
  2136. recalculate_highest_lun = (drv == h->drv[h->highest_lun]);
  2137. /* invalidate the devices and deregister the disk. If it is disk
  2138. * zero do not deregister it but just zero out it's values. This
  2139. * allows us to delete disk zero but keep the controller registered.
  2140. */
  2141. if (h->gendisk[0] != disk) {
  2142. struct request_queue *q = disk->queue;
  2143. if (disk->flags & GENHD_FL_UP) {
  2144. cciss_destroy_ld_sysfs_entry(h, drv_index, 0);
  2145. del_gendisk(disk);
  2146. }
  2147. if (q)
  2148. blk_cleanup_queue(q);
  2149. /* If clear_all is set then we are deleting the logical
  2150. * drive, not just refreshing its info. For drives
  2151. * other than disk 0 we will call put_disk. We do not
  2152. * do this for disk 0 as we need it to be able to
  2153. * configure the controller.
  2154. */
  2155. if (clear_all){
  2156. /* This isn't pretty, but we need to find the
  2157. * disk in our array and NULL our the pointer.
  2158. * This is so that we will call alloc_disk if
  2159. * this index is used again later.
  2160. */
  2161. for (i=0; i < CISS_MAX_LUN; i++){
  2162. if (h->gendisk[i] == disk) {
  2163. h->gendisk[i] = NULL;
  2164. break;
  2165. }
  2166. }
  2167. put_disk(disk);
  2168. }
  2169. } else {
  2170. set_capacity(disk, 0);
  2171. cciss_clear_drive_info(drv);
  2172. }
  2173. --h->num_luns;
  2174. /* if it was the last disk, find the new hightest lun */
  2175. if (clear_all && recalculate_highest_lun) {
  2176. int newhighest = -1;
  2177. for (i = 0; i <= h->highest_lun; i++) {
  2178. /* if the disk has size > 0, it is available */
  2179. if (h->drv[i] && h->drv[i]->heads)
  2180. newhighest = i;
  2181. }
  2182. h->highest_lun = newhighest;
  2183. }
  2184. return 0;
  2185. }
  2186. static int fill_cmd(ctlr_info_t *h, CommandList_struct *c, __u8 cmd, void *buff,
  2187. size_t size, __u8 page_code, unsigned char *scsi3addr,
  2188. int cmd_type)
  2189. {
  2190. u64bit buff_dma_handle;
  2191. int status = IO_OK;
  2192. c->cmd_type = CMD_IOCTL_PEND;
  2193. c->Header.ReplyQueue = 0;
  2194. if (buff != NULL) {
  2195. c->Header.SGList = 1;
  2196. c->Header.SGTotal = 1;
  2197. } else {
  2198. c->Header.SGList = 0;
  2199. c->Header.SGTotal = 0;
  2200. }
  2201. c->Header.Tag.lower = c->busaddr;
  2202. memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
  2203. c->Request.Type.Type = cmd_type;
  2204. if (cmd_type == TYPE_CMD) {
  2205. switch (cmd) {
  2206. case CISS_INQUIRY:
  2207. /* are we trying to read a vital product page */
  2208. if (page_code != 0) {
  2209. c->Request.CDB[1] = 0x01;
  2210. c->Request.CDB[2] = page_code;
  2211. }
  2212. c->Request.CDBLen = 6;
  2213. c->Request.Type.Attribute = ATTR_SIMPLE;
  2214. c->Request.Type.Direction = XFER_READ;
  2215. c->Request.Timeout = 0;
  2216. c->Request.CDB[0] = CISS_INQUIRY;
  2217. c->Request.CDB[4] = size & 0xFF;
  2218. break;
  2219. case CISS_REPORT_LOG:
  2220. case CISS_REPORT_PHYS:
  2221. /* Talking to controller so It's a physical command
  2222. mode = 00 target = 0. Nothing to write.
  2223. */
  2224. c->Request.CDBLen = 12;
  2225. c->Request.Type.Attribute = ATTR_SIMPLE;
  2226. c->Request.Type.Direction = XFER_READ;
  2227. c->Request.Timeout = 0;
  2228. c->Request.CDB[0] = cmd;
  2229. c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
  2230. c->Request.CDB[7] = (size >> 16) & 0xFF;
  2231. c->Request.CDB[8] = (size >> 8) & 0xFF;
  2232. c->Request.CDB[9] = size & 0xFF;
  2233. break;
  2234. case CCISS_READ_CAPACITY:
  2235. c->Request.CDBLen = 10;
  2236. c->Request.Type.Attribute = ATTR_SIMPLE;
  2237. c->Request.Type.Direction = XFER_READ;
  2238. c->Request.Timeout = 0;
  2239. c->Request.CDB[0] = cmd;
  2240. break;
  2241. case CCISS_READ_CAPACITY_16:
  2242. c->Request.CDBLen = 16;
  2243. c->Request.Type.Attribute = ATTR_SIMPLE;
  2244. c->Request.Type.Direction = XFER_READ;
  2245. c->Request.Timeout = 0;
  2246. c->Request.CDB[0] = cmd;
  2247. c->Request.CDB[1] = 0x10;
  2248. c->Request.CDB[10] = (size >> 24) & 0xFF;
  2249. c->Request.CDB[11] = (size >> 16) & 0xFF;
  2250. c->Request.CDB[12] = (size >> 8) & 0xFF;
  2251. c->Request.CDB[13] = size & 0xFF;
  2252. c->Request.Timeout = 0;
  2253. c->Request.CDB[0] = cmd;
  2254. break;
  2255. case CCISS_CACHE_FLUSH:
  2256. c->Request.CDBLen = 12;
  2257. c->Request.Type.Attribute = ATTR_SIMPLE;
  2258. c->Request.Type.Direction = XFER_WRITE;
  2259. c->Request.Timeout = 0;
  2260. c->Request.CDB[0] = BMIC_WRITE;
  2261. c->Request.CDB[6] = BMIC_CACHE_FLUSH;
  2262. break;
  2263. case TEST_UNIT_READY:
  2264. c->Request.CDBLen = 6;
  2265. c->Request.Type.Attribute = ATTR_SIMPLE;
  2266. c->Request.Type.Direction = XFER_NONE;
  2267. c->Request.Timeout = 0;
  2268. break;
  2269. default:
  2270. dev_warn(&h->pdev->dev, "Unknown Command 0x%c\n", cmd);
  2271. return IO_ERROR;
  2272. }
  2273. } else if (cmd_type == TYPE_MSG) {
  2274. switch (cmd) {
  2275. case 0: /* ABORT message */
  2276. c->Request.CDBLen = 12;
  2277. c->Request.Type.Attribute = ATTR_SIMPLE;
  2278. c->Request.Type.Direction = XFER_WRITE;
  2279. c->Request.Timeout = 0;
  2280. c->Request.CDB[0] = cmd; /* abort */
  2281. c->Request.CDB[1] = 0; /* abort a command */
  2282. /* buff contains the tag of the command to abort */
  2283. memcpy(&c->Request.CDB[4], buff, 8);
  2284. break;
  2285. case 1: /* RESET message */
  2286. c->Request.CDBLen = 16;
  2287. c->Request.Type.Attribute = ATTR_SIMPLE;
  2288. c->Request.Type.Direction = XFER_NONE;
  2289. c->Request.Timeout = 0;
  2290. memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
  2291. c->Request.CDB[0] = cmd; /* reset */
  2292. c->Request.CDB[1] = 0x03; /* reset a target */
  2293. break;
  2294. case 3: /* No-Op message */
  2295. c->Request.CDBLen = 1;
  2296. c->Request.Type.Attribute = ATTR_SIMPLE;
  2297. c->Request.Type.Direction = XFER_WRITE;
  2298. c->Request.Timeout = 0;
  2299. c->Request.CDB[0] = cmd;
  2300. break;
  2301. default:
  2302. dev_warn(&h->pdev->dev,
  2303. "unknown message type %d\n", cmd);
  2304. return IO_ERROR;
  2305. }
  2306. } else {
  2307. dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
  2308. return IO_ERROR;
  2309. }
  2310. /* Fill in the scatter gather information */
  2311. if (size > 0) {
  2312. buff_dma_handle.val = (__u64) pci_map_single(h->pdev,
  2313. buff, size,
  2314. PCI_DMA_BIDIRECTIONAL);
  2315. c->SG[0].Addr.lower = buff_dma_handle.val32.lower;
  2316. c->SG[0].Addr.upper = buff_dma_handle.val32.upper;
  2317. c->SG[0].Len = size;
  2318. c->SG[0].Ext = 0; /* we are not chaining */
  2319. }
  2320. return status;
  2321. }
  2322. static int check_target_status(ctlr_info_t *h, CommandList_struct *c)
  2323. {
  2324. switch (c->err_info->ScsiStatus) {
  2325. case SAM_STAT_GOOD:
  2326. return IO_OK;
  2327. case SAM_STAT_CHECK_CONDITION:
  2328. switch (0xf & c->err_info->SenseInfo[2]) {
  2329. case 0: return IO_OK; /* no sense */
  2330. case 1: return IO_OK; /* recovered error */
  2331. default:
  2332. if (check_for_unit_attention(h, c))
  2333. return IO_NEEDS_RETRY;
  2334. dev_warn(&h->pdev->dev, "cmd 0x%02x "
  2335. "check condition, sense key = 0x%02x\n",
  2336. c->Request.CDB[0], c->err_info->SenseInfo[2]);
  2337. }
  2338. break;
  2339. default:
  2340. dev_warn(&h->pdev->dev, "cmd 0x%02x"
  2341. "scsi status = 0x%02x\n",
  2342. c->Request.CDB[0], c->err_info->ScsiStatus);
  2343. break;
  2344. }
  2345. return IO_ERROR;
  2346. }
  2347. static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c)
  2348. {
  2349. int return_status = IO_OK;
  2350. if (c->err_info->CommandStatus == CMD_SUCCESS)
  2351. return IO_OK;
  2352. switch (c->err_info->CommandStatus) {
  2353. case CMD_TARGET_STATUS:
  2354. return_status = check_target_status(h, c);
  2355. break;
  2356. case CMD_DATA_UNDERRUN:
  2357. case CMD_DATA_OVERRUN:
  2358. /* expected for inquiry and report lun commands */
  2359. break;
  2360. case CMD_INVALID:
  2361. dev_warn(&h->pdev->dev, "cmd 0x%02x is "
  2362. "reported invalid\n", c->Request.CDB[0]);
  2363. return_status = IO_ERROR;
  2364. break;
  2365. case CMD_PROTOCOL_ERR:
  2366. dev_warn(&h->pdev->dev, "cmd 0x%02x has "
  2367. "protocol error\n", c->Request.CDB[0]);
  2368. return_status = IO_ERROR;
  2369. break;
  2370. case CMD_HARDWARE_ERR:
  2371. dev_warn(&h->pdev->dev, "cmd 0x%02x had "
  2372. " hardware error\n", c->Request.CDB[0]);
  2373. return_status = IO_ERROR;
  2374. break;
  2375. case CMD_CONNECTION_LOST:
  2376. dev_warn(&h->pdev->dev, "cmd 0x%02x had "
  2377. "connection lost\n", c->Request.CDB[0]);
  2378. return_status = IO_ERROR;
  2379. break;
  2380. case CMD_ABORTED:
  2381. dev_warn(&h->pdev->dev, "cmd 0x%02x was "
  2382. "aborted\n", c->Request.CDB[0]);
  2383. return_status = IO_ERROR;
  2384. break;
  2385. case CMD_ABORT_FAILED:
  2386. dev_warn(&h->pdev->dev, "cmd 0x%02x reports "
  2387. "abort failed\n", c->Request.CDB[0]);
  2388. return_status = IO_ERROR;
  2389. break;
  2390. case CMD_UNSOLICITED_ABORT:
  2391. dev_warn(&h->pdev->dev, "unsolicited abort 0x%02x\n",
  2392. c->Request.CDB[0]);
  2393. return_status = IO_NEEDS_RETRY;
  2394. break;
  2395. default:
  2396. dev_warn(&h->pdev->dev, "cmd 0x%02x returned "
  2397. "unknown status %x\n", c->Request.CDB[0],
  2398. c->err_info->CommandStatus);
  2399. return_status = IO_ERROR;
  2400. }
  2401. return return_status;
  2402. }
  2403. static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
  2404. int attempt_retry)
  2405. {
  2406. DECLARE_COMPLETION_ONSTACK(wait);
  2407. u64bit buff_dma_handle;
  2408. int return_status = IO_OK;
  2409. resend_cmd2:
  2410. c->waiting = &wait;
  2411. enqueue_cmd_and_start_io(h, c);
  2412. wait_for_completion(&wait);
  2413. if (c->err_info->CommandStatus == 0 || !attempt_retry)
  2414. goto command_done;
  2415. return_status = process_sendcmd_error(h, c);
  2416. if (return_status == IO_NEEDS_RETRY &&
  2417. c->retry_count < MAX_CMD_RETRIES) {
  2418. dev_warn(&h->pdev->dev, "retrying 0x%02x\n",
  2419. c->Request.CDB[0]);
  2420. c->retry_count++;
  2421. /* erase the old error information */
  2422. memset(c->err_info, 0, sizeof(ErrorInfo_struct));
  2423. return_status = IO_OK;
  2424. INIT_COMPLETION(wait);
  2425. goto resend_cmd2;
  2426. }
  2427. command_done:
  2428. /* unlock the buffers from DMA */
  2429. buff_dma_handle.val32.lower = c->SG[0].Addr.lower;
  2430. buff_dma_handle.val32.upper = c->SG[0].Addr.upper;
  2431. pci_unmap_single(h->pdev, (dma_addr_t) buff_dma_handle.val,
  2432. c->SG[0].Len, PCI_DMA_BIDIRECTIONAL);
  2433. return return_status;
  2434. }
  2435. static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size,
  2436. __u8 page_code, unsigned char scsi3addr[],
  2437. int cmd_type)
  2438. {
  2439. CommandList_struct *c;
  2440. int return_status;
  2441. c = cmd_special_alloc(h);
  2442. if (!c)
  2443. return -ENOMEM;
  2444. return_status = fill_cmd(h, c, cmd, buff, size, page_code,
  2445. scsi3addr, cmd_type);
  2446. if (return_status == IO_OK)
  2447. return_status = sendcmd_withirq_core(h, c, 1);
  2448. cmd_special_free(h, c);
  2449. return return_status;
  2450. }
  2451. static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol,
  2452. sector_t total_size,
  2453. unsigned int block_size,
  2454. InquiryData_struct *inq_buff,
  2455. drive_info_struct *drv)
  2456. {
  2457. int return_code;
  2458. unsigned long t;
  2459. unsigned char scsi3addr[8];
  2460. memset(inq_buff, 0, sizeof(InquiryData_struct));
  2461. log_unit_to_scsi3addr(h, scsi3addr, logvol);
  2462. return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff,
  2463. sizeof(*inq_buff), 0xC1, scsi3addr, TYPE_CMD);
  2464. if (return_code == IO_OK) {
  2465. if (inq_buff->data_byte[8] == 0xFF) {
  2466. dev_warn(&h->pdev->dev,
  2467. "reading geometry failed, volume "
  2468. "does not support reading geometry\n");
  2469. drv->heads = 255;
  2470. drv->sectors = 32; /* Sectors per track */
  2471. drv->cylinders = total_size + 1;
  2472. drv->raid_level = RAID_UNKNOWN;
  2473. } else {
  2474. drv->heads = inq_buff->data_byte[6];
  2475. drv->sectors = inq_buff->data_byte[7];
  2476. drv->cylinders = (inq_buff->data_byte[4] & 0xff) << 8;
  2477. drv->cylinders += inq_buff->data_byte[5];
  2478. drv->raid_level = inq_buff->data_byte[8];
  2479. }
  2480. drv->block_size = block_size;
  2481. drv->nr_blocks = total_size + 1;
  2482. t = drv->heads * drv->sectors;
  2483. if (t > 1) {
  2484. sector_t real_size = total_size + 1;
  2485. unsigned long rem = sector_div(real_size, t);
  2486. if (rem)
  2487. real_size++;
  2488. drv->cylinders = real_size;
  2489. }
  2490. } else { /* Get geometry failed */
  2491. dev_warn(&h->pdev->dev, "reading geometry failed\n");
  2492. }
  2493. }
  2494. static void
  2495. cciss_read_capacity(ctlr_info_t *h, int logvol, sector_t *total_size,
  2496. unsigned int *block_size)
  2497. {
  2498. ReadCapdata_struct *buf;
  2499. int return_code;
  2500. unsigned char scsi3addr[8];
  2501. buf = kzalloc(sizeof(ReadCapdata_struct), GFP_KERNEL);
  2502. if (!buf) {
  2503. dev_warn(&h->pdev->dev, "out of memory\n");
  2504. return;
  2505. }
  2506. log_unit_to_scsi3addr(h, scsi3addr, logvol);
  2507. return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY, buf,
  2508. sizeof(ReadCapdata_struct), 0, scsi3addr, TYPE_CMD);
  2509. if (return_code == IO_OK) {
  2510. *total_size = be32_to_cpu(*(__be32 *) buf->total_size);
  2511. *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
  2512. } else { /* read capacity command failed */
  2513. dev_warn(&h->pdev->dev, "read capacity failed\n");
  2514. *total_size = 0;
  2515. *block_size = BLOCK_SIZE;
  2516. }
  2517. kfree(buf);
  2518. }
  2519. static void cciss_read_capacity_16(ctlr_info_t *h, int logvol,
  2520. sector_t *total_size, unsigned int *block_size)
  2521. {
  2522. ReadCapdata_struct_16 *buf;
  2523. int return_code;
  2524. unsigned char scsi3addr[8];
  2525. buf = kzalloc(sizeof(ReadCapdata_struct_16), GFP_KERNEL);
  2526. if (!buf) {
  2527. dev_warn(&h->pdev->dev, "out of memory\n");
  2528. return;
  2529. }
  2530. log_unit_to_scsi3addr(h, scsi3addr, logvol);
  2531. return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY_16,
  2532. buf, sizeof(ReadCapdata_struct_16),
  2533. 0, scsi3addr, TYPE_CMD);
  2534. if (return_code == IO_OK) {
  2535. *total_size = be64_to_cpu(*(__be64 *) buf->total_size);
  2536. *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
  2537. } else { /* read capacity command failed */
  2538. dev_warn(&h->pdev->dev, "read capacity failed\n");
  2539. *total_size = 0;
  2540. *block_size = BLOCK_SIZE;
  2541. }
  2542. dev_info(&h->pdev->dev, " blocks= %llu block_size= %d\n",
  2543. (unsigned long long)*total_size+1, *block_size);
  2544. kfree(buf);
  2545. }
  2546. static int cciss_revalidate(struct gendisk *disk)
  2547. {
  2548. ctlr_info_t *h = get_host(disk);
  2549. drive_info_struct *drv = get_drv(disk);
  2550. int logvol;
  2551. int FOUND = 0;
  2552. unsigned int block_size;
  2553. sector_t total_size;
  2554. InquiryData_struct *inq_buff = NULL;
  2555. for (logvol = 0; logvol <= h->highest_lun; logvol++) {
  2556. if (!h->drv[logvol])
  2557. continue;
  2558. if (memcmp(h->drv[logvol]->LunID, drv->LunID,
  2559. sizeof(drv->LunID)) == 0) {
  2560. FOUND = 1;
  2561. break;
  2562. }
  2563. }
  2564. if (!FOUND)
  2565. return 1;
  2566. inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
  2567. if (inq_buff == NULL) {
  2568. dev_warn(&h->pdev->dev, "out of memory\n");
  2569. return 1;
  2570. }
  2571. if (h->cciss_read == CCISS_READ_10) {
  2572. cciss_read_capacity(h, logvol,
  2573. &total_size, &block_size);
  2574. } else {
  2575. cciss_read_capacity_16(h, logvol,
  2576. &total_size, &block_size);
  2577. }
  2578. cciss_geometry_inquiry(h, logvol, total_size, block_size,
  2579. inq_buff, drv);
  2580. blk_queue_logical_block_size(drv->queue, drv->block_size);
  2581. set_capacity(disk, drv->nr_blocks);
  2582. kfree(inq_buff);
  2583. return 0;
  2584. }
  2585. /*
  2586. * Map (physical) PCI mem into (virtual) kernel space
  2587. */
  2588. static void __iomem *remap_pci_mem(ulong base, ulong size)
  2589. {
  2590. ulong page_base = ((ulong) base) & PAGE_MASK;
  2591. ulong page_offs = ((ulong) base) - page_base;
  2592. void __iomem *page_remapped = ioremap(page_base, page_offs + size);
  2593. return page_remapped ? (page_remapped + page_offs) : NULL;
  2594. }
  2595. /*
  2596. * Takes jobs of the Q and sends them to the hardware, then puts it on
  2597. * the Q to wait for completion.
  2598. */
  2599. static void start_io(ctlr_info_t *h)
  2600. {
  2601. CommandList_struct *c;
  2602. while (!list_empty(&h->reqQ)) {
  2603. c = list_entry(h->reqQ.next, CommandList_struct, list);
  2604. /* can't do anything if fifo is full */
  2605. if ((h->access.fifo_full(h))) {
  2606. dev_warn(&h->pdev->dev, "fifo full\n");
  2607. break;
  2608. }
  2609. /* Get the first entry from the Request Q */
  2610. removeQ(c);
  2611. h->Qdepth--;
  2612. /* Tell the controller execute command */
  2613. h->access.submit_command(h, c);
  2614. /* Put job onto the completed Q */
  2615. addQ(&h->cmpQ, c);
  2616. }
  2617. }
  2618. /* Assumes that h->lock is held. */
  2619. /* Zeros out the error record and then resends the command back */
  2620. /* to the controller */
  2621. static inline void resend_cciss_cmd(ctlr_info_t *h, CommandList_struct *c)
  2622. {
  2623. /* erase the old error information */
  2624. memset(c->err_info, 0, sizeof(ErrorInfo_struct));
  2625. /* add it to software queue and then send it to the controller */
  2626. addQ(&h->reqQ, c);
  2627. h->Qdepth++;
  2628. if (h->Qdepth > h->maxQsinceinit)
  2629. h->maxQsinceinit = h->Qdepth;
  2630. start_io(h);
  2631. }
  2632. static inline unsigned int make_status_bytes(unsigned int scsi_status_byte,
  2633. unsigned int msg_byte, unsigned int host_byte,
  2634. unsigned int driver_byte)
  2635. {
  2636. /* inverse of macros in scsi.h */
  2637. return (scsi_status_byte & 0xff) |
  2638. ((msg_byte & 0xff) << 8) |
  2639. ((host_byte & 0xff) << 16) |
  2640. ((driver_byte & 0xff) << 24);
  2641. }
  2642. static inline int evaluate_target_status(ctlr_info_t *h,
  2643. CommandList_struct *cmd, int *retry_cmd)
  2644. {
  2645. unsigned char sense_key;
  2646. unsigned char status_byte, msg_byte, host_byte, driver_byte;
  2647. int error_value;
  2648. *retry_cmd = 0;
  2649. /* If we get in here, it means we got "target status", that is, scsi status */
  2650. status_byte = cmd->err_info->ScsiStatus;
  2651. driver_byte = DRIVER_OK;
  2652. msg_byte = cmd->err_info->CommandStatus; /* correct? seems too device specific */
  2653. if (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC)
  2654. host_byte = DID_PASSTHROUGH;
  2655. else
  2656. host_byte = DID_OK;
  2657. error_value = make_status_bytes(status_byte, msg_byte,
  2658. host_byte, driver_byte);
  2659. if (cmd->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) {
  2660. if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC)
  2661. dev_warn(&h->pdev->dev, "cmd %p "
  2662. "has SCSI Status 0x%x\n",
  2663. cmd, cmd->err_info->ScsiStatus);
  2664. return error_value;
  2665. }
  2666. /* check the sense key */
  2667. sense_key = 0xf & cmd->err_info->SenseInfo[2];
  2668. /* no status or recovered error */
  2669. if (((sense_key == 0x0) || (sense_key == 0x1)) &&
  2670. (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC))
  2671. error_value = 0;
  2672. if (check_for_unit_attention(h, cmd)) {
  2673. *retry_cmd = !(cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC);
  2674. return 0;
  2675. }
  2676. /* Not SG_IO or similar? */
  2677. if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC) {
  2678. if (error_value != 0)
  2679. dev_warn(&h->pdev->dev, "cmd %p has CHECK CONDITION"
  2680. " sense key = 0x%x\n", cmd, sense_key);
  2681. return error_value;
  2682. }
  2683. /* SG_IO or similar, copy sense data back */
  2684. if (cmd->rq->sense) {
  2685. if (cmd->rq->sense_len > cmd->err_info->SenseLen)
  2686. cmd->rq->sense_len = cmd->err_info->SenseLen;
  2687. memcpy(cmd->rq->sense, cmd->err_info->SenseInfo,
  2688. cmd->rq->sense_len);
  2689. } else
  2690. cmd->rq->sense_len = 0;
  2691. return error_value;
  2692. }
  2693. /* checks the status of the job and calls complete buffers to mark all
  2694. * buffers for the completed job. Note that this function does not need
  2695. * to hold the hba/queue lock.
  2696. */
  2697. static inline void complete_command(ctlr_info_t *h, CommandList_struct *cmd,
  2698. int timeout)
  2699. {
  2700. int retry_cmd = 0;
  2701. struct request *rq = cmd->rq;
  2702. rq->errors = 0;
  2703. if (timeout)
  2704. rq->errors = make_status_bytes(0, 0, 0, DRIVER_TIMEOUT);
  2705. if (cmd->err_info->CommandStatus == 0) /* no error has occurred */
  2706. goto after_error_processing;
  2707. switch (cmd->err_info->CommandStatus) {
  2708. case CMD_TARGET_STATUS:
  2709. rq->errors = evaluate_target_status(h, cmd, &retry_cmd);
  2710. break;
  2711. case CMD_DATA_UNDERRUN:
  2712. if (cmd->rq->cmd_type == REQ_TYPE_FS) {
  2713. dev_warn(&h->pdev->dev, "cmd %p has"
  2714. " completed with data underrun "
  2715. "reported\n", cmd);
  2716. cmd->rq->resid_len = cmd->err_info->ResidualCnt;
  2717. }
  2718. break;
  2719. case CMD_DATA_OVERRUN:
  2720. if (cmd->rq->cmd_type == REQ_TYPE_FS)
  2721. dev_warn(&h->pdev->dev, "cciss: cmd %p has"
  2722. " completed with data overrun "
  2723. "reported\n", cmd);
  2724. break;
  2725. case CMD_INVALID:
  2726. dev_warn(&h->pdev->dev, "cciss: cmd %p is "
  2727. "reported invalid\n", cmd);
  2728. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2729. cmd->err_info->CommandStatus, DRIVER_OK,
  2730. (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
  2731. DID_PASSTHROUGH : DID_ERROR);
  2732. break;
  2733. case CMD_PROTOCOL_ERR:
  2734. dev_warn(&h->pdev->dev, "cciss: cmd %p has "
  2735. "protocol error\n", cmd);
  2736. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2737. cmd->err_info->CommandStatus, DRIVER_OK,
  2738. (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
  2739. DID_PASSTHROUGH : DID_ERROR);
  2740. break;
  2741. case CMD_HARDWARE_ERR:
  2742. dev_warn(&h->pdev->dev, "cciss: cmd %p had "
  2743. " hardware error\n", cmd);
  2744. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2745. cmd->err_info->CommandStatus, DRIVER_OK,
  2746. (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
  2747. DID_PASSTHROUGH : DID_ERROR);
  2748. break;
  2749. case CMD_CONNECTION_LOST:
  2750. dev_warn(&h->pdev->dev, "cciss: cmd %p had "
  2751. "connection lost\n", cmd);
  2752. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2753. cmd->err_info->CommandStatus, DRIVER_OK,
  2754. (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
  2755. DID_PASSTHROUGH : DID_ERROR);
  2756. break;
  2757. case CMD_ABORTED:
  2758. dev_warn(&h->pdev->dev, "cciss: cmd %p was "
  2759. "aborted\n", cmd);
  2760. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2761. cmd->err_info->CommandStatus, DRIVER_OK,
  2762. (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
  2763. DID_PASSTHROUGH : DID_ABORT);
  2764. break;
  2765. case CMD_ABORT_FAILED:
  2766. dev_warn(&h->pdev->dev, "cciss: cmd %p reports "
  2767. "abort failed\n", cmd);
  2768. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2769. cmd->err_info->CommandStatus, DRIVER_OK,
  2770. (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
  2771. DID_PASSTHROUGH : DID_ERROR);
  2772. break;
  2773. case CMD_UNSOLICITED_ABORT:
  2774. dev_warn(&h->pdev->dev, "cciss%d: unsolicited "
  2775. "abort %p\n", h->ctlr, cmd);
  2776. if (cmd->retry_count < MAX_CMD_RETRIES) {
  2777. retry_cmd = 1;
  2778. dev_warn(&h->pdev->dev, "retrying %p\n", cmd);
  2779. cmd->retry_count++;
  2780. } else
  2781. dev_warn(&h->pdev->dev,
  2782. "%p retried too many times\n", cmd);
  2783. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2784. cmd->err_info->CommandStatus, DRIVER_OK,
  2785. (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
  2786. DID_PASSTHROUGH : DID_ABORT);
  2787. break;
  2788. case CMD_TIMEOUT:
  2789. dev_warn(&h->pdev->dev, "cmd %p timedout\n", cmd);
  2790. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2791. cmd->err_info->CommandStatus, DRIVER_OK,
  2792. (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
  2793. DID_PASSTHROUGH : DID_ERROR);
  2794. break;
  2795. default:
  2796. dev_warn(&h->pdev->dev, "cmd %p returned "
  2797. "unknown status %x\n", cmd,
  2798. cmd->err_info->CommandStatus);
  2799. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2800. cmd->err_info->CommandStatus, DRIVER_OK,
  2801. (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
  2802. DID_PASSTHROUGH : DID_ERROR);
  2803. }
  2804. after_error_processing:
  2805. /* We need to return this command */
  2806. if (retry_cmd) {
  2807. resend_cciss_cmd(h, cmd);
  2808. return;
  2809. }
  2810. cmd->rq->completion_data = cmd;
  2811. blk_complete_request(cmd->rq);
  2812. }
  2813. static inline u32 cciss_tag_contains_index(u32 tag)
  2814. {
  2815. #define DIRECT_LOOKUP_BIT 0x10
  2816. return tag & DIRECT_LOOKUP_BIT;
  2817. }
  2818. static inline u32 cciss_tag_to_index(u32 tag)
  2819. {
  2820. #define DIRECT_LOOKUP_SHIFT 5
  2821. return tag >> DIRECT_LOOKUP_SHIFT;
  2822. }
  2823. static inline u32 cciss_tag_discard_error_bits(ctlr_info_t *h, u32 tag)
  2824. {
  2825. #define CCISS_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
  2826. #define CCISS_SIMPLE_ERROR_BITS 0x03
  2827. if (likely(h->transMethod & CFGTBL_Trans_Performant))
  2828. return tag & ~CCISS_PERF_ERROR_BITS;
  2829. return tag & ~CCISS_SIMPLE_ERROR_BITS;
  2830. }
  2831. static inline void cciss_mark_tag_indexed(u32 *tag)
  2832. {
  2833. *tag |= DIRECT_LOOKUP_BIT;
  2834. }
  2835. static inline void cciss_set_tag_index(u32 *tag, u32 index)
  2836. {
  2837. *tag |= (index << DIRECT_LOOKUP_SHIFT);
  2838. }
  2839. /*
  2840. * Get a request and submit it to the controller.
  2841. */
  2842. static void do_cciss_request(struct request_queue *q)
  2843. {
  2844. ctlr_info_t *h = q->queuedata;
  2845. CommandList_struct *c;
  2846. sector_t start_blk;
  2847. int seg;
  2848. struct request *creq;
  2849. u64bit temp64;
  2850. struct scatterlist *tmp_sg;
  2851. SGDescriptor_struct *curr_sg;
  2852. drive_info_struct *drv;
  2853. int i, dir;
  2854. int sg_index = 0;
  2855. int chained = 0;
  2856. queue:
  2857. creq = blk_peek_request(q);
  2858. if (!creq)
  2859. goto startio;
  2860. BUG_ON(creq->nr_phys_segments > h->maxsgentries);
  2861. c = cmd_alloc(h);
  2862. if (!c)
  2863. goto full;
  2864. blk_start_request(creq);
  2865. tmp_sg = h->scatter_list[c->cmdindex];
  2866. spin_unlock_irq(q->queue_lock);
  2867. c->cmd_type = CMD_RWREQ;
  2868. c->rq = creq;
  2869. /* fill in the request */
  2870. drv = creq->rq_disk->private_data;
  2871. c->Header.ReplyQueue = 0; /* unused in simple mode */
  2872. /* got command from pool, so use the command block index instead */
  2873. /* for direct lookups. */
  2874. /* The first 2 bits are reserved for controller error reporting. */
  2875. cciss_set_tag_index(&c->Header.Tag.lower, c->cmdindex);
  2876. cciss_mark_tag_indexed(&c->Header.Tag.lower);
  2877. memcpy(&c->Header.LUN, drv->LunID, sizeof(drv->LunID));
  2878. c->Request.CDBLen = 10; /* 12 byte commands not in FW yet; */
  2879. c->Request.Type.Type = TYPE_CMD; /* It is a command. */
  2880. c->Request.Type.Attribute = ATTR_SIMPLE;
  2881. c->Request.Type.Direction =
  2882. (rq_data_dir(creq) == READ) ? XFER_READ : XFER_WRITE;
  2883. c->Request.Timeout = 0; /* Don't time out */
  2884. c->Request.CDB[0] =
  2885. (rq_data_dir(creq) == READ) ? h->cciss_read : h->cciss_write;
  2886. start_blk = blk_rq_pos(creq);
  2887. dev_dbg(&h->pdev->dev, "sector =%d nr_sectors=%d\n",
  2888. (int)blk_rq_pos(creq), (int)blk_rq_sectors(creq));
  2889. sg_init_table(tmp_sg, h->maxsgentries);
  2890. seg = blk_rq_map_sg(q, creq, tmp_sg);
  2891. /* get the DMA records for the setup */
  2892. if (c->Request.Type.Direction == XFER_READ)
  2893. dir = PCI_DMA_FROMDEVICE;
  2894. else
  2895. dir = PCI_DMA_TODEVICE;
  2896. curr_sg = c->SG;
  2897. sg_index = 0;
  2898. chained = 0;
  2899. for (i = 0; i < seg; i++) {
  2900. if (((sg_index+1) == (h->max_cmd_sgentries)) &&
  2901. !chained && ((seg - i) > 1)) {
  2902. /* Point to next chain block. */
  2903. curr_sg = h->cmd_sg_list[c->cmdindex];
  2904. sg_index = 0;
  2905. chained = 1;
  2906. }
  2907. curr_sg[sg_index].Len = tmp_sg[i].length;
  2908. temp64.val = (__u64) pci_map_page(h->pdev, sg_page(&tmp_sg[i]),
  2909. tmp_sg[i].offset,
  2910. tmp_sg[i].length, dir);
  2911. curr_sg[sg_index].Addr.lower = temp64.val32.lower;
  2912. curr_sg[sg_index].Addr.upper = temp64.val32.upper;
  2913. curr_sg[sg_index].Ext = 0; /* we are not chaining */
  2914. ++sg_index;
  2915. }
  2916. if (chained)
  2917. cciss_map_sg_chain_block(h, c, h->cmd_sg_list[c->cmdindex],
  2918. (seg - (h->max_cmd_sgentries - 1)) *
  2919. sizeof(SGDescriptor_struct));
  2920. /* track how many SG entries we are using */
  2921. if (seg > h->maxSG)
  2922. h->maxSG = seg;
  2923. dev_dbg(&h->pdev->dev, "Submitting %u sectors in %d segments "
  2924. "chained[%d]\n",
  2925. blk_rq_sectors(creq), seg, chained);
  2926. c->Header.SGTotal = seg + chained;
  2927. if (seg <= h->max_cmd_sgentries)
  2928. c->Header.SGList = c->Header.SGTotal;
  2929. else
  2930. c->Header.SGList = h->max_cmd_sgentries;
  2931. set_performant_mode(h, c);
  2932. if (likely(creq->cmd_type == REQ_TYPE_FS)) {
  2933. if(h->cciss_read == CCISS_READ_10) {
  2934. c->Request.CDB[1] = 0;
  2935. c->Request.CDB[2] = (start_blk >> 24) & 0xff; /* MSB */
  2936. c->Request.CDB[3] = (start_blk >> 16) & 0xff;
  2937. c->Request.CDB[4] = (start_blk >> 8) & 0xff;
  2938. c->Request.CDB[5] = start_blk & 0xff;
  2939. c->Request.CDB[6] = 0; /* (sect >> 24) & 0xff; MSB */
  2940. c->Request.CDB[7] = (blk_rq_sectors(creq) >> 8) & 0xff;
  2941. c->Request.CDB[8] = blk_rq_sectors(creq) & 0xff;
  2942. c->Request.CDB[9] = c->Request.CDB[11] = c->Request.CDB[12] = 0;
  2943. } else {
  2944. u32 upper32 = upper_32_bits(start_blk);
  2945. c->Request.CDBLen = 16;
  2946. c->Request.CDB[1]= 0;
  2947. c->Request.CDB[2]= (upper32 >> 24) & 0xff; /* MSB */
  2948. c->Request.CDB[3]= (upper32 >> 16) & 0xff;
  2949. c->Request.CDB[4]= (upper32 >> 8) & 0xff;
  2950. c->Request.CDB[5]= upper32 & 0xff;
  2951. c->Request.CDB[6]= (start_blk >> 24) & 0xff;
  2952. c->Request.CDB[7]= (start_blk >> 16) & 0xff;
  2953. c->Request.CDB[8]= (start_blk >> 8) & 0xff;
  2954. c->Request.CDB[9]= start_blk & 0xff;
  2955. c->Request.CDB[10]= (blk_rq_sectors(creq) >> 24) & 0xff;
  2956. c->Request.CDB[11]= (blk_rq_sectors(creq) >> 16) & 0xff;
  2957. c->Request.CDB[12]= (blk_rq_sectors(creq) >> 8) & 0xff;
  2958. c->Request.CDB[13]= blk_rq_sectors(creq) & 0xff;
  2959. c->Request.CDB[14] = c->Request.CDB[15] = 0;
  2960. }
  2961. } else if (creq->cmd_type == REQ_TYPE_BLOCK_PC) {
  2962. c->Request.CDBLen = creq->cmd_len;
  2963. memcpy(c->Request.CDB, creq->cmd, BLK_MAX_CDB);
  2964. } else {
  2965. dev_warn(&h->pdev->dev, "bad request type %d\n",
  2966. creq->cmd_type);
  2967. BUG();
  2968. }
  2969. spin_lock_irq(q->queue_lock);
  2970. addQ(&h->reqQ, c);
  2971. h->Qdepth++;
  2972. if (h->Qdepth > h->maxQsinceinit)
  2973. h->maxQsinceinit = h->Qdepth;
  2974. goto queue;
  2975. full:
  2976. blk_stop_queue(q);
  2977. startio:
  2978. /* We will already have the driver lock here so not need
  2979. * to lock it.
  2980. */
  2981. start_io(h);
  2982. }
  2983. static inline unsigned long get_next_completion(ctlr_info_t *h)
  2984. {
  2985. return h->access.command_completed(h);
  2986. }
  2987. static inline int interrupt_pending(ctlr_info_t *h)
  2988. {
  2989. return h->access.intr_pending(h);
  2990. }
  2991. static inline long interrupt_not_for_us(ctlr_info_t *h)
  2992. {
  2993. return ((h->access.intr_pending(h) == 0) ||
  2994. (h->interrupts_enabled == 0));
  2995. }
  2996. static inline int bad_tag(ctlr_info_t *h, u32 tag_index,
  2997. u32 raw_tag)
  2998. {
  2999. if (unlikely(tag_index >= h->nr_cmds)) {
  3000. dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
  3001. return 1;
  3002. }
  3003. return 0;
  3004. }
  3005. static inline void finish_cmd(ctlr_info_t *h, CommandList_struct *c,
  3006. u32 raw_tag)
  3007. {
  3008. removeQ(c);
  3009. if (likely(c->cmd_type == CMD_RWREQ))
  3010. complete_command(h, c, 0);
  3011. else if (c->cmd_type == CMD_IOCTL_PEND)
  3012. complete(c->waiting);
  3013. #ifdef CONFIG_CISS_SCSI_TAPE
  3014. else if (c->cmd_type == CMD_SCSI)
  3015. complete_scsi_command(c, 0, raw_tag);
  3016. #endif
  3017. }
  3018. static inline u32 next_command(ctlr_info_t *h)
  3019. {
  3020. u32 a;
  3021. if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
  3022. return h->access.command_completed(h);
  3023. if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
  3024. a = *(h->reply_pool_head); /* Next cmd in ring buffer */
  3025. (h->reply_pool_head)++;
  3026. h->commands_outstanding--;
  3027. } else {
  3028. a = FIFO_EMPTY;
  3029. }
  3030. /* Check for wraparound */
  3031. if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
  3032. h->reply_pool_head = h->reply_pool;
  3033. h->reply_pool_wraparound ^= 1;
  3034. }
  3035. return a;
  3036. }
  3037. /* process completion of an indexed ("direct lookup") command */
  3038. static inline u32 process_indexed_cmd(ctlr_info_t *h, u32 raw_tag)
  3039. {
  3040. u32 tag_index;
  3041. CommandList_struct *c;
  3042. tag_index = cciss_tag_to_index(raw_tag);
  3043. if (bad_tag(h, tag_index, raw_tag))
  3044. return next_command(h);
  3045. c = h->cmd_pool + tag_index;
  3046. finish_cmd(h, c, raw_tag);
  3047. return next_command(h);
  3048. }
  3049. /* process completion of a non-indexed command */
  3050. static inline u32 process_nonindexed_cmd(ctlr_info_t *h, u32 raw_tag)
  3051. {
  3052. CommandList_struct *c = NULL;
  3053. __u32 busaddr_masked, tag_masked;
  3054. tag_masked = cciss_tag_discard_error_bits(h, raw_tag);
  3055. list_for_each_entry(c, &h->cmpQ, list) {
  3056. busaddr_masked = cciss_tag_discard_error_bits(h, c->busaddr);
  3057. if (busaddr_masked == tag_masked) {
  3058. finish_cmd(h, c, raw_tag);
  3059. return next_command(h);
  3060. }
  3061. }
  3062. bad_tag(h, h->nr_cmds + 1, raw_tag);
  3063. return next_command(h);
  3064. }
  3065. static irqreturn_t do_cciss_intx(int irq, void *dev_id)
  3066. {
  3067. ctlr_info_t *h = dev_id;
  3068. unsigned long flags;
  3069. u32 raw_tag;
  3070. if (interrupt_not_for_us(h))
  3071. return IRQ_NONE;
  3072. spin_lock_irqsave(&h->lock, flags);
  3073. while (interrupt_pending(h)) {
  3074. raw_tag = get_next_completion(h);
  3075. while (raw_tag != FIFO_EMPTY) {
  3076. if (cciss_tag_contains_index(raw_tag))
  3077. raw_tag = process_indexed_cmd(h, raw_tag);
  3078. else
  3079. raw_tag = process_nonindexed_cmd(h, raw_tag);
  3080. }
  3081. }
  3082. spin_unlock_irqrestore(&h->lock, flags);
  3083. return IRQ_HANDLED;
  3084. }
  3085. /* Add a second interrupt handler for MSI/MSI-X mode. In this mode we never
  3086. * check the interrupt pending register because it is not set.
  3087. */
  3088. static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id)
  3089. {
  3090. ctlr_info_t *h = dev_id;
  3091. unsigned long flags;
  3092. u32 raw_tag;
  3093. spin_lock_irqsave(&h->lock, flags);
  3094. raw_tag = get_next_completion(h);
  3095. while (raw_tag != FIFO_EMPTY) {
  3096. if (cciss_tag_contains_index(raw_tag))
  3097. raw_tag = process_indexed_cmd(h, raw_tag);
  3098. else
  3099. raw_tag = process_nonindexed_cmd(h, raw_tag);
  3100. }
  3101. spin_unlock_irqrestore(&h->lock, flags);
  3102. return IRQ_HANDLED;
  3103. }
  3104. /**
  3105. * add_to_scan_list() - add controller to rescan queue
  3106. * @h: Pointer to the controller.
  3107. *
  3108. * Adds the controller to the rescan queue if not already on the queue.
  3109. *
  3110. * returns 1 if added to the queue, 0 if skipped (could be on the
  3111. * queue already, or the controller could be initializing or shutting
  3112. * down).
  3113. **/
  3114. static int add_to_scan_list(struct ctlr_info *h)
  3115. {
  3116. struct ctlr_info *test_h;
  3117. int found = 0;
  3118. int ret = 0;
  3119. if (h->busy_initializing)
  3120. return 0;
  3121. if (!mutex_trylock(&h->busy_shutting_down))
  3122. return 0;
  3123. mutex_lock(&scan_mutex);
  3124. list_for_each_entry(test_h, &scan_q, scan_list) {
  3125. if (test_h == h) {
  3126. found = 1;
  3127. break;
  3128. }
  3129. }
  3130. if (!found && !h->busy_scanning) {
  3131. INIT_COMPLETION(h->scan_wait);
  3132. list_add_tail(&h->scan_list, &scan_q);
  3133. ret = 1;
  3134. }
  3135. mutex_unlock(&scan_mutex);
  3136. mutex_unlock(&h->busy_shutting_down);
  3137. return ret;
  3138. }
  3139. /**
  3140. * remove_from_scan_list() - remove controller from rescan queue
  3141. * @h: Pointer to the controller.
  3142. *
  3143. * Removes the controller from the rescan queue if present. Blocks if
  3144. * the controller is currently conducting a rescan. The controller
  3145. * can be in one of three states:
  3146. * 1. Doesn't need a scan
  3147. * 2. On the scan list, but not scanning yet (we remove it)
  3148. * 3. Busy scanning (and not on the list). In this case we want to wait for
  3149. * the scan to complete to make sure the scanning thread for this
  3150. * controller is completely idle.
  3151. **/
  3152. static void remove_from_scan_list(struct ctlr_info *h)
  3153. {
  3154. struct ctlr_info *test_h, *tmp_h;
  3155. mutex_lock(&scan_mutex);
  3156. list_for_each_entry_safe(test_h, tmp_h, &scan_q, scan_list) {
  3157. if (test_h == h) { /* state 2. */
  3158. list_del(&h->scan_list);
  3159. complete_all(&h->scan_wait);
  3160. mutex_unlock(&scan_mutex);
  3161. return;
  3162. }
  3163. }
  3164. if (h->busy_scanning) { /* state 3. */
  3165. mutex_unlock(&scan_mutex);
  3166. wait_for_completion(&h->scan_wait);
  3167. } else { /* state 1, nothing to do. */
  3168. mutex_unlock(&scan_mutex);
  3169. }
  3170. }
  3171. /**
  3172. * scan_thread() - kernel thread used to rescan controllers
  3173. * @data: Ignored.
  3174. *
  3175. * A kernel thread used scan for drive topology changes on
  3176. * controllers. The thread processes only one controller at a time
  3177. * using a queue. Controllers are added to the queue using
  3178. * add_to_scan_list() and removed from the queue either after done
  3179. * processing or using remove_from_scan_list().
  3180. *
  3181. * returns 0.
  3182. **/
  3183. static int scan_thread(void *data)
  3184. {
  3185. struct ctlr_info *h;
  3186. while (1) {
  3187. set_current_state(TASK_INTERRUPTIBLE);
  3188. schedule();
  3189. if (kthread_should_stop())
  3190. break;
  3191. while (1) {
  3192. mutex_lock(&scan_mutex);
  3193. if (list_empty(&scan_q)) {
  3194. mutex_unlock(&scan_mutex);
  3195. break;
  3196. }
  3197. h = list_entry(scan_q.next,
  3198. struct ctlr_info,
  3199. scan_list);
  3200. list_del(&h->scan_list);
  3201. h->busy_scanning = 1;
  3202. mutex_unlock(&scan_mutex);
  3203. rebuild_lun_table(h, 0, 0);
  3204. complete_all(&h->scan_wait);
  3205. mutex_lock(&scan_mutex);
  3206. h->busy_scanning = 0;
  3207. mutex_unlock(&scan_mutex);
  3208. }
  3209. }
  3210. return 0;
  3211. }
  3212. static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c)
  3213. {
  3214. if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
  3215. return 0;
  3216. switch (c->err_info->SenseInfo[12]) {
  3217. case STATE_CHANGED:
  3218. dev_warn(&h->pdev->dev, "a state change "
  3219. "detected, command retried\n");
  3220. return 1;
  3221. break;
  3222. case LUN_FAILED:
  3223. dev_warn(&h->pdev->dev, "LUN failure "
  3224. "detected, action required\n");
  3225. return 1;
  3226. break;
  3227. case REPORT_LUNS_CHANGED:
  3228. dev_warn(&h->pdev->dev, "report LUN data changed\n");
  3229. /*
  3230. * Here, we could call add_to_scan_list and wake up the scan thread,
  3231. * except that it's quite likely that we will get more than one
  3232. * REPORT_LUNS_CHANGED condition in quick succession, which means
  3233. * that those which occur after the first one will likely happen
  3234. * *during* the scan_thread's rescan. And the rescan code is not
  3235. * robust enough to restart in the middle, undoing what it has already
  3236. * done, and it's not clear that it's even possible to do this, since
  3237. * part of what it does is notify the block layer, which starts
  3238. * doing it's own i/o to read partition tables and so on, and the
  3239. * driver doesn't have visibility to know what might need undoing.
  3240. * In any event, if possible, it is horribly complicated to get right
  3241. * so we just don't do it for now.
  3242. *
  3243. * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
  3244. */
  3245. return 1;
  3246. break;
  3247. case POWER_OR_RESET:
  3248. dev_warn(&h->pdev->dev,
  3249. "a power on or device reset detected\n");
  3250. return 1;
  3251. break;
  3252. case UNIT_ATTENTION_CLEARED:
  3253. dev_warn(&h->pdev->dev,
  3254. "unit attention cleared by another initiator\n");
  3255. return 1;
  3256. break;
  3257. default:
  3258. dev_warn(&h->pdev->dev, "unknown unit attention detected\n");
  3259. return 1;
  3260. }
  3261. }
  3262. /*
  3263. * We cannot read the structure directly, for portability we must use
  3264. * the io functions.
  3265. * This is for debug only.
  3266. */
  3267. static void print_cfg_table(ctlr_info_t *h)
  3268. {
  3269. int i;
  3270. char temp_name[17];
  3271. CfgTable_struct *tb = h->cfgtable;
  3272. dev_dbg(&h->pdev->dev, "Controller Configuration information\n");
  3273. dev_dbg(&h->pdev->dev, "------------------------------------\n");
  3274. for (i = 0; i < 4; i++)
  3275. temp_name[i] = readb(&(tb->Signature[i]));
  3276. temp_name[4] = '\0';
  3277. dev_dbg(&h->pdev->dev, " Signature = %s\n", temp_name);
  3278. dev_dbg(&h->pdev->dev, " Spec Number = %d\n",
  3279. readl(&(tb->SpecValence)));
  3280. dev_dbg(&h->pdev->dev, " Transport methods supported = 0x%x\n",
  3281. readl(&(tb->TransportSupport)));
  3282. dev_dbg(&h->pdev->dev, " Transport methods active = 0x%x\n",
  3283. readl(&(tb->TransportActive)));
  3284. dev_dbg(&h->pdev->dev, " Requested transport Method = 0x%x\n",
  3285. readl(&(tb->HostWrite.TransportRequest)));
  3286. dev_dbg(&h->pdev->dev, " Coalesce Interrupt Delay = 0x%x\n",
  3287. readl(&(tb->HostWrite.CoalIntDelay)));
  3288. dev_dbg(&h->pdev->dev, " Coalesce Interrupt Count = 0x%x\n",
  3289. readl(&(tb->HostWrite.CoalIntCount)));
  3290. dev_dbg(&h->pdev->dev, " Max outstanding commands = 0x%d\n",
  3291. readl(&(tb->CmdsOutMax)));
  3292. dev_dbg(&h->pdev->dev, " Bus Types = 0x%x\n",
  3293. readl(&(tb->BusTypes)));
  3294. for (i = 0; i < 16; i++)
  3295. temp_name[i] = readb(&(tb->ServerName[i]));
  3296. temp_name[16] = '\0';
  3297. dev_dbg(&h->pdev->dev, " Server Name = %s\n", temp_name);
  3298. dev_dbg(&h->pdev->dev, " Heartbeat Counter = 0x%x\n\n\n",
  3299. readl(&(tb->HeartBeat)));
  3300. }
  3301. static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
  3302. {
  3303. int i, offset, mem_type, bar_type;
  3304. if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
  3305. return 0;
  3306. offset = 0;
  3307. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
  3308. bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
  3309. if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
  3310. offset += 4;
  3311. else {
  3312. mem_type = pci_resource_flags(pdev, i) &
  3313. PCI_BASE_ADDRESS_MEM_TYPE_MASK;
  3314. switch (mem_type) {
  3315. case PCI_BASE_ADDRESS_MEM_TYPE_32:
  3316. case PCI_BASE_ADDRESS_MEM_TYPE_1M:
  3317. offset += 4; /* 32 bit */
  3318. break;
  3319. case PCI_BASE_ADDRESS_MEM_TYPE_64:
  3320. offset += 8;
  3321. break;
  3322. default: /* reserved in PCI 2.2 */
  3323. dev_warn(&pdev->dev,
  3324. "Base address is invalid\n");
  3325. return -1;
  3326. break;
  3327. }
  3328. }
  3329. if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
  3330. return i + 1;
  3331. }
  3332. return -1;
  3333. }
  3334. /* Fill in bucket_map[], given nsgs (the max number of
  3335. * scatter gather elements supported) and bucket[],
  3336. * which is an array of 8 integers. The bucket[] array
  3337. * contains 8 different DMA transfer sizes (in 16
  3338. * byte increments) which the controller uses to fetch
  3339. * commands. This function fills in bucket_map[], which
  3340. * maps a given number of scatter gather elements to one of
  3341. * the 8 DMA transfer sizes. The point of it is to allow the
  3342. * controller to only do as much DMA as needed to fetch the
  3343. * command, with the DMA transfer size encoded in the lower
  3344. * bits of the command address.
  3345. */
  3346. static void calc_bucket_map(int bucket[], int num_buckets,
  3347. int nsgs, int *bucket_map)
  3348. {
  3349. int i, j, b, size;
  3350. /* even a command with 0 SGs requires 4 blocks */
  3351. #define MINIMUM_TRANSFER_BLOCKS 4
  3352. #define NUM_BUCKETS 8
  3353. /* Note, bucket_map must have nsgs+1 entries. */
  3354. for (i = 0; i <= nsgs; i++) {
  3355. /* Compute size of a command with i SG entries */
  3356. size = i + MINIMUM_TRANSFER_BLOCKS;
  3357. b = num_buckets; /* Assume the biggest bucket */
  3358. /* Find the bucket that is just big enough */
  3359. for (j = 0; j < 8; j++) {
  3360. if (bucket[j] >= size) {
  3361. b = j;
  3362. break;
  3363. }
  3364. }
  3365. /* for a command with i SG entries, use bucket b. */
  3366. bucket_map[i] = b;
  3367. }
  3368. }
  3369. static void __devinit cciss_wait_for_mode_change_ack(ctlr_info_t *h)
  3370. {
  3371. int i;
  3372. /* under certain very rare conditions, this can take awhile.
  3373. * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
  3374. * as we enter this code.) */
  3375. for (i = 0; i < MAX_CONFIG_WAIT; i++) {
  3376. if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
  3377. break;
  3378. usleep_range(10000, 20000);
  3379. }
  3380. }
  3381. static __devinit void cciss_enter_performant_mode(ctlr_info_t *h,
  3382. u32 use_short_tags)
  3383. {
  3384. /* This is a bit complicated. There are 8 registers on
  3385. * the controller which we write to to tell it 8 different
  3386. * sizes of commands which there may be. It's a way of
  3387. * reducing the DMA done to fetch each command. Encoded into
  3388. * each command's tag are 3 bits which communicate to the controller
  3389. * which of the eight sizes that command fits within. The size of
  3390. * each command depends on how many scatter gather entries there are.
  3391. * Each SG entry requires 16 bytes. The eight registers are programmed
  3392. * with the number of 16-byte blocks a command of that size requires.
  3393. * The smallest command possible requires 5 such 16 byte blocks.
  3394. * the largest command possible requires MAXSGENTRIES + 4 16-byte
  3395. * blocks. Note, this only extends to the SG entries contained
  3396. * within the command block, and does not extend to chained blocks
  3397. * of SG elements. bft[] contains the eight values we write to
  3398. * the registers. They are not evenly distributed, but have more
  3399. * sizes for small commands, and fewer sizes for larger commands.
  3400. */
  3401. __u32 trans_offset;
  3402. int bft[8] = { 5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4};
  3403. /*
  3404. * 5 = 1 s/g entry or 4k
  3405. * 6 = 2 s/g entry or 8k
  3406. * 8 = 4 s/g entry or 16k
  3407. * 10 = 6 s/g entry or 24k
  3408. */
  3409. unsigned long register_value;
  3410. BUILD_BUG_ON(28 > MAXSGENTRIES + 4);
  3411. h->reply_pool_wraparound = 1; /* spec: init to 1 */
  3412. /* Controller spec: zero out this buffer. */
  3413. memset(h->reply_pool, 0, h->max_commands * sizeof(__u64));
  3414. h->reply_pool_head = h->reply_pool;
  3415. trans_offset = readl(&(h->cfgtable->TransMethodOffset));
  3416. calc_bucket_map(bft, ARRAY_SIZE(bft), h->maxsgentries,
  3417. h->blockFetchTable);
  3418. writel(bft[0], &h->transtable->BlockFetch0);
  3419. writel(bft[1], &h->transtable->BlockFetch1);
  3420. writel(bft[2], &h->transtable->BlockFetch2);
  3421. writel(bft[3], &h->transtable->BlockFetch3);
  3422. writel(bft[4], &h->transtable->BlockFetch4);
  3423. writel(bft[5], &h->transtable->BlockFetch5);
  3424. writel(bft[6], &h->transtable->BlockFetch6);
  3425. writel(bft[7], &h->transtable->BlockFetch7);
  3426. /* size of controller ring buffer */
  3427. writel(h->max_commands, &h->transtable->RepQSize);
  3428. writel(1, &h->transtable->RepQCount);
  3429. writel(0, &h->transtable->RepQCtrAddrLow32);
  3430. writel(0, &h->transtable->RepQCtrAddrHigh32);
  3431. writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
  3432. writel(0, &h->transtable->RepQAddr0High32);
  3433. writel(CFGTBL_Trans_Performant | use_short_tags,
  3434. &(h->cfgtable->HostWrite.TransportRequest));
  3435. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  3436. cciss_wait_for_mode_change_ack(h);
  3437. register_value = readl(&(h->cfgtable->TransportActive));
  3438. if (!(register_value & CFGTBL_Trans_Performant))
  3439. dev_warn(&h->pdev->dev, "cciss: unable to get board into"
  3440. " performant mode\n");
  3441. }
  3442. static void __devinit cciss_put_controller_into_performant_mode(ctlr_info_t *h)
  3443. {
  3444. __u32 trans_support;
  3445. dev_dbg(&h->pdev->dev, "Trying to put board into Performant mode\n");
  3446. /* Attempt to put controller into performant mode if supported */
  3447. /* Does board support performant mode? */
  3448. trans_support = readl(&(h->cfgtable->TransportSupport));
  3449. if (!(trans_support & PERFORMANT_MODE))
  3450. return;
  3451. dev_dbg(&h->pdev->dev, "Placing controller into performant mode\n");
  3452. /* Performant mode demands commands on a 32 byte boundary
  3453. * pci_alloc_consistent aligns on page boundarys already.
  3454. * Just need to check if divisible by 32
  3455. */
  3456. if ((sizeof(CommandList_struct) % 32) != 0) {
  3457. dev_warn(&h->pdev->dev, "%s %d %s\n",
  3458. "cciss info: command size[",
  3459. (int)sizeof(CommandList_struct),
  3460. "] not divisible by 32, no performant mode..\n");
  3461. return;
  3462. }
  3463. /* Performant mode ring buffer and supporting data structures */
  3464. h->reply_pool = (__u64 *)pci_alloc_consistent(
  3465. h->pdev, h->max_commands * sizeof(__u64),
  3466. &(h->reply_pool_dhandle));
  3467. /* Need a block fetch table for performant mode */
  3468. h->blockFetchTable = kmalloc(((h->maxsgentries+1) *
  3469. sizeof(__u32)), GFP_KERNEL);
  3470. if ((h->reply_pool == NULL) || (h->blockFetchTable == NULL))
  3471. goto clean_up;
  3472. cciss_enter_performant_mode(h,
  3473. trans_support & CFGTBL_Trans_use_short_tags);
  3474. /* Change the access methods to the performant access methods */
  3475. h->access = SA5_performant_access;
  3476. h->transMethod = CFGTBL_Trans_Performant;
  3477. return;
  3478. clean_up:
  3479. kfree(h->blockFetchTable);
  3480. if (h->reply_pool)
  3481. pci_free_consistent(h->pdev,
  3482. h->max_commands * sizeof(__u64),
  3483. h->reply_pool,
  3484. h->reply_pool_dhandle);
  3485. return;
  3486. } /* cciss_put_controller_into_performant_mode */
  3487. /* If MSI/MSI-X is supported by the kernel we will try to enable it on
  3488. * controllers that are capable. If not, we use IO-APIC mode.
  3489. */
  3490. static void __devinit cciss_interrupt_mode(ctlr_info_t *h)
  3491. {
  3492. #ifdef CONFIG_PCI_MSI
  3493. int err;
  3494. struct msix_entry cciss_msix_entries[4] = { {0, 0}, {0, 1},
  3495. {0, 2}, {0, 3}
  3496. };
  3497. /* Some boards advertise MSI but don't really support it */
  3498. if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
  3499. (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
  3500. goto default_int_mode;
  3501. if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
  3502. err = pci_enable_msix(h->pdev, cciss_msix_entries, 4);
  3503. if (!err) {
  3504. h->intr[0] = cciss_msix_entries[0].vector;
  3505. h->intr[1] = cciss_msix_entries[1].vector;
  3506. h->intr[2] = cciss_msix_entries[2].vector;
  3507. h->intr[3] = cciss_msix_entries[3].vector;
  3508. h->msix_vector = 1;
  3509. return;
  3510. }
  3511. if (err > 0) {
  3512. dev_warn(&h->pdev->dev,
  3513. "only %d MSI-X vectors available\n", err);
  3514. goto default_int_mode;
  3515. } else {
  3516. dev_warn(&h->pdev->dev,
  3517. "MSI-X init failed %d\n", err);
  3518. goto default_int_mode;
  3519. }
  3520. }
  3521. if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
  3522. if (!pci_enable_msi(h->pdev))
  3523. h->msi_vector = 1;
  3524. else
  3525. dev_warn(&h->pdev->dev, "MSI init failed\n");
  3526. }
  3527. default_int_mode:
  3528. #endif /* CONFIG_PCI_MSI */
  3529. /* if we get here we're going to use the default interrupt mode */
  3530. h->intr[PERF_MODE_INT] = h->pdev->irq;
  3531. return;
  3532. }
  3533. static int __devinit cciss_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
  3534. {
  3535. int i;
  3536. u32 subsystem_vendor_id, subsystem_device_id;
  3537. subsystem_vendor_id = pdev->subsystem_vendor;
  3538. subsystem_device_id = pdev->subsystem_device;
  3539. *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
  3540. subsystem_vendor_id;
  3541. for (i = 0; i < ARRAY_SIZE(products); i++)
  3542. if (*board_id == products[i].board_id)
  3543. return i;
  3544. dev_warn(&pdev->dev, "unrecognized board ID: 0x%08x, ignoring.\n",
  3545. *board_id);
  3546. return -ENODEV;
  3547. }
  3548. static inline bool cciss_board_disabled(ctlr_info_t *h)
  3549. {
  3550. u16 command;
  3551. (void) pci_read_config_word(h->pdev, PCI_COMMAND, &command);
  3552. return ((command & PCI_COMMAND_MEMORY) == 0);
  3553. }
  3554. static int __devinit cciss_pci_find_memory_BAR(struct pci_dev *pdev,
  3555. unsigned long *memory_bar)
  3556. {
  3557. int i;
  3558. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
  3559. if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
  3560. /* addressing mode bits already removed */
  3561. *memory_bar = pci_resource_start(pdev, i);
  3562. dev_dbg(&pdev->dev, "memory BAR = %lx\n",
  3563. *memory_bar);
  3564. return 0;
  3565. }
  3566. dev_warn(&pdev->dev, "no memory BAR found\n");
  3567. return -ENODEV;
  3568. }
  3569. static int __devinit cciss_wait_for_board_state(struct pci_dev *pdev,
  3570. void __iomem *vaddr, int wait_for_ready)
  3571. #define BOARD_READY 1
  3572. #define BOARD_NOT_READY 0
  3573. {
  3574. int i, iterations;
  3575. u32 scratchpad;
  3576. if (wait_for_ready)
  3577. iterations = CCISS_BOARD_READY_ITERATIONS;
  3578. else
  3579. iterations = CCISS_BOARD_NOT_READY_ITERATIONS;
  3580. for (i = 0; i < iterations; i++) {
  3581. scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
  3582. if (wait_for_ready) {
  3583. if (scratchpad == CCISS_FIRMWARE_READY)
  3584. return 0;
  3585. } else {
  3586. if (scratchpad != CCISS_FIRMWARE_READY)
  3587. return 0;
  3588. }
  3589. msleep(CCISS_BOARD_READY_POLL_INTERVAL_MSECS);
  3590. }
  3591. dev_warn(&pdev->dev, "board not ready, timed out.\n");
  3592. return -ENODEV;
  3593. }
  3594. static int __devinit cciss_find_cfg_addrs(struct pci_dev *pdev,
  3595. void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
  3596. u64 *cfg_offset)
  3597. {
  3598. *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
  3599. *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
  3600. *cfg_base_addr &= (u32) 0x0000ffff;
  3601. *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
  3602. if (*cfg_base_addr_index == -1) {
  3603. dev_warn(&pdev->dev, "cannot find cfg_base_addr_index, "
  3604. "*cfg_base_addr = 0x%08x\n", *cfg_base_addr);
  3605. return -ENODEV;
  3606. }
  3607. return 0;
  3608. }
  3609. static int __devinit cciss_find_cfgtables(ctlr_info_t *h)
  3610. {
  3611. u64 cfg_offset;
  3612. u32 cfg_base_addr;
  3613. u64 cfg_base_addr_index;
  3614. u32 trans_offset;
  3615. int rc;
  3616. rc = cciss_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
  3617. &cfg_base_addr_index, &cfg_offset);
  3618. if (rc)
  3619. return rc;
  3620. h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
  3621. cfg_base_addr_index) + cfg_offset, sizeof(h->cfgtable));
  3622. if (!h->cfgtable)
  3623. return -ENOMEM;
  3624. /* Find performant mode table. */
  3625. trans_offset = readl(&h->cfgtable->TransMethodOffset);
  3626. h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
  3627. cfg_base_addr_index)+cfg_offset+trans_offset,
  3628. sizeof(*h->transtable));
  3629. if (!h->transtable)
  3630. return -ENOMEM;
  3631. return 0;
  3632. }
  3633. static void __devinit cciss_get_max_perf_mode_cmds(struct ctlr_info *h)
  3634. {
  3635. h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
  3636. /* Limit commands in memory limited kdump scenario. */
  3637. if (reset_devices && h->max_commands > 32)
  3638. h->max_commands = 32;
  3639. if (h->max_commands < 16) {
  3640. dev_warn(&h->pdev->dev, "Controller reports "
  3641. "max supported commands of %d, an obvious lie. "
  3642. "Using 16. Ensure that firmware is up to date.\n",
  3643. h->max_commands);
  3644. h->max_commands = 16;
  3645. }
  3646. }
  3647. /* Interrogate the hardware for some limits:
  3648. * max commands, max SG elements without chaining, and with chaining,
  3649. * SG chain block size, etc.
  3650. */
  3651. static void __devinit cciss_find_board_params(ctlr_info_t *h)
  3652. {
  3653. cciss_get_max_perf_mode_cmds(h);
  3654. h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
  3655. h->maxsgentries = readl(&(h->cfgtable->MaxSGElements));
  3656. /*
  3657. * Limit in-command s/g elements to 32 save dma'able memory.
  3658. * Howvever spec says if 0, use 31
  3659. */
  3660. h->max_cmd_sgentries = 31;
  3661. if (h->maxsgentries > 512) {
  3662. h->max_cmd_sgentries = 32;
  3663. h->chainsize = h->maxsgentries - h->max_cmd_sgentries + 1;
  3664. h->maxsgentries--; /* save one for chain pointer */
  3665. } else {
  3666. h->maxsgentries = 31; /* default to traditional values */
  3667. h->chainsize = 0;
  3668. }
  3669. }
  3670. static inline bool CISS_signature_present(ctlr_info_t *h)
  3671. {
  3672. if ((readb(&h->cfgtable->Signature[0]) != 'C') ||
  3673. (readb(&h->cfgtable->Signature[1]) != 'I') ||
  3674. (readb(&h->cfgtable->Signature[2]) != 'S') ||
  3675. (readb(&h->cfgtable->Signature[3]) != 'S')) {
  3676. dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
  3677. return false;
  3678. }
  3679. return true;
  3680. }
  3681. /* Need to enable prefetch in the SCSI core for 6400 in x86 */
  3682. static inline void cciss_enable_scsi_prefetch(ctlr_info_t *h)
  3683. {
  3684. #ifdef CONFIG_X86
  3685. u32 prefetch;
  3686. prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
  3687. prefetch |= 0x100;
  3688. writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
  3689. #endif
  3690. }
  3691. /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
  3692. * in a prefetch beyond physical memory.
  3693. */
  3694. static inline void cciss_p600_dma_prefetch_quirk(ctlr_info_t *h)
  3695. {
  3696. u32 dma_prefetch;
  3697. __u32 dma_refetch;
  3698. if (h->board_id != 0x3225103C)
  3699. return;
  3700. dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
  3701. dma_prefetch |= 0x8000;
  3702. writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
  3703. pci_read_config_dword(h->pdev, PCI_COMMAND_PARITY, &dma_refetch);
  3704. dma_refetch |= 0x1;
  3705. pci_write_config_dword(h->pdev, PCI_COMMAND_PARITY, dma_refetch);
  3706. }
  3707. static int __devinit cciss_pci_init(ctlr_info_t *h)
  3708. {
  3709. int prod_index, err;
  3710. prod_index = cciss_lookup_board_id(h->pdev, &h->board_id);
  3711. if (prod_index < 0)
  3712. return -ENODEV;
  3713. h->product_name = products[prod_index].product_name;
  3714. h->access = *(products[prod_index].access);
  3715. if (cciss_board_disabled(h)) {
  3716. dev_warn(&h->pdev->dev, "controller appears to be disabled\n");
  3717. return -ENODEV;
  3718. }
  3719. err = pci_enable_device(h->pdev);
  3720. if (err) {
  3721. dev_warn(&h->pdev->dev, "Unable to Enable PCI device\n");
  3722. return err;
  3723. }
  3724. err = pci_request_regions(h->pdev, "cciss");
  3725. if (err) {
  3726. dev_warn(&h->pdev->dev,
  3727. "Cannot obtain PCI resources, aborting\n");
  3728. return err;
  3729. }
  3730. dev_dbg(&h->pdev->dev, "irq = %x\n", h->pdev->irq);
  3731. dev_dbg(&h->pdev->dev, "board_id = %x\n", h->board_id);
  3732. /* If the kernel supports MSI/MSI-X we will try to enable that functionality,
  3733. * else we use the IO-APIC interrupt assigned to us by system ROM.
  3734. */
  3735. cciss_interrupt_mode(h);
  3736. err = cciss_pci_find_memory_BAR(h->pdev, &h->paddr);
  3737. if (err)
  3738. goto err_out_free_res;
  3739. h->vaddr = remap_pci_mem(h->paddr, 0x250);
  3740. if (!h->vaddr) {
  3741. err = -ENOMEM;
  3742. goto err_out_free_res;
  3743. }
  3744. err = cciss_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
  3745. if (err)
  3746. goto err_out_free_res;
  3747. err = cciss_find_cfgtables(h);
  3748. if (err)
  3749. goto err_out_free_res;
  3750. print_cfg_table(h);
  3751. cciss_find_board_params(h);
  3752. if (!CISS_signature_present(h)) {
  3753. err = -ENODEV;
  3754. goto err_out_free_res;
  3755. }
  3756. cciss_enable_scsi_prefetch(h);
  3757. cciss_p600_dma_prefetch_quirk(h);
  3758. cciss_put_controller_into_performant_mode(h);
  3759. return 0;
  3760. err_out_free_res:
  3761. /*
  3762. * Deliberately omit pci_disable_device(): it does something nasty to
  3763. * Smart Array controllers that pci_enable_device does not undo
  3764. */
  3765. if (h->transtable)
  3766. iounmap(h->transtable);
  3767. if (h->cfgtable)
  3768. iounmap(h->cfgtable);
  3769. if (h->vaddr)
  3770. iounmap(h->vaddr);
  3771. pci_release_regions(h->pdev);
  3772. return err;
  3773. }
  3774. /* Function to find the first free pointer into our hba[] array
  3775. * Returns -1 if no free entries are left.
  3776. */
  3777. static int alloc_cciss_hba(struct pci_dev *pdev)
  3778. {
  3779. int i;
  3780. for (i = 0; i < MAX_CTLR; i++) {
  3781. if (!hba[i]) {
  3782. ctlr_info_t *h;
  3783. h = kzalloc(sizeof(ctlr_info_t), GFP_KERNEL);
  3784. if (!h)
  3785. goto Enomem;
  3786. hba[i] = h;
  3787. return i;
  3788. }
  3789. }
  3790. dev_warn(&pdev->dev, "This driver supports a maximum"
  3791. " of %d controllers.\n", MAX_CTLR);
  3792. return -1;
  3793. Enomem:
  3794. dev_warn(&pdev->dev, "out of memory.\n");
  3795. return -1;
  3796. }
  3797. static void free_hba(ctlr_info_t *h)
  3798. {
  3799. int i;
  3800. hba[h->ctlr] = NULL;
  3801. for (i = 0; i < h->highest_lun + 1; i++)
  3802. if (h->gendisk[i] != NULL)
  3803. put_disk(h->gendisk[i]);
  3804. kfree(h);
  3805. }
  3806. /* Send a message CDB to the firmware. */
  3807. static __devinit int cciss_message(struct pci_dev *pdev, unsigned char opcode, unsigned char type)
  3808. {
  3809. typedef struct {
  3810. CommandListHeader_struct CommandHeader;
  3811. RequestBlock_struct Request;
  3812. ErrDescriptor_struct ErrorDescriptor;
  3813. } Command;
  3814. static const size_t cmd_sz = sizeof(Command) + sizeof(ErrorInfo_struct);
  3815. Command *cmd;
  3816. dma_addr_t paddr64;
  3817. uint32_t paddr32, tag;
  3818. void __iomem *vaddr;
  3819. int i, err;
  3820. vaddr = ioremap_nocache(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
  3821. if (vaddr == NULL)
  3822. return -ENOMEM;
  3823. /* The Inbound Post Queue only accepts 32-bit physical addresses for the
  3824. CCISS commands, so they must be allocated from the lower 4GiB of
  3825. memory. */
  3826. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  3827. if (err) {
  3828. iounmap(vaddr);
  3829. return -ENOMEM;
  3830. }
  3831. cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
  3832. if (cmd == NULL) {
  3833. iounmap(vaddr);
  3834. return -ENOMEM;
  3835. }
  3836. /* This must fit, because of the 32-bit consistent DMA mask. Also,
  3837. although there's no guarantee, we assume that the address is at
  3838. least 4-byte aligned (most likely, it's page-aligned). */
  3839. paddr32 = paddr64;
  3840. cmd->CommandHeader.ReplyQueue = 0;
  3841. cmd->CommandHeader.SGList = 0;
  3842. cmd->CommandHeader.SGTotal = 0;
  3843. cmd->CommandHeader.Tag.lower = paddr32;
  3844. cmd->CommandHeader.Tag.upper = 0;
  3845. memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
  3846. cmd->Request.CDBLen = 16;
  3847. cmd->Request.Type.Type = TYPE_MSG;
  3848. cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
  3849. cmd->Request.Type.Direction = XFER_NONE;
  3850. cmd->Request.Timeout = 0; /* Don't time out */
  3851. cmd->Request.CDB[0] = opcode;
  3852. cmd->Request.CDB[1] = type;
  3853. memset(&cmd->Request.CDB[2], 0, 14); /* the rest of the CDB is reserved */
  3854. cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(Command);
  3855. cmd->ErrorDescriptor.Addr.upper = 0;
  3856. cmd->ErrorDescriptor.Len = sizeof(ErrorInfo_struct);
  3857. writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
  3858. for (i = 0; i < 10; i++) {
  3859. tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
  3860. if ((tag & ~3) == paddr32)
  3861. break;
  3862. schedule_timeout_uninterruptible(HZ);
  3863. }
  3864. iounmap(vaddr);
  3865. /* we leak the DMA buffer here ... no choice since the controller could
  3866. still complete the command. */
  3867. if (i == 10) {
  3868. dev_err(&pdev->dev,
  3869. "controller message %02x:%02x timed out\n",
  3870. opcode, type);
  3871. return -ETIMEDOUT;
  3872. }
  3873. pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
  3874. if (tag & 2) {
  3875. dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
  3876. opcode, type);
  3877. return -EIO;
  3878. }
  3879. dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
  3880. opcode, type);
  3881. return 0;
  3882. }
  3883. #define cciss_soft_reset_controller(p) cciss_message(p, 1, 0)
  3884. #define cciss_noop(p) cciss_message(p, 3, 0)
  3885. static int cciss_controller_hard_reset(struct pci_dev *pdev,
  3886. void * __iomem vaddr, bool use_doorbell)
  3887. {
  3888. u16 pmcsr;
  3889. int pos;
  3890. if (use_doorbell) {
  3891. /* For everything after the P600, the PCI power state method
  3892. * of resetting the controller doesn't work, so we have this
  3893. * other way using the doorbell register.
  3894. */
  3895. dev_info(&pdev->dev, "using doorbell to reset controller\n");
  3896. writel(DOORBELL_CTLR_RESET, vaddr + SA5_DOORBELL);
  3897. msleep(1000);
  3898. } else { /* Try to do it the PCI power state way */
  3899. /* Quoting from the Open CISS Specification: "The Power
  3900. * Management Control/Status Register (CSR) controls the power
  3901. * state of the device. The normal operating state is D0,
  3902. * CSR=00h. The software off state is D3, CSR=03h. To reset
  3903. * the controller, place the interface device in D3 then to D0,
  3904. * this causes a secondary PCI reset which will reset the
  3905. * controller." */
  3906. pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
  3907. if (pos == 0) {
  3908. dev_err(&pdev->dev,
  3909. "cciss_controller_hard_reset: "
  3910. "PCI PM not supported\n");
  3911. return -ENODEV;
  3912. }
  3913. dev_info(&pdev->dev, "using PCI PM to reset controller\n");
  3914. /* enter the D3hot power management state */
  3915. pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
  3916. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  3917. pmcsr |= PCI_D3hot;
  3918. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  3919. msleep(500);
  3920. /* enter the D0 power management state */
  3921. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  3922. pmcsr |= PCI_D0;
  3923. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  3924. msleep(500);
  3925. }
  3926. return 0;
  3927. }
  3928. /* This does a hard reset of the controller using PCI power management
  3929. * states or using the doorbell register. */
  3930. static __devinit int cciss_kdump_hard_reset_controller(struct pci_dev *pdev)
  3931. {
  3932. u64 cfg_offset;
  3933. u32 cfg_base_addr;
  3934. u64 cfg_base_addr_index;
  3935. void __iomem *vaddr;
  3936. unsigned long paddr;
  3937. u32 misc_fw_support, active_transport;
  3938. int rc;
  3939. CfgTable_struct __iomem *cfgtable;
  3940. bool use_doorbell;
  3941. u32 board_id;
  3942. u16 command_register;
  3943. /* For controllers as old a the p600, this is very nearly
  3944. * the same thing as
  3945. *
  3946. * pci_save_state(pci_dev);
  3947. * pci_set_power_state(pci_dev, PCI_D3hot);
  3948. * pci_set_power_state(pci_dev, PCI_D0);
  3949. * pci_restore_state(pci_dev);
  3950. *
  3951. * For controllers newer than the P600, the pci power state
  3952. * method of resetting doesn't work so we have another way
  3953. * using the doorbell register.
  3954. */
  3955. /* Exclude 640x boards. These are two pci devices in one slot
  3956. * which share a battery backed cache module. One controls the
  3957. * cache, the other accesses the cache through the one that controls
  3958. * it. If we reset the one controlling the cache, the other will
  3959. * likely not be happy. Just forbid resetting this conjoined mess.
  3960. */
  3961. cciss_lookup_board_id(pdev, &board_id);
  3962. if (board_id == 0x409C0E11 || board_id == 0x409D0E11) {
  3963. dev_warn(&pdev->dev, "Cannot reset Smart Array 640x "
  3964. "due to shared cache module.");
  3965. return -ENODEV;
  3966. }
  3967. /* Save the PCI command register */
  3968. pci_read_config_word(pdev, 4, &command_register);
  3969. /* Turn the board off. This is so that later pci_restore_state()
  3970. * won't turn the board on before the rest of config space is ready.
  3971. */
  3972. pci_disable_device(pdev);
  3973. pci_save_state(pdev);
  3974. /* find the first memory BAR, so we can find the cfg table */
  3975. rc = cciss_pci_find_memory_BAR(pdev, &paddr);
  3976. if (rc)
  3977. return rc;
  3978. vaddr = remap_pci_mem(paddr, 0x250);
  3979. if (!vaddr)
  3980. return -ENOMEM;
  3981. /* find cfgtable in order to check if reset via doorbell is supported */
  3982. rc = cciss_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
  3983. &cfg_base_addr_index, &cfg_offset);
  3984. if (rc)
  3985. goto unmap_vaddr;
  3986. cfgtable = remap_pci_mem(pci_resource_start(pdev,
  3987. cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
  3988. if (!cfgtable) {
  3989. rc = -ENOMEM;
  3990. goto unmap_vaddr;
  3991. }
  3992. /* If reset via doorbell register is supported, use that. */
  3993. misc_fw_support = readl(&cfgtable->misc_fw_support);
  3994. use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
  3995. /* The doorbell reset seems to cause lockups on some Smart
  3996. * Arrays (e.g. P410, P410i, maybe others). Until this is
  3997. * fixed or at least isolated, avoid the doorbell reset.
  3998. */
  3999. use_doorbell = 0;
  4000. rc = cciss_controller_hard_reset(pdev, vaddr, use_doorbell);
  4001. if (rc)
  4002. goto unmap_cfgtable;
  4003. pci_restore_state(pdev);
  4004. rc = pci_enable_device(pdev);
  4005. if (rc) {
  4006. dev_warn(&pdev->dev, "failed to enable device.\n");
  4007. goto unmap_cfgtable;
  4008. }
  4009. pci_write_config_word(pdev, 4, command_register);
  4010. /* Some devices (notably the HP Smart Array 5i Controller)
  4011. need a little pause here */
  4012. msleep(CCISS_POST_RESET_PAUSE_MSECS);
  4013. /* Wait for board to become not ready, then ready. */
  4014. dev_info(&pdev->dev, "Waiting for board to become ready.\n");
  4015. rc = cciss_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY);
  4016. if (rc) /* Don't bail, might be E500, etc. which can't be reset */
  4017. dev_warn(&pdev->dev,
  4018. "failed waiting for board to become not ready\n");
  4019. rc = cciss_wait_for_board_state(pdev, vaddr, BOARD_READY);
  4020. if (rc) {
  4021. dev_warn(&pdev->dev,
  4022. "failed waiting for board to become ready\n");
  4023. goto unmap_cfgtable;
  4024. }
  4025. dev_info(&pdev->dev, "board ready.\n");
  4026. /* Controller should be in simple mode at this point. If it's not,
  4027. * It means we're on one of those controllers which doesn't support
  4028. * the doorbell reset method and on which the PCI power management reset
  4029. * method doesn't work (P800, for example.)
  4030. * In those cases, don't try to proceed, as it generally doesn't work.
  4031. */
  4032. active_transport = readl(&cfgtable->TransportActive);
  4033. if (active_transport & PERFORMANT_MODE) {
  4034. dev_warn(&pdev->dev, "Unable to successfully reset controller,"
  4035. " Ignoring controller.\n");
  4036. rc = -ENODEV;
  4037. }
  4038. unmap_cfgtable:
  4039. iounmap(cfgtable);
  4040. unmap_vaddr:
  4041. iounmap(vaddr);
  4042. return rc;
  4043. }
  4044. static __devinit int cciss_init_reset_devices(struct pci_dev *pdev)
  4045. {
  4046. int rc, i;
  4047. if (!reset_devices)
  4048. return 0;
  4049. /* Reset the controller with a PCI power-cycle or via doorbell */
  4050. rc = cciss_kdump_hard_reset_controller(pdev);
  4051. /* -ENOTSUPP here means we cannot reset the controller
  4052. * but it's already (and still) up and running in
  4053. * "performant mode". Or, it might be 640x, which can't reset
  4054. * due to concerns about shared bbwc between 6402/6404 pair.
  4055. */
  4056. if (rc == -ENOTSUPP)
  4057. return 0; /* just try to do the kdump anyhow. */
  4058. if (rc)
  4059. return -ENODEV;
  4060. /* Now try to get the controller to respond to a no-op */
  4061. for (i = 0; i < CCISS_POST_RESET_NOOP_RETRIES; i++) {
  4062. if (cciss_noop(pdev) == 0)
  4063. break;
  4064. else
  4065. dev_warn(&pdev->dev, "no-op failed%s\n",
  4066. (i < CCISS_POST_RESET_NOOP_RETRIES - 1 ?
  4067. "; re-trying" : ""));
  4068. msleep(CCISS_POST_RESET_NOOP_INTERVAL_MSECS);
  4069. }
  4070. return 0;
  4071. }
  4072. /*
  4073. * This is it. Find all the controllers and register them. I really hate
  4074. * stealing all these major device numbers.
  4075. * returns the number of block devices registered.
  4076. */
  4077. static int __devinit cciss_init_one(struct pci_dev *pdev,
  4078. const struct pci_device_id *ent)
  4079. {
  4080. int i;
  4081. int j = 0;
  4082. int k = 0;
  4083. int rc;
  4084. int dac, return_code;
  4085. InquiryData_struct *inq_buff;
  4086. ctlr_info_t *h;
  4087. rc = cciss_init_reset_devices(pdev);
  4088. if (rc)
  4089. return rc;
  4090. i = alloc_cciss_hba(pdev);
  4091. if (i < 0)
  4092. return -1;
  4093. h = hba[i];
  4094. h->pdev = pdev;
  4095. h->busy_initializing = 1;
  4096. INIT_LIST_HEAD(&h->cmpQ);
  4097. INIT_LIST_HEAD(&h->reqQ);
  4098. mutex_init(&h->busy_shutting_down);
  4099. if (cciss_pci_init(h) != 0)
  4100. goto clean_no_release_regions;
  4101. sprintf(h->devname, "cciss%d", i);
  4102. h->ctlr = i;
  4103. init_completion(&h->scan_wait);
  4104. if (cciss_create_hba_sysfs_entry(h))
  4105. goto clean0;
  4106. /* configure PCI DMA stuff */
  4107. if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
  4108. dac = 1;
  4109. else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
  4110. dac = 0;
  4111. else {
  4112. dev_err(&h->pdev->dev, "no suitable DMA available\n");
  4113. goto clean1;
  4114. }
  4115. /*
  4116. * register with the major number, or get a dynamic major number
  4117. * by passing 0 as argument. This is done for greater than
  4118. * 8 controller support.
  4119. */
  4120. if (i < MAX_CTLR_ORIG)
  4121. h->major = COMPAQ_CISS_MAJOR + i;
  4122. rc = register_blkdev(h->major, h->devname);
  4123. if (rc == -EBUSY || rc == -EINVAL) {
  4124. dev_err(&h->pdev->dev,
  4125. "Unable to get major number %d for %s "
  4126. "on hba %d\n", h->major, h->devname, i);
  4127. goto clean1;
  4128. } else {
  4129. if (i >= MAX_CTLR_ORIG)
  4130. h->major = rc;
  4131. }
  4132. /* make sure the board interrupts are off */
  4133. h->access.set_intr_mask(h, CCISS_INTR_OFF);
  4134. if (h->msi_vector || h->msix_vector) {
  4135. if (request_irq(h->intr[PERF_MODE_INT],
  4136. do_cciss_msix_intr,
  4137. IRQF_DISABLED, h->devname, h)) {
  4138. dev_err(&h->pdev->dev, "Unable to get irq %d for %s\n",
  4139. h->intr[PERF_MODE_INT], h->devname);
  4140. goto clean2;
  4141. }
  4142. } else {
  4143. if (request_irq(h->intr[PERF_MODE_INT], do_cciss_intx,
  4144. IRQF_DISABLED, h->devname, h)) {
  4145. dev_err(&h->pdev->dev, "Unable to get irq %d for %s\n",
  4146. h->intr[PERF_MODE_INT], h->devname);
  4147. goto clean2;
  4148. }
  4149. }
  4150. dev_info(&h->pdev->dev, "%s: <0x%x> at PCI %s IRQ %d%s using DAC\n",
  4151. h->devname, pdev->device, pci_name(pdev),
  4152. h->intr[PERF_MODE_INT], dac ? "" : " not");
  4153. h->cmd_pool_bits =
  4154. kmalloc(DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG)
  4155. * sizeof(unsigned long), GFP_KERNEL);
  4156. h->cmd_pool = (CommandList_struct *)
  4157. pci_alloc_consistent(h->pdev,
  4158. h->nr_cmds * sizeof(CommandList_struct),
  4159. &(h->cmd_pool_dhandle));
  4160. h->errinfo_pool = (ErrorInfo_struct *)
  4161. pci_alloc_consistent(h->pdev,
  4162. h->nr_cmds * sizeof(ErrorInfo_struct),
  4163. &(h->errinfo_pool_dhandle));
  4164. if ((h->cmd_pool_bits == NULL)
  4165. || (h->cmd_pool == NULL)
  4166. || (h->errinfo_pool == NULL)) {
  4167. dev_err(&h->pdev->dev, "out of memory");
  4168. goto clean4;
  4169. }
  4170. /* Need space for temp scatter list */
  4171. h->scatter_list = kmalloc(h->max_commands *
  4172. sizeof(struct scatterlist *),
  4173. GFP_KERNEL);
  4174. if (!h->scatter_list)
  4175. goto clean4;
  4176. for (k = 0; k < h->nr_cmds; k++) {
  4177. h->scatter_list[k] = kmalloc(sizeof(struct scatterlist) *
  4178. h->maxsgentries,
  4179. GFP_KERNEL);
  4180. if (h->scatter_list[k] == NULL) {
  4181. dev_err(&h->pdev->dev,
  4182. "could not allocate s/g lists\n");
  4183. goto clean4;
  4184. }
  4185. }
  4186. h->cmd_sg_list = cciss_allocate_sg_chain_blocks(h,
  4187. h->chainsize, h->nr_cmds);
  4188. if (!h->cmd_sg_list && h->chainsize > 0)
  4189. goto clean4;
  4190. spin_lock_init(&h->lock);
  4191. /* Initialize the pdev driver private data.
  4192. have it point to h. */
  4193. pci_set_drvdata(pdev, h);
  4194. /* command and error info recs zeroed out before
  4195. they are used */
  4196. memset(h->cmd_pool_bits, 0,
  4197. DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG)
  4198. * sizeof(unsigned long));
  4199. h->num_luns = 0;
  4200. h->highest_lun = -1;
  4201. for (j = 0; j < CISS_MAX_LUN; j++) {
  4202. h->drv[j] = NULL;
  4203. h->gendisk[j] = NULL;
  4204. }
  4205. cciss_scsi_setup(h);
  4206. /* Turn the interrupts on so we can service requests */
  4207. h->access.set_intr_mask(h, CCISS_INTR_ON);
  4208. /* Get the firmware version */
  4209. inq_buff = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
  4210. if (inq_buff == NULL) {
  4211. dev_err(&h->pdev->dev, "out of memory\n");
  4212. goto clean4;
  4213. }
  4214. return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff,
  4215. sizeof(InquiryData_struct), 0, CTLR_LUNID, TYPE_CMD);
  4216. if (return_code == IO_OK) {
  4217. h->firm_ver[0] = inq_buff->data_byte[32];
  4218. h->firm_ver[1] = inq_buff->data_byte[33];
  4219. h->firm_ver[2] = inq_buff->data_byte[34];
  4220. h->firm_ver[3] = inq_buff->data_byte[35];
  4221. } else { /* send command failed */
  4222. dev_warn(&h->pdev->dev, "unable to determine firmware"
  4223. " version of controller\n");
  4224. }
  4225. kfree(inq_buff);
  4226. cciss_procinit(h);
  4227. h->cciss_max_sectors = 8192;
  4228. rebuild_lun_table(h, 1, 0);
  4229. h->busy_initializing = 0;
  4230. return 1;
  4231. clean4:
  4232. kfree(h->cmd_pool_bits);
  4233. /* Free up sg elements */
  4234. for (k-- ; k >= 0; k--)
  4235. kfree(h->scatter_list[k]);
  4236. kfree(h->scatter_list);
  4237. cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
  4238. if (h->cmd_pool)
  4239. pci_free_consistent(h->pdev,
  4240. h->nr_cmds * sizeof(CommandList_struct),
  4241. h->cmd_pool, h->cmd_pool_dhandle);
  4242. if (h->errinfo_pool)
  4243. pci_free_consistent(h->pdev,
  4244. h->nr_cmds * sizeof(ErrorInfo_struct),
  4245. h->errinfo_pool,
  4246. h->errinfo_pool_dhandle);
  4247. free_irq(h->intr[PERF_MODE_INT], h);
  4248. clean2:
  4249. unregister_blkdev(h->major, h->devname);
  4250. clean1:
  4251. cciss_destroy_hba_sysfs_entry(h);
  4252. clean0:
  4253. pci_release_regions(pdev);
  4254. clean_no_release_regions:
  4255. h->busy_initializing = 0;
  4256. /*
  4257. * Deliberately omit pci_disable_device(): it does something nasty to
  4258. * Smart Array controllers that pci_enable_device does not undo
  4259. */
  4260. pci_set_drvdata(pdev, NULL);
  4261. free_hba(h);
  4262. return -1;
  4263. }
  4264. static void cciss_shutdown(struct pci_dev *pdev)
  4265. {
  4266. ctlr_info_t *h;
  4267. char *flush_buf;
  4268. int return_code;
  4269. h = pci_get_drvdata(pdev);
  4270. flush_buf = kzalloc(4, GFP_KERNEL);
  4271. if (!flush_buf) {
  4272. dev_warn(&h->pdev->dev, "cache not flushed, out of memory.\n");
  4273. return;
  4274. }
  4275. /* write all data in the battery backed cache to disk */
  4276. memset(flush_buf, 0, 4);
  4277. return_code = sendcmd_withirq(h, CCISS_CACHE_FLUSH, flush_buf,
  4278. 4, 0, CTLR_LUNID, TYPE_CMD);
  4279. kfree(flush_buf);
  4280. if (return_code != IO_OK)
  4281. dev_warn(&h->pdev->dev, "Error flushing cache\n");
  4282. h->access.set_intr_mask(h, CCISS_INTR_OFF);
  4283. free_irq(h->intr[PERF_MODE_INT], h);
  4284. }
  4285. static void __devexit cciss_remove_one(struct pci_dev *pdev)
  4286. {
  4287. ctlr_info_t *h;
  4288. int i, j;
  4289. if (pci_get_drvdata(pdev) == NULL) {
  4290. dev_err(&pdev->dev, "Unable to remove device\n");
  4291. return;
  4292. }
  4293. h = pci_get_drvdata(pdev);
  4294. i = h->ctlr;
  4295. if (hba[i] == NULL) {
  4296. dev_err(&pdev->dev, "device appears to already be removed\n");
  4297. return;
  4298. }
  4299. mutex_lock(&h->busy_shutting_down);
  4300. remove_from_scan_list(h);
  4301. remove_proc_entry(h->devname, proc_cciss);
  4302. unregister_blkdev(h->major, h->devname);
  4303. /* remove it from the disk list */
  4304. for (j = 0; j < CISS_MAX_LUN; j++) {
  4305. struct gendisk *disk = h->gendisk[j];
  4306. if (disk) {
  4307. struct request_queue *q = disk->queue;
  4308. if (disk->flags & GENHD_FL_UP) {
  4309. cciss_destroy_ld_sysfs_entry(h, j, 1);
  4310. del_gendisk(disk);
  4311. }
  4312. if (q)
  4313. blk_cleanup_queue(q);
  4314. }
  4315. }
  4316. #ifdef CONFIG_CISS_SCSI_TAPE
  4317. cciss_unregister_scsi(h); /* unhook from SCSI subsystem */
  4318. #endif
  4319. cciss_shutdown(pdev);
  4320. #ifdef CONFIG_PCI_MSI
  4321. if (h->msix_vector)
  4322. pci_disable_msix(h->pdev);
  4323. else if (h->msi_vector)
  4324. pci_disable_msi(h->pdev);
  4325. #endif /* CONFIG_PCI_MSI */
  4326. iounmap(h->transtable);
  4327. iounmap(h->cfgtable);
  4328. iounmap(h->vaddr);
  4329. pci_free_consistent(h->pdev, h->nr_cmds * sizeof(CommandList_struct),
  4330. h->cmd_pool, h->cmd_pool_dhandle);
  4331. pci_free_consistent(h->pdev, h->nr_cmds * sizeof(ErrorInfo_struct),
  4332. h->errinfo_pool, h->errinfo_pool_dhandle);
  4333. kfree(h->cmd_pool_bits);
  4334. /* Free up sg elements */
  4335. for (j = 0; j < h->nr_cmds; j++)
  4336. kfree(h->scatter_list[j]);
  4337. kfree(h->scatter_list);
  4338. cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
  4339. /*
  4340. * Deliberately omit pci_disable_device(): it does something nasty to
  4341. * Smart Array controllers that pci_enable_device does not undo
  4342. */
  4343. pci_release_regions(pdev);
  4344. pci_set_drvdata(pdev, NULL);
  4345. cciss_destroy_hba_sysfs_entry(h);
  4346. mutex_unlock(&h->busy_shutting_down);
  4347. free_hba(h);
  4348. }
  4349. static struct pci_driver cciss_pci_driver = {
  4350. .name = "cciss",
  4351. .probe = cciss_init_one,
  4352. .remove = __devexit_p(cciss_remove_one),
  4353. .id_table = cciss_pci_device_id, /* id_table */
  4354. .shutdown = cciss_shutdown,
  4355. };
  4356. /*
  4357. * This is it. Register the PCI driver information for the cards we control
  4358. * the OS will call our registered routines when it finds one of our cards.
  4359. */
  4360. static int __init cciss_init(void)
  4361. {
  4362. int err;
  4363. /*
  4364. * The hardware requires that commands are aligned on a 64-bit
  4365. * boundary. Given that we use pci_alloc_consistent() to allocate an
  4366. * array of them, the size must be a multiple of 8 bytes.
  4367. */
  4368. BUILD_BUG_ON(sizeof(CommandList_struct) % COMMANDLIST_ALIGNMENT);
  4369. printk(KERN_INFO DRIVER_NAME "\n");
  4370. err = bus_register(&cciss_bus_type);
  4371. if (err)
  4372. return err;
  4373. /* Start the scan thread */
  4374. cciss_scan_thread = kthread_run(scan_thread, NULL, "cciss_scan");
  4375. if (IS_ERR(cciss_scan_thread)) {
  4376. err = PTR_ERR(cciss_scan_thread);
  4377. goto err_bus_unregister;
  4378. }
  4379. /* Register for our PCI devices */
  4380. err = pci_register_driver(&cciss_pci_driver);
  4381. if (err)
  4382. goto err_thread_stop;
  4383. return err;
  4384. err_thread_stop:
  4385. kthread_stop(cciss_scan_thread);
  4386. err_bus_unregister:
  4387. bus_unregister(&cciss_bus_type);
  4388. return err;
  4389. }
  4390. static void __exit cciss_cleanup(void)
  4391. {
  4392. int i;
  4393. pci_unregister_driver(&cciss_pci_driver);
  4394. /* double check that all controller entrys have been removed */
  4395. for (i = 0; i < MAX_CTLR; i++) {
  4396. if (hba[i] != NULL) {
  4397. dev_warn(&hba[i]->pdev->dev,
  4398. "had to remove controller\n");
  4399. cciss_remove_one(hba[i]->pdev);
  4400. }
  4401. }
  4402. kthread_stop(cciss_scan_thread);
  4403. if (proc_cciss)
  4404. remove_proc_entry("driver/cciss", NULL);
  4405. bus_unregister(&cciss_bus_type);
  4406. }
  4407. module_init(cciss_init);
  4408. module_exit(cciss_cleanup);