intel_pstate.c 21 KB

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  1. /*
  2. * intel_pstate.c: Native P state management for Intel processors
  3. *
  4. * (C) Copyright 2012 Intel Corporation
  5. * Author: Dirk Brandewie <dirk.j.brandewie@intel.com>
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; version 2
  10. * of the License.
  11. */
  12. #include <linux/kernel.h>
  13. #include <linux/kernel_stat.h>
  14. #include <linux/module.h>
  15. #include <linux/ktime.h>
  16. #include <linux/hrtimer.h>
  17. #include <linux/tick.h>
  18. #include <linux/slab.h>
  19. #include <linux/sched.h>
  20. #include <linux/list.h>
  21. #include <linux/cpu.h>
  22. #include <linux/cpufreq.h>
  23. #include <linux/sysfs.h>
  24. #include <linux/types.h>
  25. #include <linux/fs.h>
  26. #include <linux/debugfs.h>
  27. #include <linux/acpi.h>
  28. #include <trace/events/power.h>
  29. #include <asm/div64.h>
  30. #include <asm/msr.h>
  31. #include <asm/cpu_device_id.h>
  32. #define SAMPLE_COUNT 3
  33. #define BYT_RATIOS 0x66a
  34. #define FRAC_BITS 8
  35. #define int_tofp(X) ((int64_t)(X) << FRAC_BITS)
  36. #define fp_toint(X) ((X) >> FRAC_BITS)
  37. static inline int32_t mul_fp(int32_t x, int32_t y)
  38. {
  39. return ((int64_t)x * (int64_t)y) >> FRAC_BITS;
  40. }
  41. static inline int32_t div_fp(int32_t x, int32_t y)
  42. {
  43. return div_s64((int64_t)x << FRAC_BITS, (int64_t)y);
  44. }
  45. struct sample {
  46. int32_t core_pct_busy;
  47. u64 aperf;
  48. u64 mperf;
  49. int freq;
  50. };
  51. struct pstate_data {
  52. int current_pstate;
  53. int min_pstate;
  54. int max_pstate;
  55. int turbo_pstate;
  56. };
  57. struct _pid {
  58. int setpoint;
  59. int32_t integral;
  60. int32_t p_gain;
  61. int32_t i_gain;
  62. int32_t d_gain;
  63. int deadband;
  64. int32_t last_err;
  65. };
  66. struct cpudata {
  67. int cpu;
  68. char name[64];
  69. struct timer_list timer;
  70. struct pstate_data pstate;
  71. struct _pid pid;
  72. int min_pstate_count;
  73. u64 prev_aperf;
  74. u64 prev_mperf;
  75. int sample_ptr;
  76. struct sample samples[SAMPLE_COUNT];
  77. };
  78. static struct cpudata **all_cpu_data;
  79. struct pstate_adjust_policy {
  80. int sample_rate_ms;
  81. int deadband;
  82. int setpoint;
  83. int p_gain_pct;
  84. int d_gain_pct;
  85. int i_gain_pct;
  86. };
  87. struct pstate_funcs {
  88. int (*get_max)(void);
  89. int (*get_min)(void);
  90. int (*get_turbo)(void);
  91. void (*set)(int pstate);
  92. };
  93. struct cpu_defaults {
  94. struct pstate_adjust_policy pid_policy;
  95. struct pstate_funcs funcs;
  96. };
  97. static struct pstate_adjust_policy pid_params;
  98. static struct pstate_funcs pstate_funcs;
  99. struct perf_limits {
  100. int no_turbo;
  101. int max_perf_pct;
  102. int min_perf_pct;
  103. int32_t max_perf;
  104. int32_t min_perf;
  105. int max_policy_pct;
  106. int max_sysfs_pct;
  107. };
  108. static struct perf_limits limits = {
  109. .no_turbo = 0,
  110. .max_perf_pct = 100,
  111. .max_perf = int_tofp(1),
  112. .min_perf_pct = 0,
  113. .min_perf = 0,
  114. .max_policy_pct = 100,
  115. .max_sysfs_pct = 100,
  116. };
  117. static inline void pid_reset(struct _pid *pid, int setpoint, int busy,
  118. int deadband, int integral) {
  119. pid->setpoint = setpoint;
  120. pid->deadband = deadband;
  121. pid->integral = int_tofp(integral);
  122. pid->last_err = setpoint - busy;
  123. }
  124. static inline void pid_p_gain_set(struct _pid *pid, int percent)
  125. {
  126. pid->p_gain = div_fp(int_tofp(percent), int_tofp(100));
  127. }
  128. static inline void pid_i_gain_set(struct _pid *pid, int percent)
  129. {
  130. pid->i_gain = div_fp(int_tofp(percent), int_tofp(100));
  131. }
  132. static inline void pid_d_gain_set(struct _pid *pid, int percent)
  133. {
  134. pid->d_gain = div_fp(int_tofp(percent), int_tofp(100));
  135. }
  136. static signed int pid_calc(struct _pid *pid, int32_t busy)
  137. {
  138. signed int result;
  139. int32_t pterm, dterm, fp_error;
  140. int32_t integral_limit;
  141. fp_error = int_tofp(pid->setpoint) - busy;
  142. if (abs(fp_error) <= int_tofp(pid->deadband))
  143. return 0;
  144. pterm = mul_fp(pid->p_gain, fp_error);
  145. pid->integral += fp_error;
  146. /* limit the integral term */
  147. integral_limit = int_tofp(30);
  148. if (pid->integral > integral_limit)
  149. pid->integral = integral_limit;
  150. if (pid->integral < -integral_limit)
  151. pid->integral = -integral_limit;
  152. dterm = mul_fp(pid->d_gain, fp_error - pid->last_err);
  153. pid->last_err = fp_error;
  154. result = pterm + mul_fp(pid->integral, pid->i_gain) + dterm;
  155. return (signed int)fp_toint(result);
  156. }
  157. static inline void intel_pstate_busy_pid_reset(struct cpudata *cpu)
  158. {
  159. pid_p_gain_set(&cpu->pid, pid_params.p_gain_pct);
  160. pid_d_gain_set(&cpu->pid, pid_params.d_gain_pct);
  161. pid_i_gain_set(&cpu->pid, pid_params.i_gain_pct);
  162. pid_reset(&cpu->pid,
  163. pid_params.setpoint,
  164. 100,
  165. pid_params.deadband,
  166. 0);
  167. }
  168. static inline void intel_pstate_reset_all_pid(void)
  169. {
  170. unsigned int cpu;
  171. for_each_online_cpu(cpu) {
  172. if (all_cpu_data[cpu])
  173. intel_pstate_busy_pid_reset(all_cpu_data[cpu]);
  174. }
  175. }
  176. /************************** debugfs begin ************************/
  177. static int pid_param_set(void *data, u64 val)
  178. {
  179. *(u32 *)data = val;
  180. intel_pstate_reset_all_pid();
  181. return 0;
  182. }
  183. static int pid_param_get(void *data, u64 *val)
  184. {
  185. *val = *(u32 *)data;
  186. return 0;
  187. }
  188. DEFINE_SIMPLE_ATTRIBUTE(fops_pid_param, pid_param_get,
  189. pid_param_set, "%llu\n");
  190. struct pid_param {
  191. char *name;
  192. void *value;
  193. };
  194. static struct pid_param pid_files[] = {
  195. {"sample_rate_ms", &pid_params.sample_rate_ms},
  196. {"d_gain_pct", &pid_params.d_gain_pct},
  197. {"i_gain_pct", &pid_params.i_gain_pct},
  198. {"deadband", &pid_params.deadband},
  199. {"setpoint", &pid_params.setpoint},
  200. {"p_gain_pct", &pid_params.p_gain_pct},
  201. {NULL, NULL}
  202. };
  203. static struct dentry *debugfs_parent;
  204. static void intel_pstate_debug_expose_params(void)
  205. {
  206. int i = 0;
  207. debugfs_parent = debugfs_create_dir("pstate_snb", NULL);
  208. if (IS_ERR_OR_NULL(debugfs_parent))
  209. return;
  210. while (pid_files[i].name) {
  211. debugfs_create_file(pid_files[i].name, 0660,
  212. debugfs_parent, pid_files[i].value,
  213. &fops_pid_param);
  214. i++;
  215. }
  216. }
  217. /************************** debugfs end ************************/
  218. /************************** sysfs begin ************************/
  219. #define show_one(file_name, object) \
  220. static ssize_t show_##file_name \
  221. (struct kobject *kobj, struct attribute *attr, char *buf) \
  222. { \
  223. return sprintf(buf, "%u\n", limits.object); \
  224. }
  225. static ssize_t store_no_turbo(struct kobject *a, struct attribute *b,
  226. const char *buf, size_t count)
  227. {
  228. unsigned int input;
  229. int ret;
  230. ret = sscanf(buf, "%u", &input);
  231. if (ret != 1)
  232. return -EINVAL;
  233. limits.no_turbo = clamp_t(int, input, 0 , 1);
  234. return count;
  235. }
  236. static ssize_t store_max_perf_pct(struct kobject *a, struct attribute *b,
  237. const char *buf, size_t count)
  238. {
  239. unsigned int input;
  240. int ret;
  241. ret = sscanf(buf, "%u", &input);
  242. if (ret != 1)
  243. return -EINVAL;
  244. limits.max_sysfs_pct = clamp_t(int, input, 0 , 100);
  245. limits.max_perf_pct = min(limits.max_policy_pct, limits.max_sysfs_pct);
  246. limits.max_perf = div_fp(int_tofp(limits.max_perf_pct), int_tofp(100));
  247. return count;
  248. }
  249. static ssize_t store_min_perf_pct(struct kobject *a, struct attribute *b,
  250. const char *buf, size_t count)
  251. {
  252. unsigned int input;
  253. int ret;
  254. ret = sscanf(buf, "%u", &input);
  255. if (ret != 1)
  256. return -EINVAL;
  257. limits.min_perf_pct = clamp_t(int, input, 0 , 100);
  258. limits.min_perf = div_fp(int_tofp(limits.min_perf_pct), int_tofp(100));
  259. return count;
  260. }
  261. show_one(no_turbo, no_turbo);
  262. show_one(max_perf_pct, max_perf_pct);
  263. show_one(min_perf_pct, min_perf_pct);
  264. define_one_global_rw(no_turbo);
  265. define_one_global_rw(max_perf_pct);
  266. define_one_global_rw(min_perf_pct);
  267. static struct attribute *intel_pstate_attributes[] = {
  268. &no_turbo.attr,
  269. &max_perf_pct.attr,
  270. &min_perf_pct.attr,
  271. NULL
  272. };
  273. static struct attribute_group intel_pstate_attr_group = {
  274. .attrs = intel_pstate_attributes,
  275. };
  276. static struct kobject *intel_pstate_kobject;
  277. static void intel_pstate_sysfs_expose_params(void)
  278. {
  279. int rc;
  280. intel_pstate_kobject = kobject_create_and_add("intel_pstate",
  281. &cpu_subsys.dev_root->kobj);
  282. BUG_ON(!intel_pstate_kobject);
  283. rc = sysfs_create_group(intel_pstate_kobject,
  284. &intel_pstate_attr_group);
  285. BUG_ON(rc);
  286. }
  287. /************************** sysfs end ************************/
  288. static int byt_get_min_pstate(void)
  289. {
  290. u64 value;
  291. rdmsrl(BYT_RATIOS, value);
  292. return value & 0xFF;
  293. }
  294. static int byt_get_max_pstate(void)
  295. {
  296. u64 value;
  297. rdmsrl(BYT_RATIOS, value);
  298. return (value >> 16) & 0xFF;
  299. }
  300. static int core_get_min_pstate(void)
  301. {
  302. u64 value;
  303. rdmsrl(MSR_PLATFORM_INFO, value);
  304. return (value >> 40) & 0xFF;
  305. }
  306. static int core_get_max_pstate(void)
  307. {
  308. u64 value;
  309. rdmsrl(MSR_PLATFORM_INFO, value);
  310. return (value >> 8) & 0xFF;
  311. }
  312. static int core_get_turbo_pstate(void)
  313. {
  314. u64 value;
  315. int nont, ret;
  316. rdmsrl(MSR_NHM_TURBO_RATIO_LIMIT, value);
  317. nont = core_get_max_pstate();
  318. ret = ((value) & 255);
  319. if (ret <= nont)
  320. ret = nont;
  321. return ret;
  322. }
  323. static void core_set_pstate(int pstate)
  324. {
  325. u64 val;
  326. val = pstate << 8;
  327. if (limits.no_turbo)
  328. val |= (u64)1 << 32;
  329. wrmsrl(MSR_IA32_PERF_CTL, val);
  330. }
  331. static struct cpu_defaults core_params = {
  332. .pid_policy = {
  333. .sample_rate_ms = 10,
  334. .deadband = 0,
  335. .setpoint = 97,
  336. .p_gain_pct = 20,
  337. .d_gain_pct = 0,
  338. .i_gain_pct = 0,
  339. },
  340. .funcs = {
  341. .get_max = core_get_max_pstate,
  342. .get_min = core_get_min_pstate,
  343. .get_turbo = core_get_turbo_pstate,
  344. .set = core_set_pstate,
  345. },
  346. };
  347. static struct cpu_defaults byt_params = {
  348. .pid_policy = {
  349. .sample_rate_ms = 10,
  350. .deadband = 0,
  351. .setpoint = 97,
  352. .p_gain_pct = 14,
  353. .d_gain_pct = 0,
  354. .i_gain_pct = 4,
  355. },
  356. .funcs = {
  357. .get_max = byt_get_max_pstate,
  358. .get_min = byt_get_min_pstate,
  359. .get_turbo = byt_get_max_pstate,
  360. .set = core_set_pstate,
  361. },
  362. };
  363. static void intel_pstate_get_min_max(struct cpudata *cpu, int *min, int *max)
  364. {
  365. int max_perf = cpu->pstate.turbo_pstate;
  366. int max_perf_adj;
  367. int min_perf;
  368. if (limits.no_turbo)
  369. max_perf = cpu->pstate.max_pstate;
  370. max_perf_adj = fp_toint(mul_fp(int_tofp(max_perf), limits.max_perf));
  371. *max = clamp_t(int, max_perf_adj,
  372. cpu->pstate.min_pstate, cpu->pstate.turbo_pstate);
  373. min_perf = fp_toint(mul_fp(int_tofp(max_perf), limits.min_perf));
  374. *min = clamp_t(int, min_perf,
  375. cpu->pstate.min_pstate, max_perf);
  376. }
  377. static void intel_pstate_set_pstate(struct cpudata *cpu, int pstate)
  378. {
  379. int max_perf, min_perf;
  380. intel_pstate_get_min_max(cpu, &min_perf, &max_perf);
  381. pstate = clamp_t(int, pstate, min_perf, max_perf);
  382. if (pstate == cpu->pstate.current_pstate)
  383. return;
  384. trace_cpu_frequency(pstate * 100000, cpu->cpu);
  385. cpu->pstate.current_pstate = pstate;
  386. pstate_funcs.set(pstate);
  387. }
  388. static inline void intel_pstate_pstate_increase(struct cpudata *cpu, int steps)
  389. {
  390. int target;
  391. target = cpu->pstate.current_pstate + steps;
  392. intel_pstate_set_pstate(cpu, target);
  393. }
  394. static inline void intel_pstate_pstate_decrease(struct cpudata *cpu, int steps)
  395. {
  396. int target;
  397. target = cpu->pstate.current_pstate - steps;
  398. intel_pstate_set_pstate(cpu, target);
  399. }
  400. static void intel_pstate_get_cpu_pstates(struct cpudata *cpu)
  401. {
  402. sprintf(cpu->name, "Intel 2nd generation core");
  403. cpu->pstate.min_pstate = pstate_funcs.get_min();
  404. cpu->pstate.max_pstate = pstate_funcs.get_max();
  405. cpu->pstate.turbo_pstate = pstate_funcs.get_turbo();
  406. /*
  407. * goto max pstate so we don't slow up boot if we are built-in if we are
  408. * a module we will take care of it during normal operation
  409. */
  410. intel_pstate_set_pstate(cpu, cpu->pstate.max_pstate);
  411. }
  412. static inline void intel_pstate_calc_busy(struct cpudata *cpu,
  413. struct sample *sample)
  414. {
  415. u64 core_pct;
  416. core_pct = div64_u64(int_tofp(sample->aperf * 100),
  417. sample->mperf);
  418. sample->freq = fp_toint(cpu->pstate.max_pstate * core_pct * 1000);
  419. sample->core_pct_busy = core_pct;
  420. }
  421. static inline void intel_pstate_sample(struct cpudata *cpu)
  422. {
  423. u64 aperf, mperf;
  424. rdmsrl(MSR_IA32_APERF, aperf);
  425. rdmsrl(MSR_IA32_MPERF, mperf);
  426. cpu->sample_ptr = (cpu->sample_ptr + 1) % SAMPLE_COUNT;
  427. cpu->samples[cpu->sample_ptr].aperf = aperf;
  428. cpu->samples[cpu->sample_ptr].mperf = mperf;
  429. cpu->samples[cpu->sample_ptr].aperf -= cpu->prev_aperf;
  430. cpu->samples[cpu->sample_ptr].mperf -= cpu->prev_mperf;
  431. intel_pstate_calc_busy(cpu, &cpu->samples[cpu->sample_ptr]);
  432. cpu->prev_aperf = aperf;
  433. cpu->prev_mperf = mperf;
  434. }
  435. static inline void intel_pstate_set_sample_time(struct cpudata *cpu)
  436. {
  437. int sample_time, delay;
  438. sample_time = pid_params.sample_rate_ms;
  439. delay = msecs_to_jiffies(sample_time);
  440. mod_timer_pinned(&cpu->timer, jiffies + delay);
  441. }
  442. static inline int32_t intel_pstate_get_scaled_busy(struct cpudata *cpu)
  443. {
  444. int32_t core_busy, max_pstate, current_pstate;
  445. core_busy = cpu->samples[cpu->sample_ptr].core_pct_busy;
  446. max_pstate = int_tofp(cpu->pstate.max_pstate);
  447. current_pstate = int_tofp(cpu->pstate.current_pstate);
  448. return mul_fp(core_busy, div_fp(max_pstate, current_pstate));
  449. }
  450. static inline void intel_pstate_adjust_busy_pstate(struct cpudata *cpu)
  451. {
  452. int32_t busy_scaled;
  453. struct _pid *pid;
  454. signed int ctl = 0;
  455. int steps;
  456. pid = &cpu->pid;
  457. busy_scaled = intel_pstate_get_scaled_busy(cpu);
  458. ctl = pid_calc(pid, busy_scaled);
  459. steps = abs(ctl);
  460. if (ctl < 0)
  461. intel_pstate_pstate_increase(cpu, steps);
  462. else
  463. intel_pstate_pstate_decrease(cpu, steps);
  464. }
  465. static void intel_pstate_timer_func(unsigned long __data)
  466. {
  467. struct cpudata *cpu = (struct cpudata *) __data;
  468. intel_pstate_sample(cpu);
  469. intel_pstate_adjust_busy_pstate(cpu);
  470. if (cpu->pstate.current_pstate == cpu->pstate.min_pstate) {
  471. cpu->min_pstate_count++;
  472. if (!(cpu->min_pstate_count % 5)) {
  473. intel_pstate_set_pstate(cpu, cpu->pstate.max_pstate);
  474. }
  475. } else
  476. cpu->min_pstate_count = 0;
  477. intel_pstate_set_sample_time(cpu);
  478. }
  479. #define ICPU(model, policy) \
  480. { X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, (unsigned long)&policy }
  481. static const struct x86_cpu_id intel_pstate_cpu_ids[] = {
  482. ICPU(0x2a, core_params),
  483. ICPU(0x2d, core_params),
  484. ICPU(0x37, byt_params),
  485. ICPU(0x3a, core_params),
  486. ICPU(0x3c, core_params),
  487. ICPU(0x3e, core_params),
  488. ICPU(0x3f, core_params),
  489. ICPU(0x45, core_params),
  490. ICPU(0x46, core_params),
  491. {}
  492. };
  493. MODULE_DEVICE_TABLE(x86cpu, intel_pstate_cpu_ids);
  494. static int intel_pstate_init_cpu(unsigned int cpunum)
  495. {
  496. const struct x86_cpu_id *id;
  497. struct cpudata *cpu;
  498. id = x86_match_cpu(intel_pstate_cpu_ids);
  499. if (!id)
  500. return -ENODEV;
  501. all_cpu_data[cpunum] = kzalloc(sizeof(struct cpudata), GFP_KERNEL);
  502. if (!all_cpu_data[cpunum])
  503. return -ENOMEM;
  504. cpu = all_cpu_data[cpunum];
  505. intel_pstate_get_cpu_pstates(cpu);
  506. cpu->cpu = cpunum;
  507. init_timer_deferrable(&cpu->timer);
  508. cpu->timer.function = intel_pstate_timer_func;
  509. cpu->timer.data =
  510. (unsigned long)cpu;
  511. cpu->timer.expires = jiffies + HZ/100;
  512. intel_pstate_busy_pid_reset(cpu);
  513. intel_pstate_sample(cpu);
  514. intel_pstate_set_pstate(cpu, cpu->pstate.max_pstate);
  515. add_timer_on(&cpu->timer, cpunum);
  516. pr_info("Intel pstate controlling: cpu %d\n", cpunum);
  517. return 0;
  518. }
  519. static unsigned int intel_pstate_get(unsigned int cpu_num)
  520. {
  521. struct sample *sample;
  522. struct cpudata *cpu;
  523. cpu = all_cpu_data[cpu_num];
  524. if (!cpu)
  525. return 0;
  526. sample = &cpu->samples[cpu->sample_ptr];
  527. return sample->freq;
  528. }
  529. static int intel_pstate_set_policy(struct cpufreq_policy *policy)
  530. {
  531. struct cpudata *cpu;
  532. cpu = all_cpu_data[policy->cpu];
  533. if (!policy->cpuinfo.max_freq)
  534. return -ENODEV;
  535. if (policy->policy == CPUFREQ_POLICY_PERFORMANCE) {
  536. limits.min_perf_pct = 100;
  537. limits.min_perf = int_tofp(1);
  538. limits.max_perf_pct = 100;
  539. limits.max_perf = int_tofp(1);
  540. limits.no_turbo = 0;
  541. return 0;
  542. }
  543. limits.min_perf_pct = (policy->min * 100) / policy->cpuinfo.max_freq;
  544. limits.min_perf_pct = clamp_t(int, limits.min_perf_pct, 0 , 100);
  545. limits.min_perf = div_fp(int_tofp(limits.min_perf_pct), int_tofp(100));
  546. limits.max_policy_pct = policy->max * 100 / policy->cpuinfo.max_freq;
  547. limits.max_policy_pct = clamp_t(int, limits.max_policy_pct, 0 , 100);
  548. limits.max_perf_pct = min(limits.max_policy_pct, limits.max_sysfs_pct);
  549. limits.max_perf = div_fp(int_tofp(limits.max_perf_pct), int_tofp(100));
  550. return 0;
  551. }
  552. static int intel_pstate_verify_policy(struct cpufreq_policy *policy)
  553. {
  554. cpufreq_verify_within_cpu_limits(policy);
  555. if ((policy->policy != CPUFREQ_POLICY_POWERSAVE) &&
  556. (policy->policy != CPUFREQ_POLICY_PERFORMANCE))
  557. return -EINVAL;
  558. return 0;
  559. }
  560. static int intel_pstate_cpu_exit(struct cpufreq_policy *policy)
  561. {
  562. int cpu = policy->cpu;
  563. del_timer(&all_cpu_data[cpu]->timer);
  564. kfree(all_cpu_data[cpu]);
  565. all_cpu_data[cpu] = NULL;
  566. return 0;
  567. }
  568. static int intel_pstate_cpu_init(struct cpufreq_policy *policy)
  569. {
  570. struct cpudata *cpu;
  571. int rc;
  572. rc = intel_pstate_init_cpu(policy->cpu);
  573. if (rc)
  574. return rc;
  575. cpu = all_cpu_data[policy->cpu];
  576. if (!limits.no_turbo &&
  577. limits.min_perf_pct == 100 && limits.max_perf_pct == 100)
  578. policy->policy = CPUFREQ_POLICY_PERFORMANCE;
  579. else
  580. policy->policy = CPUFREQ_POLICY_POWERSAVE;
  581. policy->min = cpu->pstate.min_pstate * 100000;
  582. policy->max = cpu->pstate.turbo_pstate * 100000;
  583. /* cpuinfo and default policy values */
  584. policy->cpuinfo.min_freq = cpu->pstate.min_pstate * 100000;
  585. policy->cpuinfo.max_freq = cpu->pstate.turbo_pstate * 100000;
  586. policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
  587. cpumask_set_cpu(policy->cpu, policy->cpus);
  588. return 0;
  589. }
  590. static struct cpufreq_driver intel_pstate_driver = {
  591. .flags = CPUFREQ_CONST_LOOPS,
  592. .verify = intel_pstate_verify_policy,
  593. .setpolicy = intel_pstate_set_policy,
  594. .get = intel_pstate_get,
  595. .init = intel_pstate_cpu_init,
  596. .exit = intel_pstate_cpu_exit,
  597. .name = "intel_pstate",
  598. };
  599. static int __initdata no_load;
  600. static int intel_pstate_msrs_not_valid(void)
  601. {
  602. /* Check that all the msr's we are using are valid. */
  603. u64 aperf, mperf, tmp;
  604. rdmsrl(MSR_IA32_APERF, aperf);
  605. rdmsrl(MSR_IA32_MPERF, mperf);
  606. if (!pstate_funcs.get_max() ||
  607. !pstate_funcs.get_min() ||
  608. !pstate_funcs.get_turbo())
  609. return -ENODEV;
  610. rdmsrl(MSR_IA32_APERF, tmp);
  611. if (!(tmp - aperf))
  612. return -ENODEV;
  613. rdmsrl(MSR_IA32_MPERF, tmp);
  614. if (!(tmp - mperf))
  615. return -ENODEV;
  616. return 0;
  617. }
  618. static void copy_pid_params(struct pstate_adjust_policy *policy)
  619. {
  620. pid_params.sample_rate_ms = policy->sample_rate_ms;
  621. pid_params.p_gain_pct = policy->p_gain_pct;
  622. pid_params.i_gain_pct = policy->i_gain_pct;
  623. pid_params.d_gain_pct = policy->d_gain_pct;
  624. pid_params.deadband = policy->deadband;
  625. pid_params.setpoint = policy->setpoint;
  626. }
  627. static void copy_cpu_funcs(struct pstate_funcs *funcs)
  628. {
  629. pstate_funcs.get_max = funcs->get_max;
  630. pstate_funcs.get_min = funcs->get_min;
  631. pstate_funcs.get_turbo = funcs->get_turbo;
  632. pstate_funcs.set = funcs->set;
  633. }
  634. #if IS_ENABLED(CONFIG_ACPI)
  635. #include <acpi/processor.h>
  636. static bool intel_pstate_no_acpi_pss(void)
  637. {
  638. int i;
  639. for_each_possible_cpu(i) {
  640. acpi_status status;
  641. union acpi_object *pss;
  642. struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
  643. struct acpi_processor *pr = per_cpu(processors, i);
  644. if (!pr)
  645. continue;
  646. status = acpi_evaluate_object(pr->handle, "_PSS", NULL, &buffer);
  647. if (ACPI_FAILURE(status))
  648. continue;
  649. pss = buffer.pointer;
  650. if (pss && pss->type == ACPI_TYPE_PACKAGE) {
  651. kfree(pss);
  652. return false;
  653. }
  654. kfree(pss);
  655. }
  656. return true;
  657. }
  658. struct hw_vendor_info {
  659. u16 valid;
  660. char oem_id[ACPI_OEM_ID_SIZE];
  661. char oem_table_id[ACPI_OEM_TABLE_ID_SIZE];
  662. };
  663. /* Hardware vendor-specific info that has its own power management modes */
  664. static struct hw_vendor_info vendor_info[] = {
  665. {1, "HP ", "ProLiant"},
  666. {0, "", ""},
  667. };
  668. static bool intel_pstate_platform_pwr_mgmt_exists(void)
  669. {
  670. struct acpi_table_header hdr;
  671. struct hw_vendor_info *v_info;
  672. if (acpi_disabled
  673. || ACPI_FAILURE(acpi_get_table_header(ACPI_SIG_FADT, 0, &hdr)))
  674. return false;
  675. for (v_info = vendor_info; v_info->valid; v_info++) {
  676. if (!strncmp(hdr.oem_id, v_info->oem_id, ACPI_OEM_ID_SIZE)
  677. && !strncmp(hdr.oem_table_id, v_info->oem_table_id, ACPI_OEM_TABLE_ID_SIZE)
  678. && intel_pstate_no_acpi_pss())
  679. return true;
  680. }
  681. return false;
  682. }
  683. #else /* CONFIG_ACPI not enabled */
  684. static inline bool intel_pstate_platform_pwr_mgmt_exists(void) { return false; }
  685. #endif /* CONFIG_ACPI */
  686. static int __init intel_pstate_init(void)
  687. {
  688. int cpu, rc = 0;
  689. const struct x86_cpu_id *id;
  690. struct cpu_defaults *cpu_info;
  691. if (no_load)
  692. return -ENODEV;
  693. id = x86_match_cpu(intel_pstate_cpu_ids);
  694. if (!id)
  695. return -ENODEV;
  696. /*
  697. * The Intel pstate driver will be ignored if the platform
  698. * firmware has its own power management modes.
  699. */
  700. if (intel_pstate_platform_pwr_mgmt_exists())
  701. return -ENODEV;
  702. cpu_info = (struct cpu_defaults *)id->driver_data;
  703. copy_pid_params(&cpu_info->pid_policy);
  704. copy_cpu_funcs(&cpu_info->funcs);
  705. if (intel_pstate_msrs_not_valid())
  706. return -ENODEV;
  707. pr_info("Intel P-state driver initializing.\n");
  708. all_cpu_data = vzalloc(sizeof(void *) * num_possible_cpus());
  709. if (!all_cpu_data)
  710. return -ENOMEM;
  711. rc = cpufreq_register_driver(&intel_pstate_driver);
  712. if (rc)
  713. goto out;
  714. intel_pstate_debug_expose_params();
  715. intel_pstate_sysfs_expose_params();
  716. return rc;
  717. out:
  718. get_online_cpus();
  719. for_each_online_cpu(cpu) {
  720. if (all_cpu_data[cpu]) {
  721. del_timer_sync(&all_cpu_data[cpu]->timer);
  722. kfree(all_cpu_data[cpu]);
  723. }
  724. }
  725. put_online_cpus();
  726. vfree(all_cpu_data);
  727. return -ENODEV;
  728. }
  729. device_initcall(intel_pstate_init);
  730. static int __init intel_pstate_setup(char *str)
  731. {
  732. if (!str)
  733. return -EINVAL;
  734. if (!strcmp(str, "disable"))
  735. no_load = 1;
  736. return 0;
  737. }
  738. early_param("intel_pstate", intel_pstate_setup);
  739. MODULE_AUTHOR("Dirk Brandewie <dirk.j.brandewie@intel.com>");
  740. MODULE_DESCRIPTION("'intel_pstate' - P state driver Intel Core processors");
  741. MODULE_LICENSE("GPL");