spi_bitbang.h 4.3 KB

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  1. #ifndef __SPI_BITBANG_H
  2. #define __SPI_BITBANG_H
  3. /*
  4. * Mix this utility code with some glue code to get one of several types of
  5. * simple SPI master driver. Two do polled word-at-a-time I/O:
  6. *
  7. * - GPIO/parport bitbangers. Provide chipselect() and txrx_word[](),
  8. * expanding the per-word routines from the inline templates below.
  9. *
  10. * - Drivers for controllers resembling bare shift registers. Provide
  11. * chipselect() and txrx_word[](), with custom setup()/cleanup() methods
  12. * that use your controller's clock and chipselect registers.
  13. *
  14. * Some hardware works well with requests at spi_transfer scope:
  15. *
  16. * - Drivers leveraging smarter hardware, with fifos or DMA; or for half
  17. * duplex (MicroWire) controllers. Provide chipslect() and txrx_bufs(),
  18. * and custom setup()/cleanup() methods.
  19. */
  20. struct spi_bitbang {
  21. struct workqueue_struct *workqueue;
  22. struct work_struct work;
  23. spinlock_t lock;
  24. struct list_head queue;
  25. u8 busy;
  26. u8 shutdown;
  27. u8 use_dma;
  28. struct spi_master *master;
  29. /* setup_transfer() changes clock and/or wordsize to match settings
  30. * for this transfer; zeroes restore defaults from spi_device.
  31. */
  32. int (*setup_transfer)(struct spi_device *spi,
  33. struct spi_transfer *t);
  34. void (*chipselect)(struct spi_device *spi, int is_on);
  35. #define BITBANG_CS_ACTIVE 1 /* normally nCS, active low */
  36. #define BITBANG_CS_INACTIVE 0
  37. /* txrx_bufs() may handle dma mapping for transfers that don't
  38. * already have one (transfer.{tx,rx}_dma is zero), or use PIO
  39. */
  40. int (*txrx_bufs)(struct spi_device *spi, struct spi_transfer *t);
  41. /* txrx_word[SPI_MODE_*]() just looks like a shift register */
  42. u32 (*txrx_word[4])(struct spi_device *spi,
  43. unsigned nsecs,
  44. u32 word, u8 bits);
  45. };
  46. /* you can call these default bitbang->master methods from your custom
  47. * methods, if you like.
  48. */
  49. extern int spi_bitbang_setup(struct spi_device *spi);
  50. extern void spi_bitbang_cleanup(const struct spi_device *spi);
  51. extern int spi_bitbang_transfer(struct spi_device *spi, struct spi_message *m);
  52. extern int spi_bitbang_setup_transfer(struct spi_device *spi,
  53. struct spi_transfer *t);
  54. /* start or stop queue processing */
  55. extern int spi_bitbang_start(struct spi_bitbang *spi);
  56. extern int spi_bitbang_stop(struct spi_bitbang *spi);
  57. #endif /* __SPI_BITBANG_H */
  58. /*-------------------------------------------------------------------------*/
  59. #ifdef EXPAND_BITBANG_TXRX
  60. /*
  61. * The code that knows what GPIO pins do what should have declared four
  62. * functions, ideally as inlines, before #defining EXPAND_BITBANG_TXRX
  63. * and including this header:
  64. *
  65. * void setsck(struct spi_device *, int is_on);
  66. * void setmosi(struct spi_device *, int is_on);
  67. * int getmiso(struct spi_device *);
  68. * void spidelay(unsigned);
  69. *
  70. * A non-inlined routine would call bitbang_txrx_*() routines. The
  71. * main loop could easily compile down to a handful of instructions,
  72. * especially if the delay is a NOP (to run at peak speed).
  73. *
  74. * Since this is software, the timings may not be exactly what your board's
  75. * chips need ... there may be several reasons you'd need to tweak timings
  76. * in these routines, not just make to make it faster or slower to match a
  77. * particular CPU clock rate.
  78. */
  79. static inline u32
  80. bitbang_txrx_be_cpha0(struct spi_device *spi,
  81. unsigned nsecs, unsigned cpol,
  82. u32 word, u8 bits)
  83. {
  84. /* if (cpol == 0) this is SPI_MODE_0; else this is SPI_MODE_2 */
  85. /* clock starts at inactive polarity */
  86. for (word <<= (32 - bits); likely(bits); bits--) {
  87. /* setup MSB (to slave) on trailing edge */
  88. setmosi(spi, word & (1 << 31));
  89. spidelay(nsecs); /* T(setup) */
  90. setsck(spi, !cpol);
  91. spidelay(nsecs);
  92. /* sample MSB (from slave) on leading edge */
  93. word <<= 1;
  94. word |= getmiso(spi);
  95. setsck(spi, cpol);
  96. }
  97. return word;
  98. }
  99. static inline u32
  100. bitbang_txrx_be_cpha1(struct spi_device *spi,
  101. unsigned nsecs, unsigned cpol,
  102. u32 word, u8 bits)
  103. {
  104. /* if (cpol == 0) this is SPI_MODE_1; else this is SPI_MODE_3 */
  105. /* clock starts at inactive polarity */
  106. for (word <<= (32 - bits); likely(bits); bits--) {
  107. /* setup MSB (to slave) on leading edge */
  108. setsck(spi, !cpol);
  109. setmosi(spi, word & (1 << 31));
  110. spidelay(nsecs); /* T(setup) */
  111. setsck(spi, cpol);
  112. spidelay(nsecs);
  113. /* sample MSB (from slave) on trailing edge */
  114. word <<= 1;
  115. word |= getmiso(spi);
  116. }
  117. return word;
  118. }
  119. #endif /* EXPAND_BITBANG_TXRX */