dmatest.c 21 KB

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  1. /*
  2. * DMA Engine test module
  3. *
  4. * Copyright (C) 2007 Atmel Corporation
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/delay.h>
  11. #include <linux/dma-mapping.h>
  12. #include <linux/dmaengine.h>
  13. #include <linux/freezer.h>
  14. #include <linux/init.h>
  15. #include <linux/kthread.h>
  16. #include <linux/module.h>
  17. #include <linux/moduleparam.h>
  18. #include <linux/random.h>
  19. #include <linux/slab.h>
  20. #include <linux/wait.h>
  21. static unsigned int test_buf_size = 16384;
  22. module_param(test_buf_size, uint, S_IRUGO);
  23. MODULE_PARM_DESC(test_buf_size, "Size of the memcpy test buffer");
  24. static char test_channel[20];
  25. module_param_string(channel, test_channel, sizeof(test_channel), S_IRUGO);
  26. MODULE_PARM_DESC(channel, "Bus ID of the channel to test (default: any)");
  27. static char test_device[20];
  28. module_param_string(device, test_device, sizeof(test_device), S_IRUGO);
  29. MODULE_PARM_DESC(device, "Bus ID of the DMA Engine to test (default: any)");
  30. static unsigned int threads_per_chan = 1;
  31. module_param(threads_per_chan, uint, S_IRUGO);
  32. MODULE_PARM_DESC(threads_per_chan,
  33. "Number of threads to start per channel (default: 1)");
  34. static unsigned int max_channels;
  35. module_param(max_channels, uint, S_IRUGO);
  36. MODULE_PARM_DESC(max_channels,
  37. "Maximum number of channels to use (default: all)");
  38. static unsigned int iterations;
  39. module_param(iterations, uint, S_IRUGO);
  40. MODULE_PARM_DESC(iterations,
  41. "Iterations before stopping test (default: infinite)");
  42. static unsigned int xor_sources = 3;
  43. module_param(xor_sources, uint, S_IRUGO);
  44. MODULE_PARM_DESC(xor_sources,
  45. "Number of xor source buffers (default: 3)");
  46. static unsigned int pq_sources = 3;
  47. module_param(pq_sources, uint, S_IRUGO);
  48. MODULE_PARM_DESC(pq_sources,
  49. "Number of p+q source buffers (default: 3)");
  50. static int timeout = 3000;
  51. module_param(timeout, uint, S_IRUGO);
  52. MODULE_PARM_DESC(timeout, "Transfer Timeout in msec (default: 3000), "
  53. "Pass -1 for infinite timeout");
  54. /*
  55. * Initialization patterns. All bytes in the source buffer has bit 7
  56. * set, all bytes in the destination buffer has bit 7 cleared.
  57. *
  58. * Bit 6 is set for all bytes which are to be copied by the DMA
  59. * engine. Bit 5 is set for all bytes which are to be overwritten by
  60. * the DMA engine.
  61. *
  62. * The remaining bits are the inverse of a counter which increments by
  63. * one for each byte address.
  64. */
  65. #define PATTERN_SRC 0x80
  66. #define PATTERN_DST 0x00
  67. #define PATTERN_COPY 0x40
  68. #define PATTERN_OVERWRITE 0x20
  69. #define PATTERN_COUNT_MASK 0x1f
  70. struct dmatest_info;
  71. struct dmatest_thread {
  72. struct list_head node;
  73. struct dmatest_info *info;
  74. struct task_struct *task;
  75. struct dma_chan *chan;
  76. u8 **srcs;
  77. u8 **dsts;
  78. enum dma_transaction_type type;
  79. };
  80. struct dmatest_chan {
  81. struct list_head node;
  82. struct dma_chan *chan;
  83. struct list_head threads;
  84. };
  85. /**
  86. * struct dmatest_params - test parameters.
  87. * @buf_size: size of the memcpy test buffer
  88. * @channel: bus ID of the channel to test
  89. * @device: bus ID of the DMA Engine to test
  90. * @threads_per_chan: number of threads to start per channel
  91. * @max_channels: maximum number of channels to use
  92. * @iterations: iterations before stopping test
  93. * @xor_sources: number of xor source buffers
  94. * @pq_sources: number of p+q source buffers
  95. * @timeout: transfer timeout in msec, -1 for infinite timeout
  96. */
  97. struct dmatest_params {
  98. unsigned int buf_size;
  99. char channel[20];
  100. char device[20];
  101. unsigned int threads_per_chan;
  102. unsigned int max_channels;
  103. unsigned int iterations;
  104. unsigned int xor_sources;
  105. unsigned int pq_sources;
  106. int timeout;
  107. };
  108. /**
  109. * struct dmatest_info - test information.
  110. * @params: test parameters
  111. */
  112. struct dmatest_info {
  113. /* Test parameters */
  114. struct dmatest_params params;
  115. /* Internal state */
  116. struct list_head channels;
  117. unsigned int nr_channels;
  118. };
  119. static struct dmatest_info test_info;
  120. static bool dmatest_match_channel(struct dmatest_params *params,
  121. struct dma_chan *chan)
  122. {
  123. if (params->channel[0] == '\0')
  124. return true;
  125. return strcmp(dma_chan_name(chan), params->channel) == 0;
  126. }
  127. static bool dmatest_match_device(struct dmatest_params *params,
  128. struct dma_device *device)
  129. {
  130. if (params->device[0] == '\0')
  131. return true;
  132. return strcmp(dev_name(device->dev), params->device) == 0;
  133. }
  134. static unsigned long dmatest_random(void)
  135. {
  136. unsigned long buf;
  137. get_random_bytes(&buf, sizeof(buf));
  138. return buf;
  139. }
  140. static void dmatest_init_srcs(u8 **bufs, unsigned int start, unsigned int len,
  141. unsigned int buf_size)
  142. {
  143. unsigned int i;
  144. u8 *buf;
  145. for (; (buf = *bufs); bufs++) {
  146. for (i = 0; i < start; i++)
  147. buf[i] = PATTERN_SRC | (~i & PATTERN_COUNT_MASK);
  148. for ( ; i < start + len; i++)
  149. buf[i] = PATTERN_SRC | PATTERN_COPY
  150. | (~i & PATTERN_COUNT_MASK);
  151. for ( ; i < buf_size; i++)
  152. buf[i] = PATTERN_SRC | (~i & PATTERN_COUNT_MASK);
  153. buf++;
  154. }
  155. }
  156. static void dmatest_init_dsts(u8 **bufs, unsigned int start, unsigned int len,
  157. unsigned int buf_size)
  158. {
  159. unsigned int i;
  160. u8 *buf;
  161. for (; (buf = *bufs); bufs++) {
  162. for (i = 0; i < start; i++)
  163. buf[i] = PATTERN_DST | (~i & PATTERN_COUNT_MASK);
  164. for ( ; i < start + len; i++)
  165. buf[i] = PATTERN_DST | PATTERN_OVERWRITE
  166. | (~i & PATTERN_COUNT_MASK);
  167. for ( ; i < buf_size; i++)
  168. buf[i] = PATTERN_DST | (~i & PATTERN_COUNT_MASK);
  169. }
  170. }
  171. static void dmatest_mismatch(u8 actual, u8 pattern, unsigned int index,
  172. unsigned int counter, bool is_srcbuf)
  173. {
  174. u8 diff = actual ^ pattern;
  175. u8 expected = pattern | (~counter & PATTERN_COUNT_MASK);
  176. const char *thread_name = current->comm;
  177. if (is_srcbuf)
  178. pr_warning("%s: srcbuf[0x%x] overwritten!"
  179. " Expected %02x, got %02x\n",
  180. thread_name, index, expected, actual);
  181. else if ((pattern & PATTERN_COPY)
  182. && (diff & (PATTERN_COPY | PATTERN_OVERWRITE)))
  183. pr_warning("%s: dstbuf[0x%x] not copied!"
  184. " Expected %02x, got %02x\n",
  185. thread_name, index, expected, actual);
  186. else if (diff & PATTERN_SRC)
  187. pr_warning("%s: dstbuf[0x%x] was copied!"
  188. " Expected %02x, got %02x\n",
  189. thread_name, index, expected, actual);
  190. else
  191. pr_warning("%s: dstbuf[0x%x] mismatch!"
  192. " Expected %02x, got %02x\n",
  193. thread_name, index, expected, actual);
  194. }
  195. static unsigned int dmatest_verify(u8 **bufs, unsigned int start,
  196. unsigned int end, unsigned int counter, u8 pattern,
  197. bool is_srcbuf)
  198. {
  199. unsigned int i;
  200. unsigned int error_count = 0;
  201. u8 actual;
  202. u8 expected;
  203. u8 *buf;
  204. unsigned int counter_orig = counter;
  205. for (; (buf = *bufs); bufs++) {
  206. counter = counter_orig;
  207. for (i = start; i < end; i++) {
  208. actual = buf[i];
  209. expected = pattern | (~counter & PATTERN_COUNT_MASK);
  210. if (actual != expected) {
  211. if (error_count < 32)
  212. dmatest_mismatch(actual, pattern, i,
  213. counter, is_srcbuf);
  214. error_count++;
  215. }
  216. counter++;
  217. }
  218. }
  219. if (error_count > 32)
  220. pr_warning("%s: %u errors suppressed\n",
  221. current->comm, error_count - 32);
  222. return error_count;
  223. }
  224. /* poor man's completion - we want to use wait_event_freezable() on it */
  225. struct dmatest_done {
  226. bool done;
  227. wait_queue_head_t *wait;
  228. };
  229. static void dmatest_callback(void *arg)
  230. {
  231. struct dmatest_done *done = arg;
  232. done->done = true;
  233. wake_up_all(done->wait);
  234. }
  235. static inline void unmap_src(struct device *dev, dma_addr_t *addr, size_t len,
  236. unsigned int count)
  237. {
  238. while (count--)
  239. dma_unmap_single(dev, addr[count], len, DMA_TO_DEVICE);
  240. }
  241. static inline void unmap_dst(struct device *dev, dma_addr_t *addr, size_t len,
  242. unsigned int count)
  243. {
  244. while (count--)
  245. dma_unmap_single(dev, addr[count], len, DMA_BIDIRECTIONAL);
  246. }
  247. static unsigned int min_odd(unsigned int x, unsigned int y)
  248. {
  249. unsigned int val = min(x, y);
  250. return val % 2 ? val : val - 1;
  251. }
  252. /*
  253. * This function repeatedly tests DMA transfers of various lengths and
  254. * offsets for a given operation type until it is told to exit by
  255. * kthread_stop(). There may be multiple threads running this function
  256. * in parallel for a single channel, and there may be multiple channels
  257. * being tested in parallel.
  258. *
  259. * Before each test, the source and destination buffer is initialized
  260. * with a known pattern. This pattern is different depending on
  261. * whether it's in an area which is supposed to be copied or
  262. * overwritten, and different in the source and destination buffers.
  263. * So if the DMA engine doesn't copy exactly what we tell it to copy,
  264. * we'll notice.
  265. */
  266. static int dmatest_func(void *data)
  267. {
  268. DECLARE_WAIT_QUEUE_HEAD_ONSTACK(done_wait);
  269. struct dmatest_thread *thread = data;
  270. struct dmatest_done done = { .wait = &done_wait };
  271. struct dmatest_info *info;
  272. struct dmatest_params *params;
  273. struct dma_chan *chan;
  274. struct dma_device *dev;
  275. const char *thread_name;
  276. unsigned int src_off, dst_off, len;
  277. unsigned int error_count;
  278. unsigned int failed_tests = 0;
  279. unsigned int total_tests = 0;
  280. dma_cookie_t cookie;
  281. enum dma_status status;
  282. enum dma_ctrl_flags flags;
  283. u8 *pq_coefs = NULL;
  284. int ret;
  285. int src_cnt;
  286. int dst_cnt;
  287. int i;
  288. thread_name = current->comm;
  289. set_freezable();
  290. ret = -ENOMEM;
  291. smp_rmb();
  292. info = thread->info;
  293. params = &info->params;
  294. chan = thread->chan;
  295. dev = chan->device;
  296. if (thread->type == DMA_MEMCPY)
  297. src_cnt = dst_cnt = 1;
  298. else if (thread->type == DMA_XOR) {
  299. /* force odd to ensure dst = src */
  300. src_cnt = min_odd(params->xor_sources | 1, dev->max_xor);
  301. dst_cnt = 1;
  302. } else if (thread->type == DMA_PQ) {
  303. /* force odd to ensure dst = src */
  304. src_cnt = min_odd(params->pq_sources | 1, dma_maxpq(dev, 0));
  305. dst_cnt = 2;
  306. pq_coefs = kmalloc(params->pq_sources+1, GFP_KERNEL);
  307. if (!pq_coefs)
  308. goto err_thread_type;
  309. for (i = 0; i < src_cnt; i++)
  310. pq_coefs[i] = 1;
  311. } else
  312. goto err_thread_type;
  313. thread->srcs = kcalloc(src_cnt+1, sizeof(u8 *), GFP_KERNEL);
  314. if (!thread->srcs)
  315. goto err_srcs;
  316. for (i = 0; i < src_cnt; i++) {
  317. thread->srcs[i] = kmalloc(params->buf_size, GFP_KERNEL);
  318. if (!thread->srcs[i])
  319. goto err_srcbuf;
  320. }
  321. thread->srcs[i] = NULL;
  322. thread->dsts = kcalloc(dst_cnt+1, sizeof(u8 *), GFP_KERNEL);
  323. if (!thread->dsts)
  324. goto err_dsts;
  325. for (i = 0; i < dst_cnt; i++) {
  326. thread->dsts[i] = kmalloc(params->buf_size, GFP_KERNEL);
  327. if (!thread->dsts[i])
  328. goto err_dstbuf;
  329. }
  330. thread->dsts[i] = NULL;
  331. set_user_nice(current, 10);
  332. /*
  333. * src buffers are freed by the DMAEngine code with dma_unmap_single()
  334. * dst buffers are freed by ourselves below
  335. */
  336. flags = DMA_CTRL_ACK | DMA_PREP_INTERRUPT
  337. | DMA_COMPL_SKIP_DEST_UNMAP | DMA_COMPL_SRC_UNMAP_SINGLE;
  338. while (!kthread_should_stop()
  339. && !(params->iterations && total_tests >= params->iterations)) {
  340. struct dma_async_tx_descriptor *tx = NULL;
  341. dma_addr_t dma_srcs[src_cnt];
  342. dma_addr_t dma_dsts[dst_cnt];
  343. u8 align = 0;
  344. total_tests++;
  345. /* honor alignment restrictions */
  346. if (thread->type == DMA_MEMCPY)
  347. align = dev->copy_align;
  348. else if (thread->type == DMA_XOR)
  349. align = dev->xor_align;
  350. else if (thread->type == DMA_PQ)
  351. align = dev->pq_align;
  352. if (1 << align > params->buf_size) {
  353. pr_err("%u-byte buffer too small for %d-byte alignment\n",
  354. params->buf_size, 1 << align);
  355. break;
  356. }
  357. len = dmatest_random() % params->buf_size + 1;
  358. len = (len >> align) << align;
  359. if (!len)
  360. len = 1 << align;
  361. src_off = dmatest_random() % (params->buf_size - len + 1);
  362. dst_off = dmatest_random() % (params->buf_size - len + 1);
  363. src_off = (src_off >> align) << align;
  364. dst_off = (dst_off >> align) << align;
  365. dmatest_init_srcs(thread->srcs, src_off, len, params->buf_size);
  366. dmatest_init_dsts(thread->dsts, dst_off, len, params->buf_size);
  367. for (i = 0; i < src_cnt; i++) {
  368. u8 *buf = thread->srcs[i] + src_off;
  369. dma_srcs[i] = dma_map_single(dev->dev, buf, len,
  370. DMA_TO_DEVICE);
  371. ret = dma_mapping_error(dev->dev, dma_srcs[i]);
  372. if (ret) {
  373. unmap_src(dev->dev, dma_srcs, len, i);
  374. pr_warn("%s: #%u: mapping error %d with "
  375. "src_off=0x%x len=0x%x\n",
  376. thread_name, total_tests - 1, ret,
  377. src_off, len);
  378. failed_tests++;
  379. continue;
  380. }
  381. }
  382. /* map with DMA_BIDIRECTIONAL to force writeback/invalidate */
  383. for (i = 0; i < dst_cnt; i++) {
  384. dma_dsts[i] = dma_map_single(dev->dev, thread->dsts[i],
  385. params->buf_size,
  386. DMA_BIDIRECTIONAL);
  387. ret = dma_mapping_error(dev->dev, dma_dsts[i]);
  388. if (ret) {
  389. unmap_src(dev->dev, dma_srcs, len, src_cnt);
  390. unmap_dst(dev->dev, dma_dsts, params->buf_size,
  391. i);
  392. pr_warn("%s: #%u: mapping error %d with "
  393. "dst_off=0x%x len=0x%x\n",
  394. thread_name, total_tests - 1, ret,
  395. dst_off, params->buf_size);
  396. failed_tests++;
  397. continue;
  398. }
  399. }
  400. if (thread->type == DMA_MEMCPY)
  401. tx = dev->device_prep_dma_memcpy(chan,
  402. dma_dsts[0] + dst_off,
  403. dma_srcs[0], len,
  404. flags);
  405. else if (thread->type == DMA_XOR)
  406. tx = dev->device_prep_dma_xor(chan,
  407. dma_dsts[0] + dst_off,
  408. dma_srcs, src_cnt,
  409. len, flags);
  410. else if (thread->type == DMA_PQ) {
  411. dma_addr_t dma_pq[dst_cnt];
  412. for (i = 0; i < dst_cnt; i++)
  413. dma_pq[i] = dma_dsts[i] + dst_off;
  414. tx = dev->device_prep_dma_pq(chan, dma_pq, dma_srcs,
  415. src_cnt, pq_coefs,
  416. len, flags);
  417. }
  418. if (!tx) {
  419. unmap_src(dev->dev, dma_srcs, len, src_cnt);
  420. unmap_dst(dev->dev, dma_dsts, params->buf_size,
  421. dst_cnt);
  422. pr_warning("%s: #%u: prep error with src_off=0x%x "
  423. "dst_off=0x%x len=0x%x\n",
  424. thread_name, total_tests - 1,
  425. src_off, dst_off, len);
  426. msleep(100);
  427. failed_tests++;
  428. continue;
  429. }
  430. done.done = false;
  431. tx->callback = dmatest_callback;
  432. tx->callback_param = &done;
  433. cookie = tx->tx_submit(tx);
  434. if (dma_submit_error(cookie)) {
  435. pr_warning("%s: #%u: submit error %d with src_off=0x%x "
  436. "dst_off=0x%x len=0x%x\n",
  437. thread_name, total_tests - 1, cookie,
  438. src_off, dst_off, len);
  439. msleep(100);
  440. failed_tests++;
  441. continue;
  442. }
  443. dma_async_issue_pending(chan);
  444. wait_event_freezable_timeout(done_wait,
  445. done.done || kthread_should_stop(),
  446. msecs_to_jiffies(params->timeout));
  447. status = dma_async_is_tx_complete(chan, cookie, NULL, NULL);
  448. if (!done.done) {
  449. /*
  450. * We're leaving the timed out dma operation with
  451. * dangling pointer to done_wait. To make this
  452. * correct, we'll need to allocate wait_done for
  453. * each test iteration and perform "who's gonna
  454. * free it this time?" dancing. For now, just
  455. * leave it dangling.
  456. */
  457. pr_warning("%s: #%u: test timed out\n",
  458. thread_name, total_tests - 1);
  459. failed_tests++;
  460. continue;
  461. } else if (status != DMA_SUCCESS) {
  462. pr_warning("%s: #%u: got completion callback,"
  463. " but status is \'%s\'\n",
  464. thread_name, total_tests - 1,
  465. status == DMA_ERROR ? "error" : "in progress");
  466. failed_tests++;
  467. continue;
  468. }
  469. /* Unmap by myself (see DMA_COMPL_SKIP_DEST_UNMAP above) */
  470. unmap_dst(dev->dev, dma_dsts, params->buf_size, dst_cnt);
  471. error_count = 0;
  472. pr_debug("%s: verifying source buffer...\n", thread_name);
  473. error_count += dmatest_verify(thread->srcs, 0, src_off,
  474. 0, PATTERN_SRC, true);
  475. error_count += dmatest_verify(thread->srcs, src_off,
  476. src_off + len, src_off,
  477. PATTERN_SRC | PATTERN_COPY, true);
  478. error_count += dmatest_verify(thread->srcs, src_off + len,
  479. params->buf_size, src_off + len,
  480. PATTERN_SRC, true);
  481. pr_debug("%s: verifying dest buffer...\n",
  482. thread->task->comm);
  483. error_count += dmatest_verify(thread->dsts, 0, dst_off,
  484. 0, PATTERN_DST, false);
  485. error_count += dmatest_verify(thread->dsts, dst_off,
  486. dst_off + len, src_off,
  487. PATTERN_SRC | PATTERN_COPY, false);
  488. error_count += dmatest_verify(thread->dsts, dst_off + len,
  489. params->buf_size, dst_off + len,
  490. PATTERN_DST, false);
  491. if (error_count) {
  492. pr_warning("%s: #%u: %u errors with "
  493. "src_off=0x%x dst_off=0x%x len=0x%x\n",
  494. thread_name, total_tests - 1, error_count,
  495. src_off, dst_off, len);
  496. failed_tests++;
  497. } else {
  498. pr_debug("%s: #%u: No errors with "
  499. "src_off=0x%x dst_off=0x%x len=0x%x\n",
  500. thread_name, total_tests - 1,
  501. src_off, dst_off, len);
  502. }
  503. }
  504. ret = 0;
  505. for (i = 0; thread->dsts[i]; i++)
  506. kfree(thread->dsts[i]);
  507. err_dstbuf:
  508. kfree(thread->dsts);
  509. err_dsts:
  510. for (i = 0; thread->srcs[i]; i++)
  511. kfree(thread->srcs[i]);
  512. err_srcbuf:
  513. kfree(thread->srcs);
  514. err_srcs:
  515. kfree(pq_coefs);
  516. err_thread_type:
  517. pr_notice("%s: terminating after %u tests, %u failures (status %d)\n",
  518. thread_name, total_tests, failed_tests, ret);
  519. /* terminate all transfers on specified channels */
  520. if (ret)
  521. dmaengine_terminate_all(chan);
  522. if (params->iterations > 0)
  523. while (!kthread_should_stop()) {
  524. DECLARE_WAIT_QUEUE_HEAD_ONSTACK(wait_dmatest_exit);
  525. interruptible_sleep_on(&wait_dmatest_exit);
  526. }
  527. return ret;
  528. }
  529. static void dmatest_cleanup_channel(struct dmatest_chan *dtc)
  530. {
  531. struct dmatest_thread *thread;
  532. struct dmatest_thread *_thread;
  533. int ret;
  534. list_for_each_entry_safe(thread, _thread, &dtc->threads, node) {
  535. ret = kthread_stop(thread->task);
  536. pr_debug("dmatest: thread %s exited with status %d\n",
  537. thread->task->comm, ret);
  538. list_del(&thread->node);
  539. kfree(thread);
  540. }
  541. /* terminate all transfers on specified channels */
  542. dmaengine_terminate_all(dtc->chan);
  543. kfree(dtc);
  544. }
  545. static int dmatest_add_threads(struct dmatest_info *info,
  546. struct dmatest_chan *dtc, enum dma_transaction_type type)
  547. {
  548. struct dmatest_params *params = &info->params;
  549. struct dmatest_thread *thread;
  550. struct dma_chan *chan = dtc->chan;
  551. char *op;
  552. unsigned int i;
  553. if (type == DMA_MEMCPY)
  554. op = "copy";
  555. else if (type == DMA_XOR)
  556. op = "xor";
  557. else if (type == DMA_PQ)
  558. op = "pq";
  559. else
  560. return -EINVAL;
  561. for (i = 0; i < params->threads_per_chan; i++) {
  562. thread = kzalloc(sizeof(struct dmatest_thread), GFP_KERNEL);
  563. if (!thread) {
  564. pr_warning("dmatest: No memory for %s-%s%u\n",
  565. dma_chan_name(chan), op, i);
  566. break;
  567. }
  568. thread->info = info;
  569. thread->chan = dtc->chan;
  570. thread->type = type;
  571. smp_wmb();
  572. thread->task = kthread_run(dmatest_func, thread, "%s-%s%u",
  573. dma_chan_name(chan), op, i);
  574. if (IS_ERR(thread->task)) {
  575. pr_warning("dmatest: Failed to run thread %s-%s%u\n",
  576. dma_chan_name(chan), op, i);
  577. kfree(thread);
  578. break;
  579. }
  580. /* srcbuf and dstbuf are allocated by the thread itself */
  581. list_add_tail(&thread->node, &dtc->threads);
  582. }
  583. return i;
  584. }
  585. static int dmatest_add_channel(struct dmatest_info *info,
  586. struct dma_chan *chan)
  587. {
  588. struct dmatest_chan *dtc;
  589. struct dma_device *dma_dev = chan->device;
  590. unsigned int thread_count = 0;
  591. int cnt;
  592. dtc = kmalloc(sizeof(struct dmatest_chan), GFP_KERNEL);
  593. if (!dtc) {
  594. pr_warning("dmatest: No memory for %s\n", dma_chan_name(chan));
  595. return -ENOMEM;
  596. }
  597. dtc->chan = chan;
  598. INIT_LIST_HEAD(&dtc->threads);
  599. if (dma_has_cap(DMA_MEMCPY, dma_dev->cap_mask)) {
  600. cnt = dmatest_add_threads(info, dtc, DMA_MEMCPY);
  601. thread_count += cnt > 0 ? cnt : 0;
  602. }
  603. if (dma_has_cap(DMA_XOR, dma_dev->cap_mask)) {
  604. cnt = dmatest_add_threads(info, dtc, DMA_XOR);
  605. thread_count += cnt > 0 ? cnt : 0;
  606. }
  607. if (dma_has_cap(DMA_PQ, dma_dev->cap_mask)) {
  608. cnt = dmatest_add_threads(info, dtc, DMA_PQ);
  609. thread_count += cnt > 0 ? cnt : 0;
  610. }
  611. pr_info("dmatest: Started %u threads using %s\n",
  612. thread_count, dma_chan_name(chan));
  613. list_add_tail(&dtc->node, &info->channels);
  614. info->nr_channels++;
  615. return 0;
  616. }
  617. static bool filter(struct dma_chan *chan, void *param)
  618. {
  619. struct dmatest_params *params = param;
  620. if (!dmatest_match_channel(params, chan) ||
  621. !dmatest_match_device(params, chan->device))
  622. return false;
  623. else
  624. return true;
  625. }
  626. static int run_threaded_test(struct dmatest_info *info)
  627. {
  628. dma_cap_mask_t mask;
  629. struct dma_chan *chan;
  630. struct dmatest_params *params = &info->params;
  631. int err = 0;
  632. dma_cap_zero(mask);
  633. dma_cap_set(DMA_MEMCPY, mask);
  634. for (;;) {
  635. chan = dma_request_channel(mask, filter, params);
  636. if (chan) {
  637. err = dmatest_add_channel(info, chan);
  638. if (err) {
  639. dma_release_channel(chan);
  640. break; /* add_channel failed, punt */
  641. }
  642. } else
  643. break; /* no more channels available */
  644. if (params->max_channels &&
  645. info->nr_channels >= params->max_channels)
  646. break; /* we have all we need */
  647. }
  648. return err;
  649. }
  650. static void stop_threaded_test(struct dmatest_info *info)
  651. {
  652. struct dmatest_chan *dtc, *_dtc;
  653. struct dma_chan *chan;
  654. list_for_each_entry_safe(dtc, _dtc, &info->channels, node) {
  655. list_del(&dtc->node);
  656. chan = dtc->chan;
  657. dmatest_cleanup_channel(dtc);
  658. pr_debug("dmatest: dropped channel %s\n", dma_chan_name(chan));
  659. dma_release_channel(chan);
  660. }
  661. info->nr_channels = 0;
  662. }
  663. static int __init dmatest_init(void)
  664. {
  665. struct dmatest_info *info = &test_info;
  666. struct dmatest_params *params = &info->params;
  667. memset(info, 0, sizeof(*info));
  668. INIT_LIST_HEAD(&info->channels);
  669. /* Set default parameters */
  670. params->buf_size = test_buf_size;
  671. strlcpy(params->channel, test_channel, sizeof(params->channel));
  672. strlcpy(params->device, test_device, sizeof(params->device));
  673. params->threads_per_chan = threads_per_chan;
  674. params->max_channels = max_channels;
  675. params->iterations = iterations;
  676. params->xor_sources = xor_sources;
  677. params->pq_sources = pq_sources;
  678. params->timeout = timeout;
  679. return run_threaded_test(info);
  680. }
  681. /* when compiled-in wait for drivers to load first */
  682. late_initcall(dmatest_init);
  683. static void __exit dmatest_exit(void)
  684. {
  685. struct dmatest_info *info = &test_info;
  686. stop_threaded_test(info);
  687. }
  688. module_exit(dmatest_exit);
  689. MODULE_AUTHOR("Haavard Skinnemoen (Atmel)");
  690. MODULE_LICENSE("GPL v2");