generic.c 9.3 KB

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  1. /*
  2. * linux/arch/arm/mach-pxa/generic.c
  3. *
  4. * Author: Nicolas Pitre
  5. * Created: Jun 15, 2001
  6. * Copyright: MontaVista Software Inc.
  7. *
  8. * Code common to all PXA machines.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. *
  14. * Since this file should be linked before any other machine specific file,
  15. * the __initcall() here will be executed first. This serves as default
  16. * initialization stuff for PXA machines which can be overridden later if
  17. * need be.
  18. */
  19. #include <linux/module.h>
  20. #include <linux/kernel.h>
  21. #include <linux/init.h>
  22. #include <linux/delay.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/ioport.h>
  25. #include <linux/pm.h>
  26. #include <linux/string.h>
  27. #include <asm/hardware.h>
  28. #include <asm/irq.h>
  29. #include <asm/system.h>
  30. #include <asm/pgtable.h>
  31. #include <asm/mach/map.h>
  32. #include <asm/arch/pxa-regs.h>
  33. #include <asm/arch/gpio.h>
  34. #include <asm/arch/udc.h>
  35. #include <asm/arch/pxafb.h>
  36. #include <asm/arch/mmc.h>
  37. #include <asm/arch/irda.h>
  38. #include <asm/arch/i2c.h>
  39. #include "devices.h"
  40. #include "generic.h"
  41. /*
  42. * Get the clock frequency as reflected by CCCR and the turbo flag.
  43. * We assume these values have been applied via a fcs.
  44. * If info is not 0 we also display the current settings.
  45. */
  46. unsigned int get_clk_frequency_khz(int info)
  47. {
  48. if (cpu_is_pxa21x() || cpu_is_pxa25x())
  49. return pxa25x_get_clk_frequency_khz(info);
  50. else
  51. return pxa27x_get_clk_frequency_khz(info);
  52. }
  53. EXPORT_SYMBOL(get_clk_frequency_khz);
  54. /*
  55. * Return the current memory clock frequency in units of 10kHz
  56. */
  57. unsigned int get_memclk_frequency_10khz(void)
  58. {
  59. if (cpu_is_pxa21x() || cpu_is_pxa25x())
  60. return pxa25x_get_memclk_frequency_10khz();
  61. else
  62. return pxa27x_get_memclk_frequency_10khz();
  63. }
  64. EXPORT_SYMBOL(get_memclk_frequency_10khz);
  65. /*
  66. * Return the current LCD clock frequency in units of 10kHz
  67. */
  68. unsigned int get_lcdclk_frequency_10khz(void)
  69. {
  70. if (cpu_is_pxa21x() || cpu_is_pxa25x())
  71. return pxa25x_get_memclk_frequency_10khz();
  72. else
  73. return pxa27x_get_lcdclk_frequency_10khz();
  74. }
  75. EXPORT_SYMBOL(get_lcdclk_frequency_10khz);
  76. /*
  77. * Handy function to set GPIO alternate functions
  78. */
  79. int pxa_gpio_mode(int gpio_mode)
  80. {
  81. unsigned long flags;
  82. int gpio = gpio_mode & GPIO_MD_MASK_NR;
  83. int fn = (gpio_mode & GPIO_MD_MASK_FN) >> 8;
  84. int gafr;
  85. if (gpio > PXA_LAST_GPIO)
  86. return -EINVAL;
  87. local_irq_save(flags);
  88. if (gpio_mode & GPIO_DFLT_LOW)
  89. GPCR(gpio) = GPIO_bit(gpio);
  90. else if (gpio_mode & GPIO_DFLT_HIGH)
  91. GPSR(gpio) = GPIO_bit(gpio);
  92. if (gpio_mode & GPIO_MD_MASK_DIR)
  93. GPDR(gpio) |= GPIO_bit(gpio);
  94. else
  95. GPDR(gpio) &= ~GPIO_bit(gpio);
  96. gafr = GAFR(gpio) & ~(0x3 << (((gpio) & 0xf)*2));
  97. GAFR(gpio) = gafr | (fn << (((gpio) & 0xf)*2));
  98. local_irq_restore(flags);
  99. return 0;
  100. }
  101. EXPORT_SYMBOL(pxa_gpio_mode);
  102. /*
  103. * Return GPIO level
  104. */
  105. int pxa_gpio_get_value(unsigned gpio)
  106. {
  107. return __gpio_get_value(gpio);
  108. }
  109. EXPORT_SYMBOL(pxa_gpio_get_value);
  110. /*
  111. * Set output GPIO level
  112. */
  113. void pxa_gpio_set_value(unsigned gpio, int value)
  114. {
  115. __gpio_set_value(gpio, value);
  116. }
  117. EXPORT_SYMBOL(pxa_gpio_set_value);
  118. /*
  119. * Routine to safely enable or disable a clock in the CKEN
  120. */
  121. void pxa_set_cken(int clock, int enable)
  122. {
  123. unsigned long flags;
  124. local_irq_save(flags);
  125. if (enable)
  126. CKEN |= (1 << clock);
  127. else
  128. CKEN &= ~(1 << clock);
  129. local_irq_restore(flags);
  130. }
  131. EXPORT_SYMBOL(pxa_set_cken);
  132. /*
  133. * Intel PXA2xx internal register mapping.
  134. *
  135. * Note 1: not all PXA2xx variants implement all those addresses.
  136. *
  137. * Note 2: virtual 0xfffe0000-0xffffffff is reserved for the vector table
  138. * and cache flush area.
  139. */
  140. static struct map_desc standard_io_desc[] __initdata = {
  141. { /* Devs */
  142. .virtual = 0xf2000000,
  143. .pfn = __phys_to_pfn(0x40000000),
  144. .length = 0x02000000,
  145. .type = MT_DEVICE
  146. }, { /* LCD */
  147. .virtual = 0xf4000000,
  148. .pfn = __phys_to_pfn(0x44000000),
  149. .length = 0x00100000,
  150. .type = MT_DEVICE
  151. }, { /* Mem Ctl */
  152. .virtual = 0xf6000000,
  153. .pfn = __phys_to_pfn(0x48000000),
  154. .length = 0x00100000,
  155. .type = MT_DEVICE
  156. }, { /* USB host */
  157. .virtual = 0xf8000000,
  158. .pfn = __phys_to_pfn(0x4c000000),
  159. .length = 0x00100000,
  160. .type = MT_DEVICE
  161. }, { /* Camera */
  162. .virtual = 0xfa000000,
  163. .pfn = __phys_to_pfn(0x50000000),
  164. .length = 0x00100000,
  165. .type = MT_DEVICE
  166. }, { /* IMem ctl */
  167. .virtual = 0xfe000000,
  168. .pfn = __phys_to_pfn(0x58000000),
  169. .length = 0x00100000,
  170. .type = MT_DEVICE
  171. }, { /* UNCACHED_PHYS_0 */
  172. .virtual = 0xff000000,
  173. .pfn = __phys_to_pfn(0x00000000),
  174. .length = 0x00100000,
  175. .type = MT_DEVICE
  176. }
  177. };
  178. void __init pxa_map_io(void)
  179. {
  180. iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
  181. get_clk_frequency_khz(1);
  182. }
  183. static struct resource pxamci_resources[] = {
  184. [0] = {
  185. .start = 0x41100000,
  186. .end = 0x41100fff,
  187. .flags = IORESOURCE_MEM,
  188. },
  189. [1] = {
  190. .start = IRQ_MMC,
  191. .end = IRQ_MMC,
  192. .flags = IORESOURCE_IRQ,
  193. },
  194. };
  195. static u64 pxamci_dmamask = 0xffffffffUL;
  196. struct platform_device pxa_device_mci = {
  197. .name = "pxa2xx-mci",
  198. .id = -1,
  199. .dev = {
  200. .dma_mask = &pxamci_dmamask,
  201. .coherent_dma_mask = 0xffffffff,
  202. },
  203. .num_resources = ARRAY_SIZE(pxamci_resources),
  204. .resource = pxamci_resources,
  205. };
  206. void __init pxa_set_mci_info(struct pxamci_platform_data *info)
  207. {
  208. pxa_device_mci.dev.platform_data = info;
  209. }
  210. static struct pxa2xx_udc_mach_info pxa_udc_info;
  211. void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info)
  212. {
  213. memcpy(&pxa_udc_info, info, sizeof *info);
  214. }
  215. static struct resource pxa2xx_udc_resources[] = {
  216. [0] = {
  217. .start = 0x40600000,
  218. .end = 0x4060ffff,
  219. .flags = IORESOURCE_MEM,
  220. },
  221. [1] = {
  222. .start = IRQ_USB,
  223. .end = IRQ_USB,
  224. .flags = IORESOURCE_IRQ,
  225. },
  226. };
  227. static u64 udc_dma_mask = ~(u32)0;
  228. struct platform_device pxa_device_udc = {
  229. .name = "pxa2xx-udc",
  230. .id = -1,
  231. .resource = pxa2xx_udc_resources,
  232. .num_resources = ARRAY_SIZE(pxa2xx_udc_resources),
  233. .dev = {
  234. .platform_data = &pxa_udc_info,
  235. .dma_mask = &udc_dma_mask,
  236. }
  237. };
  238. static struct resource pxafb_resources[] = {
  239. [0] = {
  240. .start = 0x44000000,
  241. .end = 0x4400ffff,
  242. .flags = IORESOURCE_MEM,
  243. },
  244. [1] = {
  245. .start = IRQ_LCD,
  246. .end = IRQ_LCD,
  247. .flags = IORESOURCE_IRQ,
  248. },
  249. };
  250. static u64 fb_dma_mask = ~(u64)0;
  251. struct platform_device pxa_device_fb = {
  252. .name = "pxa2xx-fb",
  253. .id = -1,
  254. .dev = {
  255. .dma_mask = &fb_dma_mask,
  256. .coherent_dma_mask = 0xffffffff,
  257. },
  258. .num_resources = ARRAY_SIZE(pxafb_resources),
  259. .resource = pxafb_resources,
  260. };
  261. void __init set_pxa_fb_info(struct pxafb_mach_info *info)
  262. {
  263. pxa_device_fb.dev.platform_data = info;
  264. }
  265. void __init set_pxa_fb_parent(struct device *parent_dev)
  266. {
  267. pxa_device_fb.dev.parent = parent_dev;
  268. }
  269. static struct resource pxa_resource_ffuart[] = {
  270. {
  271. .start = __PREG(FFUART),
  272. .end = __PREG(FFUART) + 35,
  273. .flags = IORESOURCE_MEM,
  274. }, {
  275. .start = IRQ_FFUART,
  276. .end = IRQ_FFUART,
  277. .flags = IORESOURCE_IRQ,
  278. }
  279. };
  280. struct platform_device pxa_device_ffuart= {
  281. .name = "pxa2xx-uart",
  282. .id = 0,
  283. .resource = pxa_resource_ffuart,
  284. .num_resources = ARRAY_SIZE(pxa_resource_ffuart),
  285. };
  286. static struct resource pxa_resource_btuart[] = {
  287. {
  288. .start = __PREG(BTUART),
  289. .end = __PREG(BTUART) + 35,
  290. .flags = IORESOURCE_MEM,
  291. }, {
  292. .start = IRQ_BTUART,
  293. .end = IRQ_BTUART,
  294. .flags = IORESOURCE_IRQ,
  295. }
  296. };
  297. struct platform_device pxa_device_btuart = {
  298. .name = "pxa2xx-uart",
  299. .id = 1,
  300. .resource = pxa_resource_btuart,
  301. .num_resources = ARRAY_SIZE(pxa_resource_btuart),
  302. };
  303. static struct resource pxa_resource_stuart[] = {
  304. {
  305. .start = __PREG(STUART),
  306. .end = __PREG(STUART) + 35,
  307. .flags = IORESOURCE_MEM,
  308. }, {
  309. .start = IRQ_STUART,
  310. .end = IRQ_STUART,
  311. .flags = IORESOURCE_IRQ,
  312. }
  313. };
  314. struct platform_device pxa_device_stuart = {
  315. .name = "pxa2xx-uart",
  316. .id = 2,
  317. .resource = pxa_resource_stuart,
  318. .num_resources = ARRAY_SIZE(pxa_resource_stuart),
  319. };
  320. static struct resource pxa_resource_hwuart[] = {
  321. {
  322. .start = __PREG(HWUART),
  323. .end = __PREG(HWUART) + 47,
  324. .flags = IORESOURCE_MEM,
  325. }, {
  326. .start = IRQ_HWUART,
  327. .end = IRQ_HWUART,
  328. .flags = IORESOURCE_IRQ,
  329. }
  330. };
  331. struct platform_device pxa_device_hwuart = {
  332. .name = "pxa2xx-uart",
  333. .id = 3,
  334. .resource = pxa_resource_hwuart,
  335. .num_resources = ARRAY_SIZE(pxa_resource_hwuart),
  336. };
  337. static struct resource pxai2c_resources[] = {
  338. {
  339. .start = 0x40301680,
  340. .end = 0x403016a3,
  341. .flags = IORESOURCE_MEM,
  342. }, {
  343. .start = IRQ_I2C,
  344. .end = IRQ_I2C,
  345. .flags = IORESOURCE_IRQ,
  346. },
  347. };
  348. struct platform_device pxa_device_i2c = {
  349. .name = "pxa2xx-i2c",
  350. .id = 0,
  351. .resource = pxai2c_resources,
  352. .num_resources = ARRAY_SIZE(pxai2c_resources),
  353. };
  354. void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info)
  355. {
  356. pxa_device_i2c.dev.platform_data = info;
  357. }
  358. static struct resource pxai2s_resources[] = {
  359. {
  360. .start = 0x40400000,
  361. .end = 0x40400083,
  362. .flags = IORESOURCE_MEM,
  363. }, {
  364. .start = IRQ_I2S,
  365. .end = IRQ_I2S,
  366. .flags = IORESOURCE_IRQ,
  367. },
  368. };
  369. struct platform_device pxa_device_i2s = {
  370. .name = "pxa2xx-i2s",
  371. .id = -1,
  372. .resource = pxai2s_resources,
  373. .num_resources = ARRAY_SIZE(pxai2s_resources),
  374. };
  375. static u64 pxaficp_dmamask = ~(u32)0;
  376. struct platform_device pxa_device_ficp = {
  377. .name = "pxa2xx-ir",
  378. .id = -1,
  379. .dev = {
  380. .dma_mask = &pxaficp_dmamask,
  381. .coherent_dma_mask = 0xffffffff,
  382. },
  383. };
  384. void __init pxa_set_ficp_info(struct pxaficp_platform_data *info)
  385. {
  386. pxa_device_ficp.dev.platform_data = info;
  387. }
  388. struct platform_device pxa_device_rtc = {
  389. .name = "sa1100-rtc",
  390. .id = -1,
  391. };