au1550nd.c 11 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499
  1. /*
  2. * drivers/mtd/nand/au1550nd.c
  3. *
  4. * Copyright (C) 2004 Embedded Edge, LLC
  5. *
  6. * $Id: au1550nd.c,v 1.13 2005/11/07 11:14:30 gleixner Exp $
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. *
  12. */
  13. #include <linux/slab.h>
  14. #include <linux/init.h>
  15. #include <linux/module.h>
  16. #include <linux/mtd/mtd.h>
  17. #include <linux/mtd/nand.h>
  18. #include <linux/mtd/partitions.h>
  19. #include <linux/version.h>
  20. #include <asm/io.h>
  21. /* fixme: this is ugly */
  22. #if LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 0)
  23. #include <asm/mach-au1x00/au1xxx.h>
  24. #else
  25. #include <asm/au1000.h>
  26. #ifdef CONFIG_MIPS_PB1550
  27. #include <asm/pb1550.h>
  28. #endif
  29. #ifdef CONFIG_MIPS_DB1550
  30. #include <asm/db1x00.h>
  31. #endif
  32. #endif
  33. /*
  34. * MTD structure for NAND controller
  35. */
  36. static struct mtd_info *au1550_mtd = NULL;
  37. static void __iomem *p_nand;
  38. static int nand_width = 1; /* default x8 */
  39. /*
  40. * Define partitions for flash device
  41. */
  42. static const struct mtd_partition partition_info[] = {
  43. {
  44. .name = "NAND FS 0",
  45. .offset = 0,
  46. .size = 8 * 1024 * 1024},
  47. {
  48. .name = "NAND FS 1",
  49. .offset = MTDPART_OFS_APPEND,
  50. .size = MTDPART_SIZ_FULL}
  51. };
  52. /**
  53. * au_read_byte - read one byte from the chip
  54. * @mtd: MTD device structure
  55. *
  56. * read function for 8bit buswith
  57. */
  58. static u_char au_read_byte(struct mtd_info *mtd)
  59. {
  60. struct nand_chip *this = mtd->priv;
  61. u_char ret = readb(this->IO_ADDR_R);
  62. au_sync();
  63. return ret;
  64. }
  65. /**
  66. * au_write_byte - write one byte to the chip
  67. * @mtd: MTD device structure
  68. * @byte: pointer to data byte to write
  69. *
  70. * write function for 8it buswith
  71. */
  72. static void au_write_byte(struct mtd_info *mtd, u_char byte)
  73. {
  74. struct nand_chip *this = mtd->priv;
  75. writeb(byte, this->IO_ADDR_W);
  76. au_sync();
  77. }
  78. /**
  79. * au_read_byte16 - read one byte endianess aware from the chip
  80. * @mtd: MTD device structure
  81. *
  82. * read function for 16bit buswith with
  83. * endianess conversion
  84. */
  85. static u_char au_read_byte16(struct mtd_info *mtd)
  86. {
  87. struct nand_chip *this = mtd->priv;
  88. u_char ret = (u_char) cpu_to_le16(readw(this->IO_ADDR_R));
  89. au_sync();
  90. return ret;
  91. }
  92. /**
  93. * au_write_byte16 - write one byte endianess aware to the chip
  94. * @mtd: MTD device structure
  95. * @byte: pointer to data byte to write
  96. *
  97. * write function for 16bit buswith with
  98. * endianess conversion
  99. */
  100. static void au_write_byte16(struct mtd_info *mtd, u_char byte)
  101. {
  102. struct nand_chip *this = mtd->priv;
  103. writew(le16_to_cpu((u16) byte), this->IO_ADDR_W);
  104. au_sync();
  105. }
  106. /**
  107. * au_read_word - read one word from the chip
  108. * @mtd: MTD device structure
  109. *
  110. * read function for 16bit buswith without
  111. * endianess conversion
  112. */
  113. static u16 au_read_word(struct mtd_info *mtd)
  114. {
  115. struct nand_chip *this = mtd->priv;
  116. u16 ret = readw(this->IO_ADDR_R);
  117. au_sync();
  118. return ret;
  119. }
  120. /**
  121. * au_write_word - write one word to the chip
  122. * @mtd: MTD device structure
  123. * @word: data word to write
  124. *
  125. * write function for 16bit buswith without
  126. * endianess conversion
  127. */
  128. static void au_write_word(struct mtd_info *mtd, u16 word)
  129. {
  130. struct nand_chip *this = mtd->priv;
  131. writew(word, this->IO_ADDR_W);
  132. au_sync();
  133. }
  134. /**
  135. * au_write_buf - write buffer to chip
  136. * @mtd: MTD device structure
  137. * @buf: data buffer
  138. * @len: number of bytes to write
  139. *
  140. * write function for 8bit buswith
  141. */
  142. static void au_write_buf(struct mtd_info *mtd, const u_char *buf, int len)
  143. {
  144. int i;
  145. struct nand_chip *this = mtd->priv;
  146. for (i = 0; i < len; i++) {
  147. writeb(buf[i], this->IO_ADDR_W);
  148. au_sync();
  149. }
  150. }
  151. /**
  152. * au_read_buf - read chip data into buffer
  153. * @mtd: MTD device structure
  154. * @buf: buffer to store date
  155. * @len: number of bytes to read
  156. *
  157. * read function for 8bit buswith
  158. */
  159. static void au_read_buf(struct mtd_info *mtd, u_char *buf, int len)
  160. {
  161. int i;
  162. struct nand_chip *this = mtd->priv;
  163. for (i = 0; i < len; i++) {
  164. buf[i] = readb(this->IO_ADDR_R);
  165. au_sync();
  166. }
  167. }
  168. /**
  169. * au_verify_buf - Verify chip data against buffer
  170. * @mtd: MTD device structure
  171. * @buf: buffer containing the data to compare
  172. * @len: number of bytes to compare
  173. *
  174. * verify function for 8bit buswith
  175. */
  176. static int au_verify_buf(struct mtd_info *mtd, const u_char *buf, int len)
  177. {
  178. int i;
  179. struct nand_chip *this = mtd->priv;
  180. for (i = 0; i < len; i++) {
  181. if (buf[i] != readb(this->IO_ADDR_R))
  182. return -EFAULT;
  183. au_sync();
  184. }
  185. return 0;
  186. }
  187. /**
  188. * au_write_buf16 - write buffer to chip
  189. * @mtd: MTD device structure
  190. * @buf: data buffer
  191. * @len: number of bytes to write
  192. *
  193. * write function for 16bit buswith
  194. */
  195. static void au_write_buf16(struct mtd_info *mtd, const u_char *buf, int len)
  196. {
  197. int i;
  198. struct nand_chip *this = mtd->priv;
  199. u16 *p = (u16 *) buf;
  200. len >>= 1;
  201. for (i = 0; i < len; i++) {
  202. writew(p[i], this->IO_ADDR_W);
  203. au_sync();
  204. }
  205. }
  206. /**
  207. * au_read_buf16 - read chip data into buffer
  208. * @mtd: MTD device structure
  209. * @buf: buffer to store date
  210. * @len: number of bytes to read
  211. *
  212. * read function for 16bit buswith
  213. */
  214. static void au_read_buf16(struct mtd_info *mtd, u_char *buf, int len)
  215. {
  216. int i;
  217. struct nand_chip *this = mtd->priv;
  218. u16 *p = (u16 *) buf;
  219. len >>= 1;
  220. for (i = 0; i < len; i++) {
  221. p[i] = readw(this->IO_ADDR_R);
  222. au_sync();
  223. }
  224. }
  225. /**
  226. * au_verify_buf16 - Verify chip data against buffer
  227. * @mtd: MTD device structure
  228. * @buf: buffer containing the data to compare
  229. * @len: number of bytes to compare
  230. *
  231. * verify function for 16bit buswith
  232. */
  233. static int au_verify_buf16(struct mtd_info *mtd, const u_char *buf, int len)
  234. {
  235. int i;
  236. struct nand_chip *this = mtd->priv;
  237. u16 *p = (u16 *) buf;
  238. len >>= 1;
  239. for (i = 0; i < len; i++) {
  240. if (p[i] != readw(this->IO_ADDR_R))
  241. return -EFAULT;
  242. au_sync();
  243. }
  244. return 0;
  245. }
  246. static void au1550_hwcontrol(struct mtd_info *mtd, int cmd)
  247. {
  248. register struct nand_chip *this = mtd->priv;
  249. switch (cmd) {
  250. case NAND_CTL_SETCLE:
  251. this->IO_ADDR_W = p_nand + MEM_STNAND_CMD;
  252. break;
  253. case NAND_CTL_CLRCLE:
  254. this->IO_ADDR_W = p_nand + MEM_STNAND_DATA;
  255. break;
  256. case NAND_CTL_SETALE:
  257. this->IO_ADDR_W = p_nand + MEM_STNAND_ADDR;
  258. break;
  259. case NAND_CTL_CLRALE:
  260. this->IO_ADDR_W = p_nand + MEM_STNAND_DATA;
  261. /* FIXME: Nobody knows why this is necessary,
  262. * but it works only that way */
  263. udelay(1);
  264. break;
  265. case NAND_CTL_SETNCE:
  266. /* assert (force assert) chip enable */
  267. au_writel((1 << (4 + NAND_CS)), MEM_STNDCTL);
  268. break;
  269. case NAND_CTL_CLRNCE:
  270. /* deassert chip enable */
  271. au_writel(0, MEM_STNDCTL);
  272. break;
  273. }
  274. this->IO_ADDR_R = this->IO_ADDR_W;
  275. /* Drain the writebuffer */
  276. au_sync();
  277. }
  278. int au1550_device_ready(struct mtd_info *mtd)
  279. {
  280. int ret = (au_readl(MEM_STSTAT) & 0x1) ? 1 : 0;
  281. au_sync();
  282. return ret;
  283. }
  284. /*
  285. * Main initialization routine
  286. */
  287. static int __init au1xxx_nand_init(void)
  288. {
  289. struct nand_chip *this;
  290. u16 boot_swapboot = 0; /* default value */
  291. int retval;
  292. u32 mem_staddr;
  293. u32 nand_phys;
  294. /* Allocate memory for MTD device structure and private data */
  295. au1550_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL);
  296. if (!au1550_mtd) {
  297. printk("Unable to allocate NAND MTD dev structure.\n");
  298. return -ENOMEM;
  299. }
  300. /* Get pointer to private data */
  301. this = (struct nand_chip *)(&au1550_mtd[1]);
  302. /* Initialize structures */
  303. memset(au1550_mtd, 0, sizeof(struct mtd_info));
  304. memset(this, 0, sizeof(struct nand_chip));
  305. /* Link the private data with the MTD structure */
  306. au1550_mtd->priv = this;
  307. au1550_mtd->owner = THIS_MODULE;
  308. /* MEM_STNDCTL: disable ints, disable nand boot */
  309. au_writel(0, MEM_STNDCTL);
  310. #ifdef CONFIG_MIPS_PB1550
  311. /* set gpio206 high */
  312. au_writel(au_readl(GPIO2_DIR) & ~(1 << 6), GPIO2_DIR);
  313. boot_swapboot = (au_readl(MEM_STSTAT) & (0x7 << 1)) | ((bcsr->status >> 6) & 0x1);
  314. switch (boot_swapboot) {
  315. case 0:
  316. case 2:
  317. case 8:
  318. case 0xC:
  319. case 0xD:
  320. /* x16 NAND Flash */
  321. nand_width = 0;
  322. break;
  323. case 1:
  324. case 9:
  325. case 3:
  326. case 0xE:
  327. case 0xF:
  328. /* x8 NAND Flash */
  329. nand_width = 1;
  330. break;
  331. default:
  332. printk("Pb1550 NAND: bad boot:swap\n");
  333. retval = -EINVAL;
  334. goto outmem;
  335. }
  336. #endif
  337. /* Configure chip-select; normally done by boot code, e.g. YAMON */
  338. #ifdef NAND_STCFG
  339. if (NAND_CS == 0) {
  340. au_writel(NAND_STCFG, MEM_STCFG0);
  341. au_writel(NAND_STTIME, MEM_STTIME0);
  342. au_writel(NAND_STADDR, MEM_STADDR0);
  343. }
  344. if (NAND_CS == 1) {
  345. au_writel(NAND_STCFG, MEM_STCFG1);
  346. au_writel(NAND_STTIME, MEM_STTIME1);
  347. au_writel(NAND_STADDR, MEM_STADDR1);
  348. }
  349. if (NAND_CS == 2) {
  350. au_writel(NAND_STCFG, MEM_STCFG2);
  351. au_writel(NAND_STTIME, MEM_STTIME2);
  352. au_writel(NAND_STADDR, MEM_STADDR2);
  353. }
  354. if (NAND_CS == 3) {
  355. au_writel(NAND_STCFG, MEM_STCFG3);
  356. au_writel(NAND_STTIME, MEM_STTIME3);
  357. au_writel(NAND_STADDR, MEM_STADDR3);
  358. }
  359. #endif
  360. /* Locate NAND chip-select in order to determine NAND phys address */
  361. mem_staddr = 0x00000000;
  362. if (((au_readl(MEM_STCFG0) & 0x7) == 0x5) && (NAND_CS == 0))
  363. mem_staddr = au_readl(MEM_STADDR0);
  364. else if (((au_readl(MEM_STCFG1) & 0x7) == 0x5) && (NAND_CS == 1))
  365. mem_staddr = au_readl(MEM_STADDR1);
  366. else if (((au_readl(MEM_STCFG2) & 0x7) == 0x5) && (NAND_CS == 2))
  367. mem_staddr = au_readl(MEM_STADDR2);
  368. else if (((au_readl(MEM_STCFG3) & 0x7) == 0x5) && (NAND_CS == 3))
  369. mem_staddr = au_readl(MEM_STADDR3);
  370. if (mem_staddr == 0x00000000) {
  371. printk("Au1xxx NAND: ERROR WITH NAND CHIP-SELECT\n");
  372. kfree(au1550_mtd);
  373. return 1;
  374. }
  375. nand_phys = (mem_staddr << 4) & 0xFFFC0000;
  376. p_nand = (void __iomem *)ioremap(nand_phys, 0x1000);
  377. /* make controller and MTD agree */
  378. if (NAND_CS == 0)
  379. nand_width = au_readl(MEM_STCFG0) & (1 << 22);
  380. if (NAND_CS == 1)
  381. nand_width = au_readl(MEM_STCFG1) & (1 << 22);
  382. if (NAND_CS == 2)
  383. nand_width = au_readl(MEM_STCFG2) & (1 << 22);
  384. if (NAND_CS == 3)
  385. nand_width = au_readl(MEM_STCFG3) & (1 << 22);
  386. /* Set address of hardware control function */
  387. this->hwcontrol = au1550_hwcontrol;
  388. this->dev_ready = au1550_device_ready;
  389. /* 30 us command delay time */
  390. this->chip_delay = 30;
  391. this->eccmode = NAND_ECC_SOFT;
  392. this->options = NAND_NO_AUTOINCR;
  393. if (!nand_width)
  394. this->options |= NAND_BUSWIDTH_16;
  395. this->read_byte = (!nand_width) ? au_read_byte16 : au_read_byte;
  396. this->write_byte = (!nand_width) ? au_write_byte16 : au_write_byte;
  397. this->write_word = au_write_word;
  398. this->read_word = au_read_word;
  399. this->write_buf = (!nand_width) ? au_write_buf16 : au_write_buf;
  400. this->read_buf = (!nand_width) ? au_read_buf16 : au_read_buf;
  401. this->verify_buf = (!nand_width) ? au_verify_buf16 : au_verify_buf;
  402. /* Scan to find existence of the device */
  403. if (nand_scan(au1550_mtd, 1)) {
  404. retval = -ENXIO;
  405. goto outio;
  406. }
  407. /* Register the partitions */
  408. add_mtd_partitions(au1550_mtd, partition_info, ARRAY_SIZE(partition_info));
  409. return 0;
  410. outio:
  411. iounmap((void *)p_nand);
  412. outmem:
  413. kfree(au1550_mtd);
  414. return retval;
  415. }
  416. module_init(au1xxx_nand_init);
  417. /*
  418. * Clean up routine
  419. */
  420. static void __exit au1550_cleanup(void)
  421. {
  422. struct nand_chip *this = (struct nand_chip *)&au1550_mtd[1];
  423. /* Release resources, unregister device */
  424. nand_release(au1550_mtd);
  425. /* Free the MTD device structure */
  426. kfree(au1550_mtd);
  427. /* Unmap */
  428. iounmap((void *)p_nand);
  429. }
  430. module_exit(au1550_cleanup);
  431. MODULE_LICENSE("GPL");
  432. MODULE_AUTHOR("Embedded Edge, LLC");
  433. MODULE_DESCRIPTION("Board-specific glue layer for NAND flash on Pb1550 board");