p54common.c 30 KB

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  1. /*
  2. * Common code for mac80211 Prism54 drivers
  3. *
  4. * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
  5. * Copyright (c) 2007, Christian Lamparter <chunkeey@web.de>
  6. *
  7. * Based on the islsm (softmac prism54) driver, which is:
  8. * Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/init.h>
  15. #include <linux/firmware.h>
  16. #include <linux/etherdevice.h>
  17. #include <net/mac80211.h>
  18. #include "p54.h"
  19. #include "p54common.h"
  20. MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
  21. MODULE_DESCRIPTION("Softmac Prism54 common code");
  22. MODULE_LICENSE("GPL");
  23. MODULE_ALIAS("prism54common");
  24. static struct ieee80211_rate p54_rates[] = {
  25. { .bitrate = 10, .hw_value = 0, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
  26. { .bitrate = 20, .hw_value = 1, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
  27. { .bitrate = 55, .hw_value = 2, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
  28. { .bitrate = 110, .hw_value = 3, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
  29. { .bitrate = 60, .hw_value = 4, },
  30. { .bitrate = 90, .hw_value = 5, },
  31. { .bitrate = 120, .hw_value = 6, },
  32. { .bitrate = 180, .hw_value = 7, },
  33. { .bitrate = 240, .hw_value = 8, },
  34. { .bitrate = 360, .hw_value = 9, },
  35. { .bitrate = 480, .hw_value = 10, },
  36. { .bitrate = 540, .hw_value = 11, },
  37. };
  38. static struct ieee80211_channel p54_channels[] = {
  39. { .center_freq = 2412, .hw_value = 1, },
  40. { .center_freq = 2417, .hw_value = 2, },
  41. { .center_freq = 2422, .hw_value = 3, },
  42. { .center_freq = 2427, .hw_value = 4, },
  43. { .center_freq = 2432, .hw_value = 5, },
  44. { .center_freq = 2437, .hw_value = 6, },
  45. { .center_freq = 2442, .hw_value = 7, },
  46. { .center_freq = 2447, .hw_value = 8, },
  47. { .center_freq = 2452, .hw_value = 9, },
  48. { .center_freq = 2457, .hw_value = 10, },
  49. { .center_freq = 2462, .hw_value = 11, },
  50. { .center_freq = 2467, .hw_value = 12, },
  51. { .center_freq = 2472, .hw_value = 13, },
  52. { .center_freq = 2484, .hw_value = 14, },
  53. };
  54. static struct ieee80211_supported_band band_2GHz = {
  55. .channels = p54_channels,
  56. .n_channels = ARRAY_SIZE(p54_channels),
  57. .bitrates = p54_rates,
  58. .n_bitrates = ARRAY_SIZE(p54_rates),
  59. };
  60. void p54_parse_firmware(struct ieee80211_hw *dev, const struct firmware *fw)
  61. {
  62. struct p54_common *priv = dev->priv;
  63. struct bootrec_exp_if *exp_if;
  64. struct bootrec *bootrec;
  65. u32 *data = (u32 *)fw->data;
  66. u32 *end_data = (u32 *)fw->data + (fw->size >> 2);
  67. u8 *fw_version = NULL;
  68. size_t len;
  69. int i;
  70. if (priv->rx_start)
  71. return;
  72. while (data < end_data && *data)
  73. data++;
  74. while (data < end_data && !*data)
  75. data++;
  76. bootrec = (struct bootrec *) data;
  77. while (bootrec->data <= end_data &&
  78. (bootrec->data + (len = le32_to_cpu(bootrec->len))) <= end_data) {
  79. u32 code = le32_to_cpu(bootrec->code);
  80. switch (code) {
  81. case BR_CODE_COMPONENT_ID:
  82. switch (be32_to_cpu(*(__be32 *)bootrec->data)) {
  83. case FW_FMAC:
  84. printk(KERN_INFO "p54: FreeMAC firmware\n");
  85. break;
  86. case FW_LM20:
  87. printk(KERN_INFO "p54: LM20 firmware\n");
  88. break;
  89. case FW_LM86:
  90. printk(KERN_INFO "p54: LM86 firmware\n");
  91. break;
  92. case FW_LM87:
  93. printk(KERN_INFO "p54: LM87 firmware - not supported yet!\n");
  94. break;
  95. default:
  96. printk(KERN_INFO "p54: unknown firmware\n");
  97. break;
  98. }
  99. break;
  100. case BR_CODE_COMPONENT_VERSION:
  101. /* 24 bytes should be enough for all firmwares */
  102. if (strnlen((unsigned char*)bootrec->data, 24) < 24)
  103. fw_version = (unsigned char*)bootrec->data;
  104. break;
  105. case BR_CODE_DESCR:
  106. priv->rx_start = le32_to_cpu(((__le32 *)bootrec->data)[1]);
  107. /* FIXME add sanity checking */
  108. priv->rx_end = le32_to_cpu(((__le32 *)bootrec->data)[2]) - 0x3500;
  109. break;
  110. case BR_CODE_EXPOSED_IF:
  111. exp_if = (struct bootrec_exp_if *) bootrec->data;
  112. for (i = 0; i < (len * sizeof(*exp_if) / 4); i++)
  113. if (exp_if[i].if_id == cpu_to_le16(0x1a))
  114. priv->fw_var = le16_to_cpu(exp_if[i].variant);
  115. break;
  116. case BR_CODE_DEPENDENT_IF:
  117. break;
  118. case BR_CODE_END_OF_BRA:
  119. case LEGACY_BR_CODE_END_OF_BRA:
  120. end_data = NULL;
  121. break;
  122. default:
  123. break;
  124. }
  125. bootrec = (struct bootrec *)&bootrec->data[len];
  126. }
  127. if (fw_version)
  128. printk(KERN_INFO "p54: FW rev %s - Softmac protocol %x.%x\n",
  129. fw_version, priv->fw_var >> 8, priv->fw_var & 0xff);
  130. if (priv->fw_var >= 0x300) {
  131. /* Firmware supports QoS, use it! */
  132. priv->tx_stats[0].limit = 3;
  133. priv->tx_stats[1].limit = 4;
  134. priv->tx_stats[2].limit = 3;
  135. priv->tx_stats[3].limit = 1;
  136. dev->queues = 4;
  137. }
  138. }
  139. EXPORT_SYMBOL_GPL(p54_parse_firmware);
  140. static int p54_convert_rev0(struct ieee80211_hw *dev,
  141. struct pda_pa_curve_data *curve_data)
  142. {
  143. struct p54_common *priv = dev->priv;
  144. struct p54_pa_curve_data_sample *dst;
  145. struct pda_pa_curve_data_sample_rev0 *src;
  146. size_t cd_len = sizeof(*curve_data) +
  147. (curve_data->points_per_channel*sizeof(*dst) + 2) *
  148. curve_data->channels;
  149. unsigned int i, j;
  150. void *source, *target;
  151. priv->curve_data = kmalloc(cd_len, GFP_KERNEL);
  152. if (!priv->curve_data)
  153. return -ENOMEM;
  154. memcpy(priv->curve_data, curve_data, sizeof(*curve_data));
  155. source = curve_data->data;
  156. target = priv->curve_data->data;
  157. for (i = 0; i < curve_data->channels; i++) {
  158. __le16 *freq = source;
  159. source += sizeof(__le16);
  160. *((__le16 *)target) = *freq;
  161. target += sizeof(__le16);
  162. for (j = 0; j < curve_data->points_per_channel; j++) {
  163. dst = target;
  164. src = source;
  165. dst->rf_power = src->rf_power;
  166. dst->pa_detector = src->pa_detector;
  167. dst->data_64qam = src->pcv;
  168. /* "invent" the points for the other modulations */
  169. #define SUB(x,y) (u8)((x) - (y)) > (x) ? 0 : (x) - (y)
  170. dst->data_16qam = SUB(src->pcv, 12);
  171. dst->data_qpsk = SUB(dst->data_16qam, 12);
  172. dst->data_bpsk = SUB(dst->data_qpsk, 12);
  173. dst->data_barker = SUB(dst->data_bpsk, 14);
  174. #undef SUB
  175. target += sizeof(*dst);
  176. source += sizeof(*src);
  177. }
  178. }
  179. return 0;
  180. }
  181. static int p54_convert_rev1(struct ieee80211_hw *dev,
  182. struct pda_pa_curve_data *curve_data)
  183. {
  184. struct p54_common *priv = dev->priv;
  185. struct p54_pa_curve_data_sample *dst;
  186. struct pda_pa_curve_data_sample_rev1 *src;
  187. size_t cd_len = sizeof(*curve_data) +
  188. (curve_data->points_per_channel*sizeof(*dst) + 2) *
  189. curve_data->channels;
  190. unsigned int i, j;
  191. void *source, *target;
  192. priv->curve_data = kmalloc(cd_len, GFP_KERNEL);
  193. if (!priv->curve_data)
  194. return -ENOMEM;
  195. memcpy(priv->curve_data, curve_data, sizeof(*curve_data));
  196. source = curve_data->data;
  197. target = priv->curve_data->data;
  198. for (i = 0; i < curve_data->channels; i++) {
  199. __le16 *freq = source;
  200. source += sizeof(__le16);
  201. *((__le16 *)target) = *freq;
  202. target += sizeof(__le16);
  203. for (j = 0; j < curve_data->points_per_channel; j++) {
  204. memcpy(target, source, sizeof(*src));
  205. target += sizeof(*dst);
  206. source += sizeof(*src);
  207. }
  208. source++;
  209. }
  210. return 0;
  211. }
  212. int p54_parse_eeprom(struct ieee80211_hw *dev, void *eeprom, int len)
  213. {
  214. struct p54_common *priv = dev->priv;
  215. struct eeprom_pda_wrap *wrap = NULL;
  216. struct pda_entry *entry;
  217. unsigned int data_len, entry_len;
  218. void *tmp;
  219. int err;
  220. u8 *end = (u8 *)eeprom + len;
  221. wrap = (struct eeprom_pda_wrap *) eeprom;
  222. entry = (void *)wrap->data + le16_to_cpu(wrap->len);
  223. /* verify that at least the entry length/code fits */
  224. while ((u8 *)entry <= end - sizeof(*entry)) {
  225. entry_len = le16_to_cpu(entry->len);
  226. data_len = ((entry_len - 1) << 1);
  227. /* abort if entry exceeds whole structure */
  228. if ((u8 *)entry + sizeof(*entry) + data_len > end)
  229. break;
  230. switch (le16_to_cpu(entry->code)) {
  231. case PDR_MAC_ADDRESS:
  232. SET_IEEE80211_PERM_ADDR(dev, entry->data);
  233. break;
  234. case PDR_PRISM_PA_CAL_OUTPUT_POWER_LIMITS:
  235. if (data_len < 2) {
  236. err = -EINVAL;
  237. goto err;
  238. }
  239. if (2 + entry->data[1]*sizeof(*priv->output_limit) > data_len) {
  240. err = -EINVAL;
  241. goto err;
  242. }
  243. priv->output_limit = kmalloc(entry->data[1] *
  244. sizeof(*priv->output_limit), GFP_KERNEL);
  245. if (!priv->output_limit) {
  246. err = -ENOMEM;
  247. goto err;
  248. }
  249. memcpy(priv->output_limit, &entry->data[2],
  250. entry->data[1]*sizeof(*priv->output_limit));
  251. priv->output_limit_len = entry->data[1];
  252. break;
  253. case PDR_PRISM_PA_CAL_CURVE_DATA: {
  254. struct pda_pa_curve_data *curve_data =
  255. (struct pda_pa_curve_data *)entry->data;
  256. if (data_len < sizeof(*curve_data)) {
  257. err = -EINVAL;
  258. goto err;
  259. }
  260. switch (curve_data->cal_method_rev) {
  261. case 0:
  262. err = p54_convert_rev0(dev, curve_data);
  263. break;
  264. case 1:
  265. err = p54_convert_rev1(dev, curve_data);
  266. break;
  267. default:
  268. printk(KERN_ERR "p54: unknown curve data "
  269. "revision %d\n",
  270. curve_data->cal_method_rev);
  271. err = -ENODEV;
  272. break;
  273. }
  274. if (err)
  275. goto err;
  276. }
  277. case PDR_PRISM_ZIF_TX_IQ_CALIBRATION:
  278. priv->iq_autocal = kmalloc(data_len, GFP_KERNEL);
  279. if (!priv->iq_autocal) {
  280. err = -ENOMEM;
  281. goto err;
  282. }
  283. memcpy(priv->iq_autocal, entry->data, data_len);
  284. priv->iq_autocal_len = data_len / sizeof(struct pda_iq_autocal_entry);
  285. break;
  286. case PDR_INTERFACE_LIST:
  287. tmp = entry->data;
  288. while ((u8 *)tmp < entry->data + data_len) {
  289. struct bootrec_exp_if *exp_if = tmp;
  290. if (le16_to_cpu(exp_if->if_id) == 0xF)
  291. priv->rxhw = exp_if->variant & cpu_to_le16(0x07);
  292. tmp += sizeof(struct bootrec_exp_if);
  293. }
  294. break;
  295. case PDR_HARDWARE_PLATFORM_COMPONENT_ID:
  296. priv->version = *(u8 *)(entry->data + 1);
  297. break;
  298. case PDR_END:
  299. /* make it overrun */
  300. entry_len = len;
  301. break;
  302. default:
  303. printk(KERN_INFO "p54: unknown eeprom code : 0x%x\n",
  304. le16_to_cpu(entry->code));
  305. break;
  306. }
  307. entry = (void *)entry + (entry_len + 1)*2;
  308. }
  309. if (!priv->iq_autocal || !priv->output_limit || !priv->curve_data) {
  310. printk(KERN_ERR "p54: not all required entries found in eeprom!\n");
  311. err = -EINVAL;
  312. goto err;
  313. }
  314. return 0;
  315. err:
  316. if (priv->iq_autocal) {
  317. kfree(priv->iq_autocal);
  318. priv->iq_autocal = NULL;
  319. }
  320. if (priv->output_limit) {
  321. kfree(priv->output_limit);
  322. priv->output_limit = NULL;
  323. }
  324. if (priv->curve_data) {
  325. kfree(priv->curve_data);
  326. priv->curve_data = NULL;
  327. }
  328. printk(KERN_ERR "p54: eeprom parse failed!\n");
  329. return err;
  330. }
  331. EXPORT_SYMBOL_GPL(p54_parse_eeprom);
  332. void p54_fill_eeprom_readback(struct p54_control_hdr *hdr)
  333. {
  334. struct p54_eeprom_lm86 *eeprom_hdr;
  335. hdr->magic1 = cpu_to_le16(0x8000);
  336. hdr->len = cpu_to_le16(sizeof(*eeprom_hdr) + 0x2000);
  337. hdr->type = cpu_to_le16(P54_CONTROL_TYPE_EEPROM_READBACK);
  338. hdr->retry1 = hdr->retry2 = 0;
  339. eeprom_hdr = (struct p54_eeprom_lm86 *) hdr->data;
  340. eeprom_hdr->offset = 0x0;
  341. eeprom_hdr->len = cpu_to_le16(0x2000);
  342. }
  343. EXPORT_SYMBOL_GPL(p54_fill_eeprom_readback);
  344. static void p54_rx_data(struct ieee80211_hw *dev, struct sk_buff *skb)
  345. {
  346. struct p54_rx_hdr *hdr = (struct p54_rx_hdr *) skb->data;
  347. struct ieee80211_rx_status rx_status = {0};
  348. u16 freq = le16_to_cpu(hdr->freq);
  349. rx_status.signal = hdr->rssi;
  350. /* XX correct? */
  351. rx_status.qual = (100 * hdr->rssi) / 127;
  352. rx_status.rate_idx = hdr->rate & 0xf;
  353. rx_status.freq = freq;
  354. rx_status.band = IEEE80211_BAND_2GHZ;
  355. rx_status.antenna = hdr->antenna;
  356. rx_status.mactime = le64_to_cpu(hdr->timestamp);
  357. rx_status.flag |= RX_FLAG_TSFT;
  358. skb_pull(skb, sizeof(*hdr));
  359. skb_trim(skb, le16_to_cpu(hdr->len));
  360. ieee80211_rx_irqsafe(dev, skb, &rx_status);
  361. }
  362. static void inline p54_wake_free_queues(struct ieee80211_hw *dev)
  363. {
  364. struct p54_common *priv = dev->priv;
  365. int i;
  366. for (i = 0; i < dev->queues; i++)
  367. if (priv->tx_stats[i].len < priv->tx_stats[i].limit)
  368. ieee80211_wake_queue(dev, i);
  369. }
  370. static void p54_rx_frame_sent(struct ieee80211_hw *dev, struct sk_buff *skb)
  371. {
  372. struct p54_common *priv = dev->priv;
  373. struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data;
  374. struct p54_frame_sent_hdr *payload = (struct p54_frame_sent_hdr *) hdr->data;
  375. struct sk_buff *entry = (struct sk_buff *) priv->tx_queue.next;
  376. u32 addr = le32_to_cpu(hdr->req_id) - 0x70;
  377. struct memrecord *range = NULL;
  378. u32 freed = 0;
  379. u32 last_addr = priv->rx_start;
  380. while (entry != (struct sk_buff *)&priv->tx_queue) {
  381. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(entry);
  382. range = (void *)info->driver_data;
  383. if (range->start_addr == addr) {
  384. struct p54_control_hdr *entry_hdr;
  385. struct p54_tx_control_allocdata *entry_data;
  386. int pad = 0;
  387. if (entry->next != (struct sk_buff *)&priv->tx_queue) {
  388. struct ieee80211_tx_info *ni;
  389. struct memrecord *mr;
  390. ni = IEEE80211_SKB_CB(entry->next);
  391. mr = (struct memrecord *)ni->driver_data;
  392. freed = mr->start_addr - last_addr;
  393. } else
  394. freed = priv->rx_end - last_addr;
  395. last_addr = range->end_addr;
  396. __skb_unlink(entry, &priv->tx_queue);
  397. memset(&info->status, 0, sizeof(info->status));
  398. entry_hdr = (struct p54_control_hdr *) entry->data;
  399. entry_data = (struct p54_tx_control_allocdata *) entry_hdr->data;
  400. if ((entry_hdr->magic1 & cpu_to_le16(0x4000)) != 0)
  401. pad = entry_data->align[0];
  402. priv->tx_stats[entry_data->hw_queue - 4].len--;
  403. if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
  404. if (!(payload->status & 0x01))
  405. info->flags |= IEEE80211_TX_STAT_ACK;
  406. else
  407. info->status.excessive_retries = 1;
  408. }
  409. info->status.retry_count = payload->retries - 1;
  410. info->status.ack_signal = le16_to_cpu(payload->ack_rssi);
  411. skb_pull(entry, sizeof(*hdr) + pad + sizeof(*entry_data));
  412. ieee80211_tx_status_irqsafe(dev, entry);
  413. break;
  414. } else
  415. last_addr = range->end_addr;
  416. entry = entry->next;
  417. }
  418. if (freed >= IEEE80211_MAX_RTS_THRESHOLD + 0x170 +
  419. sizeof(struct p54_control_hdr))
  420. p54_wake_free_queues(dev);
  421. }
  422. static void p54_rx_control(struct ieee80211_hw *dev, struct sk_buff *skb)
  423. {
  424. struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data;
  425. switch (le16_to_cpu(hdr->type)) {
  426. case P54_CONTROL_TYPE_TXDONE:
  427. p54_rx_frame_sent(dev, skb);
  428. break;
  429. case P54_CONTROL_TYPE_BBP:
  430. break;
  431. default:
  432. printk(KERN_DEBUG "%s: not handling 0x%02x type control frame\n",
  433. wiphy_name(dev->wiphy), le16_to_cpu(hdr->type));
  434. break;
  435. }
  436. }
  437. /* returns zero if skb can be reused */
  438. int p54_rx(struct ieee80211_hw *dev, struct sk_buff *skb)
  439. {
  440. u8 type = le16_to_cpu(*((__le16 *)skb->data)) >> 8;
  441. switch (type) {
  442. case 0x00:
  443. case 0x01:
  444. p54_rx_data(dev, skb);
  445. return -1;
  446. case 0x4d:
  447. /* TODO: do something better... but then again, I've never seen this happen */
  448. printk(KERN_ERR "%s: Received fault. Probably need to restart hardware now..\n",
  449. wiphy_name(dev->wiphy));
  450. break;
  451. case 0x80:
  452. p54_rx_control(dev, skb);
  453. break;
  454. default:
  455. printk(KERN_ERR "%s: unknown frame RXed (0x%02x)\n",
  456. wiphy_name(dev->wiphy), type);
  457. break;
  458. }
  459. return 0;
  460. }
  461. EXPORT_SYMBOL_GPL(p54_rx);
  462. /*
  463. * So, the firmware is somewhat stupid and doesn't know what places in its
  464. * memory incoming data should go to. By poking around in the firmware, we
  465. * can find some unused memory to upload our packets to. However, data that we
  466. * want the card to TX needs to stay intact until the card has told us that
  467. * it is done with it. This function finds empty places we can upload to and
  468. * marks allocated areas as reserved if necessary. p54_rx_frame_sent frees
  469. * allocated areas.
  470. */
  471. static void p54_assign_address(struct ieee80211_hw *dev, struct sk_buff *skb,
  472. struct p54_control_hdr *data, u32 len)
  473. {
  474. struct p54_common *priv = dev->priv;
  475. struct sk_buff *entry = priv->tx_queue.next;
  476. struct sk_buff *target_skb = NULL;
  477. u32 last_addr = priv->rx_start;
  478. u32 largest_hole = 0;
  479. u32 target_addr = priv->rx_start;
  480. unsigned long flags;
  481. unsigned int left;
  482. len = (len + 0x170 + 3) & ~0x3; /* 0x70 headroom, 0x100 tailroom */
  483. spin_lock_irqsave(&priv->tx_queue.lock, flags);
  484. left = skb_queue_len(&priv->tx_queue);
  485. while (left--) {
  486. u32 hole_size;
  487. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(entry);
  488. struct memrecord *range = (void *)info->driver_data;
  489. hole_size = range->start_addr - last_addr;
  490. if (!target_skb && hole_size >= len) {
  491. target_skb = entry->prev;
  492. hole_size -= len;
  493. target_addr = last_addr;
  494. }
  495. largest_hole = max(largest_hole, hole_size);
  496. last_addr = range->end_addr;
  497. entry = entry->next;
  498. }
  499. if (!target_skb && priv->rx_end - last_addr >= len) {
  500. target_skb = priv->tx_queue.prev;
  501. largest_hole = max(largest_hole, priv->rx_end - last_addr - len);
  502. if (!skb_queue_empty(&priv->tx_queue)) {
  503. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(target_skb);
  504. struct memrecord *range = (void *)info->driver_data;
  505. target_addr = range->end_addr;
  506. }
  507. } else
  508. largest_hole = max(largest_hole, priv->rx_end - last_addr);
  509. if (skb) {
  510. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  511. struct memrecord *range = (void *)info->driver_data;
  512. range->start_addr = target_addr;
  513. range->end_addr = target_addr + len;
  514. __skb_queue_after(&priv->tx_queue, target_skb, skb);
  515. if (largest_hole < IEEE80211_MAX_RTS_THRESHOLD + 0x170 +
  516. sizeof(struct p54_control_hdr))
  517. ieee80211_stop_queues(dev);
  518. }
  519. spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
  520. data->req_id = cpu_to_le32(target_addr + 0x70);
  521. }
  522. static int p54_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
  523. {
  524. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  525. struct ieee80211_tx_queue_stats *current_queue;
  526. struct p54_common *priv = dev->priv;
  527. struct p54_control_hdr *hdr;
  528. struct ieee80211_hdr *ieee80211hdr = (struct ieee80211_hdr *)skb->data;
  529. struct p54_tx_control_allocdata *txhdr;
  530. size_t padding, len;
  531. u8 rate;
  532. u8 cts_rate = 0x20;
  533. current_queue = &priv->tx_stats[skb_get_queue_mapping(skb)];
  534. if (unlikely(current_queue->len > current_queue->limit))
  535. return NETDEV_TX_BUSY;
  536. current_queue->len++;
  537. current_queue->count++;
  538. if (current_queue->len == current_queue->limit)
  539. ieee80211_stop_queue(dev, skb_get_queue_mapping(skb));
  540. padding = (unsigned long)(skb->data - (sizeof(*hdr) + sizeof(*txhdr))) & 3;
  541. len = skb->len;
  542. txhdr = (struct p54_tx_control_allocdata *)
  543. skb_push(skb, sizeof(*txhdr) + padding);
  544. hdr = (struct p54_control_hdr *) skb_push(skb, sizeof(*hdr));
  545. if (padding)
  546. hdr->magic1 = cpu_to_le16(0x4010);
  547. else
  548. hdr->magic1 = cpu_to_le16(0x0010);
  549. hdr->len = cpu_to_le16(len);
  550. hdr->type = (info->flags & IEEE80211_TX_CTL_NO_ACK) ? 0 : cpu_to_le16(1);
  551. hdr->retry1 = hdr->retry2 = info->control.retry_limit;
  552. /* TODO: add support for alternate retry TX rates */
  553. rate = ieee80211_get_tx_rate(dev, info)->hw_value;
  554. if (info->flags & IEEE80211_TX_CTL_SHORT_PREAMBLE) {
  555. rate |= 0x10;
  556. cts_rate |= 0x10;
  557. }
  558. if (info->flags & IEEE80211_TX_CTL_USE_RTS_CTS) {
  559. rate |= 0x40;
  560. cts_rate |= ieee80211_get_rts_cts_rate(dev, info)->hw_value;
  561. } else if (info->flags & IEEE80211_TX_CTL_USE_CTS_PROTECT) {
  562. rate |= 0x20;
  563. cts_rate |= ieee80211_get_rts_cts_rate(dev, info)->hw_value;
  564. }
  565. memset(txhdr->rateset, rate, 8);
  566. txhdr->key_type = 0;
  567. txhdr->key_len = 0;
  568. txhdr->hw_queue = skb_get_queue_mapping(skb) + 4;
  569. txhdr->tx_antenna = (info->antenna_sel_tx == 0) ?
  570. 2 : info->antenna_sel_tx - 1;
  571. txhdr->output_power = 0x7f; // HW Maximum
  572. txhdr->cts_rate = (info->flags & IEEE80211_TX_CTL_NO_ACK) ?
  573. 0 : cts_rate;
  574. if (padding)
  575. txhdr->align[0] = padding;
  576. /* FIXME: The sequence that follows is needed for this driver to
  577. * work with mac80211 since "mac80211: fix TX sequence numbers".
  578. * As with the temporary code in rt2x00, changes will be needed
  579. * to get proper sequence numbers on beacons. In addition, this
  580. * patch places the sequence number in the hardware state, which
  581. * limits us to a single virtual state.
  582. */
  583. if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
  584. if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
  585. priv->seqno += 0x10;
  586. ieee80211hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
  587. ieee80211hdr->seq_ctrl |= cpu_to_le16(priv->seqno);
  588. }
  589. /* modifies skb->cb and with it info, so must be last! */
  590. p54_assign_address(dev, skb, hdr, skb->len);
  591. priv->tx(dev, hdr, skb->len, 0);
  592. return 0;
  593. }
  594. static int p54_set_filter(struct ieee80211_hw *dev, u16 filter_type,
  595. const u8 *dst, const u8 *src, u8 antenna,
  596. u32 magic3, u32 magic8, u32 magic9)
  597. {
  598. struct p54_common *priv = dev->priv;
  599. struct p54_control_hdr *hdr;
  600. struct p54_tx_control_filter *filter;
  601. hdr = kzalloc(sizeof(*hdr) + sizeof(*filter) +
  602. priv->tx_hdr_len, GFP_ATOMIC);
  603. if (!hdr)
  604. return -ENOMEM;
  605. hdr = (void *)hdr + priv->tx_hdr_len;
  606. filter = (struct p54_tx_control_filter *) hdr->data;
  607. hdr->magic1 = cpu_to_le16(0x8001);
  608. hdr->len = cpu_to_le16(sizeof(*filter));
  609. p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*filter));
  610. hdr->type = cpu_to_le16(P54_CONTROL_TYPE_FILTER_SET);
  611. filter->filter_type = cpu_to_le16(filter_type);
  612. memcpy(filter->dst, dst, ETH_ALEN);
  613. if (!src)
  614. memset(filter->src, ~0, ETH_ALEN);
  615. else
  616. memcpy(filter->src, src, ETH_ALEN);
  617. filter->antenna = antenna;
  618. filter->magic3 = cpu_to_le32(magic3);
  619. filter->rx_addr = cpu_to_le32(priv->rx_end);
  620. filter->max_rx = cpu_to_le16(0x0620); /* FIXME: for usb ver 1.. maybe */
  621. filter->rxhw = priv->rxhw;
  622. filter->magic8 = cpu_to_le16(magic8);
  623. filter->magic9 = cpu_to_le16(magic9);
  624. priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*filter), 1);
  625. return 0;
  626. }
  627. static int p54_set_freq(struct ieee80211_hw *dev, __le16 freq)
  628. {
  629. struct p54_common *priv = dev->priv;
  630. struct p54_control_hdr *hdr;
  631. struct p54_tx_control_channel *chan;
  632. unsigned int i;
  633. void *entry;
  634. hdr = kzalloc(sizeof(*hdr) + sizeof(*chan) +
  635. priv->tx_hdr_len, GFP_KERNEL);
  636. if (!hdr)
  637. return -ENOMEM;
  638. hdr = (void *)hdr + priv->tx_hdr_len;
  639. chan = (struct p54_tx_control_channel *) hdr->data;
  640. hdr->magic1 = cpu_to_le16(0x8001);
  641. hdr->len = cpu_to_le16(sizeof(*chan));
  642. hdr->type = cpu_to_le16(P54_CONTROL_TYPE_CHANNEL_CHANGE);
  643. p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*chan));
  644. chan->flags = cpu_to_le16(0x1);
  645. chan->dwell = cpu_to_le16(0x0);
  646. for (i = 0; i < priv->iq_autocal_len; i++) {
  647. if (priv->iq_autocal[i].freq != freq)
  648. continue;
  649. memcpy(&chan->iq_autocal, &priv->iq_autocal[i],
  650. sizeof(*priv->iq_autocal));
  651. break;
  652. }
  653. if (i == priv->iq_autocal_len)
  654. goto err;
  655. for (i = 0; i < priv->output_limit_len; i++) {
  656. if (priv->output_limit[i].freq != freq)
  657. continue;
  658. chan->val_barker = 0x38;
  659. chan->val_bpsk = chan->dup_bpsk =
  660. priv->output_limit[i].val_bpsk;
  661. chan->val_qpsk = chan->dup_qpsk =
  662. priv->output_limit[i].val_qpsk;
  663. chan->val_16qam = chan->dup_16qam =
  664. priv->output_limit[i].val_16qam;
  665. chan->val_64qam = chan->dup_64qam =
  666. priv->output_limit[i].val_64qam;
  667. break;
  668. }
  669. if (i == priv->output_limit_len)
  670. goto err;
  671. entry = priv->curve_data->data;
  672. for (i = 0; i < priv->curve_data->channels; i++) {
  673. if (*((__le16 *)entry) != freq) {
  674. entry += sizeof(__le16);
  675. entry += sizeof(struct p54_pa_curve_data_sample) *
  676. priv->curve_data->points_per_channel;
  677. continue;
  678. }
  679. entry += sizeof(__le16);
  680. chan->pa_points_per_curve =
  681. min(priv->curve_data->points_per_channel, (u8) 8);
  682. memcpy(chan->curve_data, entry, sizeof(*chan->curve_data) *
  683. chan->pa_points_per_curve);
  684. break;
  685. }
  686. chan->rssical_mul = cpu_to_le16(130);
  687. chan->rssical_add = cpu_to_le16(0xfe70); /* -400 */
  688. priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*chan), 1);
  689. return 0;
  690. err:
  691. printk(KERN_ERR "%s: frequency change failed\n", wiphy_name(dev->wiphy));
  692. kfree(hdr);
  693. return -EINVAL;
  694. }
  695. static int p54_set_leds(struct ieee80211_hw *dev, int mode, int link, int act)
  696. {
  697. struct p54_common *priv = dev->priv;
  698. struct p54_control_hdr *hdr;
  699. struct p54_tx_control_led *led;
  700. hdr = kzalloc(sizeof(*hdr) + sizeof(*led) +
  701. priv->tx_hdr_len, GFP_KERNEL);
  702. if (!hdr)
  703. return -ENOMEM;
  704. hdr = (void *)hdr + priv->tx_hdr_len;
  705. hdr->magic1 = cpu_to_le16(0x8001);
  706. hdr->len = cpu_to_le16(sizeof(*led));
  707. hdr->type = cpu_to_le16(P54_CONTROL_TYPE_LED);
  708. p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*led));
  709. led = (struct p54_tx_control_led *) hdr->data;
  710. led->mode = cpu_to_le16(mode);
  711. led->led_permanent = cpu_to_le16(link);
  712. led->led_temporary = cpu_to_le16(act);
  713. led->duration = cpu_to_le16(1000);
  714. priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*led), 1);
  715. return 0;
  716. }
  717. #define P54_SET_QUEUE(queue, ai_fs, cw_min, cw_max, _txop) \
  718. do { \
  719. queue.aifs = cpu_to_le16(ai_fs); \
  720. queue.cwmin = cpu_to_le16(cw_min); \
  721. queue.cwmax = cpu_to_le16(cw_max); \
  722. queue.txop = cpu_to_le16(_txop); \
  723. } while(0)
  724. static void p54_init_vdcf(struct ieee80211_hw *dev)
  725. {
  726. struct p54_common *priv = dev->priv;
  727. struct p54_control_hdr *hdr;
  728. struct p54_tx_control_vdcf *vdcf;
  729. /* all USB V1 adapters need a extra headroom */
  730. hdr = (void *)priv->cached_vdcf + priv->tx_hdr_len;
  731. hdr->magic1 = cpu_to_le16(0x8001);
  732. hdr->len = cpu_to_le16(sizeof(*vdcf));
  733. hdr->type = cpu_to_le16(P54_CONTROL_TYPE_DCFINIT);
  734. hdr->req_id = cpu_to_le32(priv->rx_start);
  735. vdcf = (struct p54_tx_control_vdcf *) hdr->data;
  736. P54_SET_QUEUE(vdcf->queue[0], 0x0002, 0x0003, 0x0007, 47);
  737. P54_SET_QUEUE(vdcf->queue[1], 0x0002, 0x0007, 0x000f, 94);
  738. P54_SET_QUEUE(vdcf->queue[2], 0x0003, 0x000f, 0x03ff, 0);
  739. P54_SET_QUEUE(vdcf->queue[3], 0x0007, 0x000f, 0x03ff, 0);
  740. }
  741. static void p54_set_vdcf(struct ieee80211_hw *dev)
  742. {
  743. struct p54_common *priv = dev->priv;
  744. struct p54_control_hdr *hdr;
  745. struct p54_tx_control_vdcf *vdcf;
  746. hdr = (void *)priv->cached_vdcf + priv->tx_hdr_len;
  747. p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*vdcf));
  748. vdcf = (struct p54_tx_control_vdcf *) hdr->data;
  749. if (dev->conf.flags & IEEE80211_CONF_SHORT_SLOT_TIME) {
  750. vdcf->slottime = 9;
  751. vdcf->magic1 = 0x10;
  752. vdcf->magic2 = 0x00;
  753. } else {
  754. vdcf->slottime = 20;
  755. vdcf->magic1 = 0x0a;
  756. vdcf->magic2 = 0x06;
  757. }
  758. /* (see prism54/isl_oid.h for further details) */
  759. vdcf->frameburst = cpu_to_le16(0);
  760. priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*vdcf), 0);
  761. }
  762. static int p54_start(struct ieee80211_hw *dev)
  763. {
  764. struct p54_common *priv = dev->priv;
  765. int err;
  766. if (!priv->cached_vdcf) {
  767. priv->cached_vdcf = kzalloc(sizeof(struct p54_tx_control_vdcf)+
  768. priv->tx_hdr_len + sizeof(struct p54_control_hdr),
  769. GFP_KERNEL);
  770. if (!priv->cached_vdcf)
  771. return -ENOMEM;
  772. }
  773. err = priv->open(dev);
  774. if (!err)
  775. priv->mode = IEEE80211_IF_TYPE_MNTR;
  776. p54_init_vdcf(dev);
  777. return err;
  778. }
  779. static void p54_stop(struct ieee80211_hw *dev)
  780. {
  781. struct p54_common *priv = dev->priv;
  782. struct sk_buff *skb;
  783. while ((skb = skb_dequeue(&priv->tx_queue)))
  784. kfree_skb(skb);
  785. priv->stop(dev);
  786. priv->mode = IEEE80211_IF_TYPE_INVALID;
  787. }
  788. static int p54_add_interface(struct ieee80211_hw *dev,
  789. struct ieee80211_if_init_conf *conf)
  790. {
  791. struct p54_common *priv = dev->priv;
  792. if (priv->mode != IEEE80211_IF_TYPE_MNTR)
  793. return -EOPNOTSUPP;
  794. switch (conf->type) {
  795. case IEEE80211_IF_TYPE_STA:
  796. priv->mode = conf->type;
  797. break;
  798. default:
  799. return -EOPNOTSUPP;
  800. }
  801. memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
  802. p54_set_filter(dev, 0, priv->mac_addr, NULL, 0, 1, 0, 0xF642);
  803. p54_set_filter(dev, 0, priv->mac_addr, NULL, 1, 0, 0, 0xF642);
  804. switch (conf->type) {
  805. case IEEE80211_IF_TYPE_STA:
  806. p54_set_filter(dev, 1, priv->mac_addr, NULL, 0, 0x15F, 0x1F4, 0);
  807. break;
  808. default:
  809. BUG(); /* impossible */
  810. break;
  811. }
  812. p54_set_leds(dev, 1, 0, 0);
  813. return 0;
  814. }
  815. static void p54_remove_interface(struct ieee80211_hw *dev,
  816. struct ieee80211_if_init_conf *conf)
  817. {
  818. struct p54_common *priv = dev->priv;
  819. priv->mode = IEEE80211_IF_TYPE_MNTR;
  820. memset(priv->mac_addr, 0, ETH_ALEN);
  821. p54_set_filter(dev, 0, priv->mac_addr, NULL, 2, 0, 0, 0);
  822. }
  823. static int p54_config(struct ieee80211_hw *dev, struct ieee80211_conf *conf)
  824. {
  825. int ret;
  826. struct p54_common *priv = dev->priv;
  827. mutex_lock(&priv->conf_mutex);
  828. ret = p54_set_freq(dev, cpu_to_le16(conf->channel->center_freq));
  829. p54_set_vdcf(dev);
  830. mutex_unlock(&priv->conf_mutex);
  831. return ret;
  832. }
  833. static int p54_config_interface(struct ieee80211_hw *dev,
  834. struct ieee80211_vif *vif,
  835. struct ieee80211_if_conf *conf)
  836. {
  837. struct p54_common *priv = dev->priv;
  838. mutex_lock(&priv->conf_mutex);
  839. p54_set_filter(dev, 0, priv->mac_addr, conf->bssid, 0, 1, 0, 0xF642);
  840. p54_set_filter(dev, 0, priv->mac_addr, conf->bssid, 2, 0, 0, 0);
  841. p54_set_leds(dev, 1, !is_multicast_ether_addr(conf->bssid), 0);
  842. memcpy(priv->bssid, conf->bssid, ETH_ALEN);
  843. mutex_unlock(&priv->conf_mutex);
  844. return 0;
  845. }
  846. static void p54_configure_filter(struct ieee80211_hw *dev,
  847. unsigned int changed_flags,
  848. unsigned int *total_flags,
  849. int mc_count, struct dev_mc_list *mclist)
  850. {
  851. struct p54_common *priv = dev->priv;
  852. *total_flags &= FIF_BCN_PRBRESP_PROMISC;
  853. if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
  854. if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
  855. p54_set_filter(dev, 0, priv->mac_addr,
  856. NULL, 2, 0, 0, 0);
  857. else
  858. p54_set_filter(dev, 0, priv->mac_addr,
  859. priv->bssid, 2, 0, 0, 0);
  860. }
  861. }
  862. static int p54_conf_tx(struct ieee80211_hw *dev, u16 queue,
  863. const struct ieee80211_tx_queue_params *params)
  864. {
  865. struct p54_common *priv = dev->priv;
  866. struct p54_tx_control_vdcf *vdcf;
  867. vdcf = (struct p54_tx_control_vdcf *)(((struct p54_control_hdr *)
  868. ((void *)priv->cached_vdcf + priv->tx_hdr_len))->data);
  869. if ((params) && !(queue > 4)) {
  870. P54_SET_QUEUE(vdcf->queue[queue], params->aifs,
  871. params->cw_min, params->cw_max, params->txop);
  872. } else
  873. return -EINVAL;
  874. p54_set_vdcf(dev);
  875. return 0;
  876. }
  877. static int p54_get_stats(struct ieee80211_hw *dev,
  878. struct ieee80211_low_level_stats *stats)
  879. {
  880. /* TODO */
  881. return 0;
  882. }
  883. static int p54_get_tx_stats(struct ieee80211_hw *dev,
  884. struct ieee80211_tx_queue_stats *stats)
  885. {
  886. struct p54_common *priv = dev->priv;
  887. memcpy(stats, &priv->tx_stats, sizeof(stats[0]) * dev->queues);
  888. return 0;
  889. }
  890. static const struct ieee80211_ops p54_ops = {
  891. .tx = p54_tx,
  892. .start = p54_start,
  893. .stop = p54_stop,
  894. .add_interface = p54_add_interface,
  895. .remove_interface = p54_remove_interface,
  896. .config = p54_config,
  897. .config_interface = p54_config_interface,
  898. .configure_filter = p54_configure_filter,
  899. .conf_tx = p54_conf_tx,
  900. .get_stats = p54_get_stats,
  901. .get_tx_stats = p54_get_tx_stats
  902. };
  903. struct ieee80211_hw *p54_init_common(size_t priv_data_len)
  904. {
  905. struct ieee80211_hw *dev;
  906. struct p54_common *priv;
  907. dev = ieee80211_alloc_hw(priv_data_len, &p54_ops);
  908. if (!dev)
  909. return NULL;
  910. priv = dev->priv;
  911. priv->mode = IEEE80211_IF_TYPE_INVALID;
  912. skb_queue_head_init(&priv->tx_queue);
  913. dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &band_2GHz;
  914. dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING | /* not sure */
  915. IEEE80211_HW_RX_INCLUDES_FCS |
  916. IEEE80211_HW_SIGNAL_UNSPEC;
  917. dev->channel_change_time = 1000; /* TODO: find actual value */
  918. dev->max_signal = 127;
  919. priv->tx_stats[0].limit = 5;
  920. dev->queues = 1;
  921. dev->extra_tx_headroom = sizeof(struct p54_control_hdr) + 4 +
  922. sizeof(struct p54_tx_control_allocdata);
  923. mutex_init(&priv->conf_mutex);
  924. return dev;
  925. }
  926. EXPORT_SYMBOL_GPL(p54_init_common);
  927. void p54_free_common(struct ieee80211_hw *dev)
  928. {
  929. struct p54_common *priv = dev->priv;
  930. kfree(priv->iq_autocal);
  931. kfree(priv->output_limit);
  932. kfree(priv->curve_data);
  933. kfree(priv->cached_vdcf);
  934. }
  935. EXPORT_SYMBOL_GPL(p54_free_common);
  936. static int __init p54_init(void)
  937. {
  938. return 0;
  939. }
  940. static void __exit p54_exit(void)
  941. {
  942. }
  943. module_init(p54_init);
  944. module_exit(p54_exit);