bfin_gpio.c 29 KB

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  1. /*
  2. * File: arch/blackfin/kernel/bfin_gpio.c
  3. * Based on:
  4. * Author: Michael Hennerich (hennerich@blackfin.uclinux.org)
  5. *
  6. * Created:
  7. * Description: GPIO Abstraction Layer
  8. *
  9. * Modified:
  10. * Copyright 2007 Analog Devices Inc.
  11. *
  12. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  13. *
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License as published by
  16. * the Free Software Foundation; either version 2 of the License, or
  17. * (at your option) any later version.
  18. *
  19. * This program is distributed in the hope that it will be useful,
  20. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  22. * GNU General Public License for more details.
  23. *
  24. * You should have received a copy of the GNU General Public License
  25. * along with this program; if not, see the file COPYING, or write
  26. * to the Free Software Foundation, Inc.,
  27. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  28. */
  29. /*
  30. * Number BF537/6/4 BF561 BF533/2/1 BF549/8/4/2
  31. *
  32. * GPIO_0 PF0 PF0 PF0 PA0...PJ13
  33. * GPIO_1 PF1 PF1 PF1
  34. * GPIO_2 PF2 PF2 PF2
  35. * GPIO_3 PF3 PF3 PF3
  36. * GPIO_4 PF4 PF4 PF4
  37. * GPIO_5 PF5 PF5 PF5
  38. * GPIO_6 PF6 PF6 PF6
  39. * GPIO_7 PF7 PF7 PF7
  40. * GPIO_8 PF8 PF8 PF8
  41. * GPIO_9 PF9 PF9 PF9
  42. * GPIO_10 PF10 PF10 PF10
  43. * GPIO_11 PF11 PF11 PF11
  44. * GPIO_12 PF12 PF12 PF12
  45. * GPIO_13 PF13 PF13 PF13
  46. * GPIO_14 PF14 PF14 PF14
  47. * GPIO_15 PF15 PF15 PF15
  48. * GPIO_16 PG0 PF16
  49. * GPIO_17 PG1 PF17
  50. * GPIO_18 PG2 PF18
  51. * GPIO_19 PG3 PF19
  52. * GPIO_20 PG4 PF20
  53. * GPIO_21 PG5 PF21
  54. * GPIO_22 PG6 PF22
  55. * GPIO_23 PG7 PF23
  56. * GPIO_24 PG8 PF24
  57. * GPIO_25 PG9 PF25
  58. * GPIO_26 PG10 PF26
  59. * GPIO_27 PG11 PF27
  60. * GPIO_28 PG12 PF28
  61. * GPIO_29 PG13 PF29
  62. * GPIO_30 PG14 PF30
  63. * GPIO_31 PG15 PF31
  64. * GPIO_32 PH0 PF32
  65. * GPIO_33 PH1 PF33
  66. * GPIO_34 PH2 PF34
  67. * GPIO_35 PH3 PF35
  68. * GPIO_36 PH4 PF36
  69. * GPIO_37 PH5 PF37
  70. * GPIO_38 PH6 PF38
  71. * GPIO_39 PH7 PF39
  72. * GPIO_40 PH8 PF40
  73. * GPIO_41 PH9 PF41
  74. * GPIO_42 PH10 PF42
  75. * GPIO_43 PH11 PF43
  76. * GPIO_44 PH12 PF44
  77. * GPIO_45 PH13 PF45
  78. * GPIO_46 PH14 PF46
  79. * GPIO_47 PH15 PF47
  80. */
  81. #include <linux/delay.h>
  82. #include <linux/module.h>
  83. #include <linux/err.h>
  84. #include <linux/proc_fs.h>
  85. #include <asm/blackfin.h>
  86. #include <asm/gpio.h>
  87. #include <asm/portmux.h>
  88. #include <linux/irq.h>
  89. #if ANOMALY_05000311 || ANOMALY_05000323
  90. enum {
  91. AWA_data = SYSCR,
  92. AWA_data_clear = SYSCR,
  93. AWA_data_set = SYSCR,
  94. AWA_toggle = SYSCR,
  95. AWA_maska = UART_SCR,
  96. AWA_maska_clear = UART_SCR,
  97. AWA_maska_set = UART_SCR,
  98. AWA_maska_toggle = UART_SCR,
  99. AWA_maskb = UART_GCTL,
  100. AWA_maskb_clear = UART_GCTL,
  101. AWA_maskb_set = UART_GCTL,
  102. AWA_maskb_toggle = UART_GCTL,
  103. AWA_dir = SPORT1_STAT,
  104. AWA_polar = SPORT1_STAT,
  105. AWA_edge = SPORT1_STAT,
  106. AWA_both = SPORT1_STAT,
  107. #if ANOMALY_05000311
  108. AWA_inen = TIMER_ENABLE,
  109. #elif ANOMALY_05000323
  110. AWA_inen = DMA1_1_CONFIG,
  111. #endif
  112. };
  113. /* Anomaly Workaround */
  114. #define AWA_DUMMY_READ(name) bfin_read16(AWA_ ## name)
  115. #else
  116. #define AWA_DUMMY_READ(...) do { } while (0)
  117. #endif
  118. #ifdef BF533_FAMILY
  119. static struct gpio_port_t *gpio_bankb[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
  120. (struct gpio_port_t *) FIO_FLAG_D,
  121. };
  122. #endif
  123. #if defined(BF527_FAMILY) || defined(BF537_FAMILY)
  124. static struct gpio_port_t *gpio_bankb[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
  125. (struct gpio_port_t *) PORTFIO,
  126. (struct gpio_port_t *) PORTGIO,
  127. (struct gpio_port_t *) PORTHIO,
  128. };
  129. static unsigned short *port_fer[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
  130. (unsigned short *) PORTF_FER,
  131. (unsigned short *) PORTG_FER,
  132. (unsigned short *) PORTH_FER,
  133. };
  134. #endif
  135. #ifdef BF527_FAMILY
  136. static unsigned short *port_mux[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
  137. (unsigned short *) PORTF_MUX,
  138. (unsigned short *) PORTG_MUX,
  139. (unsigned short *) PORTH_MUX,
  140. };
  141. static const
  142. u8 pmux_offset[][16] =
  143. {{ 0, 0, 0, 0, 0, 0, 0, 0, 2, 2, 4, 6, 8, 8, 10, 10 }, /* PORTF */
  144. { 0, 0, 0, 0, 0, 2, 2, 4, 4, 6, 8, 10, 10, 10, 12, 12 }, /* PORTG */
  145. { 0, 0, 0, 0, 0, 0, 0, 0, 2, 4, 4, 4, 4, 4, 4, 4 }, /* PORTH */
  146. };
  147. #endif
  148. #ifdef BF561_FAMILY
  149. static struct gpio_port_t *gpio_bankb[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
  150. (struct gpio_port_t *) FIO0_FLAG_D,
  151. (struct gpio_port_t *) FIO1_FLAG_D,
  152. (struct gpio_port_t *) FIO2_FLAG_D,
  153. };
  154. #endif
  155. #ifdef BF548_FAMILY
  156. static struct gpio_port_t *gpio_array[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
  157. (struct gpio_port_t *)PORTA_FER,
  158. (struct gpio_port_t *)PORTB_FER,
  159. (struct gpio_port_t *)PORTC_FER,
  160. (struct gpio_port_t *)PORTD_FER,
  161. (struct gpio_port_t *)PORTE_FER,
  162. (struct gpio_port_t *)PORTF_FER,
  163. (struct gpio_port_t *)PORTG_FER,
  164. (struct gpio_port_t *)PORTH_FER,
  165. (struct gpio_port_t *)PORTI_FER,
  166. (struct gpio_port_t *)PORTJ_FER,
  167. };
  168. #endif
  169. static unsigned short reserved_gpio_map[gpio_bank(MAX_BLACKFIN_GPIOS)];
  170. static unsigned short reserved_peri_map[gpio_bank(MAX_BLACKFIN_GPIOS + 16)];
  171. #define MAX_RESOURCES 256
  172. #define RESOURCE_LABEL_SIZE 16
  173. struct str_ident {
  174. char name[RESOURCE_LABEL_SIZE];
  175. } *str_ident;
  176. #ifdef CONFIG_PM
  177. static unsigned short wakeup_map[gpio_bank(MAX_BLACKFIN_GPIOS)];
  178. static unsigned char wakeup_flags_map[MAX_BLACKFIN_GPIOS];
  179. static struct gpio_port_s gpio_bank_saved[gpio_bank(MAX_BLACKFIN_GPIOS)];
  180. #ifdef BF533_FAMILY
  181. static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PROG_INTB};
  182. #endif
  183. #ifdef BF537_FAMILY
  184. static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PROG_INTB, IRQ_PORTG_INTB, IRQ_MAC_TX};
  185. #endif
  186. #ifdef BF527_FAMILY
  187. static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PORTF_INTB, IRQ_PORTG_INTB, IRQ_PORTH_INTB};
  188. #endif
  189. #ifdef BF561_FAMILY
  190. static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PROG0_INTB, IRQ_PROG1_INTB, IRQ_PROG2_INTB};
  191. #endif
  192. #endif /* CONFIG_PM */
  193. #if defined(BF548_FAMILY)
  194. inline int check_gpio(unsigned short gpio)
  195. {
  196. if (gpio == GPIO_PB15 || gpio == GPIO_PC14 || gpio == GPIO_PC15
  197. || gpio == GPIO_PH14 || gpio == GPIO_PH15
  198. || gpio == GPIO_PJ14 || gpio == GPIO_PJ15
  199. || gpio > MAX_BLACKFIN_GPIOS)
  200. return -EINVAL;
  201. return 0;
  202. }
  203. #else
  204. inline int check_gpio(unsigned short gpio)
  205. {
  206. if (gpio >= MAX_BLACKFIN_GPIOS)
  207. return -EINVAL;
  208. return 0;
  209. }
  210. #endif
  211. static void set_label(unsigned short ident, const char *label)
  212. {
  213. if (label && str_ident) {
  214. strncpy(str_ident[ident].name, label,
  215. RESOURCE_LABEL_SIZE);
  216. str_ident[ident].name[RESOURCE_LABEL_SIZE - 1] = 0;
  217. }
  218. }
  219. static char *get_label(unsigned short ident)
  220. {
  221. if (!str_ident)
  222. return "UNKNOWN";
  223. return (*str_ident[ident].name ? str_ident[ident].name : "UNKNOWN");
  224. }
  225. static int cmp_label(unsigned short ident, const char *label)
  226. {
  227. if (label && str_ident)
  228. return strncmp(str_ident[ident].name,
  229. label, strlen(label));
  230. else
  231. return -EINVAL;
  232. }
  233. #if defined(BF527_FAMILY) || defined(BF537_FAMILY)
  234. static void port_setup(unsigned short gpio, unsigned short usage)
  235. {
  236. if (!check_gpio(gpio)) {
  237. if (usage == GPIO_USAGE)
  238. *port_fer[gpio_bank(gpio)] &= ~gpio_bit(gpio);
  239. else
  240. *port_fer[gpio_bank(gpio)] |= gpio_bit(gpio);
  241. SSYNC();
  242. }
  243. }
  244. #elif defined(BF548_FAMILY)
  245. static void port_setup(unsigned short gpio, unsigned short usage)
  246. {
  247. if (usage == GPIO_USAGE)
  248. gpio_array[gpio_bank(gpio)]->port_fer &= ~gpio_bit(gpio);
  249. else
  250. gpio_array[gpio_bank(gpio)]->port_fer |= gpio_bit(gpio);
  251. SSYNC();
  252. }
  253. #else
  254. # define port_setup(...) do { } while (0)
  255. #endif
  256. #ifdef BF537_FAMILY
  257. static struct {
  258. unsigned short res;
  259. unsigned short offset;
  260. } port_mux_lut[] = {
  261. {.res = P_PPI0_D13, .offset = 11},
  262. {.res = P_PPI0_D14, .offset = 11},
  263. {.res = P_PPI0_D15, .offset = 11},
  264. {.res = P_SPORT1_TFS, .offset = 11},
  265. {.res = P_SPORT1_TSCLK, .offset = 11},
  266. {.res = P_SPORT1_DTPRI, .offset = 11},
  267. {.res = P_PPI0_D10, .offset = 10},
  268. {.res = P_PPI0_D11, .offset = 10},
  269. {.res = P_PPI0_D12, .offset = 10},
  270. {.res = P_SPORT1_RSCLK, .offset = 10},
  271. {.res = P_SPORT1_RFS, .offset = 10},
  272. {.res = P_SPORT1_DRPRI, .offset = 10},
  273. {.res = P_PPI0_D8, .offset = 9},
  274. {.res = P_PPI0_D9, .offset = 9},
  275. {.res = P_SPORT1_DRSEC, .offset = 9},
  276. {.res = P_SPORT1_DTSEC, .offset = 9},
  277. {.res = P_TMR2, .offset = 8},
  278. {.res = P_PPI0_FS3, .offset = 8},
  279. {.res = P_TMR3, .offset = 7},
  280. {.res = P_SPI0_SSEL4, .offset = 7},
  281. {.res = P_TMR4, .offset = 6},
  282. {.res = P_SPI0_SSEL5, .offset = 6},
  283. {.res = P_TMR5, .offset = 5},
  284. {.res = P_SPI0_SSEL6, .offset = 5},
  285. {.res = P_UART1_RX, .offset = 4},
  286. {.res = P_UART1_TX, .offset = 4},
  287. {.res = P_TMR6, .offset = 4},
  288. {.res = P_TMR7, .offset = 4},
  289. {.res = P_UART0_RX, .offset = 3},
  290. {.res = P_UART0_TX, .offset = 3},
  291. {.res = P_DMAR0, .offset = 3},
  292. {.res = P_DMAR1, .offset = 3},
  293. {.res = P_SPORT0_DTSEC, .offset = 1},
  294. {.res = P_SPORT0_DRSEC, .offset = 1},
  295. {.res = P_CAN0_RX, .offset = 1},
  296. {.res = P_CAN0_TX, .offset = 1},
  297. {.res = P_SPI0_SSEL7, .offset = 1},
  298. {.res = P_SPORT0_TFS, .offset = 0},
  299. {.res = P_SPORT0_DTPRI, .offset = 0},
  300. {.res = P_SPI0_SSEL2, .offset = 0},
  301. {.res = P_SPI0_SSEL3, .offset = 0},
  302. };
  303. static void portmux_setup(unsigned short per, unsigned short function)
  304. {
  305. u16 y, offset, muxreg;
  306. for (y = 0; y < ARRAY_SIZE(port_mux_lut); y++) {
  307. if (port_mux_lut[y].res == per) {
  308. /* SET PORTMUX REG */
  309. offset = port_mux_lut[y].offset;
  310. muxreg = bfin_read_PORT_MUX();
  311. if (offset != 1) {
  312. muxreg &= ~(1 << offset);
  313. } else {
  314. muxreg &= ~(3 << 1);
  315. }
  316. muxreg |= (function << offset);
  317. bfin_write_PORT_MUX(muxreg);
  318. }
  319. }
  320. }
  321. #elif defined(BF548_FAMILY)
  322. inline void portmux_setup(unsigned short portno, unsigned short function)
  323. {
  324. u32 pmux;
  325. pmux = gpio_array[gpio_bank(portno)]->port_mux;
  326. pmux &= ~(0x3 << (2 * gpio_sub_n(portno)));
  327. pmux |= (function & 0x3) << (2 * gpio_sub_n(portno));
  328. gpio_array[gpio_bank(portno)]->port_mux = pmux;
  329. }
  330. inline u16 get_portmux(unsigned short portno)
  331. {
  332. u32 pmux;
  333. pmux = gpio_array[gpio_bank(portno)]->port_mux;
  334. return (pmux >> (2 * gpio_sub_n(portno)) & 0x3);
  335. }
  336. #elif defined(BF527_FAMILY)
  337. inline void portmux_setup(unsigned short portno, unsigned short function)
  338. {
  339. u16 pmux, ident = P_IDENT(portno);
  340. u8 offset = pmux_offset[gpio_bank(ident)][gpio_sub_n(ident)];
  341. pmux = *port_mux[gpio_bank(ident)];
  342. pmux &= ~(3 << offset);
  343. pmux |= (function & 3) << offset;
  344. *port_mux[gpio_bank(ident)] = pmux;
  345. SSYNC();
  346. }
  347. #else
  348. # define portmux_setup(...) do { } while (0)
  349. #endif
  350. #ifndef BF548_FAMILY
  351. static void default_gpio(unsigned short gpio)
  352. {
  353. unsigned short bank, bitmask;
  354. unsigned long flags;
  355. bank = gpio_bank(gpio);
  356. bitmask = gpio_bit(gpio);
  357. local_irq_save(flags);
  358. gpio_bankb[bank]->maska_clear = bitmask;
  359. gpio_bankb[bank]->maskb_clear = bitmask;
  360. SSYNC();
  361. gpio_bankb[bank]->inen &= ~bitmask;
  362. gpio_bankb[bank]->dir &= ~bitmask;
  363. gpio_bankb[bank]->polar &= ~bitmask;
  364. gpio_bankb[bank]->both &= ~bitmask;
  365. gpio_bankb[bank]->edge &= ~bitmask;
  366. AWA_DUMMY_READ(edge);
  367. local_irq_restore(flags);
  368. }
  369. #else
  370. # define default_gpio(...) do { } while (0)
  371. #endif
  372. static int __init bfin_gpio_init(void)
  373. {
  374. str_ident = kcalloc(MAX_RESOURCES,
  375. sizeof(struct str_ident), GFP_KERNEL);
  376. if (str_ident == NULL)
  377. return -ENOMEM;
  378. memset(str_ident, 0, MAX_RESOURCES * sizeof(struct str_ident));
  379. printk(KERN_INFO "Blackfin GPIO Controller\n");
  380. return 0;
  381. }
  382. arch_initcall(bfin_gpio_init);
  383. #ifndef BF548_FAMILY
  384. /***********************************************************
  385. *
  386. * FUNCTIONS: Blackfin General Purpose Ports Access Functions
  387. *
  388. * INPUTS/OUTPUTS:
  389. * gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
  390. *
  391. *
  392. * DESCRIPTION: These functions abstract direct register access
  393. * to Blackfin processor General Purpose
  394. * Ports Regsiters
  395. *
  396. * CAUTION: These functions do not belong to the GPIO Driver API
  397. *************************************************************
  398. * MODIFICATION HISTORY :
  399. **************************************************************/
  400. /* Set a specific bit */
  401. #define SET_GPIO(name) \
  402. void set_gpio_ ## name(unsigned short gpio, unsigned short arg) \
  403. { \
  404. unsigned long flags; \
  405. BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))); \
  406. local_irq_save(flags); \
  407. if (arg) \
  408. gpio_bankb[gpio_bank(gpio)]->name |= gpio_bit(gpio); \
  409. else \
  410. gpio_bankb[gpio_bank(gpio)]->name &= ~gpio_bit(gpio); \
  411. AWA_DUMMY_READ(name); \
  412. local_irq_restore(flags); \
  413. } \
  414. EXPORT_SYMBOL(set_gpio_ ## name);
  415. SET_GPIO(dir)
  416. SET_GPIO(inen)
  417. SET_GPIO(polar)
  418. SET_GPIO(edge)
  419. SET_GPIO(both)
  420. #if ANOMALY_05000311 || ANOMALY_05000323
  421. #define SET_GPIO_SC(name) \
  422. void set_gpio_ ## name(unsigned short gpio, unsigned short arg) \
  423. { \
  424. unsigned long flags; \
  425. BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))); \
  426. local_irq_save(flags); \
  427. if (arg) \
  428. gpio_bankb[gpio_bank(gpio)]->name ## _set = gpio_bit(gpio); \
  429. else \
  430. gpio_bankb[gpio_bank(gpio)]->name ## _clear = gpio_bit(gpio); \
  431. AWA_DUMMY_READ(name); \
  432. local_irq_restore(flags); \
  433. } \
  434. EXPORT_SYMBOL(set_gpio_ ## name);
  435. #else
  436. #define SET_GPIO_SC(name) \
  437. void set_gpio_ ## name(unsigned short gpio, unsigned short arg) \
  438. { \
  439. BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))); \
  440. if (arg) \
  441. gpio_bankb[gpio_bank(gpio)]->name ## _set = gpio_bit(gpio); \
  442. else \
  443. gpio_bankb[gpio_bank(gpio)]->name ## _clear = gpio_bit(gpio); \
  444. } \
  445. EXPORT_SYMBOL(set_gpio_ ## name);
  446. #endif
  447. SET_GPIO_SC(maska)
  448. SET_GPIO_SC(maskb)
  449. SET_GPIO_SC(data)
  450. #if ANOMALY_05000311 || ANOMALY_05000323
  451. void set_gpio_toggle(unsigned short gpio)
  452. {
  453. unsigned long flags;
  454. BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));
  455. local_irq_save(flags);
  456. gpio_bankb[gpio_bank(gpio)]->toggle = gpio_bit(gpio);
  457. AWA_DUMMY_READ(toggle);
  458. local_irq_restore(flags);
  459. }
  460. #else
  461. void set_gpio_toggle(unsigned short gpio)
  462. {
  463. BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));
  464. gpio_bankb[gpio_bank(gpio)]->toggle = gpio_bit(gpio);
  465. }
  466. #endif
  467. EXPORT_SYMBOL(set_gpio_toggle);
  468. /*Set current PORT date (16-bit word)*/
  469. #if ANOMALY_05000311 || ANOMALY_05000323
  470. #define SET_GPIO_P(name) \
  471. void set_gpiop_ ## name(unsigned short gpio, unsigned short arg) \
  472. { \
  473. unsigned long flags; \
  474. local_irq_save(flags); \
  475. gpio_bankb[gpio_bank(gpio)]->name = arg; \
  476. AWA_DUMMY_READ(name); \
  477. local_irq_restore(flags); \
  478. } \
  479. EXPORT_SYMBOL(set_gpiop_ ## name);
  480. #else
  481. #define SET_GPIO_P(name) \
  482. void set_gpiop_ ## name(unsigned short gpio, unsigned short arg) \
  483. { \
  484. gpio_bankb[gpio_bank(gpio)]->name = arg; \
  485. } \
  486. EXPORT_SYMBOL(set_gpiop_ ## name);
  487. #endif
  488. SET_GPIO_P(data)
  489. SET_GPIO_P(dir)
  490. SET_GPIO_P(inen)
  491. SET_GPIO_P(polar)
  492. SET_GPIO_P(edge)
  493. SET_GPIO_P(both)
  494. SET_GPIO_P(maska)
  495. SET_GPIO_P(maskb)
  496. /* Get a specific bit */
  497. #if ANOMALY_05000311 || ANOMALY_05000323
  498. #define GET_GPIO(name) \
  499. unsigned short get_gpio_ ## name(unsigned short gpio) \
  500. { \
  501. unsigned long flags; \
  502. unsigned short ret; \
  503. local_irq_save(flags); \
  504. ret = 0x01 & (gpio_bankb[gpio_bank(gpio)]->name >> gpio_sub_n(gpio)); \
  505. AWA_DUMMY_READ(name); \
  506. local_irq_restore(flags); \
  507. return ret; \
  508. } \
  509. EXPORT_SYMBOL(get_gpio_ ## name);
  510. #else
  511. #define GET_GPIO(name) \
  512. unsigned short get_gpio_ ## name(unsigned short gpio) \
  513. { \
  514. return (0x01 & (gpio_bankb[gpio_bank(gpio)]->name >> gpio_sub_n(gpio))); \
  515. } \
  516. EXPORT_SYMBOL(get_gpio_ ## name);
  517. #endif
  518. GET_GPIO(data)
  519. GET_GPIO(dir)
  520. GET_GPIO(inen)
  521. GET_GPIO(polar)
  522. GET_GPIO(edge)
  523. GET_GPIO(both)
  524. GET_GPIO(maska)
  525. GET_GPIO(maskb)
  526. /*Get current PORT date (16-bit word)*/
  527. #if ANOMALY_05000311 || ANOMALY_05000323
  528. #define GET_GPIO_P(name) \
  529. unsigned short get_gpiop_ ## name(unsigned short gpio) \
  530. { \
  531. unsigned long flags; \
  532. unsigned short ret; \
  533. local_irq_save(flags); \
  534. ret = (gpio_bankb[gpio_bank(gpio)]->name); \
  535. AWA_DUMMY_READ(name); \
  536. local_irq_restore(flags); \
  537. return ret; \
  538. } \
  539. EXPORT_SYMBOL(get_gpiop_ ## name);
  540. #else
  541. #define GET_GPIO_P(name) \
  542. unsigned short get_gpiop_ ## name(unsigned short gpio) \
  543. { \
  544. return (gpio_bankb[gpio_bank(gpio)]->name);\
  545. } \
  546. EXPORT_SYMBOL(get_gpiop_ ## name);
  547. #endif
  548. GET_GPIO_P(data)
  549. GET_GPIO_P(dir)
  550. GET_GPIO_P(inen)
  551. GET_GPIO_P(polar)
  552. GET_GPIO_P(edge)
  553. GET_GPIO_P(both)
  554. GET_GPIO_P(maska)
  555. GET_GPIO_P(maskb)
  556. #ifdef CONFIG_PM
  557. /***********************************************************
  558. *
  559. * FUNCTIONS: Blackfin PM Setup API
  560. *
  561. * INPUTS/OUTPUTS:
  562. * gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
  563. * type -
  564. * PM_WAKE_RISING
  565. * PM_WAKE_FALLING
  566. * PM_WAKE_HIGH
  567. * PM_WAKE_LOW
  568. * PM_WAKE_BOTH_EDGES
  569. *
  570. * DESCRIPTION: Blackfin PM Driver API
  571. *
  572. * CAUTION:
  573. *************************************************************
  574. * MODIFICATION HISTORY :
  575. **************************************************************/
  576. int gpio_pm_wakeup_request(unsigned short gpio, unsigned char type)
  577. {
  578. unsigned long flags;
  579. if ((check_gpio(gpio) < 0) || !type)
  580. return -EINVAL;
  581. local_irq_save(flags);
  582. wakeup_map[gpio_bank(gpio)] |= gpio_bit(gpio);
  583. wakeup_flags_map[gpio] = type;
  584. local_irq_restore(flags);
  585. return 0;
  586. }
  587. EXPORT_SYMBOL(gpio_pm_wakeup_request);
  588. void gpio_pm_wakeup_free(unsigned short gpio)
  589. {
  590. unsigned long flags;
  591. if (check_gpio(gpio) < 0)
  592. return;
  593. local_irq_save(flags);
  594. wakeup_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
  595. local_irq_restore(flags);
  596. }
  597. EXPORT_SYMBOL(gpio_pm_wakeup_free);
  598. static int bfin_gpio_wakeup_type(unsigned short gpio, unsigned char type)
  599. {
  600. port_setup(gpio, GPIO_USAGE);
  601. set_gpio_dir(gpio, 0);
  602. set_gpio_inen(gpio, 1);
  603. if (type & (PM_WAKE_RISING | PM_WAKE_FALLING))
  604. set_gpio_edge(gpio, 1);
  605. else
  606. set_gpio_edge(gpio, 0);
  607. if ((type & (PM_WAKE_BOTH_EDGES)) == (PM_WAKE_BOTH_EDGES))
  608. set_gpio_both(gpio, 1);
  609. else
  610. set_gpio_both(gpio, 0);
  611. if ((type & (PM_WAKE_FALLING | PM_WAKE_LOW)))
  612. set_gpio_polar(gpio, 1);
  613. else
  614. set_gpio_polar(gpio, 0);
  615. SSYNC();
  616. return 0;
  617. }
  618. u32 gpio_pm_setup(void)
  619. {
  620. u32 sic_iwr = 0;
  621. u16 bank, mask, i, gpio;
  622. for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
  623. mask = wakeup_map[gpio_bank(i)];
  624. bank = gpio_bank(i);
  625. gpio_bank_saved[bank].maskb = gpio_bankb[bank]->maskb;
  626. gpio_bankb[bank]->maskb = 0;
  627. if (mask) {
  628. #ifdef BF537_FAMILY
  629. gpio_bank_saved[bank].fer = *port_fer[bank];
  630. #endif
  631. gpio_bank_saved[bank].inen = gpio_bankb[bank]->inen;
  632. gpio_bank_saved[bank].polar = gpio_bankb[bank]->polar;
  633. gpio_bank_saved[bank].dir = gpio_bankb[bank]->dir;
  634. gpio_bank_saved[bank].edge = gpio_bankb[bank]->edge;
  635. gpio_bank_saved[bank].both = gpio_bankb[bank]->both;
  636. gpio_bank_saved[bank].reserved =
  637. reserved_gpio_map[bank];
  638. gpio = i;
  639. while (mask) {
  640. if (mask & 1) {
  641. reserved_gpio_map[gpio_bank(gpio)] |=
  642. gpio_bit(gpio);
  643. bfin_gpio_wakeup_type(gpio,
  644. wakeup_flags_map[gpio]);
  645. set_gpio_data(gpio, 0); /*Clear*/
  646. }
  647. gpio++;
  648. mask >>= 1;
  649. }
  650. sic_iwr |= 1 <<
  651. (sic_iwr_irqs[bank] - (IRQ_CORETMR + 1));
  652. gpio_bankb[bank]->maskb_set = wakeup_map[gpio_bank(i)];
  653. }
  654. }
  655. AWA_DUMMY_READ(maskb_set);
  656. if (sic_iwr)
  657. return sic_iwr;
  658. else
  659. return IWR_ENABLE_ALL;
  660. }
  661. void gpio_pm_restore(void)
  662. {
  663. u16 bank, mask, i;
  664. for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
  665. mask = wakeup_map[gpio_bank(i)];
  666. bank = gpio_bank(i);
  667. if (mask) {
  668. #ifdef BF537_FAMILY
  669. *port_fer[bank] = gpio_bank_saved[bank].fer;
  670. #endif
  671. gpio_bankb[bank]->inen = gpio_bank_saved[bank].inen;
  672. gpio_bankb[bank]->dir = gpio_bank_saved[bank].dir;
  673. gpio_bankb[bank]->polar = gpio_bank_saved[bank].polar;
  674. gpio_bankb[bank]->edge = gpio_bank_saved[bank].edge;
  675. gpio_bankb[bank]->both = gpio_bank_saved[bank].both;
  676. reserved_gpio_map[bank] =
  677. gpio_bank_saved[bank].reserved;
  678. }
  679. gpio_bankb[bank]->maskb = gpio_bank_saved[bank].maskb;
  680. }
  681. AWA_DUMMY_READ(maskb);
  682. }
  683. #endif
  684. #endif /* BF548_FAMILY */
  685. /***********************************************************
  686. *
  687. * FUNCTIONS: Blackfin Peripheral Resource Allocation
  688. * and PortMux Setup
  689. *
  690. * INPUTS/OUTPUTS:
  691. * per Peripheral Identifier
  692. * label String
  693. *
  694. * DESCRIPTION: Blackfin Peripheral Resource Allocation and Setup API
  695. *
  696. * CAUTION:
  697. *************************************************************
  698. * MODIFICATION HISTORY :
  699. **************************************************************/
  700. #ifdef BF548_FAMILY
  701. int peripheral_request(unsigned short per, const char *label)
  702. {
  703. unsigned long flags;
  704. unsigned short ident = P_IDENT(per);
  705. /*
  706. * Don't cares are pins with only one dedicated function
  707. */
  708. if (per & P_DONTCARE)
  709. return 0;
  710. if (!(per & P_DEFINED))
  711. return -ENODEV;
  712. if (check_gpio(ident) < 0)
  713. return -EINVAL;
  714. local_irq_save(flags);
  715. if (unlikely(reserved_gpio_map[gpio_bank(ident)] & gpio_bit(ident))) {
  716. printk(KERN_ERR
  717. "%s: Peripheral %d is already reserved as GPIO by %s !\n",
  718. __FUNCTION__, ident, get_label(ident));
  719. dump_stack();
  720. local_irq_restore(flags);
  721. return -EBUSY;
  722. }
  723. if (unlikely(reserved_peri_map[gpio_bank(ident)] & gpio_bit(ident))) {
  724. u16 funct = get_portmux(ident);
  725. /*
  726. * Pin functions like AMC address strobes my
  727. * be requested and used by several drivers
  728. */
  729. if (!((per & P_MAYSHARE) && (funct == P_FUNCT2MUX(per)))) {
  730. /*
  731. * Allow that the identical pin function can
  732. * be requested from the same driver twice
  733. */
  734. if (cmp_label(ident, label) == 0)
  735. goto anyway;
  736. printk(KERN_ERR
  737. "%s: Peripheral %d function %d is already reserved by %s !\n",
  738. __FUNCTION__, ident, P_FUNCT2MUX(per), get_label(ident));
  739. dump_stack();
  740. local_irq_restore(flags);
  741. return -EBUSY;
  742. }
  743. }
  744. anyway:
  745. reserved_peri_map[gpio_bank(ident)] |= gpio_bit(ident);
  746. portmux_setup(ident, P_FUNCT2MUX(per));
  747. port_setup(ident, PERIPHERAL_USAGE);
  748. local_irq_restore(flags);
  749. set_label(ident, label);
  750. return 0;
  751. }
  752. EXPORT_SYMBOL(peripheral_request);
  753. #else
  754. int peripheral_request(unsigned short per, const char *label)
  755. {
  756. unsigned long flags;
  757. unsigned short ident = P_IDENT(per);
  758. /*
  759. * Don't cares are pins with only one dedicated function
  760. */
  761. if (per & P_DONTCARE)
  762. return 0;
  763. if (!(per & P_DEFINED))
  764. return -ENODEV;
  765. local_irq_save(flags);
  766. if (!check_gpio(ident)) {
  767. if (unlikely(reserved_gpio_map[gpio_bank(ident)] & gpio_bit(ident))) {
  768. printk(KERN_ERR
  769. "%s: Peripheral %d is already reserved as GPIO by %s !\n",
  770. __FUNCTION__, ident, get_label(ident));
  771. dump_stack();
  772. local_irq_restore(flags);
  773. return -EBUSY;
  774. }
  775. }
  776. if (unlikely(reserved_peri_map[gpio_bank(ident)] & gpio_bit(ident))) {
  777. /*
  778. * Pin functions like AMC address strobes my
  779. * be requested and used by several drivers
  780. */
  781. if (!(per & P_MAYSHARE)) {
  782. /*
  783. * Allow that the identical pin function can
  784. * be requested from the same driver twice
  785. */
  786. if (cmp_label(ident, label) == 0)
  787. goto anyway;
  788. printk(KERN_ERR
  789. "%s: Peripheral %d function %d is already"
  790. " reserved by %s !\n",
  791. __FUNCTION__, ident, P_FUNCT2MUX(per),
  792. get_label(ident));
  793. dump_stack();
  794. local_irq_restore(flags);
  795. return -EBUSY;
  796. }
  797. }
  798. anyway:
  799. portmux_setup(per, P_FUNCT2MUX(per));
  800. port_setup(ident, PERIPHERAL_USAGE);
  801. reserved_peri_map[gpio_bank(ident)] |= gpio_bit(ident);
  802. local_irq_restore(flags);
  803. set_label(ident, label);
  804. return 0;
  805. }
  806. EXPORT_SYMBOL(peripheral_request);
  807. #endif
  808. int peripheral_request_list(unsigned short per[], const char *label)
  809. {
  810. u16 cnt;
  811. int ret;
  812. for (cnt = 0; per[cnt] != 0; cnt++) {
  813. ret = peripheral_request(per[cnt], label);
  814. if (ret < 0) {
  815. for ( ; cnt > 0; cnt--) {
  816. peripheral_free(per[cnt - 1]);
  817. }
  818. return ret;
  819. }
  820. }
  821. return 0;
  822. }
  823. EXPORT_SYMBOL(peripheral_request_list);
  824. void peripheral_free(unsigned short per)
  825. {
  826. unsigned long flags;
  827. unsigned short ident = P_IDENT(per);
  828. if (per & P_DONTCARE)
  829. return;
  830. if (!(per & P_DEFINED))
  831. return;
  832. if (check_gpio(ident) < 0)
  833. return;
  834. local_irq_save(flags);
  835. if (unlikely(!(reserved_peri_map[gpio_bank(ident)]
  836. & gpio_bit(ident)))) {
  837. local_irq_restore(flags);
  838. return;
  839. }
  840. if (!(per & P_MAYSHARE)) {
  841. port_setup(ident, GPIO_USAGE);
  842. }
  843. reserved_peri_map[gpio_bank(ident)] &= ~gpio_bit(ident);
  844. set_label(ident, "free");
  845. local_irq_restore(flags);
  846. }
  847. EXPORT_SYMBOL(peripheral_free);
  848. void peripheral_free_list(unsigned short per[])
  849. {
  850. u16 cnt;
  851. for (cnt = 0; per[cnt] != 0; cnt++) {
  852. peripheral_free(per[cnt]);
  853. }
  854. }
  855. EXPORT_SYMBOL(peripheral_free_list);
  856. /***********************************************************
  857. *
  858. * FUNCTIONS: Blackfin GPIO Driver
  859. *
  860. * INPUTS/OUTPUTS:
  861. * gpio PIO Number between 0 and MAX_BLACKFIN_GPIOS
  862. * label String
  863. *
  864. * DESCRIPTION: Blackfin GPIO Driver API
  865. *
  866. * CAUTION:
  867. *************************************************************
  868. * MODIFICATION HISTORY :
  869. **************************************************************/
  870. int gpio_request(unsigned short gpio, const char *label)
  871. {
  872. unsigned long flags;
  873. if (check_gpio(gpio) < 0)
  874. return -EINVAL;
  875. local_irq_save(flags);
  876. /*
  877. * Allow that the identical GPIO can
  878. * be requested from the same driver twice
  879. * Do nothing and return -
  880. */
  881. if (cmp_label(gpio, label) == 0) {
  882. local_irq_restore(flags);
  883. return 0;
  884. }
  885. if (unlikely(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
  886. printk(KERN_ERR "bfin-gpio: GPIO %d is already reserved by %s !\n",
  887. gpio, get_label(gpio));
  888. dump_stack();
  889. local_irq_restore(flags);
  890. return -EBUSY;
  891. }
  892. if (unlikely(reserved_peri_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
  893. printk(KERN_ERR
  894. "bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n",
  895. gpio, get_label(gpio));
  896. dump_stack();
  897. local_irq_restore(flags);
  898. return -EBUSY;
  899. }
  900. reserved_gpio_map[gpio_bank(gpio)] |= gpio_bit(gpio);
  901. local_irq_restore(flags);
  902. port_setup(gpio, GPIO_USAGE);
  903. set_label(gpio, label);
  904. return 0;
  905. }
  906. EXPORT_SYMBOL(gpio_request);
  907. void gpio_free(unsigned short gpio)
  908. {
  909. unsigned long flags;
  910. if (check_gpio(gpio) < 0)
  911. return;
  912. local_irq_save(flags);
  913. if (unlikely(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)))) {
  914. printk(KERN_ERR "bfin-gpio: GPIO %d wasn't reserved!\n", gpio);
  915. dump_stack();
  916. local_irq_restore(flags);
  917. return;
  918. }
  919. default_gpio(gpio);
  920. reserved_gpio_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
  921. set_label(gpio, "free");
  922. local_irq_restore(flags);
  923. }
  924. EXPORT_SYMBOL(gpio_free);
  925. #ifdef BF548_FAMILY
  926. void gpio_direction_input(unsigned short gpio)
  927. {
  928. unsigned long flags;
  929. BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));
  930. local_irq_save(flags);
  931. gpio_array[gpio_bank(gpio)]->port_dir_clear = gpio_bit(gpio);
  932. gpio_array[gpio_bank(gpio)]->port_inen |= gpio_bit(gpio);
  933. local_irq_restore(flags);
  934. }
  935. EXPORT_SYMBOL(gpio_direction_input);
  936. void gpio_direction_output(unsigned short gpio)
  937. {
  938. unsigned long flags;
  939. BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));
  940. local_irq_save(flags);
  941. gpio_array[gpio_bank(gpio)]->port_inen &= ~gpio_bit(gpio);
  942. gpio_array[gpio_bank(gpio)]->port_dir_set = gpio_bit(gpio);
  943. local_irq_restore(flags);
  944. }
  945. EXPORT_SYMBOL(gpio_direction_output);
  946. void gpio_set_value(unsigned short gpio, unsigned short arg)
  947. {
  948. if (arg)
  949. gpio_array[gpio_bank(gpio)]->port_set = gpio_bit(gpio);
  950. else
  951. gpio_array[gpio_bank(gpio)]->port_clear = gpio_bit(gpio);
  952. }
  953. EXPORT_SYMBOL(gpio_set_value);
  954. unsigned short gpio_get_value(unsigned short gpio)
  955. {
  956. return (1 & (gpio_array[gpio_bank(gpio)]->port_data >> gpio_sub_n(gpio)));
  957. }
  958. EXPORT_SYMBOL(gpio_get_value);
  959. #else
  960. void gpio_direction_input(unsigned short gpio)
  961. {
  962. unsigned long flags;
  963. BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));
  964. local_irq_save(flags);
  965. gpio_bankb[gpio_bank(gpio)]->dir &= ~gpio_bit(gpio);
  966. gpio_bankb[gpio_bank(gpio)]->inen |= gpio_bit(gpio);
  967. AWA_DUMMY_READ(inen);
  968. local_irq_restore(flags);
  969. }
  970. EXPORT_SYMBOL(gpio_direction_input);
  971. void gpio_direction_output(unsigned short gpio)
  972. {
  973. unsigned long flags;
  974. BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));
  975. local_irq_save(flags);
  976. gpio_bankb[gpio_bank(gpio)]->inen &= ~gpio_bit(gpio);
  977. gpio_bankb[gpio_bank(gpio)]->dir |= gpio_bit(gpio);
  978. AWA_DUMMY_READ(dir);
  979. local_irq_restore(flags);
  980. }
  981. EXPORT_SYMBOL(gpio_direction_output);
  982. /* If we are booting from SPI and our board lacks a strong enough pull up,
  983. * the core can reset and execute the bootrom faster than the resistor can
  984. * pull the signal logically high. To work around this (common) error in
  985. * board design, we explicitly set the pin back to GPIO mode, force /CS
  986. * high, and wait for the electrons to do their thing.
  987. *
  988. * This function only makes sense to be called from reset code, but it
  989. * lives here as we need to force all the GPIO states w/out going through
  990. * BUG() checks and such.
  991. */
  992. void bfin_gpio_reset_spi0_ssel1(void)
  993. {
  994. u16 gpio = P_IDENT(P_SPI0_SSEL1);
  995. port_setup(gpio, GPIO_USAGE);
  996. gpio_bankb[gpio_bank(gpio)]->data_set = gpio_bit(gpio);
  997. udelay(1);
  998. }
  999. #endif /*BF548_FAMILY */
  1000. #if defined(CONFIG_PROC_FS)
  1001. static int gpio_proc_read(char *buf, char **start, off_t offset,
  1002. int len, int *unused_i, void *unused_v)
  1003. {
  1004. int c, outlen = 0;
  1005. for (c = 0; c < MAX_RESOURCES; c++) {
  1006. if (!check_gpio(c) && (reserved_gpio_map[gpio_bank(c)] & gpio_bit(c)))
  1007. len = sprintf(buf, "GPIO_%d: %s \tGPIO %s\n", c,
  1008. get_label(c), get_gpio_dir(c) ? "OUTPUT" : "INPUT");
  1009. else if (reserved_peri_map[gpio_bank(c)] & gpio_bit(c))
  1010. len = sprintf(buf, "GPIO_%d: %s \tPeripheral\n", c, get_label(c));
  1011. else
  1012. continue;
  1013. buf += len;
  1014. outlen += len;
  1015. }
  1016. return outlen;
  1017. }
  1018. static __init int gpio_register_proc(void)
  1019. {
  1020. struct proc_dir_entry *proc_gpio;
  1021. proc_gpio = create_proc_entry("gpio", S_IRUGO, NULL);
  1022. if (proc_gpio)
  1023. proc_gpio->read_proc = gpio_proc_read;
  1024. return proc_gpio != NULL;
  1025. }
  1026. __initcall(gpio_register_proc);
  1027. #endif