fsl-diu-fb.c 45 KB

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  1. /*
  2. * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
  3. *
  4. * Freescale DIU Frame Buffer device driver
  5. *
  6. * Authors: Hongjun Chen <hong-jun.chen@freescale.com>
  7. * Paul Widmer <paul.widmer@freescale.com>
  8. * Srikanth Srinivasan <srikanth.srinivasan@freescale.com>
  9. * York Sun <yorksun@freescale.com>
  10. *
  11. * Based on imxfb.c Copyright (C) 2004 S.Hauer, Pengutronix
  12. *
  13. * This program is free software; you can redistribute it and/or modify it
  14. * under the terms of the GNU General Public License as published by the
  15. * Free Software Foundation; either version 2 of the License, or (at your
  16. * option) any later version.
  17. *
  18. */
  19. #include <linux/module.h>
  20. #include <linux/kernel.h>
  21. #include <linux/errno.h>
  22. #include <linux/string.h>
  23. #include <linux/slab.h>
  24. #include <linux/fb.h>
  25. #include <linux/init.h>
  26. #include <linux/dma-mapping.h>
  27. #include <linux/platform_device.h>
  28. #include <linux/interrupt.h>
  29. #include <linux/clk.h>
  30. #include <linux/uaccess.h>
  31. #include <linux/vmalloc.h>
  32. #include <sysdev/fsl_soc.h>
  33. #include <linux/fsl-diu-fb.h>
  34. #include "edid.h"
  35. /*
  36. * These parameters give default parameters
  37. * for video output 1024x768,
  38. * FIXME - change timing to proper amounts
  39. * hsync 31.5kHz, vsync 60Hz
  40. */
  41. static struct fb_videomode __devinitdata fsl_diu_default_mode = {
  42. .refresh = 60,
  43. .xres = 1024,
  44. .yres = 768,
  45. .pixclock = 15385,
  46. .left_margin = 160,
  47. .right_margin = 24,
  48. .upper_margin = 29,
  49. .lower_margin = 3,
  50. .hsync_len = 136,
  51. .vsync_len = 6,
  52. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  53. .vmode = FB_VMODE_NONINTERLACED
  54. };
  55. static struct fb_videomode __devinitdata fsl_diu_mode_db[] = {
  56. {
  57. .name = "1024x768-60",
  58. .refresh = 60,
  59. .xres = 1024,
  60. .yres = 768,
  61. .pixclock = 15385,
  62. .left_margin = 160,
  63. .right_margin = 24,
  64. .upper_margin = 29,
  65. .lower_margin = 3,
  66. .hsync_len = 136,
  67. .vsync_len = 6,
  68. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  69. .vmode = FB_VMODE_NONINTERLACED
  70. },
  71. {
  72. .name = "1024x768-70",
  73. .refresh = 70,
  74. .xres = 1024,
  75. .yres = 768,
  76. .pixclock = 16886,
  77. .left_margin = 3,
  78. .right_margin = 3,
  79. .upper_margin = 2,
  80. .lower_margin = 2,
  81. .hsync_len = 40,
  82. .vsync_len = 18,
  83. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  84. .vmode = FB_VMODE_NONINTERLACED
  85. },
  86. {
  87. .name = "1024x768-75",
  88. .refresh = 75,
  89. .xres = 1024,
  90. .yres = 768,
  91. .pixclock = 15009,
  92. .left_margin = 3,
  93. .right_margin = 3,
  94. .upper_margin = 2,
  95. .lower_margin = 2,
  96. .hsync_len = 80,
  97. .vsync_len = 32,
  98. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  99. .vmode = FB_VMODE_NONINTERLACED
  100. },
  101. {
  102. .name = "1280x1024-60",
  103. .refresh = 60,
  104. .xres = 1280,
  105. .yres = 1024,
  106. .pixclock = 9375,
  107. .left_margin = 38,
  108. .right_margin = 128,
  109. .upper_margin = 2,
  110. .lower_margin = 7,
  111. .hsync_len = 216,
  112. .vsync_len = 37,
  113. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  114. .vmode = FB_VMODE_NONINTERLACED
  115. },
  116. {
  117. .name = "1280x1024-70",
  118. .refresh = 70,
  119. .xres = 1280,
  120. .yres = 1024,
  121. .pixclock = 9380,
  122. .left_margin = 6,
  123. .right_margin = 6,
  124. .upper_margin = 4,
  125. .lower_margin = 4,
  126. .hsync_len = 60,
  127. .vsync_len = 94,
  128. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  129. .vmode = FB_VMODE_NONINTERLACED
  130. },
  131. {
  132. .name = "1280x1024-75",
  133. .refresh = 75,
  134. .xres = 1280,
  135. .yres = 1024,
  136. .pixclock = 9380,
  137. .left_margin = 6,
  138. .right_margin = 6,
  139. .upper_margin = 4,
  140. .lower_margin = 4,
  141. .hsync_len = 60,
  142. .vsync_len = 15,
  143. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  144. .vmode = FB_VMODE_NONINTERLACED
  145. },
  146. {
  147. .name = "320x240", /* for AOI only */
  148. .refresh = 60,
  149. .xres = 320,
  150. .yres = 240,
  151. .pixclock = 15385,
  152. .left_margin = 0,
  153. .right_margin = 0,
  154. .upper_margin = 0,
  155. .lower_margin = 0,
  156. .hsync_len = 0,
  157. .vsync_len = 0,
  158. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  159. .vmode = FB_VMODE_NONINTERLACED
  160. },
  161. {
  162. .name = "1280x480-60",
  163. .refresh = 60,
  164. .xres = 1280,
  165. .yres = 480,
  166. .pixclock = 18939,
  167. .left_margin = 353,
  168. .right_margin = 47,
  169. .upper_margin = 39,
  170. .lower_margin = 4,
  171. .hsync_len = 8,
  172. .vsync_len = 2,
  173. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  174. .vmode = FB_VMODE_NONINTERLACED
  175. },
  176. };
  177. static char *fb_mode = "1024x768-32@60";
  178. static unsigned long default_bpp = 32;
  179. static enum fsl_diu_monitor_port monitor_port;
  180. static char *monitor_string;
  181. #if defined(CONFIG_NOT_COHERENT_CACHE)
  182. static u8 *coherence_data;
  183. static size_t coherence_data_size;
  184. static unsigned int d_cache_line_size;
  185. #endif
  186. static DEFINE_SPINLOCK(diu_lock);
  187. struct fsl_diu_data {
  188. struct fb_info *fsl_diu_info[FSL_AOI_NUM - 1];
  189. /*FSL_AOI_NUM has one dummy AOI */
  190. struct device_attribute dev_attr;
  191. struct diu_ad *dummy_ad;
  192. void *dummy_aoi_virt;
  193. unsigned int irq;
  194. int fb_enabled;
  195. enum fsl_diu_monitor_port monitor_port;
  196. };
  197. struct mfb_info {
  198. int index;
  199. int type;
  200. char *id;
  201. int registered;
  202. int blank;
  203. unsigned long pseudo_palette[16];
  204. struct diu_ad *ad;
  205. int cursor_reset;
  206. unsigned char g_alpha;
  207. unsigned int count;
  208. int x_aoi_d; /* aoi display x offset to physical screen */
  209. int y_aoi_d; /* aoi display y offset to physical screen */
  210. struct fsl_diu_data *parent;
  211. u8 *edid_data;
  212. };
  213. static struct mfb_info mfb_template[] = {
  214. { /* AOI 0 for plane 0 */
  215. .index = 0,
  216. .type = MFB_TYPE_OUTPUT,
  217. .id = "Panel0",
  218. .registered = 0,
  219. .count = 0,
  220. .x_aoi_d = 0,
  221. .y_aoi_d = 0,
  222. },
  223. { /* AOI 0 for plane 1 */
  224. .index = 1,
  225. .type = MFB_TYPE_OUTPUT,
  226. .id = "Panel1 AOI0",
  227. .registered = 0,
  228. .g_alpha = 0xff,
  229. .count = 0,
  230. .x_aoi_d = 0,
  231. .y_aoi_d = 0,
  232. },
  233. { /* AOI 1 for plane 1 */
  234. .index = 2,
  235. .type = MFB_TYPE_OUTPUT,
  236. .id = "Panel1 AOI1",
  237. .registered = 0,
  238. .g_alpha = 0xff,
  239. .count = 0,
  240. .x_aoi_d = 0,
  241. .y_aoi_d = 480,
  242. },
  243. { /* AOI 0 for plane 2 */
  244. .index = 3,
  245. .type = MFB_TYPE_OUTPUT,
  246. .id = "Panel2 AOI0",
  247. .registered = 0,
  248. .g_alpha = 0xff,
  249. .count = 0,
  250. .x_aoi_d = 640,
  251. .y_aoi_d = 0,
  252. },
  253. { /* AOI 1 for plane 2 */
  254. .index = 4,
  255. .type = MFB_TYPE_OUTPUT,
  256. .id = "Panel2 AOI1",
  257. .registered = 0,
  258. .g_alpha = 0xff,
  259. .count = 0,
  260. .x_aoi_d = 640,
  261. .y_aoi_d = 480,
  262. },
  263. };
  264. static struct diu_hw dr = {
  265. .mode = MFB_MODE1,
  266. .reg_lock = __SPIN_LOCK_UNLOCKED(diu_hw.reg_lock),
  267. };
  268. static struct diu_pool pool;
  269. /**
  270. * fsl_diu_name_to_port - convert a port name to a monitor port enum
  271. *
  272. * Takes the name of a monitor port ("dvi", "lvds", or "dlvds") and returns
  273. * the enum fsl_diu_monitor_port that corresponds to that string.
  274. *
  275. * For compatibility with older versions, a number ("0", "1", or "2") is also
  276. * supported.
  277. *
  278. * If the string is unknown, DVI is assumed.
  279. *
  280. * If the particular port is not supported by the platform, another port
  281. * (platform-specific) is chosen instead.
  282. */
  283. static enum fsl_diu_monitor_port fsl_diu_name_to_port(const char *s)
  284. {
  285. enum fsl_diu_monitor_port port = FSL_DIU_PORT_DVI;
  286. unsigned long val;
  287. if (s) {
  288. if (!strict_strtoul(s, 10, &val) && (val <= 2))
  289. port = (enum fsl_diu_monitor_port) val;
  290. else if (strncmp(s, "lvds", 4) == 0)
  291. port = FSL_DIU_PORT_LVDS;
  292. else if (strncmp(s, "dlvds", 5) == 0)
  293. port = FSL_DIU_PORT_DLVDS;
  294. }
  295. return diu_ops.valid_monitor_port(port);
  296. }
  297. /**
  298. * fsl_diu_alloc - allocate memory for the DIU
  299. * @size: number of bytes to allocate
  300. * @param: returned physical address of memory
  301. *
  302. * This function allocates a physically-contiguous block of memory.
  303. */
  304. static void *fsl_diu_alloc(size_t size, phys_addr_t *phys)
  305. {
  306. void *virt;
  307. virt = alloc_pages_exact(size, GFP_DMA | __GFP_ZERO);
  308. if (virt)
  309. *phys = virt_to_phys(virt);
  310. return virt;
  311. }
  312. /**
  313. * fsl_diu_free - release DIU memory
  314. * @virt: pointer returned by fsl_diu_alloc()
  315. * @size: number of bytes allocated by fsl_diu_alloc()
  316. *
  317. * This function releases memory allocated by fsl_diu_alloc().
  318. */
  319. static void fsl_diu_free(void *virt, size_t size)
  320. {
  321. if (virt && size)
  322. free_pages_exact(virt, size);
  323. }
  324. /*
  325. * Workaround for failed writing desc register of planes.
  326. * Needed with MPC5121 DIU rev 2.0 silicon.
  327. */
  328. void wr_reg_wa(u32 *reg, u32 val)
  329. {
  330. do {
  331. out_be32(reg, val);
  332. } while (in_be32(reg) != val);
  333. }
  334. static int fsl_diu_enable_panel(struct fb_info *info)
  335. {
  336. struct mfb_info *pmfbi, *cmfbi, *mfbi = info->par;
  337. struct diu *hw = dr.diu_reg;
  338. struct diu_ad *ad = mfbi->ad;
  339. struct fsl_diu_data *machine_data = mfbi->parent;
  340. int res = 0;
  341. if (mfbi->type != MFB_TYPE_OFF) {
  342. switch (mfbi->index) {
  343. case 0: /* plane 0 */
  344. if (hw->desc[0] != ad->paddr)
  345. wr_reg_wa(&hw->desc[0], ad->paddr);
  346. break;
  347. case 1: /* plane 1 AOI 0 */
  348. cmfbi = machine_data->fsl_diu_info[2]->par;
  349. if (hw->desc[1] != ad->paddr) { /* AOI0 closed */
  350. if (cmfbi->count > 0) /* AOI1 open */
  351. ad->next_ad =
  352. cpu_to_le32(cmfbi->ad->paddr);
  353. else
  354. ad->next_ad = 0;
  355. wr_reg_wa(&hw->desc[1], ad->paddr);
  356. }
  357. break;
  358. case 3: /* plane 2 AOI 0 */
  359. cmfbi = machine_data->fsl_diu_info[4]->par;
  360. if (hw->desc[2] != ad->paddr) { /* AOI0 closed */
  361. if (cmfbi->count > 0) /* AOI1 open */
  362. ad->next_ad =
  363. cpu_to_le32(cmfbi->ad->paddr);
  364. else
  365. ad->next_ad = 0;
  366. wr_reg_wa(&hw->desc[2], ad->paddr);
  367. }
  368. break;
  369. case 2: /* plane 1 AOI 1 */
  370. pmfbi = machine_data->fsl_diu_info[1]->par;
  371. ad->next_ad = 0;
  372. if (hw->desc[1] == machine_data->dummy_ad->paddr)
  373. wr_reg_wa(&hw->desc[1], ad->paddr);
  374. else /* AOI0 open */
  375. pmfbi->ad->next_ad = cpu_to_le32(ad->paddr);
  376. break;
  377. case 4: /* plane 2 AOI 1 */
  378. pmfbi = machine_data->fsl_diu_info[3]->par;
  379. ad->next_ad = 0;
  380. if (hw->desc[2] == machine_data->dummy_ad->paddr)
  381. wr_reg_wa(&hw->desc[2], ad->paddr);
  382. else /* AOI0 was open */
  383. pmfbi->ad->next_ad = cpu_to_le32(ad->paddr);
  384. break;
  385. default:
  386. res = -EINVAL;
  387. break;
  388. }
  389. } else
  390. res = -EINVAL;
  391. return res;
  392. }
  393. static int fsl_diu_disable_panel(struct fb_info *info)
  394. {
  395. struct mfb_info *pmfbi, *cmfbi, *mfbi = info->par;
  396. struct diu *hw = dr.diu_reg;
  397. struct diu_ad *ad = mfbi->ad;
  398. struct fsl_diu_data *machine_data = mfbi->parent;
  399. int res = 0;
  400. switch (mfbi->index) {
  401. case 0: /* plane 0 */
  402. if (hw->desc[0] != machine_data->dummy_ad->paddr)
  403. wr_reg_wa(&hw->desc[0], machine_data->dummy_ad->paddr);
  404. break;
  405. case 1: /* plane 1 AOI 0 */
  406. cmfbi = machine_data->fsl_diu_info[2]->par;
  407. if (cmfbi->count > 0) /* AOI1 is open */
  408. wr_reg_wa(&hw->desc[1], cmfbi->ad->paddr);
  409. /* move AOI1 to the first */
  410. else /* AOI1 was closed */
  411. wr_reg_wa(&hw->desc[1], machine_data->dummy_ad->paddr);
  412. /* close AOI 0 */
  413. break;
  414. case 3: /* plane 2 AOI 0 */
  415. cmfbi = machine_data->fsl_diu_info[4]->par;
  416. if (cmfbi->count > 0) /* AOI1 is open */
  417. wr_reg_wa(&hw->desc[2], cmfbi->ad->paddr);
  418. /* move AOI1 to the first */
  419. else /* AOI1 was closed */
  420. wr_reg_wa(&hw->desc[2], machine_data->dummy_ad->paddr);
  421. /* close AOI 0 */
  422. break;
  423. case 2: /* plane 1 AOI 1 */
  424. pmfbi = machine_data->fsl_diu_info[1]->par;
  425. if (hw->desc[1] != ad->paddr) {
  426. /* AOI1 is not the first in the chain */
  427. if (pmfbi->count > 0)
  428. /* AOI0 is open, must be the first */
  429. pmfbi->ad->next_ad = 0;
  430. } else /* AOI1 is the first in the chain */
  431. wr_reg_wa(&hw->desc[1], machine_data->dummy_ad->paddr);
  432. /* close AOI 1 */
  433. break;
  434. case 4: /* plane 2 AOI 1 */
  435. pmfbi = machine_data->fsl_diu_info[3]->par;
  436. if (hw->desc[2] != ad->paddr) {
  437. /* AOI1 is not the first in the chain */
  438. if (pmfbi->count > 0)
  439. /* AOI0 is open, must be the first */
  440. pmfbi->ad->next_ad = 0;
  441. } else /* AOI1 is the first in the chain */
  442. wr_reg_wa(&hw->desc[2], machine_data->dummy_ad->paddr);
  443. /* close AOI 1 */
  444. break;
  445. default:
  446. res = -EINVAL;
  447. break;
  448. }
  449. return res;
  450. }
  451. static void enable_lcdc(struct fb_info *info)
  452. {
  453. struct diu *hw = dr.diu_reg;
  454. struct mfb_info *mfbi = info->par;
  455. struct fsl_diu_data *machine_data = mfbi->parent;
  456. if (!machine_data->fb_enabled) {
  457. out_be32(&hw->diu_mode, dr.mode);
  458. machine_data->fb_enabled++;
  459. }
  460. }
  461. static void disable_lcdc(struct fb_info *info)
  462. {
  463. struct diu *hw = dr.diu_reg;
  464. struct mfb_info *mfbi = info->par;
  465. struct fsl_diu_data *machine_data = mfbi->parent;
  466. if (machine_data->fb_enabled) {
  467. out_be32(&hw->diu_mode, 0);
  468. machine_data->fb_enabled = 0;
  469. }
  470. }
  471. static void adjust_aoi_size_position(struct fb_var_screeninfo *var,
  472. struct fb_info *info)
  473. {
  474. struct mfb_info *lower_aoi_mfbi, *upper_aoi_mfbi, *mfbi = info->par;
  475. struct fsl_diu_data *machine_data = mfbi->parent;
  476. int available_height, upper_aoi_bottom, index = mfbi->index;
  477. int lower_aoi_is_open, upper_aoi_is_open;
  478. __u32 base_plane_width, base_plane_height, upper_aoi_height;
  479. base_plane_width = machine_data->fsl_diu_info[0]->var.xres;
  480. base_plane_height = machine_data->fsl_diu_info[0]->var.yres;
  481. if (mfbi->x_aoi_d < 0)
  482. mfbi->x_aoi_d = 0;
  483. if (mfbi->y_aoi_d < 0)
  484. mfbi->y_aoi_d = 0;
  485. switch (index) {
  486. case 0:
  487. if (mfbi->x_aoi_d != 0)
  488. mfbi->x_aoi_d = 0;
  489. if (mfbi->y_aoi_d != 0)
  490. mfbi->y_aoi_d = 0;
  491. break;
  492. case 1: /* AOI 0 */
  493. case 3:
  494. lower_aoi_mfbi = machine_data->fsl_diu_info[index+1]->par;
  495. lower_aoi_is_open = lower_aoi_mfbi->count > 0 ? 1 : 0;
  496. if (var->xres > base_plane_width)
  497. var->xres = base_plane_width;
  498. if ((mfbi->x_aoi_d + var->xres) > base_plane_width)
  499. mfbi->x_aoi_d = base_plane_width - var->xres;
  500. if (lower_aoi_is_open)
  501. available_height = lower_aoi_mfbi->y_aoi_d;
  502. else
  503. available_height = base_plane_height;
  504. if (var->yres > available_height)
  505. var->yres = available_height;
  506. if ((mfbi->y_aoi_d + var->yres) > available_height)
  507. mfbi->y_aoi_d = available_height - var->yres;
  508. break;
  509. case 2: /* AOI 1 */
  510. case 4:
  511. upper_aoi_mfbi = machine_data->fsl_diu_info[index-1]->par;
  512. upper_aoi_height =
  513. machine_data->fsl_diu_info[index-1]->var.yres;
  514. upper_aoi_bottom = upper_aoi_mfbi->y_aoi_d + upper_aoi_height;
  515. upper_aoi_is_open = upper_aoi_mfbi->count > 0 ? 1 : 0;
  516. if (var->xres > base_plane_width)
  517. var->xres = base_plane_width;
  518. if ((mfbi->x_aoi_d + var->xres) > base_plane_width)
  519. mfbi->x_aoi_d = base_plane_width - var->xres;
  520. if (mfbi->y_aoi_d < 0)
  521. mfbi->y_aoi_d = 0;
  522. if (upper_aoi_is_open) {
  523. if (mfbi->y_aoi_d < upper_aoi_bottom)
  524. mfbi->y_aoi_d = upper_aoi_bottom;
  525. available_height = base_plane_height
  526. - upper_aoi_bottom;
  527. } else
  528. available_height = base_plane_height;
  529. if (var->yres > available_height)
  530. var->yres = available_height;
  531. if ((mfbi->y_aoi_d + var->yres) > base_plane_height)
  532. mfbi->y_aoi_d = base_plane_height - var->yres;
  533. break;
  534. }
  535. }
  536. /*
  537. * Checks to see if the hardware supports the state requested by var passed
  538. * in. This function does not alter the hardware state! If the var passed in
  539. * is slightly off by what the hardware can support then we alter the var
  540. * PASSED in to what we can do. If the hardware doesn't support mode change
  541. * a -EINVAL will be returned by the upper layers.
  542. */
  543. static int fsl_diu_check_var(struct fb_var_screeninfo *var,
  544. struct fb_info *info)
  545. {
  546. if (var->xres_virtual < var->xres)
  547. var->xres_virtual = var->xres;
  548. if (var->yres_virtual < var->yres)
  549. var->yres_virtual = var->yres;
  550. if (var->xoffset < 0)
  551. var->xoffset = 0;
  552. if (var->yoffset < 0)
  553. var->yoffset = 0;
  554. if (var->xoffset + info->var.xres > info->var.xres_virtual)
  555. var->xoffset = info->var.xres_virtual - info->var.xres;
  556. if (var->yoffset + info->var.yres > info->var.yres_virtual)
  557. var->yoffset = info->var.yres_virtual - info->var.yres;
  558. if ((var->bits_per_pixel != 32) && (var->bits_per_pixel != 24) &&
  559. (var->bits_per_pixel != 16))
  560. var->bits_per_pixel = default_bpp;
  561. switch (var->bits_per_pixel) {
  562. case 16:
  563. var->red.length = 5;
  564. var->red.offset = 11;
  565. var->red.msb_right = 0;
  566. var->green.length = 6;
  567. var->green.offset = 5;
  568. var->green.msb_right = 0;
  569. var->blue.length = 5;
  570. var->blue.offset = 0;
  571. var->blue.msb_right = 0;
  572. var->transp.length = 0;
  573. var->transp.offset = 0;
  574. var->transp.msb_right = 0;
  575. break;
  576. case 24:
  577. var->red.length = 8;
  578. var->red.offset = 0;
  579. var->red.msb_right = 0;
  580. var->green.length = 8;
  581. var->green.offset = 8;
  582. var->green.msb_right = 0;
  583. var->blue.length = 8;
  584. var->blue.offset = 16;
  585. var->blue.msb_right = 0;
  586. var->transp.length = 0;
  587. var->transp.offset = 0;
  588. var->transp.msb_right = 0;
  589. break;
  590. case 32:
  591. var->red.length = 8;
  592. var->red.offset = 16;
  593. var->red.msb_right = 0;
  594. var->green.length = 8;
  595. var->green.offset = 8;
  596. var->green.msb_right = 0;
  597. var->blue.length = 8;
  598. var->blue.offset = 0;
  599. var->blue.msb_right = 0;
  600. var->transp.length = 8;
  601. var->transp.offset = 24;
  602. var->transp.msb_right = 0;
  603. break;
  604. }
  605. var->height = -1;
  606. var->width = -1;
  607. var->grayscale = 0;
  608. /* Copy nonstd field to/from sync for fbset usage */
  609. var->sync |= var->nonstd;
  610. var->nonstd |= var->sync;
  611. adjust_aoi_size_position(var, info);
  612. return 0;
  613. }
  614. static void set_fix(struct fb_info *info)
  615. {
  616. struct fb_fix_screeninfo *fix = &info->fix;
  617. struct fb_var_screeninfo *var = &info->var;
  618. struct mfb_info *mfbi = info->par;
  619. strncpy(fix->id, mfbi->id, strlen(mfbi->id));
  620. fix->line_length = var->xres_virtual * var->bits_per_pixel / 8;
  621. fix->type = FB_TYPE_PACKED_PIXELS;
  622. fix->accel = FB_ACCEL_NONE;
  623. fix->visual = FB_VISUAL_TRUECOLOR;
  624. fix->xpanstep = 1;
  625. fix->ypanstep = 1;
  626. }
  627. static void update_lcdc(struct fb_info *info)
  628. {
  629. struct fb_var_screeninfo *var = &info->var;
  630. struct mfb_info *mfbi = info->par;
  631. struct fsl_diu_data *machine_data = mfbi->parent;
  632. struct diu *hw;
  633. int i, j;
  634. char __iomem *cursor_base, *gamma_table_base;
  635. u32 temp;
  636. hw = dr.diu_reg;
  637. if (mfbi->type == MFB_TYPE_OFF) {
  638. fsl_diu_disable_panel(info);
  639. return;
  640. }
  641. diu_ops.set_monitor_port(machine_data->monitor_port);
  642. gamma_table_base = pool.gamma.vaddr;
  643. cursor_base = pool.cursor.vaddr;
  644. /* Prep for DIU init - gamma table, cursor table */
  645. for (i = 0; i <= 2; i++)
  646. for (j = 0; j <= 255; j++)
  647. *gamma_table_base++ = j;
  648. diu_ops.set_gamma_table(machine_data->monitor_port, pool.gamma.vaddr);
  649. disable_lcdc(info);
  650. /* Program DIU registers */
  651. out_be32(&hw->gamma, pool.gamma.paddr);
  652. out_be32(&hw->cursor, pool.cursor.paddr);
  653. out_be32(&hw->bgnd, 0x007F7F7F); /* BGND */
  654. out_be32(&hw->bgnd_wb, 0); /* BGND_WB */
  655. out_be32(&hw->disp_size, (var->yres << 16 | var->xres));
  656. /* DISP SIZE */
  657. out_be32(&hw->wb_size, 0); /* WB SIZE */
  658. out_be32(&hw->wb_mem_addr, 0); /* WB MEM ADDR */
  659. /* Horizontal and vertical configuration register */
  660. temp = var->left_margin << 22 | /* BP_H */
  661. var->hsync_len << 11 | /* PW_H */
  662. var->right_margin; /* FP_H */
  663. out_be32(&hw->hsyn_para, temp);
  664. temp = var->upper_margin << 22 | /* BP_V */
  665. var->vsync_len << 11 | /* PW_V */
  666. var->lower_margin; /* FP_V */
  667. out_be32(&hw->vsyn_para, temp);
  668. diu_ops.set_pixel_clock(var->pixclock);
  669. out_be32(&hw->syn_pol, 0); /* SYNC SIGNALS POLARITY */
  670. out_be32(&hw->thresholds, 0x00037800); /* The Thresholds */
  671. out_be32(&hw->int_status, 0); /* INTERRUPT STATUS */
  672. out_be32(&hw->plut, 0x01F5F666);
  673. /* Enable the DIU */
  674. enable_lcdc(info);
  675. }
  676. static int map_video_memory(struct fb_info *info)
  677. {
  678. phys_addr_t phys;
  679. u32 smem_len = info->fix.line_length * info->var.yres_virtual;
  680. info->screen_base = fsl_diu_alloc(smem_len, &phys);
  681. if (info->screen_base == NULL) {
  682. dev_err(info->dev, "unable to allocate fb memory\n");
  683. return -ENOMEM;
  684. }
  685. mutex_lock(&info->mm_lock);
  686. info->fix.smem_start = (unsigned long) phys;
  687. info->fix.smem_len = smem_len;
  688. mutex_unlock(&info->mm_lock);
  689. info->screen_size = info->fix.smem_len;
  690. return 0;
  691. }
  692. static void unmap_video_memory(struct fb_info *info)
  693. {
  694. fsl_diu_free(info->screen_base, info->fix.smem_len);
  695. mutex_lock(&info->mm_lock);
  696. info->screen_base = NULL;
  697. info->fix.smem_start = 0;
  698. info->fix.smem_len = 0;
  699. mutex_unlock(&info->mm_lock);
  700. }
  701. /*
  702. * Using the fb_var_screeninfo in fb_info we set the aoi of this
  703. * particular framebuffer. It is a light version of fsl_diu_set_par.
  704. */
  705. static int fsl_diu_set_aoi(struct fb_info *info)
  706. {
  707. struct fb_var_screeninfo *var = &info->var;
  708. struct mfb_info *mfbi = info->par;
  709. struct diu_ad *ad = mfbi->ad;
  710. /* AOI should not be greater than display size */
  711. ad->offset_xyi = cpu_to_le32((var->yoffset << 16) | var->xoffset);
  712. ad->offset_xyd = cpu_to_le32((mfbi->y_aoi_d << 16) | mfbi->x_aoi_d);
  713. return 0;
  714. }
  715. /*
  716. * Using the fb_var_screeninfo in fb_info we set the resolution of this
  717. * particular framebuffer. This function alters the fb_fix_screeninfo stored
  718. * in fb_info. It does not alter var in fb_info since we are using that
  719. * data. This means we depend on the data in var inside fb_info to be
  720. * supported by the hardware. fsl_diu_check_var is always called before
  721. * fsl_diu_set_par to ensure this.
  722. */
  723. static int fsl_diu_set_par(struct fb_info *info)
  724. {
  725. unsigned long len;
  726. struct fb_var_screeninfo *var = &info->var;
  727. struct mfb_info *mfbi = info->par;
  728. struct fsl_diu_data *machine_data = mfbi->parent;
  729. struct diu_ad *ad = mfbi->ad;
  730. struct diu *hw;
  731. hw = dr.diu_reg;
  732. set_fix(info);
  733. mfbi->cursor_reset = 1;
  734. len = info->var.yres_virtual * info->fix.line_length;
  735. /* Alloc & dealloc each time resolution/bpp change */
  736. if (len != info->fix.smem_len) {
  737. if (info->fix.smem_start)
  738. unmap_video_memory(info);
  739. /* Memory allocation for framebuffer */
  740. if (map_video_memory(info)) {
  741. dev_err(info->dev, "unable to allocate fb memory 1\n");
  742. return -ENOMEM;
  743. }
  744. }
  745. ad->pix_fmt = diu_ops.get_pixel_format(machine_data->monitor_port,
  746. var->bits_per_pixel);
  747. ad->addr = cpu_to_le32(info->fix.smem_start);
  748. ad->src_size_g_alpha = cpu_to_le32((var->yres_virtual << 12) |
  749. var->xres_virtual) | mfbi->g_alpha;
  750. /* AOI should not be greater than display size */
  751. ad->aoi_size = cpu_to_le32((var->yres << 16) | var->xres);
  752. ad->offset_xyi = cpu_to_le32((var->yoffset << 16) | var->xoffset);
  753. ad->offset_xyd = cpu_to_le32((mfbi->y_aoi_d << 16) | mfbi->x_aoi_d);
  754. /* Disable chroma keying function */
  755. ad->ckmax_r = 0;
  756. ad->ckmax_g = 0;
  757. ad->ckmax_b = 0;
  758. ad->ckmin_r = 255;
  759. ad->ckmin_g = 255;
  760. ad->ckmin_b = 255;
  761. if (mfbi->index == 0)
  762. update_lcdc(info);
  763. return 0;
  764. }
  765. static inline __u32 CNVT_TOHW(__u32 val, __u32 width)
  766. {
  767. return ((val << width) + 0x7FFF - val) >> 16;
  768. }
  769. /*
  770. * Set a single color register. The values supplied have a 16 bit magnitude
  771. * which needs to be scaled in this function for the hardware. Things to take
  772. * into consideration are how many color registers, if any, are supported with
  773. * the current color visual. With truecolor mode no color palettes are
  774. * supported. Here a pseudo palette is created which we store the value in
  775. * pseudo_palette in struct fb_info. For pseudocolor mode we have a limited
  776. * color palette.
  777. */
  778. static int fsl_diu_setcolreg(unsigned int regno, unsigned int red,
  779. unsigned int green, unsigned int blue,
  780. unsigned int transp, struct fb_info *info)
  781. {
  782. int ret = 1;
  783. /*
  784. * If greyscale is true, then we convert the RGB value
  785. * to greyscale no matter what visual we are using.
  786. */
  787. if (info->var.grayscale)
  788. red = green = blue = (19595 * red + 38470 * green +
  789. 7471 * blue) >> 16;
  790. switch (info->fix.visual) {
  791. case FB_VISUAL_TRUECOLOR:
  792. /*
  793. * 16-bit True Colour. We encode the RGB value
  794. * according to the RGB bitfield information.
  795. */
  796. if (regno < 16) {
  797. u32 *pal = info->pseudo_palette;
  798. u32 v;
  799. red = CNVT_TOHW(red, info->var.red.length);
  800. green = CNVT_TOHW(green, info->var.green.length);
  801. blue = CNVT_TOHW(blue, info->var.blue.length);
  802. transp = CNVT_TOHW(transp, info->var.transp.length);
  803. v = (red << info->var.red.offset) |
  804. (green << info->var.green.offset) |
  805. (blue << info->var.blue.offset) |
  806. (transp << info->var.transp.offset);
  807. pal[regno] = v;
  808. ret = 0;
  809. }
  810. break;
  811. case FB_VISUAL_STATIC_PSEUDOCOLOR:
  812. case FB_VISUAL_PSEUDOCOLOR:
  813. break;
  814. }
  815. return ret;
  816. }
  817. /*
  818. * Pan (or wrap, depending on the `vmode' field) the display using the
  819. * 'xoffset' and 'yoffset' fields of the 'var' structure. If the values
  820. * don't fit, return -EINVAL.
  821. */
  822. static int fsl_diu_pan_display(struct fb_var_screeninfo *var,
  823. struct fb_info *info)
  824. {
  825. if ((info->var.xoffset == var->xoffset) &&
  826. (info->var.yoffset == var->yoffset))
  827. return 0; /* No change, do nothing */
  828. if (var->xoffset < 0 || var->yoffset < 0
  829. || var->xoffset + info->var.xres > info->var.xres_virtual
  830. || var->yoffset + info->var.yres > info->var.yres_virtual)
  831. return -EINVAL;
  832. info->var.xoffset = var->xoffset;
  833. info->var.yoffset = var->yoffset;
  834. if (var->vmode & FB_VMODE_YWRAP)
  835. info->var.vmode |= FB_VMODE_YWRAP;
  836. else
  837. info->var.vmode &= ~FB_VMODE_YWRAP;
  838. fsl_diu_set_aoi(info);
  839. return 0;
  840. }
  841. /*
  842. * Blank the screen if blank_mode != 0, else unblank. Return 0 if blanking
  843. * succeeded, != 0 if un-/blanking failed.
  844. * blank_mode == 2: suspend vsync
  845. * blank_mode == 3: suspend hsync
  846. * blank_mode == 4: powerdown
  847. */
  848. static int fsl_diu_blank(int blank_mode, struct fb_info *info)
  849. {
  850. struct mfb_info *mfbi = info->par;
  851. mfbi->blank = blank_mode;
  852. switch (blank_mode) {
  853. case FB_BLANK_VSYNC_SUSPEND:
  854. case FB_BLANK_HSYNC_SUSPEND:
  855. /* FIXME: fixes to enable_panel and enable lcdc needed */
  856. case FB_BLANK_NORMAL:
  857. /* fsl_diu_disable_panel(info);*/
  858. break;
  859. case FB_BLANK_POWERDOWN:
  860. /* disable_lcdc(info); */
  861. break;
  862. case FB_BLANK_UNBLANK:
  863. /* fsl_diu_enable_panel(info);*/
  864. break;
  865. }
  866. return 0;
  867. }
  868. static int fsl_diu_ioctl(struct fb_info *info, unsigned int cmd,
  869. unsigned long arg)
  870. {
  871. struct mfb_info *mfbi = info->par;
  872. struct diu_ad *ad = mfbi->ad;
  873. struct mfb_chroma_key ck;
  874. unsigned char global_alpha;
  875. struct aoi_display_offset aoi_d;
  876. __u32 pix_fmt;
  877. void __user *buf = (void __user *)arg;
  878. if (!arg)
  879. return -EINVAL;
  880. switch (cmd) {
  881. case MFB_SET_PIXFMT:
  882. if (copy_from_user(&pix_fmt, buf, sizeof(pix_fmt)))
  883. return -EFAULT;
  884. ad->pix_fmt = pix_fmt;
  885. break;
  886. case MFB_GET_PIXFMT:
  887. pix_fmt = ad->pix_fmt;
  888. if (copy_to_user(buf, &pix_fmt, sizeof(pix_fmt)))
  889. return -EFAULT;
  890. break;
  891. case MFB_SET_AOID:
  892. if (copy_from_user(&aoi_d, buf, sizeof(aoi_d)))
  893. return -EFAULT;
  894. mfbi->x_aoi_d = aoi_d.x_aoi_d;
  895. mfbi->y_aoi_d = aoi_d.y_aoi_d;
  896. fsl_diu_check_var(&info->var, info);
  897. fsl_diu_set_aoi(info);
  898. break;
  899. case MFB_GET_AOID:
  900. aoi_d.x_aoi_d = mfbi->x_aoi_d;
  901. aoi_d.y_aoi_d = mfbi->y_aoi_d;
  902. if (copy_to_user(buf, &aoi_d, sizeof(aoi_d)))
  903. return -EFAULT;
  904. break;
  905. case MFB_GET_ALPHA:
  906. global_alpha = mfbi->g_alpha;
  907. if (copy_to_user(buf, &global_alpha, sizeof(global_alpha)))
  908. return -EFAULT;
  909. break;
  910. case MFB_SET_ALPHA:
  911. /* set panel information */
  912. if (copy_from_user(&global_alpha, buf, sizeof(global_alpha)))
  913. return -EFAULT;
  914. ad->src_size_g_alpha = (ad->src_size_g_alpha & (~0xff)) |
  915. (global_alpha & 0xff);
  916. mfbi->g_alpha = global_alpha;
  917. break;
  918. case MFB_SET_CHROMA_KEY:
  919. /* set panel winformation */
  920. if (copy_from_user(&ck, buf, sizeof(ck)))
  921. return -EFAULT;
  922. if (ck.enable &&
  923. (ck.red_max < ck.red_min ||
  924. ck.green_max < ck.green_min ||
  925. ck.blue_max < ck.blue_min))
  926. return -EINVAL;
  927. if (!ck.enable) {
  928. ad->ckmax_r = 0;
  929. ad->ckmax_g = 0;
  930. ad->ckmax_b = 0;
  931. ad->ckmin_r = 255;
  932. ad->ckmin_g = 255;
  933. ad->ckmin_b = 255;
  934. } else {
  935. ad->ckmax_r = ck.red_max;
  936. ad->ckmax_g = ck.green_max;
  937. ad->ckmax_b = ck.blue_max;
  938. ad->ckmin_r = ck.red_min;
  939. ad->ckmin_g = ck.green_min;
  940. ad->ckmin_b = ck.blue_min;
  941. }
  942. break;
  943. case FBIOGET_GWINFO:
  944. if (mfbi->type == MFB_TYPE_OFF)
  945. return -ENODEV;
  946. /* get graphic window information */
  947. if (copy_to_user(buf, ad, sizeof(*ad)))
  948. return -EFAULT;
  949. break;
  950. case FBIOGET_HWCINFO:
  951. pr_debug("FBIOGET_HWCINFO:0x%08x\n", FBIOGET_HWCINFO);
  952. break;
  953. case FBIOPUT_MODEINFO:
  954. pr_debug("FBIOPUT_MODEINFO:0x%08x\n", FBIOPUT_MODEINFO);
  955. break;
  956. case FBIOGET_DISPINFO:
  957. pr_debug("FBIOGET_DISPINFO:0x%08x\n", FBIOGET_DISPINFO);
  958. break;
  959. default:
  960. dev_err(info->dev, "unknown ioctl command (0x%08X)\n", cmd);
  961. return -ENOIOCTLCMD;
  962. }
  963. return 0;
  964. }
  965. /* turn on fb if count == 1
  966. */
  967. static int fsl_diu_open(struct fb_info *info, int user)
  968. {
  969. struct mfb_info *mfbi = info->par;
  970. int res = 0;
  971. /* free boot splash memory on first /dev/fb0 open */
  972. if (!mfbi->index && diu_ops.release_bootmem)
  973. diu_ops.release_bootmem();
  974. spin_lock(&diu_lock);
  975. mfbi->count++;
  976. if (mfbi->count == 1) {
  977. fsl_diu_check_var(&info->var, info);
  978. res = fsl_diu_set_par(info);
  979. if (res < 0)
  980. mfbi->count--;
  981. else {
  982. res = fsl_diu_enable_panel(info);
  983. if (res < 0)
  984. mfbi->count--;
  985. }
  986. }
  987. spin_unlock(&diu_lock);
  988. return res;
  989. }
  990. /* turn off fb if count == 0
  991. */
  992. static int fsl_diu_release(struct fb_info *info, int user)
  993. {
  994. struct mfb_info *mfbi = info->par;
  995. int res = 0;
  996. spin_lock(&diu_lock);
  997. mfbi->count--;
  998. if (mfbi->count == 0) {
  999. res = fsl_diu_disable_panel(info);
  1000. if (res < 0)
  1001. mfbi->count++;
  1002. }
  1003. spin_unlock(&diu_lock);
  1004. return res;
  1005. }
  1006. static struct fb_ops fsl_diu_ops = {
  1007. .owner = THIS_MODULE,
  1008. .fb_check_var = fsl_diu_check_var,
  1009. .fb_set_par = fsl_diu_set_par,
  1010. .fb_setcolreg = fsl_diu_setcolreg,
  1011. .fb_blank = fsl_diu_blank,
  1012. .fb_pan_display = fsl_diu_pan_display,
  1013. .fb_fillrect = cfb_fillrect,
  1014. .fb_copyarea = cfb_copyarea,
  1015. .fb_imageblit = cfb_imageblit,
  1016. .fb_ioctl = fsl_diu_ioctl,
  1017. .fb_open = fsl_diu_open,
  1018. .fb_release = fsl_diu_release,
  1019. };
  1020. static int init_fbinfo(struct fb_info *info)
  1021. {
  1022. struct mfb_info *mfbi = info->par;
  1023. info->device = NULL;
  1024. info->var.activate = FB_ACTIVATE_NOW;
  1025. info->fbops = &fsl_diu_ops;
  1026. info->flags = FBINFO_FLAG_DEFAULT;
  1027. info->pseudo_palette = &mfbi->pseudo_palette;
  1028. /* Allocate colormap */
  1029. fb_alloc_cmap(&info->cmap, 16, 0);
  1030. return 0;
  1031. }
  1032. static int __devinit install_fb(struct fb_info *info)
  1033. {
  1034. int rc;
  1035. struct mfb_info *mfbi = info->par;
  1036. const char *aoi_mode, *init_aoi_mode = "320x240";
  1037. struct fb_videomode *db = fsl_diu_mode_db;
  1038. unsigned int dbsize = ARRAY_SIZE(fsl_diu_mode_db);
  1039. int has_default_mode = 1;
  1040. if (init_fbinfo(info))
  1041. return -EINVAL;
  1042. if (mfbi->index == 0) { /* plane 0 */
  1043. if (mfbi->edid_data) {
  1044. /* Now build modedb from EDID */
  1045. fb_edid_to_monspecs(mfbi->edid_data, &info->monspecs);
  1046. fb_videomode_to_modelist(info->monspecs.modedb,
  1047. info->monspecs.modedb_len,
  1048. &info->modelist);
  1049. db = info->monspecs.modedb;
  1050. dbsize = info->monspecs.modedb_len;
  1051. }
  1052. aoi_mode = fb_mode;
  1053. } else {
  1054. aoi_mode = init_aoi_mode;
  1055. }
  1056. rc = fb_find_mode(&info->var, info, aoi_mode, db, dbsize,
  1057. &fsl_diu_default_mode, default_bpp);
  1058. if (!rc) {
  1059. /*
  1060. * For plane 0 we continue and look into
  1061. * driver's internal modedb.
  1062. */
  1063. if (mfbi->index == 0 && mfbi->edid_data)
  1064. has_default_mode = 0;
  1065. else
  1066. return -EINVAL;
  1067. }
  1068. if (!has_default_mode) {
  1069. rc = fb_find_mode(&info->var, info, aoi_mode, fsl_diu_mode_db,
  1070. ARRAY_SIZE(fsl_diu_mode_db),
  1071. &fsl_diu_default_mode,
  1072. default_bpp);
  1073. if (rc > 0 && rc < 5)
  1074. has_default_mode = 1;
  1075. }
  1076. /* Still not found, use preferred mode from database if any */
  1077. if (!has_default_mode && info->monspecs.modedb) {
  1078. struct fb_monspecs *specs = &info->monspecs;
  1079. struct fb_videomode *modedb = &specs->modedb[0];
  1080. /*
  1081. * Get preferred timing. If not found,
  1082. * first mode in database will be used.
  1083. */
  1084. if (specs->misc & FB_MISC_1ST_DETAIL) {
  1085. int i;
  1086. for (i = 0; i < specs->modedb_len; i++) {
  1087. if (specs->modedb[i].flag & FB_MODE_IS_FIRST) {
  1088. modedb = &specs->modedb[i];
  1089. break;
  1090. }
  1091. }
  1092. }
  1093. info->var.bits_per_pixel = default_bpp;
  1094. fb_videomode_to_var(&info->var, modedb);
  1095. }
  1096. if (mfbi->type == MFB_TYPE_OFF)
  1097. mfbi->blank = FB_BLANK_NORMAL;
  1098. else
  1099. mfbi->blank = FB_BLANK_UNBLANK;
  1100. if (fsl_diu_check_var(&info->var, info)) {
  1101. dev_err(info->dev, "fsl_diu_check_var failed\n");
  1102. fb_dealloc_cmap(&info->cmap);
  1103. return -EINVAL;
  1104. }
  1105. if (register_framebuffer(info) < 0) {
  1106. dev_err(info->dev, "register_framebuffer failed\n");
  1107. unmap_video_memory(info);
  1108. fb_dealloc_cmap(&info->cmap);
  1109. return -EINVAL;
  1110. }
  1111. mfbi->registered = 1;
  1112. dev_info(info->dev, "%s registered successfully\n", mfbi->id);
  1113. return 0;
  1114. }
  1115. static void uninstall_fb(struct fb_info *info)
  1116. {
  1117. struct mfb_info *mfbi = info->par;
  1118. if (!mfbi->registered)
  1119. return;
  1120. if (mfbi->index == 0)
  1121. kfree(mfbi->edid_data);
  1122. unregister_framebuffer(info);
  1123. unmap_video_memory(info);
  1124. if (&info->cmap)
  1125. fb_dealloc_cmap(&info->cmap);
  1126. mfbi->registered = 0;
  1127. }
  1128. static irqreturn_t fsl_diu_isr(int irq, void *dev_id)
  1129. {
  1130. struct diu *hw = dr.diu_reg;
  1131. unsigned int status = in_be32(&hw->int_status);
  1132. if (status) {
  1133. /* This is the workaround for underrun */
  1134. if (status & INT_UNDRUN) {
  1135. out_be32(&hw->diu_mode, 0);
  1136. udelay(1);
  1137. out_be32(&hw->diu_mode, 1);
  1138. }
  1139. #if defined(CONFIG_NOT_COHERENT_CACHE)
  1140. else if (status & INT_VSYNC) {
  1141. unsigned int i;
  1142. for (i = 0; i < coherence_data_size;
  1143. i += d_cache_line_size)
  1144. __asm__ __volatile__ (
  1145. "dcbz 0, %[input]"
  1146. ::[input]"r"(&coherence_data[i]));
  1147. }
  1148. #endif
  1149. return IRQ_HANDLED;
  1150. }
  1151. return IRQ_NONE;
  1152. }
  1153. static int request_irq_local(int irq)
  1154. {
  1155. unsigned long status, ints;
  1156. struct diu *hw;
  1157. int ret;
  1158. hw = dr.diu_reg;
  1159. /* Read to clear the status */
  1160. status = in_be32(&hw->int_status);
  1161. ret = request_irq(irq, fsl_diu_isr, 0, "diu", NULL);
  1162. if (!ret) {
  1163. ints = INT_PARERR | INT_LS_BF_VS;
  1164. #if !defined(CONFIG_NOT_COHERENT_CACHE)
  1165. ints |= INT_VSYNC;
  1166. #endif
  1167. if (dr.mode == MFB_MODE2 || dr.mode == MFB_MODE3)
  1168. ints |= INT_VSYNC_WB;
  1169. /* Read to clear the status */
  1170. status = in_be32(&hw->int_status);
  1171. out_be32(&hw->int_mask, ints);
  1172. }
  1173. return ret;
  1174. }
  1175. static void free_irq_local(int irq)
  1176. {
  1177. struct diu *hw = dr.diu_reg;
  1178. /* Disable all LCDC interrupt */
  1179. out_be32(&hw->int_mask, 0x1f);
  1180. free_irq(irq, NULL);
  1181. }
  1182. #ifdef CONFIG_PM
  1183. /*
  1184. * Power management hooks. Note that we won't be called from IRQ context,
  1185. * unlike the blank functions above, so we may sleep.
  1186. */
  1187. static int fsl_diu_suspend(struct platform_device *ofdev, pm_message_t state)
  1188. {
  1189. struct fsl_diu_data *machine_data;
  1190. machine_data = dev_get_drvdata(&ofdev->dev);
  1191. disable_lcdc(machine_data->fsl_diu_info[0]);
  1192. return 0;
  1193. }
  1194. static int fsl_diu_resume(struct platform_device *ofdev)
  1195. {
  1196. struct fsl_diu_data *machine_data;
  1197. machine_data = dev_get_drvdata(&ofdev->dev);
  1198. enable_lcdc(machine_data->fsl_diu_info[0]);
  1199. return 0;
  1200. }
  1201. #else
  1202. #define fsl_diu_suspend NULL
  1203. #define fsl_diu_resume NULL
  1204. #endif /* CONFIG_PM */
  1205. /* Align to 64-bit(8-byte), 32-byte, etc. */
  1206. static int allocate_buf(struct device *dev, struct diu_addr *buf, u32 size,
  1207. u32 bytes_align)
  1208. {
  1209. u32 offset, ssize;
  1210. u32 mask;
  1211. dma_addr_t paddr = 0;
  1212. ssize = size + bytes_align;
  1213. buf->vaddr = dma_alloc_coherent(dev, ssize, &paddr, GFP_DMA |
  1214. __GFP_ZERO);
  1215. if (!buf->vaddr)
  1216. return -ENOMEM;
  1217. buf->paddr = (__u32) paddr;
  1218. mask = bytes_align - 1;
  1219. offset = (u32)buf->paddr & mask;
  1220. if (offset) {
  1221. buf->offset = bytes_align - offset;
  1222. buf->paddr = (u32)buf->paddr + offset;
  1223. } else
  1224. buf->offset = 0;
  1225. return 0;
  1226. }
  1227. static void free_buf(struct device *dev, struct diu_addr *buf, u32 size,
  1228. u32 bytes_align)
  1229. {
  1230. dma_free_coherent(dev, size + bytes_align, buf->vaddr,
  1231. buf->paddr - buf->offset);
  1232. }
  1233. static ssize_t store_monitor(struct device *device,
  1234. struct device_attribute *attr, const char *buf, size_t count)
  1235. {
  1236. enum fsl_diu_monitor_port old_monitor_port;
  1237. struct fsl_diu_data *machine_data =
  1238. container_of(attr, struct fsl_diu_data, dev_attr);
  1239. old_monitor_port = machine_data->monitor_port;
  1240. machine_data->monitor_port = fsl_diu_name_to_port(buf);
  1241. if (old_monitor_port != machine_data->monitor_port) {
  1242. /* All AOIs need adjust pixel format
  1243. * fsl_diu_set_par only change the pixsel format here
  1244. * unlikely to fail. */
  1245. fsl_diu_set_par(machine_data->fsl_diu_info[0]);
  1246. fsl_diu_set_par(machine_data->fsl_diu_info[1]);
  1247. fsl_diu_set_par(machine_data->fsl_diu_info[2]);
  1248. fsl_diu_set_par(machine_data->fsl_diu_info[3]);
  1249. fsl_diu_set_par(machine_data->fsl_diu_info[4]);
  1250. }
  1251. return count;
  1252. }
  1253. static ssize_t show_monitor(struct device *device,
  1254. struct device_attribute *attr, char *buf)
  1255. {
  1256. struct fsl_diu_data *machine_data =
  1257. container_of(attr, struct fsl_diu_data, dev_attr);
  1258. switch (machine_data->monitor_port) {
  1259. case FSL_DIU_PORT_DVI:
  1260. return sprintf(buf, "DVI\n");
  1261. case FSL_DIU_PORT_LVDS:
  1262. return sprintf(buf, "Single-link LVDS\n");
  1263. case FSL_DIU_PORT_DLVDS:
  1264. return sprintf(buf, "Dual-link LVDS\n");
  1265. }
  1266. return 0;
  1267. }
  1268. static int __devinit fsl_diu_probe(struct platform_device *ofdev)
  1269. {
  1270. struct device_node *np = ofdev->dev.of_node;
  1271. struct mfb_info *mfbi;
  1272. phys_addr_t dummy_ad_addr;
  1273. int ret, i, error = 0;
  1274. struct resource res;
  1275. struct fsl_diu_data *machine_data;
  1276. int diu_mode;
  1277. machine_data = kzalloc(sizeof(struct fsl_diu_data), GFP_KERNEL);
  1278. if (!machine_data)
  1279. return -ENOMEM;
  1280. for (i = 0; i < ARRAY_SIZE(machine_data->fsl_diu_info); i++) {
  1281. machine_data->fsl_diu_info[i] =
  1282. framebuffer_alloc(sizeof(struct mfb_info), &ofdev->dev);
  1283. if (!machine_data->fsl_diu_info[i]) {
  1284. dev_err(&ofdev->dev, "cannot allocate memory\n");
  1285. ret = -ENOMEM;
  1286. goto error2;
  1287. }
  1288. mfbi = machine_data->fsl_diu_info[i]->par;
  1289. memcpy(mfbi, &mfb_template[i], sizeof(struct mfb_info));
  1290. mfbi->parent = machine_data;
  1291. if (mfbi->index == 0) {
  1292. const u8 *prop;
  1293. int len;
  1294. /* Get EDID */
  1295. prop = of_get_property(np, "edid", &len);
  1296. if (prop && len == EDID_LENGTH)
  1297. mfbi->edid_data = kmemdup(prop, EDID_LENGTH,
  1298. GFP_KERNEL);
  1299. }
  1300. }
  1301. ret = of_address_to_resource(np, 0, &res);
  1302. if (ret) {
  1303. dev_err(&ofdev->dev, "could not obtain DIU address\n");
  1304. goto error;
  1305. }
  1306. if (!res.start) {
  1307. dev_err(&ofdev->dev, "invalid DIU address\n");
  1308. goto error;
  1309. }
  1310. dr.diu_reg = ioremap(res.start, sizeof(struct diu));
  1311. if (!dr.diu_reg) {
  1312. dev_err(&ofdev->dev, "Err: can't map DIU registers!\n");
  1313. ret = -EFAULT;
  1314. goto error2;
  1315. }
  1316. diu_mode = in_be32(&dr.diu_reg->diu_mode);
  1317. if (diu_mode != MFB_MODE1)
  1318. out_be32(&dr.diu_reg->diu_mode, 0); /* disable DIU */
  1319. /* Get the IRQ of the DIU */
  1320. machine_data->irq = irq_of_parse_and_map(np, 0);
  1321. if (!machine_data->irq) {
  1322. dev_err(&ofdev->dev, "could not get DIU IRQ\n");
  1323. ret = -EINVAL;
  1324. goto error;
  1325. }
  1326. machine_data->monitor_port = monitor_port;
  1327. /* Area descriptor memory pool aligns to 64-bit boundary */
  1328. if (allocate_buf(&ofdev->dev, &pool.ad,
  1329. sizeof(struct diu_ad) * FSL_AOI_NUM, 8))
  1330. return -ENOMEM;
  1331. /* Get memory for Gamma Table - 32-byte aligned memory */
  1332. if (allocate_buf(&ofdev->dev, &pool.gamma, 768, 32)) {
  1333. ret = -ENOMEM;
  1334. goto error;
  1335. }
  1336. /* For performance, cursor bitmap buffer aligns to 32-byte boundary */
  1337. if (allocate_buf(&ofdev->dev, &pool.cursor, MAX_CURS * MAX_CURS * 2,
  1338. 32)) {
  1339. ret = -ENOMEM;
  1340. goto error;
  1341. }
  1342. i = ARRAY_SIZE(machine_data->fsl_diu_info);
  1343. machine_data->dummy_ad = (struct diu_ad *)
  1344. ((u32)pool.ad.vaddr + pool.ad.offset) + i;
  1345. machine_data->dummy_ad->paddr = pool.ad.paddr +
  1346. i * sizeof(struct diu_ad);
  1347. machine_data->dummy_aoi_virt = fsl_diu_alloc(64, &dummy_ad_addr);
  1348. if (!machine_data->dummy_aoi_virt) {
  1349. ret = -ENOMEM;
  1350. goto error;
  1351. }
  1352. machine_data->dummy_ad->addr = cpu_to_le32(dummy_ad_addr);
  1353. machine_data->dummy_ad->pix_fmt = 0x88882317;
  1354. machine_data->dummy_ad->src_size_g_alpha = cpu_to_le32((4 << 12) | 4);
  1355. machine_data->dummy_ad->aoi_size = cpu_to_le32((4 << 16) | 2);
  1356. machine_data->dummy_ad->offset_xyi = 0;
  1357. machine_data->dummy_ad->offset_xyd = 0;
  1358. machine_data->dummy_ad->next_ad = 0;
  1359. /*
  1360. * Let DIU display splash screen if it was pre-initialized
  1361. * by the bootloader, set dummy area descriptor otherwise.
  1362. */
  1363. if (diu_mode != MFB_MODE1)
  1364. out_be32(&dr.diu_reg->desc[0], machine_data->dummy_ad->paddr);
  1365. out_be32(&dr.diu_reg->desc[1], machine_data->dummy_ad->paddr);
  1366. out_be32(&dr.diu_reg->desc[2], machine_data->dummy_ad->paddr);
  1367. for (i = 0; i < ARRAY_SIZE(machine_data->fsl_diu_info); i++) {
  1368. machine_data->fsl_diu_info[i]->fix.smem_start = 0;
  1369. mfbi = machine_data->fsl_diu_info[i]->par;
  1370. mfbi->ad = (struct diu_ad *)((u32)pool.ad.vaddr
  1371. + pool.ad.offset) + i;
  1372. mfbi->ad->paddr = pool.ad.paddr + i * sizeof(struct diu_ad);
  1373. ret = install_fb(machine_data->fsl_diu_info[i]);
  1374. if (ret) {
  1375. dev_err(&ofdev->dev,
  1376. "Failed to register framebuffer %d\n",
  1377. i);
  1378. goto error;
  1379. }
  1380. }
  1381. if (request_irq_local(machine_data->irq)) {
  1382. dev_err(machine_data->fsl_diu_info[0]->dev,
  1383. "could not request irq for diu.");
  1384. goto error;
  1385. }
  1386. sysfs_attr_init(&machine_data->dev_attr.attr);
  1387. machine_data->dev_attr.attr.name = "monitor";
  1388. machine_data->dev_attr.attr.mode = S_IRUGO|S_IWUSR;
  1389. machine_data->dev_attr.show = show_monitor;
  1390. machine_data->dev_attr.store = store_monitor;
  1391. error = device_create_file(machine_data->fsl_diu_info[0]->dev,
  1392. &machine_data->dev_attr);
  1393. if (error) {
  1394. dev_err(machine_data->fsl_diu_info[0]->dev,
  1395. "could not create sysfs %s file\n",
  1396. machine_data->dev_attr.attr.name);
  1397. }
  1398. dev_set_drvdata(&ofdev->dev, machine_data);
  1399. return 0;
  1400. error:
  1401. for (i = ARRAY_SIZE(machine_data->fsl_diu_info);
  1402. i > 0; i--)
  1403. uninstall_fb(machine_data->fsl_diu_info[i - 1]);
  1404. if (pool.ad.vaddr)
  1405. free_buf(&ofdev->dev, &pool.ad,
  1406. sizeof(struct diu_ad) * FSL_AOI_NUM, 8);
  1407. if (pool.gamma.vaddr)
  1408. free_buf(&ofdev->dev, &pool.gamma, 768, 32);
  1409. if (pool.cursor.vaddr)
  1410. free_buf(&ofdev->dev, &pool.cursor, MAX_CURS * MAX_CURS * 2,
  1411. 32);
  1412. if (machine_data->dummy_aoi_virt)
  1413. fsl_diu_free(machine_data->dummy_aoi_virt, 64);
  1414. iounmap(dr.diu_reg);
  1415. error2:
  1416. for (i = 0; i < ARRAY_SIZE(machine_data->fsl_diu_info); i++)
  1417. if (machine_data->fsl_diu_info[i])
  1418. framebuffer_release(machine_data->fsl_diu_info[i]);
  1419. kfree(machine_data);
  1420. return ret;
  1421. }
  1422. static int fsl_diu_remove(struct platform_device *ofdev)
  1423. {
  1424. struct fsl_diu_data *machine_data;
  1425. int i;
  1426. machine_data = dev_get_drvdata(&ofdev->dev);
  1427. disable_lcdc(machine_data->fsl_diu_info[0]);
  1428. free_irq_local(machine_data->irq);
  1429. for (i = ARRAY_SIZE(machine_data->fsl_diu_info); i > 0; i--)
  1430. uninstall_fb(machine_data->fsl_diu_info[i - 1]);
  1431. if (pool.ad.vaddr)
  1432. free_buf(&ofdev->dev, &pool.ad,
  1433. sizeof(struct diu_ad) * FSL_AOI_NUM, 8);
  1434. if (pool.gamma.vaddr)
  1435. free_buf(&ofdev->dev, &pool.gamma, 768, 32);
  1436. if (pool.cursor.vaddr)
  1437. free_buf(&ofdev->dev, &pool.cursor, MAX_CURS * MAX_CURS * 2,
  1438. 32);
  1439. if (machine_data->dummy_aoi_virt)
  1440. fsl_diu_free(machine_data->dummy_aoi_virt, 64);
  1441. iounmap(dr.diu_reg);
  1442. for (i = 0; i < ARRAY_SIZE(machine_data->fsl_diu_info); i++)
  1443. if (machine_data->fsl_diu_info[i])
  1444. framebuffer_release(machine_data->fsl_diu_info[i]);
  1445. kfree(machine_data);
  1446. return 0;
  1447. }
  1448. #ifndef MODULE
  1449. static int __init fsl_diu_setup(char *options)
  1450. {
  1451. char *opt;
  1452. unsigned long val;
  1453. if (!options || !*options)
  1454. return 0;
  1455. while ((opt = strsep(&options, ",")) != NULL) {
  1456. if (!*opt)
  1457. continue;
  1458. if (!strncmp(opt, "monitor=", 8)) {
  1459. monitor_port = fsl_diu_name_to_port(opt + 8);
  1460. } else if (!strncmp(opt, "bpp=", 4)) {
  1461. if (!strict_strtoul(opt + 4, 10, &val))
  1462. default_bpp = val;
  1463. } else
  1464. fb_mode = opt;
  1465. }
  1466. return 0;
  1467. }
  1468. #endif
  1469. static struct of_device_id fsl_diu_match[] = {
  1470. #ifdef CONFIG_PPC_MPC512x
  1471. {
  1472. .compatible = "fsl,mpc5121-diu",
  1473. },
  1474. #endif
  1475. {
  1476. .compatible = "fsl,diu",
  1477. },
  1478. {}
  1479. };
  1480. MODULE_DEVICE_TABLE(of, fsl_diu_match);
  1481. static struct platform_driver fsl_diu_driver = {
  1482. .driver = {
  1483. .name = "fsl_diu",
  1484. .owner = THIS_MODULE,
  1485. .of_match_table = fsl_diu_match,
  1486. },
  1487. .probe = fsl_diu_probe,
  1488. .remove = fsl_diu_remove,
  1489. .suspend = fsl_diu_suspend,
  1490. .resume = fsl_diu_resume,
  1491. };
  1492. static int __init fsl_diu_init(void)
  1493. {
  1494. #ifdef CONFIG_NOT_COHERENT_CACHE
  1495. struct device_node *np;
  1496. const u32 *prop;
  1497. #endif
  1498. int ret;
  1499. #ifndef MODULE
  1500. char *option;
  1501. /*
  1502. * For kernel boot options (in 'video=xxxfb:<options>' format)
  1503. */
  1504. if (fb_get_options("fslfb", &option))
  1505. return -ENODEV;
  1506. fsl_diu_setup(option);
  1507. #else
  1508. monitor_port = fsl_diu_name_to_port(monitor_string);
  1509. #endif
  1510. pr_info("Freescale Display Interface Unit (DIU) framebuffer driver\n");
  1511. #ifdef CONFIG_NOT_COHERENT_CACHE
  1512. np = of_find_node_by_type(NULL, "cpu");
  1513. if (!np) {
  1514. pr_err("fsl-diu-fb: can't find 'cpu' device node\n");
  1515. return -ENODEV;
  1516. }
  1517. prop = of_get_property(np, "d-cache-size", NULL);
  1518. if (prop == NULL) {
  1519. pr_err("fsl-diu-fb: missing 'd-cache-size' property' "
  1520. "in 'cpu' node\n");
  1521. of_node_put(np);
  1522. return -ENODEV;
  1523. }
  1524. /*
  1525. * Freescale PLRU requires 13/8 times the cache size to do a proper
  1526. * displacement flush
  1527. */
  1528. coherence_data_size = *prop * 13;
  1529. coherence_data_size /= 8;
  1530. prop = of_get_property(np, "d-cache-line-size", NULL);
  1531. if (prop == NULL) {
  1532. pr_err("fsl-diu-fb: missing 'd-cache-line-size' property' "
  1533. "in 'cpu' node\n");
  1534. of_node_put(np);
  1535. return -ENODEV;
  1536. }
  1537. d_cache_line_size = *prop;
  1538. of_node_put(np);
  1539. coherence_data = vmalloc(coherence_data_size);
  1540. if (!coherence_data)
  1541. return -ENOMEM;
  1542. #endif
  1543. ret = platform_driver_register(&fsl_diu_driver);
  1544. if (ret) {
  1545. pr_err("fsl-diu-fb: failed to register platform driver\n");
  1546. #if defined(CONFIG_NOT_COHERENT_CACHE)
  1547. vfree(coherence_data);
  1548. #endif
  1549. iounmap(dr.diu_reg);
  1550. }
  1551. return ret;
  1552. }
  1553. static void __exit fsl_diu_exit(void)
  1554. {
  1555. platform_driver_unregister(&fsl_diu_driver);
  1556. #if defined(CONFIG_NOT_COHERENT_CACHE)
  1557. vfree(coherence_data);
  1558. #endif
  1559. }
  1560. module_init(fsl_diu_init);
  1561. module_exit(fsl_diu_exit);
  1562. MODULE_AUTHOR("York Sun <yorksun@freescale.com>");
  1563. MODULE_DESCRIPTION("Freescale DIU framebuffer driver");
  1564. MODULE_LICENSE("GPL");
  1565. module_param_named(mode, fb_mode, charp, 0);
  1566. MODULE_PARM_DESC(mode,
  1567. "Specify resolution as \"<xres>x<yres>[-<bpp>][@<refresh>]\" ");
  1568. module_param_named(bpp, default_bpp, ulong, 0);
  1569. MODULE_PARM_DESC(bpp, "Specify bit-per-pixel if not specified in 'mode'");
  1570. module_param_named(monitor, monitor_string, charp, 0);
  1571. MODULE_PARM_DESC(monitor, "Specify the monitor port "
  1572. "(\"dvi\", \"lvds\", or \"dlvds\") if supported by the platform");