ymfpci_main.c 67 KB

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  1. /*
  2. * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
  3. * Routines for control of YMF724/740/744/754 chips
  4. *
  5. * BUGS:
  6. * --
  7. *
  8. * TODO:
  9. * --
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2 of the License, or
  14. * (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  24. *
  25. */
  26. #include <sound/driver.h>
  27. #include <linux/delay.h>
  28. #include <linux/init.h>
  29. #include <linux/interrupt.h>
  30. #include <linux/pci.h>
  31. #include <linux/sched.h>
  32. #include <linux/slab.h>
  33. #include <linux/vmalloc.h>
  34. #include <sound/core.h>
  35. #include <sound/control.h>
  36. #include <sound/info.h>
  37. #include <sound/ymfpci.h>
  38. #include <sound/asoundef.h>
  39. #include <sound/mpu401.h>
  40. #include <asm/io.h>
  41. /*
  42. * constants
  43. */
  44. /*
  45. * common I/O routines
  46. */
  47. static void snd_ymfpci_irq_wait(struct snd_ymfpci *chip);
  48. static inline u8 snd_ymfpci_readb(struct snd_ymfpci *chip, u32 offset)
  49. {
  50. return readb(chip->reg_area_virt + offset);
  51. }
  52. static inline void snd_ymfpci_writeb(struct snd_ymfpci *chip, u32 offset, u8 val)
  53. {
  54. writeb(val, chip->reg_area_virt + offset);
  55. }
  56. static inline u16 snd_ymfpci_readw(struct snd_ymfpci *chip, u32 offset)
  57. {
  58. return readw(chip->reg_area_virt + offset);
  59. }
  60. static inline void snd_ymfpci_writew(struct snd_ymfpci *chip, u32 offset, u16 val)
  61. {
  62. writew(val, chip->reg_area_virt + offset);
  63. }
  64. static inline u32 snd_ymfpci_readl(struct snd_ymfpci *chip, u32 offset)
  65. {
  66. return readl(chip->reg_area_virt + offset);
  67. }
  68. static inline void snd_ymfpci_writel(struct snd_ymfpci *chip, u32 offset, u32 val)
  69. {
  70. writel(val, chip->reg_area_virt + offset);
  71. }
  72. static int snd_ymfpci_codec_ready(struct snd_ymfpci *chip, int secondary)
  73. {
  74. unsigned long end_time;
  75. u32 reg = secondary ? YDSXGR_SECSTATUSADR : YDSXGR_PRISTATUSADR;
  76. end_time = jiffies + msecs_to_jiffies(750);
  77. do {
  78. if ((snd_ymfpci_readw(chip, reg) & 0x8000) == 0)
  79. return 0;
  80. set_current_state(TASK_UNINTERRUPTIBLE);
  81. schedule_timeout_uninterruptible(1);
  82. } while (time_before(jiffies, end_time));
  83. snd_printk(KERN_ERR "codec_ready: codec %i is not ready [0x%x]\n", secondary, snd_ymfpci_readw(chip, reg));
  84. return -EBUSY;
  85. }
  86. static void snd_ymfpci_codec_write(struct snd_ac97 *ac97, u16 reg, u16 val)
  87. {
  88. struct snd_ymfpci *chip = ac97->private_data;
  89. u32 cmd;
  90. snd_ymfpci_codec_ready(chip, 0);
  91. cmd = ((YDSXG_AC97WRITECMD | reg) << 16) | val;
  92. snd_ymfpci_writel(chip, YDSXGR_AC97CMDDATA, cmd);
  93. }
  94. static u16 snd_ymfpci_codec_read(struct snd_ac97 *ac97, u16 reg)
  95. {
  96. struct snd_ymfpci *chip = ac97->private_data;
  97. if (snd_ymfpci_codec_ready(chip, 0))
  98. return ~0;
  99. snd_ymfpci_writew(chip, YDSXGR_AC97CMDADR, YDSXG_AC97READCMD | reg);
  100. if (snd_ymfpci_codec_ready(chip, 0))
  101. return ~0;
  102. if (chip->device_id == PCI_DEVICE_ID_YAMAHA_744 && chip->rev < 2) {
  103. int i;
  104. for (i = 0; i < 600; i++)
  105. snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA);
  106. }
  107. return snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA);
  108. }
  109. /*
  110. * Misc routines
  111. */
  112. static u32 snd_ymfpci_calc_delta(u32 rate)
  113. {
  114. switch (rate) {
  115. case 8000: return 0x02aaab00;
  116. case 11025: return 0x03accd00;
  117. case 16000: return 0x05555500;
  118. case 22050: return 0x07599a00;
  119. case 32000: return 0x0aaaab00;
  120. case 44100: return 0x0eb33300;
  121. default: return ((rate << 16) / 375) << 5;
  122. }
  123. }
  124. static u32 def_rate[8] = {
  125. 100, 2000, 8000, 11025, 16000, 22050, 32000, 48000
  126. };
  127. static u32 snd_ymfpci_calc_lpfK(u32 rate)
  128. {
  129. u32 i;
  130. static u32 val[8] = {
  131. 0x00570000, 0x06AA0000, 0x18B20000, 0x20930000,
  132. 0x2B9A0000, 0x35A10000, 0x3EAA0000, 0x40000000
  133. };
  134. if (rate == 44100)
  135. return 0x40000000; /* FIXME: What's the right value? */
  136. for (i = 0; i < 8; i++)
  137. if (rate <= def_rate[i])
  138. return val[i];
  139. return val[0];
  140. }
  141. static u32 snd_ymfpci_calc_lpfQ(u32 rate)
  142. {
  143. u32 i;
  144. static u32 val[8] = {
  145. 0x35280000, 0x34A70000, 0x32020000, 0x31770000,
  146. 0x31390000, 0x31C90000, 0x33D00000, 0x40000000
  147. };
  148. if (rate == 44100)
  149. return 0x370A0000;
  150. for (i = 0; i < 8; i++)
  151. if (rate <= def_rate[i])
  152. return val[i];
  153. return val[0];
  154. }
  155. /*
  156. * Hardware start management
  157. */
  158. static void snd_ymfpci_hw_start(struct snd_ymfpci *chip)
  159. {
  160. unsigned long flags;
  161. spin_lock_irqsave(&chip->reg_lock, flags);
  162. if (chip->start_count++ > 0)
  163. goto __end;
  164. snd_ymfpci_writel(chip, YDSXGR_MODE,
  165. snd_ymfpci_readl(chip, YDSXGR_MODE) | 3);
  166. chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1;
  167. __end:
  168. spin_unlock_irqrestore(&chip->reg_lock, flags);
  169. }
  170. static void snd_ymfpci_hw_stop(struct snd_ymfpci *chip)
  171. {
  172. unsigned long flags;
  173. long timeout = 1000;
  174. spin_lock_irqsave(&chip->reg_lock, flags);
  175. if (--chip->start_count > 0)
  176. goto __end;
  177. snd_ymfpci_writel(chip, YDSXGR_MODE,
  178. snd_ymfpci_readl(chip, YDSXGR_MODE) & ~3);
  179. while (timeout-- > 0) {
  180. if ((snd_ymfpci_readl(chip, YDSXGR_STATUS) & 2) == 0)
  181. break;
  182. }
  183. if (atomic_read(&chip->interrupt_sleep_count)) {
  184. atomic_set(&chip->interrupt_sleep_count, 0);
  185. wake_up(&chip->interrupt_sleep);
  186. }
  187. __end:
  188. spin_unlock_irqrestore(&chip->reg_lock, flags);
  189. }
  190. /*
  191. * Playback voice management
  192. */
  193. static int voice_alloc(struct snd_ymfpci *chip,
  194. enum snd_ymfpci_voice_type type, int pair,
  195. struct snd_ymfpci_voice **rvoice)
  196. {
  197. struct snd_ymfpci_voice *voice, *voice2;
  198. int idx;
  199. *rvoice = NULL;
  200. for (idx = 0; idx < YDSXG_PLAYBACK_VOICES; idx += pair ? 2 : 1) {
  201. voice = &chip->voices[idx];
  202. voice2 = pair ? &chip->voices[idx+1] : NULL;
  203. if (voice->use || (voice2 && voice2->use))
  204. continue;
  205. voice->use = 1;
  206. if (voice2)
  207. voice2->use = 1;
  208. switch (type) {
  209. case YMFPCI_PCM:
  210. voice->pcm = 1;
  211. if (voice2)
  212. voice2->pcm = 1;
  213. break;
  214. case YMFPCI_SYNTH:
  215. voice->synth = 1;
  216. break;
  217. case YMFPCI_MIDI:
  218. voice->midi = 1;
  219. break;
  220. }
  221. snd_ymfpci_hw_start(chip);
  222. if (voice2)
  223. snd_ymfpci_hw_start(chip);
  224. *rvoice = voice;
  225. return 0;
  226. }
  227. return -ENOMEM;
  228. }
  229. static int snd_ymfpci_voice_alloc(struct snd_ymfpci *chip,
  230. enum snd_ymfpci_voice_type type, int pair,
  231. struct snd_ymfpci_voice **rvoice)
  232. {
  233. unsigned long flags;
  234. int result;
  235. snd_assert(rvoice != NULL, return -EINVAL);
  236. snd_assert(!pair || type == YMFPCI_PCM, return -EINVAL);
  237. spin_lock_irqsave(&chip->voice_lock, flags);
  238. for (;;) {
  239. result = voice_alloc(chip, type, pair, rvoice);
  240. if (result == 0 || type != YMFPCI_PCM)
  241. break;
  242. /* TODO: synth/midi voice deallocation */
  243. break;
  244. }
  245. spin_unlock_irqrestore(&chip->voice_lock, flags);
  246. return result;
  247. }
  248. static int snd_ymfpci_voice_free(struct snd_ymfpci *chip, struct snd_ymfpci_voice *pvoice)
  249. {
  250. unsigned long flags;
  251. snd_assert(pvoice != NULL, return -EINVAL);
  252. snd_ymfpci_hw_stop(chip);
  253. spin_lock_irqsave(&chip->voice_lock, flags);
  254. pvoice->use = pvoice->pcm = pvoice->synth = pvoice->midi = 0;
  255. pvoice->ypcm = NULL;
  256. pvoice->interrupt = NULL;
  257. spin_unlock_irqrestore(&chip->voice_lock, flags);
  258. return 0;
  259. }
  260. /*
  261. * PCM part
  262. */
  263. static void snd_ymfpci_pcm_interrupt(struct snd_ymfpci *chip, struct snd_ymfpci_voice *voice)
  264. {
  265. struct snd_ymfpci_pcm *ypcm;
  266. u32 pos, delta;
  267. if ((ypcm = voice->ypcm) == NULL)
  268. return;
  269. if (ypcm->substream == NULL)
  270. return;
  271. spin_lock(&chip->reg_lock);
  272. if (ypcm->running) {
  273. pos = le32_to_cpu(voice->bank[chip->active_bank].start);
  274. if (pos < ypcm->last_pos)
  275. delta = pos + (ypcm->buffer_size - ypcm->last_pos);
  276. else
  277. delta = pos - ypcm->last_pos;
  278. ypcm->period_pos += delta;
  279. ypcm->last_pos = pos;
  280. if (ypcm->period_pos >= ypcm->period_size) {
  281. // printk("done - active_bank = 0x%x, start = 0x%x\n", chip->active_bank, voice->bank[chip->active_bank].start);
  282. ypcm->period_pos %= ypcm->period_size;
  283. spin_unlock(&chip->reg_lock);
  284. snd_pcm_period_elapsed(ypcm->substream);
  285. spin_lock(&chip->reg_lock);
  286. }
  287. if (unlikely(ypcm->update_pcm_vol)) {
  288. unsigned int subs = ypcm->substream->number;
  289. unsigned int next_bank = 1 - chip->active_bank;
  290. struct snd_ymfpci_playback_bank *bank;
  291. u32 volume;
  292. bank = &voice->bank[next_bank];
  293. volume = cpu_to_le32(chip->pcm_mixer[subs].left << 15);
  294. bank->left_gain_end = volume;
  295. if (ypcm->output_rear)
  296. bank->eff2_gain_end = volume;
  297. if (ypcm->voices[1])
  298. bank = &ypcm->voices[1]->bank[next_bank];
  299. volume = cpu_to_le32(chip->pcm_mixer[subs].right << 15);
  300. bank->right_gain_end = volume;
  301. if (ypcm->output_rear)
  302. bank->eff3_gain_end = volume;
  303. ypcm->update_pcm_vol--;
  304. }
  305. }
  306. spin_unlock(&chip->reg_lock);
  307. }
  308. static void snd_ymfpci_pcm_capture_interrupt(struct snd_pcm_substream *substream)
  309. {
  310. struct snd_pcm_runtime *runtime = substream->runtime;
  311. struct snd_ymfpci_pcm *ypcm = runtime->private_data;
  312. struct snd_ymfpci *chip = ypcm->chip;
  313. u32 pos, delta;
  314. spin_lock(&chip->reg_lock);
  315. if (ypcm->running) {
  316. pos = le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift;
  317. if (pos < ypcm->last_pos)
  318. delta = pos + (ypcm->buffer_size - ypcm->last_pos);
  319. else
  320. delta = pos - ypcm->last_pos;
  321. ypcm->period_pos += delta;
  322. ypcm->last_pos = pos;
  323. if (ypcm->period_pos >= ypcm->period_size) {
  324. ypcm->period_pos %= ypcm->period_size;
  325. // printk("done - active_bank = 0x%x, start = 0x%x\n", chip->active_bank, voice->bank[chip->active_bank].start);
  326. spin_unlock(&chip->reg_lock);
  327. snd_pcm_period_elapsed(substream);
  328. spin_lock(&chip->reg_lock);
  329. }
  330. }
  331. spin_unlock(&chip->reg_lock);
  332. }
  333. static int snd_ymfpci_playback_trigger(struct snd_pcm_substream *substream,
  334. int cmd)
  335. {
  336. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  337. struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
  338. int result = 0;
  339. spin_lock(&chip->reg_lock);
  340. if (ypcm->voices[0] == NULL) {
  341. result = -EINVAL;
  342. goto __unlock;
  343. }
  344. switch (cmd) {
  345. case SNDRV_PCM_TRIGGER_START:
  346. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  347. case SNDRV_PCM_TRIGGER_RESUME:
  348. chip->ctrl_playback[ypcm->voices[0]->number + 1] = cpu_to_le32(ypcm->voices[0]->bank_addr);
  349. if (ypcm->voices[1] != NULL)
  350. chip->ctrl_playback[ypcm->voices[1]->number + 1] = cpu_to_le32(ypcm->voices[1]->bank_addr);
  351. ypcm->running = 1;
  352. break;
  353. case SNDRV_PCM_TRIGGER_STOP:
  354. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  355. case SNDRV_PCM_TRIGGER_SUSPEND:
  356. chip->ctrl_playback[ypcm->voices[0]->number + 1] = 0;
  357. if (ypcm->voices[1] != NULL)
  358. chip->ctrl_playback[ypcm->voices[1]->number + 1] = 0;
  359. ypcm->running = 0;
  360. break;
  361. default:
  362. result = -EINVAL;
  363. break;
  364. }
  365. __unlock:
  366. spin_unlock(&chip->reg_lock);
  367. return result;
  368. }
  369. static int snd_ymfpci_capture_trigger(struct snd_pcm_substream *substream,
  370. int cmd)
  371. {
  372. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  373. struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
  374. int result = 0;
  375. u32 tmp;
  376. spin_lock(&chip->reg_lock);
  377. switch (cmd) {
  378. case SNDRV_PCM_TRIGGER_START:
  379. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  380. case SNDRV_PCM_TRIGGER_RESUME:
  381. tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) | (1 << ypcm->capture_bank_number);
  382. snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp);
  383. ypcm->running = 1;
  384. break;
  385. case SNDRV_PCM_TRIGGER_STOP:
  386. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  387. case SNDRV_PCM_TRIGGER_SUSPEND:
  388. tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) & ~(1 << ypcm->capture_bank_number);
  389. snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp);
  390. ypcm->running = 0;
  391. break;
  392. default:
  393. result = -EINVAL;
  394. break;
  395. }
  396. spin_unlock(&chip->reg_lock);
  397. return result;
  398. }
  399. static int snd_ymfpci_pcm_voice_alloc(struct snd_ymfpci_pcm *ypcm, int voices)
  400. {
  401. int err;
  402. if (ypcm->voices[1] != NULL && voices < 2) {
  403. snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[1]);
  404. ypcm->voices[1] = NULL;
  405. }
  406. if (voices == 1 && ypcm->voices[0] != NULL)
  407. return 0; /* already allocated */
  408. if (voices == 2 && ypcm->voices[0] != NULL && ypcm->voices[1] != NULL)
  409. return 0; /* already allocated */
  410. if (voices > 1) {
  411. if (ypcm->voices[0] != NULL && ypcm->voices[1] == NULL) {
  412. snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[0]);
  413. ypcm->voices[0] = NULL;
  414. }
  415. }
  416. err = snd_ymfpci_voice_alloc(ypcm->chip, YMFPCI_PCM, voices > 1, &ypcm->voices[0]);
  417. if (err < 0)
  418. return err;
  419. ypcm->voices[0]->ypcm = ypcm;
  420. ypcm->voices[0]->interrupt = snd_ymfpci_pcm_interrupt;
  421. if (voices > 1) {
  422. ypcm->voices[1] = &ypcm->chip->voices[ypcm->voices[0]->number + 1];
  423. ypcm->voices[1]->ypcm = ypcm;
  424. }
  425. return 0;
  426. }
  427. static void snd_ymfpci_pcm_init_voice(struct snd_ymfpci_pcm *ypcm, unsigned int voiceidx,
  428. struct snd_pcm_runtime *runtime,
  429. int has_pcm_volume)
  430. {
  431. struct snd_ymfpci_voice *voice = ypcm->voices[voiceidx];
  432. u32 format;
  433. u32 delta = snd_ymfpci_calc_delta(runtime->rate);
  434. u32 lpfQ = snd_ymfpci_calc_lpfQ(runtime->rate);
  435. u32 lpfK = snd_ymfpci_calc_lpfK(runtime->rate);
  436. struct snd_ymfpci_playback_bank *bank;
  437. unsigned int nbank;
  438. u32 vol_left, vol_right;
  439. u8 use_left, use_right;
  440. snd_assert(voice != NULL, return);
  441. if (runtime->channels == 1) {
  442. use_left = 1;
  443. use_right = 1;
  444. } else {
  445. use_left = (voiceidx & 1) == 0;
  446. use_right = !use_left;
  447. }
  448. if (has_pcm_volume) {
  449. vol_left = cpu_to_le32(ypcm->chip->pcm_mixer
  450. [ypcm->substream->number].left << 15);
  451. vol_right = cpu_to_le32(ypcm->chip->pcm_mixer
  452. [ypcm->substream->number].right << 15);
  453. } else {
  454. vol_left = cpu_to_le32(0x40000000);
  455. vol_right = cpu_to_le32(0x40000000);
  456. }
  457. format = runtime->channels == 2 ? 0x00010000 : 0;
  458. if (snd_pcm_format_width(runtime->format) == 8)
  459. format |= 0x80000000;
  460. if (runtime->channels == 2 && (voiceidx & 1) != 0)
  461. format |= 1;
  462. for (nbank = 0; nbank < 2; nbank++) {
  463. bank = &voice->bank[nbank];
  464. memset(bank, 0, sizeof(*bank));
  465. bank->format = cpu_to_le32(format);
  466. bank->base = cpu_to_le32(runtime->dma_addr);
  467. bank->loop_end = cpu_to_le32(ypcm->buffer_size);
  468. bank->lpfQ = cpu_to_le32(lpfQ);
  469. bank->delta =
  470. bank->delta_end = cpu_to_le32(delta);
  471. bank->lpfK =
  472. bank->lpfK_end = cpu_to_le32(lpfK);
  473. bank->eg_gain =
  474. bank->eg_gain_end = cpu_to_le32(0x40000000);
  475. if (ypcm->output_front) {
  476. if (use_left) {
  477. bank->left_gain =
  478. bank->left_gain_end = vol_left;
  479. }
  480. if (use_right) {
  481. bank->right_gain =
  482. bank->right_gain_end = vol_right;
  483. }
  484. }
  485. if (ypcm->output_rear) {
  486. /* The SPDIF out channels seem to be swapped, so we have
  487. * to swap them here, too. The rear analog out channels
  488. * will be wrong, but otherwise AC3 would not work.
  489. */
  490. if (use_left) {
  491. bank->eff3_gain =
  492. bank->eff3_gain_end = vol_left;
  493. }
  494. if (use_right) {
  495. bank->eff2_gain =
  496. bank->eff2_gain_end = vol_right;
  497. }
  498. }
  499. }
  500. }
  501. static int __devinit snd_ymfpci_ac3_init(struct snd_ymfpci *chip)
  502. {
  503. if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
  504. 4096, &chip->ac3_tmp_base) < 0)
  505. return -ENOMEM;
  506. chip->bank_effect[3][0]->base =
  507. chip->bank_effect[3][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr);
  508. chip->bank_effect[3][0]->loop_end =
  509. chip->bank_effect[3][1]->loop_end = cpu_to_le32(1024);
  510. chip->bank_effect[4][0]->base =
  511. chip->bank_effect[4][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr + 2048);
  512. chip->bank_effect[4][0]->loop_end =
  513. chip->bank_effect[4][1]->loop_end = cpu_to_le32(1024);
  514. spin_lock_irq(&chip->reg_lock);
  515. snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT,
  516. snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) | 3 << 3);
  517. spin_unlock_irq(&chip->reg_lock);
  518. return 0;
  519. }
  520. static int snd_ymfpci_ac3_done(struct snd_ymfpci *chip)
  521. {
  522. spin_lock_irq(&chip->reg_lock);
  523. snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT,
  524. snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) & ~(3 << 3));
  525. spin_unlock_irq(&chip->reg_lock);
  526. // snd_ymfpci_irq_wait(chip);
  527. if (chip->ac3_tmp_base.area) {
  528. snd_dma_free_pages(&chip->ac3_tmp_base);
  529. chip->ac3_tmp_base.area = NULL;
  530. }
  531. return 0;
  532. }
  533. static int snd_ymfpci_playback_hw_params(struct snd_pcm_substream *substream,
  534. struct snd_pcm_hw_params *hw_params)
  535. {
  536. struct snd_pcm_runtime *runtime = substream->runtime;
  537. struct snd_ymfpci_pcm *ypcm = runtime->private_data;
  538. int err;
  539. if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
  540. return err;
  541. if ((err = snd_ymfpci_pcm_voice_alloc(ypcm, params_channels(hw_params))) < 0)
  542. return err;
  543. return 0;
  544. }
  545. static int snd_ymfpci_playback_hw_free(struct snd_pcm_substream *substream)
  546. {
  547. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  548. struct snd_pcm_runtime *runtime = substream->runtime;
  549. struct snd_ymfpci_pcm *ypcm;
  550. if (runtime->private_data == NULL)
  551. return 0;
  552. ypcm = runtime->private_data;
  553. /* wait, until the PCI operations are not finished */
  554. snd_ymfpci_irq_wait(chip);
  555. snd_pcm_lib_free_pages(substream);
  556. if (ypcm->voices[1]) {
  557. snd_ymfpci_voice_free(chip, ypcm->voices[1]);
  558. ypcm->voices[1] = NULL;
  559. }
  560. if (ypcm->voices[0]) {
  561. snd_ymfpci_voice_free(chip, ypcm->voices[0]);
  562. ypcm->voices[0] = NULL;
  563. }
  564. return 0;
  565. }
  566. static int snd_ymfpci_playback_prepare(struct snd_pcm_substream *substream)
  567. {
  568. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  569. struct snd_pcm_runtime *runtime = substream->runtime;
  570. struct snd_ymfpci_pcm *ypcm = runtime->private_data;
  571. unsigned int nvoice;
  572. ypcm->period_size = runtime->period_size;
  573. ypcm->buffer_size = runtime->buffer_size;
  574. ypcm->period_pos = 0;
  575. ypcm->last_pos = 0;
  576. for (nvoice = 0; nvoice < runtime->channels; nvoice++)
  577. snd_ymfpci_pcm_init_voice(ypcm, nvoice, runtime,
  578. substream->pcm == chip->pcm);
  579. return 0;
  580. }
  581. static int snd_ymfpci_capture_hw_params(struct snd_pcm_substream *substream,
  582. struct snd_pcm_hw_params *hw_params)
  583. {
  584. return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
  585. }
  586. static int snd_ymfpci_capture_hw_free(struct snd_pcm_substream *substream)
  587. {
  588. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  589. /* wait, until the PCI operations are not finished */
  590. snd_ymfpci_irq_wait(chip);
  591. return snd_pcm_lib_free_pages(substream);
  592. }
  593. static int snd_ymfpci_capture_prepare(struct snd_pcm_substream *substream)
  594. {
  595. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  596. struct snd_pcm_runtime *runtime = substream->runtime;
  597. struct snd_ymfpci_pcm *ypcm = runtime->private_data;
  598. struct snd_ymfpci_capture_bank * bank;
  599. int nbank;
  600. u32 rate, format;
  601. ypcm->period_size = runtime->period_size;
  602. ypcm->buffer_size = runtime->buffer_size;
  603. ypcm->period_pos = 0;
  604. ypcm->last_pos = 0;
  605. ypcm->shift = 0;
  606. rate = ((48000 * 4096) / runtime->rate) - 1;
  607. format = 0;
  608. if (runtime->channels == 2) {
  609. format |= 2;
  610. ypcm->shift++;
  611. }
  612. if (snd_pcm_format_width(runtime->format) == 8)
  613. format |= 1;
  614. else
  615. ypcm->shift++;
  616. switch (ypcm->capture_bank_number) {
  617. case 0:
  618. snd_ymfpci_writel(chip, YDSXGR_RECFORMAT, format);
  619. snd_ymfpci_writel(chip, YDSXGR_RECSLOTSR, rate);
  620. break;
  621. case 1:
  622. snd_ymfpci_writel(chip, YDSXGR_ADCFORMAT, format);
  623. snd_ymfpci_writel(chip, YDSXGR_ADCSLOTSR, rate);
  624. break;
  625. }
  626. for (nbank = 0; nbank < 2; nbank++) {
  627. bank = chip->bank_capture[ypcm->capture_bank_number][nbank];
  628. bank->base = cpu_to_le32(runtime->dma_addr);
  629. bank->loop_end = cpu_to_le32(ypcm->buffer_size << ypcm->shift);
  630. bank->start = 0;
  631. bank->num_of_loops = 0;
  632. }
  633. return 0;
  634. }
  635. static snd_pcm_uframes_t snd_ymfpci_playback_pointer(struct snd_pcm_substream *substream)
  636. {
  637. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  638. struct snd_pcm_runtime *runtime = substream->runtime;
  639. struct snd_ymfpci_pcm *ypcm = runtime->private_data;
  640. struct snd_ymfpci_voice *voice = ypcm->voices[0];
  641. if (!(ypcm->running && voice))
  642. return 0;
  643. return le32_to_cpu(voice->bank[chip->active_bank].start);
  644. }
  645. static snd_pcm_uframes_t snd_ymfpci_capture_pointer(struct snd_pcm_substream *substream)
  646. {
  647. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  648. struct snd_pcm_runtime *runtime = substream->runtime;
  649. struct snd_ymfpci_pcm *ypcm = runtime->private_data;
  650. if (!ypcm->running)
  651. return 0;
  652. return le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift;
  653. }
  654. static void snd_ymfpci_irq_wait(struct snd_ymfpci *chip)
  655. {
  656. wait_queue_t wait;
  657. int loops = 4;
  658. while (loops-- > 0) {
  659. if ((snd_ymfpci_readl(chip, YDSXGR_MODE) & 3) == 0)
  660. continue;
  661. init_waitqueue_entry(&wait, current);
  662. add_wait_queue(&chip->interrupt_sleep, &wait);
  663. atomic_inc(&chip->interrupt_sleep_count);
  664. schedule_timeout_uninterruptible(msecs_to_jiffies(50));
  665. remove_wait_queue(&chip->interrupt_sleep, &wait);
  666. }
  667. }
  668. static irqreturn_t snd_ymfpci_interrupt(int irq, void *dev_id, struct pt_regs *regs)
  669. {
  670. struct snd_ymfpci *chip = dev_id;
  671. u32 status, nvoice, mode;
  672. struct snd_ymfpci_voice *voice;
  673. status = snd_ymfpci_readl(chip, YDSXGR_STATUS);
  674. if (status & 0x80000000) {
  675. chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1;
  676. spin_lock(&chip->voice_lock);
  677. for (nvoice = 0; nvoice < YDSXG_PLAYBACK_VOICES; nvoice++) {
  678. voice = &chip->voices[nvoice];
  679. if (voice->interrupt)
  680. voice->interrupt(chip, voice);
  681. }
  682. for (nvoice = 0; nvoice < YDSXG_CAPTURE_VOICES; nvoice++) {
  683. if (chip->capture_substream[nvoice])
  684. snd_ymfpci_pcm_capture_interrupt(chip->capture_substream[nvoice]);
  685. }
  686. #if 0
  687. for (nvoice = 0; nvoice < YDSXG_EFFECT_VOICES; nvoice++) {
  688. if (chip->effect_substream[nvoice])
  689. snd_ymfpci_pcm_effect_interrupt(chip->effect_substream[nvoice]);
  690. }
  691. #endif
  692. spin_unlock(&chip->voice_lock);
  693. spin_lock(&chip->reg_lock);
  694. snd_ymfpci_writel(chip, YDSXGR_STATUS, 0x80000000);
  695. mode = snd_ymfpci_readl(chip, YDSXGR_MODE) | 2;
  696. snd_ymfpci_writel(chip, YDSXGR_MODE, mode);
  697. spin_unlock(&chip->reg_lock);
  698. if (atomic_read(&chip->interrupt_sleep_count)) {
  699. atomic_set(&chip->interrupt_sleep_count, 0);
  700. wake_up(&chip->interrupt_sleep);
  701. }
  702. }
  703. status = snd_ymfpci_readw(chip, YDSXGR_INTFLAG);
  704. if (status & 1) {
  705. if (chip->timer)
  706. snd_timer_interrupt(chip->timer, chip->timer->sticks);
  707. }
  708. snd_ymfpci_writew(chip, YDSXGR_INTFLAG, status);
  709. if (chip->rawmidi)
  710. snd_mpu401_uart_interrupt(irq, chip->rawmidi->private_data, regs);
  711. return IRQ_HANDLED;
  712. }
  713. static struct snd_pcm_hardware snd_ymfpci_playback =
  714. {
  715. .info = (SNDRV_PCM_INFO_MMAP |
  716. SNDRV_PCM_INFO_MMAP_VALID |
  717. SNDRV_PCM_INFO_INTERLEAVED |
  718. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  719. SNDRV_PCM_INFO_PAUSE |
  720. SNDRV_PCM_INFO_RESUME),
  721. .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
  722. .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
  723. .rate_min = 8000,
  724. .rate_max = 48000,
  725. .channels_min = 1,
  726. .channels_max = 2,
  727. .buffer_bytes_max = 256 * 1024, /* FIXME: enough? */
  728. .period_bytes_min = 64,
  729. .period_bytes_max = 256 * 1024, /* FIXME: enough? */
  730. .periods_min = 3,
  731. .periods_max = 1024,
  732. .fifo_size = 0,
  733. };
  734. static struct snd_pcm_hardware snd_ymfpci_capture =
  735. {
  736. .info = (SNDRV_PCM_INFO_MMAP |
  737. SNDRV_PCM_INFO_MMAP_VALID |
  738. SNDRV_PCM_INFO_INTERLEAVED |
  739. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  740. SNDRV_PCM_INFO_PAUSE |
  741. SNDRV_PCM_INFO_RESUME),
  742. .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
  743. .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
  744. .rate_min = 8000,
  745. .rate_max = 48000,
  746. .channels_min = 1,
  747. .channels_max = 2,
  748. .buffer_bytes_max = 256 * 1024, /* FIXME: enough? */
  749. .period_bytes_min = 64,
  750. .period_bytes_max = 256 * 1024, /* FIXME: enough? */
  751. .periods_min = 3,
  752. .periods_max = 1024,
  753. .fifo_size = 0,
  754. };
  755. static void snd_ymfpci_pcm_free_substream(struct snd_pcm_runtime *runtime)
  756. {
  757. kfree(runtime->private_data);
  758. }
  759. static int snd_ymfpci_playback_open_1(struct snd_pcm_substream *substream)
  760. {
  761. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  762. struct snd_pcm_runtime *runtime = substream->runtime;
  763. struct snd_ymfpci_pcm *ypcm;
  764. ypcm = kzalloc(sizeof(*ypcm), GFP_KERNEL);
  765. if (ypcm == NULL)
  766. return -ENOMEM;
  767. ypcm->chip = chip;
  768. ypcm->type = PLAYBACK_VOICE;
  769. ypcm->substream = substream;
  770. runtime->hw = snd_ymfpci_playback;
  771. runtime->private_data = ypcm;
  772. runtime->private_free = snd_ymfpci_pcm_free_substream;
  773. /* FIXME? True value is 256/48 = 5.33333 ms */
  774. snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_PERIOD_TIME, 5333, UINT_MAX);
  775. return 0;
  776. }
  777. /* call with spinlock held */
  778. static void ymfpci_open_extension(struct snd_ymfpci *chip)
  779. {
  780. if (! chip->rear_opened) {
  781. if (! chip->spdif_opened) /* set AC3 */
  782. snd_ymfpci_writel(chip, YDSXGR_MODE,
  783. snd_ymfpci_readl(chip, YDSXGR_MODE) | (1 << 30));
  784. /* enable second codec (4CHEN) */
  785. snd_ymfpci_writew(chip, YDSXGR_SECCONFIG,
  786. (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) | 0x0010);
  787. }
  788. }
  789. /* call with spinlock held */
  790. static void ymfpci_close_extension(struct snd_ymfpci *chip)
  791. {
  792. if (! chip->rear_opened) {
  793. if (! chip->spdif_opened)
  794. snd_ymfpci_writel(chip, YDSXGR_MODE,
  795. snd_ymfpci_readl(chip, YDSXGR_MODE) & ~(1 << 30));
  796. snd_ymfpci_writew(chip, YDSXGR_SECCONFIG,
  797. (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) & ~0x0010);
  798. }
  799. }
  800. static int snd_ymfpci_playback_open(struct snd_pcm_substream *substream)
  801. {
  802. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  803. struct snd_pcm_runtime *runtime = substream->runtime;
  804. struct snd_ymfpci_pcm *ypcm;
  805. struct snd_kcontrol *kctl;
  806. int err;
  807. if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
  808. return err;
  809. ypcm = runtime->private_data;
  810. ypcm->output_front = 1;
  811. ypcm->output_rear = chip->mode_dup4ch ? 1 : 0;
  812. spin_lock_irq(&chip->reg_lock);
  813. if (ypcm->output_rear) {
  814. ymfpci_open_extension(chip);
  815. chip->rear_opened++;
  816. }
  817. spin_unlock_irq(&chip->reg_lock);
  818. kctl = chip->pcm_mixer[substream->number].ctl;
  819. kctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
  820. snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id);
  821. return 0;
  822. }
  823. static int snd_ymfpci_playback_spdif_open(struct snd_pcm_substream *substream)
  824. {
  825. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  826. struct snd_pcm_runtime *runtime = substream->runtime;
  827. struct snd_ymfpci_pcm *ypcm;
  828. int err;
  829. if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
  830. return err;
  831. ypcm = runtime->private_data;
  832. ypcm->output_front = 0;
  833. ypcm->output_rear = 1;
  834. spin_lock_irq(&chip->reg_lock);
  835. snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL,
  836. snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) | 2);
  837. ymfpci_open_extension(chip);
  838. chip->spdif_pcm_bits = chip->spdif_bits;
  839. snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits);
  840. chip->spdif_opened++;
  841. spin_unlock_irq(&chip->reg_lock);
  842. chip->spdif_pcm_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
  843. snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
  844. SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id);
  845. return 0;
  846. }
  847. static int snd_ymfpci_playback_4ch_open(struct snd_pcm_substream *substream)
  848. {
  849. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  850. struct snd_pcm_runtime *runtime = substream->runtime;
  851. struct snd_ymfpci_pcm *ypcm;
  852. int err;
  853. if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
  854. return err;
  855. ypcm = runtime->private_data;
  856. ypcm->output_front = 0;
  857. ypcm->output_rear = 1;
  858. spin_lock_irq(&chip->reg_lock);
  859. ymfpci_open_extension(chip);
  860. chip->rear_opened++;
  861. spin_unlock_irq(&chip->reg_lock);
  862. return 0;
  863. }
  864. static int snd_ymfpci_capture_open(struct snd_pcm_substream *substream,
  865. u32 capture_bank_number)
  866. {
  867. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  868. struct snd_pcm_runtime *runtime = substream->runtime;
  869. struct snd_ymfpci_pcm *ypcm;
  870. ypcm = kzalloc(sizeof(*ypcm), GFP_KERNEL);
  871. if (ypcm == NULL)
  872. return -ENOMEM;
  873. ypcm->chip = chip;
  874. ypcm->type = capture_bank_number + CAPTURE_REC;
  875. ypcm->substream = substream;
  876. ypcm->capture_bank_number = capture_bank_number;
  877. chip->capture_substream[capture_bank_number] = substream;
  878. runtime->hw = snd_ymfpci_capture;
  879. /* FIXME? True value is 256/48 = 5.33333 ms */
  880. snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_PERIOD_TIME, 5333, UINT_MAX);
  881. runtime->private_data = ypcm;
  882. runtime->private_free = snd_ymfpci_pcm_free_substream;
  883. snd_ymfpci_hw_start(chip);
  884. return 0;
  885. }
  886. static int snd_ymfpci_capture_rec_open(struct snd_pcm_substream *substream)
  887. {
  888. return snd_ymfpci_capture_open(substream, 0);
  889. }
  890. static int snd_ymfpci_capture_ac97_open(struct snd_pcm_substream *substream)
  891. {
  892. return snd_ymfpci_capture_open(substream, 1);
  893. }
  894. static int snd_ymfpci_playback_close_1(struct snd_pcm_substream *substream)
  895. {
  896. return 0;
  897. }
  898. static int snd_ymfpci_playback_close(struct snd_pcm_substream *substream)
  899. {
  900. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  901. struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
  902. struct snd_kcontrol *kctl;
  903. spin_lock_irq(&chip->reg_lock);
  904. if (ypcm->output_rear && chip->rear_opened > 0) {
  905. chip->rear_opened--;
  906. ymfpci_close_extension(chip);
  907. }
  908. spin_unlock_irq(&chip->reg_lock);
  909. kctl = chip->pcm_mixer[substream->number].ctl;
  910. kctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
  911. snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id);
  912. return snd_ymfpci_playback_close_1(substream);
  913. }
  914. static int snd_ymfpci_playback_spdif_close(struct snd_pcm_substream *substream)
  915. {
  916. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  917. spin_lock_irq(&chip->reg_lock);
  918. chip->spdif_opened = 0;
  919. ymfpci_close_extension(chip);
  920. snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL,
  921. snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & ~2);
  922. snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
  923. spin_unlock_irq(&chip->reg_lock);
  924. chip->spdif_pcm_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
  925. snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
  926. SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id);
  927. return snd_ymfpci_playback_close_1(substream);
  928. }
  929. static int snd_ymfpci_playback_4ch_close(struct snd_pcm_substream *substream)
  930. {
  931. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  932. spin_lock_irq(&chip->reg_lock);
  933. if (chip->rear_opened > 0) {
  934. chip->rear_opened--;
  935. ymfpci_close_extension(chip);
  936. }
  937. spin_unlock_irq(&chip->reg_lock);
  938. return snd_ymfpci_playback_close_1(substream);
  939. }
  940. static int snd_ymfpci_capture_close(struct snd_pcm_substream *substream)
  941. {
  942. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  943. struct snd_pcm_runtime *runtime = substream->runtime;
  944. struct snd_ymfpci_pcm *ypcm = runtime->private_data;
  945. if (ypcm != NULL) {
  946. chip->capture_substream[ypcm->capture_bank_number] = NULL;
  947. snd_ymfpci_hw_stop(chip);
  948. }
  949. return 0;
  950. }
  951. static struct snd_pcm_ops snd_ymfpci_playback_ops = {
  952. .open = snd_ymfpci_playback_open,
  953. .close = snd_ymfpci_playback_close,
  954. .ioctl = snd_pcm_lib_ioctl,
  955. .hw_params = snd_ymfpci_playback_hw_params,
  956. .hw_free = snd_ymfpci_playback_hw_free,
  957. .prepare = snd_ymfpci_playback_prepare,
  958. .trigger = snd_ymfpci_playback_trigger,
  959. .pointer = snd_ymfpci_playback_pointer,
  960. };
  961. static struct snd_pcm_ops snd_ymfpci_capture_rec_ops = {
  962. .open = snd_ymfpci_capture_rec_open,
  963. .close = snd_ymfpci_capture_close,
  964. .ioctl = snd_pcm_lib_ioctl,
  965. .hw_params = snd_ymfpci_capture_hw_params,
  966. .hw_free = snd_ymfpci_capture_hw_free,
  967. .prepare = snd_ymfpci_capture_prepare,
  968. .trigger = snd_ymfpci_capture_trigger,
  969. .pointer = snd_ymfpci_capture_pointer,
  970. };
  971. int __devinit snd_ymfpci_pcm(struct snd_ymfpci *chip, int device, struct snd_pcm ** rpcm)
  972. {
  973. struct snd_pcm *pcm;
  974. int err;
  975. if (rpcm)
  976. *rpcm = NULL;
  977. if ((err = snd_pcm_new(chip->card, "YMFPCI", device, 32, 1, &pcm)) < 0)
  978. return err;
  979. pcm->private_data = chip;
  980. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_ops);
  981. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_rec_ops);
  982. /* global setup */
  983. pcm->info_flags = 0;
  984. strcpy(pcm->name, "YMFPCI");
  985. chip->pcm = pcm;
  986. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  987. snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
  988. if (rpcm)
  989. *rpcm = pcm;
  990. return 0;
  991. }
  992. static struct snd_pcm_ops snd_ymfpci_capture_ac97_ops = {
  993. .open = snd_ymfpci_capture_ac97_open,
  994. .close = snd_ymfpci_capture_close,
  995. .ioctl = snd_pcm_lib_ioctl,
  996. .hw_params = snd_ymfpci_capture_hw_params,
  997. .hw_free = snd_ymfpci_capture_hw_free,
  998. .prepare = snd_ymfpci_capture_prepare,
  999. .trigger = snd_ymfpci_capture_trigger,
  1000. .pointer = snd_ymfpci_capture_pointer,
  1001. };
  1002. int __devinit snd_ymfpci_pcm2(struct snd_ymfpci *chip, int device, struct snd_pcm ** rpcm)
  1003. {
  1004. struct snd_pcm *pcm;
  1005. int err;
  1006. if (rpcm)
  1007. *rpcm = NULL;
  1008. if ((err = snd_pcm_new(chip->card, "YMFPCI - PCM2", device, 0, 1, &pcm)) < 0)
  1009. return err;
  1010. pcm->private_data = chip;
  1011. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_ac97_ops);
  1012. /* global setup */
  1013. pcm->info_flags = 0;
  1014. sprintf(pcm->name, "YMFPCI - %s",
  1015. chip->device_id == PCI_DEVICE_ID_YAMAHA_754 ? "Direct Recording" : "AC'97");
  1016. chip->pcm2 = pcm;
  1017. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1018. snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
  1019. if (rpcm)
  1020. *rpcm = pcm;
  1021. return 0;
  1022. }
  1023. static struct snd_pcm_ops snd_ymfpci_playback_spdif_ops = {
  1024. .open = snd_ymfpci_playback_spdif_open,
  1025. .close = snd_ymfpci_playback_spdif_close,
  1026. .ioctl = snd_pcm_lib_ioctl,
  1027. .hw_params = snd_ymfpci_playback_hw_params,
  1028. .hw_free = snd_ymfpci_playback_hw_free,
  1029. .prepare = snd_ymfpci_playback_prepare,
  1030. .trigger = snd_ymfpci_playback_trigger,
  1031. .pointer = snd_ymfpci_playback_pointer,
  1032. };
  1033. int __devinit snd_ymfpci_pcm_spdif(struct snd_ymfpci *chip, int device, struct snd_pcm ** rpcm)
  1034. {
  1035. struct snd_pcm *pcm;
  1036. int err;
  1037. if (rpcm)
  1038. *rpcm = NULL;
  1039. if ((err = snd_pcm_new(chip->card, "YMFPCI - IEC958", device, 1, 0, &pcm)) < 0)
  1040. return err;
  1041. pcm->private_data = chip;
  1042. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_spdif_ops);
  1043. /* global setup */
  1044. pcm->info_flags = 0;
  1045. strcpy(pcm->name, "YMFPCI - IEC958");
  1046. chip->pcm_spdif = pcm;
  1047. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1048. snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
  1049. if (rpcm)
  1050. *rpcm = pcm;
  1051. return 0;
  1052. }
  1053. static struct snd_pcm_ops snd_ymfpci_playback_4ch_ops = {
  1054. .open = snd_ymfpci_playback_4ch_open,
  1055. .close = snd_ymfpci_playback_4ch_close,
  1056. .ioctl = snd_pcm_lib_ioctl,
  1057. .hw_params = snd_ymfpci_playback_hw_params,
  1058. .hw_free = snd_ymfpci_playback_hw_free,
  1059. .prepare = snd_ymfpci_playback_prepare,
  1060. .trigger = snd_ymfpci_playback_trigger,
  1061. .pointer = snd_ymfpci_playback_pointer,
  1062. };
  1063. int __devinit snd_ymfpci_pcm_4ch(struct snd_ymfpci *chip, int device, struct snd_pcm ** rpcm)
  1064. {
  1065. struct snd_pcm *pcm;
  1066. int err;
  1067. if (rpcm)
  1068. *rpcm = NULL;
  1069. if ((err = snd_pcm_new(chip->card, "YMFPCI - Rear", device, 1, 0, &pcm)) < 0)
  1070. return err;
  1071. pcm->private_data = chip;
  1072. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_4ch_ops);
  1073. /* global setup */
  1074. pcm->info_flags = 0;
  1075. strcpy(pcm->name, "YMFPCI - Rear PCM");
  1076. chip->pcm_4ch = pcm;
  1077. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1078. snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
  1079. if (rpcm)
  1080. *rpcm = pcm;
  1081. return 0;
  1082. }
  1083. static int snd_ymfpci_spdif_default_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1084. {
  1085. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  1086. uinfo->count = 1;
  1087. return 0;
  1088. }
  1089. static int snd_ymfpci_spdif_default_get(struct snd_kcontrol *kcontrol,
  1090. struct snd_ctl_elem_value *ucontrol)
  1091. {
  1092. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1093. spin_lock_irq(&chip->reg_lock);
  1094. ucontrol->value.iec958.status[0] = (chip->spdif_bits >> 0) & 0xff;
  1095. ucontrol->value.iec958.status[1] = (chip->spdif_bits >> 8) & 0xff;
  1096. ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS_48000;
  1097. spin_unlock_irq(&chip->reg_lock);
  1098. return 0;
  1099. }
  1100. static int snd_ymfpci_spdif_default_put(struct snd_kcontrol *kcontrol,
  1101. struct snd_ctl_elem_value *ucontrol)
  1102. {
  1103. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1104. unsigned int val;
  1105. int change;
  1106. val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) |
  1107. (ucontrol->value.iec958.status[1] << 8);
  1108. spin_lock_irq(&chip->reg_lock);
  1109. change = chip->spdif_bits != val;
  1110. chip->spdif_bits = val;
  1111. if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 1) && chip->pcm_spdif == NULL)
  1112. snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
  1113. spin_unlock_irq(&chip->reg_lock);
  1114. return change;
  1115. }
  1116. static struct snd_kcontrol_new snd_ymfpci_spdif_default __devinitdata =
  1117. {
  1118. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1119. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
  1120. .info = snd_ymfpci_spdif_default_info,
  1121. .get = snd_ymfpci_spdif_default_get,
  1122. .put = snd_ymfpci_spdif_default_put
  1123. };
  1124. static int snd_ymfpci_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1125. {
  1126. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  1127. uinfo->count = 1;
  1128. return 0;
  1129. }
  1130. static int snd_ymfpci_spdif_mask_get(struct snd_kcontrol *kcontrol,
  1131. struct snd_ctl_elem_value *ucontrol)
  1132. {
  1133. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1134. spin_lock_irq(&chip->reg_lock);
  1135. ucontrol->value.iec958.status[0] = 0x3e;
  1136. ucontrol->value.iec958.status[1] = 0xff;
  1137. spin_unlock_irq(&chip->reg_lock);
  1138. return 0;
  1139. }
  1140. static struct snd_kcontrol_new snd_ymfpci_spdif_mask __devinitdata =
  1141. {
  1142. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1143. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1144. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
  1145. .info = snd_ymfpci_spdif_mask_info,
  1146. .get = snd_ymfpci_spdif_mask_get,
  1147. };
  1148. static int snd_ymfpci_spdif_stream_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1149. {
  1150. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  1151. uinfo->count = 1;
  1152. return 0;
  1153. }
  1154. static int snd_ymfpci_spdif_stream_get(struct snd_kcontrol *kcontrol,
  1155. struct snd_ctl_elem_value *ucontrol)
  1156. {
  1157. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1158. spin_lock_irq(&chip->reg_lock);
  1159. ucontrol->value.iec958.status[0] = (chip->spdif_pcm_bits >> 0) & 0xff;
  1160. ucontrol->value.iec958.status[1] = (chip->spdif_pcm_bits >> 8) & 0xff;
  1161. ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS_48000;
  1162. spin_unlock_irq(&chip->reg_lock);
  1163. return 0;
  1164. }
  1165. static int snd_ymfpci_spdif_stream_put(struct snd_kcontrol *kcontrol,
  1166. struct snd_ctl_elem_value *ucontrol)
  1167. {
  1168. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1169. unsigned int val;
  1170. int change;
  1171. val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) |
  1172. (ucontrol->value.iec958.status[1] << 8);
  1173. spin_lock_irq(&chip->reg_lock);
  1174. change = chip->spdif_pcm_bits != val;
  1175. chip->spdif_pcm_bits = val;
  1176. if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 2))
  1177. snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits);
  1178. spin_unlock_irq(&chip->reg_lock);
  1179. return change;
  1180. }
  1181. static struct snd_kcontrol_new snd_ymfpci_spdif_stream __devinitdata =
  1182. {
  1183. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
  1184. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1185. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
  1186. .info = snd_ymfpci_spdif_stream_info,
  1187. .get = snd_ymfpci_spdif_stream_get,
  1188. .put = snd_ymfpci_spdif_stream_put
  1189. };
  1190. static int snd_ymfpci_drec_source_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *info)
  1191. {
  1192. static char *texts[3] = {"AC'97", "IEC958", "ZV Port"};
  1193. info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1194. info->count = 1;
  1195. info->value.enumerated.items = 3;
  1196. if (info->value.enumerated.item > 2)
  1197. info->value.enumerated.item = 2;
  1198. strcpy(info->value.enumerated.name, texts[info->value.enumerated.item]);
  1199. return 0;
  1200. }
  1201. static int snd_ymfpci_drec_source_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *value)
  1202. {
  1203. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1204. u16 reg;
  1205. spin_lock_irq(&chip->reg_lock);
  1206. reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
  1207. spin_unlock_irq(&chip->reg_lock);
  1208. if (!(reg & 0x100))
  1209. value->value.enumerated.item[0] = 0;
  1210. else
  1211. value->value.enumerated.item[0] = 1 + ((reg & 0x200) != 0);
  1212. return 0;
  1213. }
  1214. static int snd_ymfpci_drec_source_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *value)
  1215. {
  1216. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1217. u16 reg, old_reg;
  1218. spin_lock_irq(&chip->reg_lock);
  1219. old_reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
  1220. if (value->value.enumerated.item[0] == 0)
  1221. reg = old_reg & ~0x100;
  1222. else
  1223. reg = (old_reg & ~0x300) | 0x100 | ((value->value.enumerated.item[0] == 2) << 9);
  1224. snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, reg);
  1225. spin_unlock_irq(&chip->reg_lock);
  1226. return reg != old_reg;
  1227. }
  1228. static struct snd_kcontrol_new snd_ymfpci_drec_source __devinitdata = {
  1229. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
  1230. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1231. .name = "Direct Recording Source",
  1232. .info = snd_ymfpci_drec_source_info,
  1233. .get = snd_ymfpci_drec_source_get,
  1234. .put = snd_ymfpci_drec_source_put
  1235. };
  1236. /*
  1237. * Mixer controls
  1238. */
  1239. #define YMFPCI_SINGLE(xname, xindex, reg, shift) \
  1240. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
  1241. .info = snd_ymfpci_info_single, \
  1242. .get = snd_ymfpci_get_single, .put = snd_ymfpci_put_single, \
  1243. .private_value = ((reg) | ((shift) << 16)) }
  1244. static int snd_ymfpci_info_single(struct snd_kcontrol *kcontrol,
  1245. struct snd_ctl_elem_info *uinfo)
  1246. {
  1247. int reg = kcontrol->private_value & 0xffff;
  1248. switch (reg) {
  1249. case YDSXGR_SPDIFOUTCTRL: break;
  1250. case YDSXGR_SPDIFINCTRL: break;
  1251. default: return -EINVAL;
  1252. }
  1253. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  1254. uinfo->count = 1;
  1255. uinfo->value.integer.min = 0;
  1256. uinfo->value.integer.max = 1;
  1257. return 0;
  1258. }
  1259. static int snd_ymfpci_get_single(struct snd_kcontrol *kcontrol,
  1260. struct snd_ctl_elem_value *ucontrol)
  1261. {
  1262. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1263. int reg = kcontrol->private_value & 0xffff;
  1264. unsigned int shift = (kcontrol->private_value >> 16) & 0xff;
  1265. unsigned int mask = 1;
  1266. switch (reg) {
  1267. case YDSXGR_SPDIFOUTCTRL: break;
  1268. case YDSXGR_SPDIFINCTRL: break;
  1269. default: return -EINVAL;
  1270. }
  1271. ucontrol->value.integer.value[0] =
  1272. (snd_ymfpci_readl(chip, reg) >> shift) & mask;
  1273. return 0;
  1274. }
  1275. static int snd_ymfpci_put_single(struct snd_kcontrol *kcontrol,
  1276. struct snd_ctl_elem_value *ucontrol)
  1277. {
  1278. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1279. int reg = kcontrol->private_value & 0xffff;
  1280. unsigned int shift = (kcontrol->private_value >> 16) & 0xff;
  1281. unsigned int mask = 1;
  1282. int change;
  1283. unsigned int val, oval;
  1284. switch (reg) {
  1285. case YDSXGR_SPDIFOUTCTRL: break;
  1286. case YDSXGR_SPDIFINCTRL: break;
  1287. default: return -EINVAL;
  1288. }
  1289. val = (ucontrol->value.integer.value[0] & mask);
  1290. val <<= shift;
  1291. spin_lock_irq(&chip->reg_lock);
  1292. oval = snd_ymfpci_readl(chip, reg);
  1293. val = (oval & ~(mask << shift)) | val;
  1294. change = val != oval;
  1295. snd_ymfpci_writel(chip, reg, val);
  1296. spin_unlock_irq(&chip->reg_lock);
  1297. return change;
  1298. }
  1299. #define YMFPCI_DOUBLE(xname, xindex, reg) \
  1300. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
  1301. .info = snd_ymfpci_info_double, \
  1302. .get = snd_ymfpci_get_double, .put = snd_ymfpci_put_double, \
  1303. .private_value = reg }
  1304. static int snd_ymfpci_info_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1305. {
  1306. unsigned int reg = kcontrol->private_value;
  1307. if (reg < 0x80 || reg >= 0xc0)
  1308. return -EINVAL;
  1309. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1310. uinfo->count = 2;
  1311. uinfo->value.integer.min = 0;
  1312. uinfo->value.integer.max = 16383;
  1313. return 0;
  1314. }
  1315. static int snd_ymfpci_get_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1316. {
  1317. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1318. unsigned int reg = kcontrol->private_value;
  1319. unsigned int shift_left = 0, shift_right = 16, mask = 16383;
  1320. unsigned int val;
  1321. if (reg < 0x80 || reg >= 0xc0)
  1322. return -EINVAL;
  1323. spin_lock_irq(&chip->reg_lock);
  1324. val = snd_ymfpci_readl(chip, reg);
  1325. spin_unlock_irq(&chip->reg_lock);
  1326. ucontrol->value.integer.value[0] = (val >> shift_left) & mask;
  1327. ucontrol->value.integer.value[1] = (val >> shift_right) & mask;
  1328. return 0;
  1329. }
  1330. static int snd_ymfpci_put_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1331. {
  1332. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1333. unsigned int reg = kcontrol->private_value;
  1334. unsigned int shift_left = 0, shift_right = 16, mask = 16383;
  1335. int change;
  1336. unsigned int val1, val2, oval;
  1337. if (reg < 0x80 || reg >= 0xc0)
  1338. return -EINVAL;
  1339. val1 = ucontrol->value.integer.value[0] & mask;
  1340. val2 = ucontrol->value.integer.value[1] & mask;
  1341. val1 <<= shift_left;
  1342. val2 <<= shift_right;
  1343. spin_lock_irq(&chip->reg_lock);
  1344. oval = snd_ymfpci_readl(chip, reg);
  1345. val1 = (oval & ~((mask << shift_left) | (mask << shift_right))) | val1 | val2;
  1346. change = val1 != oval;
  1347. snd_ymfpci_writel(chip, reg, val1);
  1348. spin_unlock_irq(&chip->reg_lock);
  1349. return change;
  1350. }
  1351. /*
  1352. * 4ch duplication
  1353. */
  1354. static int snd_ymfpci_info_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1355. {
  1356. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  1357. uinfo->count = 1;
  1358. uinfo->value.integer.min = 0;
  1359. uinfo->value.integer.max = 1;
  1360. return 0;
  1361. }
  1362. static int snd_ymfpci_get_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1363. {
  1364. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1365. ucontrol->value.integer.value[0] = chip->mode_dup4ch;
  1366. return 0;
  1367. }
  1368. static int snd_ymfpci_put_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1369. {
  1370. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1371. int change;
  1372. change = (ucontrol->value.integer.value[0] != chip->mode_dup4ch);
  1373. if (change)
  1374. chip->mode_dup4ch = !!ucontrol->value.integer.value[0];
  1375. return change;
  1376. }
  1377. static struct snd_kcontrol_new snd_ymfpci_controls[] __devinitdata = {
  1378. YMFPCI_DOUBLE("Wave Playback Volume", 0, YDSXGR_NATIVEDACOUTVOL),
  1379. YMFPCI_DOUBLE("Wave Capture Volume", 0, YDSXGR_NATIVEDACLOOPVOL),
  1380. YMFPCI_DOUBLE("Digital Capture Volume", 0, YDSXGR_NATIVEDACINVOL),
  1381. YMFPCI_DOUBLE("Digital Capture Volume", 1, YDSXGR_NATIVEADCINVOL),
  1382. YMFPCI_DOUBLE("ADC Playback Volume", 0, YDSXGR_PRIADCOUTVOL),
  1383. YMFPCI_DOUBLE("ADC Capture Volume", 0, YDSXGR_PRIADCLOOPVOL),
  1384. YMFPCI_DOUBLE("ADC Playback Volume", 1, YDSXGR_SECADCOUTVOL),
  1385. YMFPCI_DOUBLE("ADC Capture Volume", 1, YDSXGR_SECADCLOOPVOL),
  1386. YMFPCI_DOUBLE("FM Legacy Volume", 0, YDSXGR_LEGACYOUTVOL),
  1387. YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ", PLAYBACK,VOLUME), 0, YDSXGR_ZVOUTVOL),
  1388. YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("", CAPTURE,VOLUME), 0, YDSXGR_ZVLOOPVOL),
  1389. YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ",PLAYBACK,VOLUME), 1, YDSXGR_SPDIFOUTVOL),
  1390. YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,VOLUME), 1, YDSXGR_SPDIFLOOPVOL),
  1391. YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), 0, YDSXGR_SPDIFOUTCTRL, 0),
  1392. YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), 0, YDSXGR_SPDIFINCTRL, 0),
  1393. YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("Loop",NONE,NONE), 0, YDSXGR_SPDIFINCTRL, 4),
  1394. {
  1395. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1396. .name = "4ch Duplication",
  1397. .info = snd_ymfpci_info_dup4ch,
  1398. .get = snd_ymfpci_get_dup4ch,
  1399. .put = snd_ymfpci_put_dup4ch,
  1400. },
  1401. };
  1402. /*
  1403. * GPIO
  1404. */
  1405. static int snd_ymfpci_get_gpio_out(struct snd_ymfpci *chip, int pin)
  1406. {
  1407. u16 reg, mode;
  1408. unsigned long flags;
  1409. spin_lock_irqsave(&chip->reg_lock, flags);
  1410. reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE);
  1411. reg &= ~(1 << (pin + 8));
  1412. reg |= (1 << pin);
  1413. snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg);
  1414. /* set the level mode for input line */
  1415. mode = snd_ymfpci_readw(chip, YDSXGR_GPIOTYPECONFIG);
  1416. mode &= ~(3 << (pin * 2));
  1417. snd_ymfpci_writew(chip, YDSXGR_GPIOTYPECONFIG, mode);
  1418. snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8)));
  1419. mode = snd_ymfpci_readw(chip, YDSXGR_GPIOINSTATUS);
  1420. spin_unlock_irqrestore(&chip->reg_lock, flags);
  1421. return (mode >> pin) & 1;
  1422. }
  1423. static int snd_ymfpci_set_gpio_out(struct snd_ymfpci *chip, int pin, int enable)
  1424. {
  1425. u16 reg;
  1426. unsigned long flags;
  1427. spin_lock_irqsave(&chip->reg_lock, flags);
  1428. reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE);
  1429. reg &= ~(1 << pin);
  1430. reg &= ~(1 << (pin + 8));
  1431. snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg);
  1432. snd_ymfpci_writew(chip, YDSXGR_GPIOOUTCTRL, enable << pin);
  1433. snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8)));
  1434. spin_unlock_irqrestore(&chip->reg_lock, flags);
  1435. return 0;
  1436. }
  1437. static int snd_ymfpci_gpio_sw_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1438. {
  1439. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  1440. uinfo->count = 1;
  1441. uinfo->value.integer.min = 0;
  1442. uinfo->value.integer.max = 1;
  1443. return 0;
  1444. }
  1445. static int snd_ymfpci_gpio_sw_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1446. {
  1447. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1448. int pin = (int)kcontrol->private_value;
  1449. ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin);
  1450. return 0;
  1451. }
  1452. static int snd_ymfpci_gpio_sw_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1453. {
  1454. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1455. int pin = (int)kcontrol->private_value;
  1456. if (snd_ymfpci_get_gpio_out(chip, pin) != ucontrol->value.integer.value[0]) {
  1457. snd_ymfpci_set_gpio_out(chip, pin, !!ucontrol->value.integer.value[0]);
  1458. ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin);
  1459. return 1;
  1460. }
  1461. return 0;
  1462. }
  1463. static struct snd_kcontrol_new snd_ymfpci_rear_shared __devinitdata = {
  1464. .name = "Shared Rear/Line-In Switch",
  1465. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1466. .info = snd_ymfpci_gpio_sw_info,
  1467. .get = snd_ymfpci_gpio_sw_get,
  1468. .put = snd_ymfpci_gpio_sw_put,
  1469. .private_value = 2,
  1470. };
  1471. /*
  1472. * PCM voice volume
  1473. */
  1474. static int snd_ymfpci_pcm_vol_info(struct snd_kcontrol *kcontrol,
  1475. struct snd_ctl_elem_info *uinfo)
  1476. {
  1477. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1478. uinfo->count = 2;
  1479. uinfo->value.integer.min = 0;
  1480. uinfo->value.integer.max = 0x8000;
  1481. return 0;
  1482. }
  1483. static int snd_ymfpci_pcm_vol_get(struct snd_kcontrol *kcontrol,
  1484. struct snd_ctl_elem_value *ucontrol)
  1485. {
  1486. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1487. unsigned int subs = kcontrol->id.subdevice;
  1488. ucontrol->value.integer.value[0] = chip->pcm_mixer[subs].left;
  1489. ucontrol->value.integer.value[1] = chip->pcm_mixer[subs].right;
  1490. return 0;
  1491. }
  1492. static int snd_ymfpci_pcm_vol_put(struct snd_kcontrol *kcontrol,
  1493. struct snd_ctl_elem_value *ucontrol)
  1494. {
  1495. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1496. unsigned int subs = kcontrol->id.subdevice;
  1497. struct snd_pcm_substream *substream;
  1498. unsigned long flags;
  1499. if (ucontrol->value.integer.value[0] != chip->pcm_mixer[subs].left ||
  1500. ucontrol->value.integer.value[1] != chip->pcm_mixer[subs].right) {
  1501. chip->pcm_mixer[subs].left = ucontrol->value.integer.value[0];
  1502. chip->pcm_mixer[subs].right = ucontrol->value.integer.value[1];
  1503. substream = (struct snd_pcm_substream *)kcontrol->private_value;
  1504. spin_lock_irqsave(&chip->voice_lock, flags);
  1505. if (substream->runtime && substream->runtime->private_data) {
  1506. struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
  1507. ypcm->update_pcm_vol = 2;
  1508. }
  1509. spin_unlock_irqrestore(&chip->voice_lock, flags);
  1510. return 1;
  1511. }
  1512. return 0;
  1513. }
  1514. static struct snd_kcontrol_new snd_ymfpci_pcm_volume __devinitdata = {
  1515. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1516. .name = "PCM Playback Volume",
  1517. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1518. SNDRV_CTL_ELEM_ACCESS_INACTIVE,
  1519. .info = snd_ymfpci_pcm_vol_info,
  1520. .get = snd_ymfpci_pcm_vol_get,
  1521. .put = snd_ymfpci_pcm_vol_put,
  1522. };
  1523. /*
  1524. * Mixer routines
  1525. */
  1526. static void snd_ymfpci_mixer_free_ac97_bus(struct snd_ac97_bus *bus)
  1527. {
  1528. struct snd_ymfpci *chip = bus->private_data;
  1529. chip->ac97_bus = NULL;
  1530. }
  1531. static void snd_ymfpci_mixer_free_ac97(struct snd_ac97 *ac97)
  1532. {
  1533. struct snd_ymfpci *chip = ac97->private_data;
  1534. chip->ac97 = NULL;
  1535. }
  1536. int __devinit snd_ymfpci_mixer(struct snd_ymfpci *chip, int rear_switch)
  1537. {
  1538. struct snd_ac97_template ac97;
  1539. struct snd_kcontrol *kctl;
  1540. struct snd_pcm_substream *substream;
  1541. unsigned int idx;
  1542. int err;
  1543. static struct snd_ac97_bus_ops ops = {
  1544. .write = snd_ymfpci_codec_write,
  1545. .read = snd_ymfpci_codec_read,
  1546. };
  1547. if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus)) < 0)
  1548. return err;
  1549. chip->ac97_bus->private_free = snd_ymfpci_mixer_free_ac97_bus;
  1550. chip->ac97_bus->no_vra = 1; /* YMFPCI doesn't need VRA */
  1551. memset(&ac97, 0, sizeof(ac97));
  1552. ac97.private_data = chip;
  1553. ac97.private_free = snd_ymfpci_mixer_free_ac97;
  1554. if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0)
  1555. return err;
  1556. /* to be sure */
  1557. snd_ac97_update_bits(chip->ac97, AC97_EXTENDED_STATUS,
  1558. AC97_EA_VRA|AC97_EA_VRM, 0);
  1559. for (idx = 0; idx < ARRAY_SIZE(snd_ymfpci_controls); idx++) {
  1560. if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_controls[idx], chip))) < 0)
  1561. return err;
  1562. }
  1563. /* add S/PDIF control */
  1564. snd_assert(chip->pcm_spdif != NULL, return -EIO);
  1565. if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_default, chip))) < 0)
  1566. return err;
  1567. kctl->id.device = chip->pcm_spdif->device;
  1568. if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_mask, chip))) < 0)
  1569. return err;
  1570. kctl->id.device = chip->pcm_spdif->device;
  1571. if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_stream, chip))) < 0)
  1572. return err;
  1573. kctl->id.device = chip->pcm_spdif->device;
  1574. chip->spdif_pcm_ctl = kctl;
  1575. /* direct recording source */
  1576. if (chip->device_id == PCI_DEVICE_ID_YAMAHA_754 &&
  1577. (err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_drec_source, chip))) < 0)
  1578. return err;
  1579. /*
  1580. * shared rear/line-in
  1581. */
  1582. if (rear_switch) {
  1583. if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_rear_shared, chip))) < 0)
  1584. return err;
  1585. }
  1586. /* per-voice volume */
  1587. substream = chip->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream;
  1588. for (idx = 0; idx < 32; ++idx) {
  1589. kctl = snd_ctl_new1(&snd_ymfpci_pcm_volume, chip);
  1590. if (!kctl)
  1591. return -ENOMEM;
  1592. kctl->id.device = chip->pcm->device;
  1593. kctl->id.subdevice = idx;
  1594. kctl->private_value = (unsigned long)substream;
  1595. if ((err = snd_ctl_add(chip->card, kctl)) < 0)
  1596. return err;
  1597. chip->pcm_mixer[idx].left = 0x8000;
  1598. chip->pcm_mixer[idx].right = 0x8000;
  1599. chip->pcm_mixer[idx].ctl = kctl;
  1600. substream = substream->next;
  1601. }
  1602. return 0;
  1603. }
  1604. /*
  1605. * timer
  1606. */
  1607. static int snd_ymfpci_timer_start(struct snd_timer *timer)
  1608. {
  1609. struct snd_ymfpci *chip;
  1610. unsigned long flags;
  1611. unsigned int count;
  1612. chip = snd_timer_chip(timer);
  1613. count = (timer->sticks << 1) - 1;
  1614. spin_lock_irqsave(&chip->reg_lock, flags);
  1615. snd_ymfpci_writew(chip, YDSXGR_TIMERCOUNT, count);
  1616. snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x03);
  1617. spin_unlock_irqrestore(&chip->reg_lock, flags);
  1618. return 0;
  1619. }
  1620. static int snd_ymfpci_timer_stop(struct snd_timer *timer)
  1621. {
  1622. struct snd_ymfpci *chip;
  1623. unsigned long flags;
  1624. chip = snd_timer_chip(timer);
  1625. spin_lock_irqsave(&chip->reg_lock, flags);
  1626. snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x00);
  1627. spin_unlock_irqrestore(&chip->reg_lock, flags);
  1628. return 0;
  1629. }
  1630. static int snd_ymfpci_timer_precise_resolution(struct snd_timer *timer,
  1631. unsigned long *num, unsigned long *den)
  1632. {
  1633. *num = 1;
  1634. *den = 48000;
  1635. return 0;
  1636. }
  1637. static struct snd_timer_hardware snd_ymfpci_timer_hw = {
  1638. .flags = SNDRV_TIMER_HW_AUTO,
  1639. .resolution = 20833, /* 1/fs = 20.8333...us */
  1640. .ticks = 0x8000,
  1641. .start = snd_ymfpci_timer_start,
  1642. .stop = snd_ymfpci_timer_stop,
  1643. .precise_resolution = snd_ymfpci_timer_precise_resolution,
  1644. };
  1645. int __devinit snd_ymfpci_timer(struct snd_ymfpci *chip, int device)
  1646. {
  1647. struct snd_timer *timer = NULL;
  1648. struct snd_timer_id tid;
  1649. int err;
  1650. tid.dev_class = SNDRV_TIMER_CLASS_CARD;
  1651. tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
  1652. tid.card = chip->card->number;
  1653. tid.device = device;
  1654. tid.subdevice = 0;
  1655. if ((err = snd_timer_new(chip->card, "YMFPCI", &tid, &timer)) >= 0) {
  1656. strcpy(timer->name, "YMFPCI timer");
  1657. timer->private_data = chip;
  1658. timer->hw = snd_ymfpci_timer_hw;
  1659. }
  1660. chip->timer = timer;
  1661. return err;
  1662. }
  1663. /*
  1664. * proc interface
  1665. */
  1666. static void snd_ymfpci_proc_read(struct snd_info_entry *entry,
  1667. struct snd_info_buffer *buffer)
  1668. {
  1669. struct snd_ymfpci *chip = entry->private_data;
  1670. int i;
  1671. snd_iprintf(buffer, "YMFPCI\n\n");
  1672. for (i = 0; i <= YDSXGR_WORKBASE; i += 4)
  1673. snd_iprintf(buffer, "%04x: %04x\n", i, snd_ymfpci_readl(chip, i));
  1674. }
  1675. static int __devinit snd_ymfpci_proc_init(struct snd_card *card, struct snd_ymfpci *chip)
  1676. {
  1677. struct snd_info_entry *entry;
  1678. if (! snd_card_proc_new(card, "ymfpci", &entry))
  1679. snd_info_set_text_ops(entry, chip, 1024, snd_ymfpci_proc_read);
  1680. return 0;
  1681. }
  1682. /*
  1683. * initialization routines
  1684. */
  1685. static void snd_ymfpci_aclink_reset(struct pci_dev * pci)
  1686. {
  1687. u8 cmd;
  1688. pci_read_config_byte(pci, PCIR_DSXG_CTRL, &cmd);
  1689. #if 0 // force to reset
  1690. if (cmd & 0x03) {
  1691. #endif
  1692. pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc);
  1693. pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd | 0x03);
  1694. pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc);
  1695. pci_write_config_word(pci, PCIR_DSXG_PWRCTRL1, 0);
  1696. pci_write_config_word(pci, PCIR_DSXG_PWRCTRL2, 0);
  1697. #if 0
  1698. }
  1699. #endif
  1700. }
  1701. static void snd_ymfpci_enable_dsp(struct snd_ymfpci *chip)
  1702. {
  1703. snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000001);
  1704. }
  1705. static void snd_ymfpci_disable_dsp(struct snd_ymfpci *chip)
  1706. {
  1707. u32 val;
  1708. int timeout = 1000;
  1709. val = snd_ymfpci_readl(chip, YDSXGR_CONFIG);
  1710. if (val)
  1711. snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000000);
  1712. while (timeout-- > 0) {
  1713. val = snd_ymfpci_readl(chip, YDSXGR_STATUS);
  1714. if ((val & 0x00000002) == 0)
  1715. break;
  1716. }
  1717. }
  1718. #include "ymfpci_image.h"
  1719. static void snd_ymfpci_download_image(struct snd_ymfpci *chip)
  1720. {
  1721. int i;
  1722. u16 ctrl;
  1723. unsigned long *inst;
  1724. snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x00000000);
  1725. snd_ymfpci_disable_dsp(chip);
  1726. snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00010000);
  1727. snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00000000);
  1728. snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, 0x00000000);
  1729. snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT, 0x00000000);
  1730. snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0x00000000);
  1731. snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0x00000000);
  1732. snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0x00000000);
  1733. ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
  1734. snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007);
  1735. /* setup DSP instruction code */
  1736. for (i = 0; i < YDSXG_DSPLENGTH / 4; i++)
  1737. snd_ymfpci_writel(chip, YDSXGR_DSPINSTRAM + (i << 2), DspInst[i]);
  1738. /* setup control instruction code */
  1739. switch (chip->device_id) {
  1740. case PCI_DEVICE_ID_YAMAHA_724F:
  1741. case PCI_DEVICE_ID_YAMAHA_740C:
  1742. case PCI_DEVICE_ID_YAMAHA_744:
  1743. case PCI_DEVICE_ID_YAMAHA_754:
  1744. inst = CntrlInst1E;
  1745. break;
  1746. default:
  1747. inst = CntrlInst;
  1748. break;
  1749. }
  1750. for (i = 0; i < YDSXG_CTRLLENGTH / 4; i++)
  1751. snd_ymfpci_writel(chip, YDSXGR_CTRLINSTRAM + (i << 2), inst[i]);
  1752. snd_ymfpci_enable_dsp(chip);
  1753. }
  1754. static int __devinit snd_ymfpci_memalloc(struct snd_ymfpci *chip)
  1755. {
  1756. long size, playback_ctrl_size;
  1757. int voice, bank, reg;
  1758. u8 *ptr;
  1759. dma_addr_t ptr_addr;
  1760. playback_ctrl_size = 4 + 4 * YDSXG_PLAYBACK_VOICES;
  1761. chip->bank_size_playback = snd_ymfpci_readl(chip, YDSXGR_PLAYCTRLSIZE) << 2;
  1762. chip->bank_size_capture = snd_ymfpci_readl(chip, YDSXGR_RECCTRLSIZE) << 2;
  1763. chip->bank_size_effect = snd_ymfpci_readl(chip, YDSXGR_EFFCTRLSIZE) << 2;
  1764. chip->work_size = YDSXG_DEFAULT_WORK_SIZE;
  1765. size = ((playback_ctrl_size + 0x00ff) & ~0x00ff) +
  1766. ((chip->bank_size_playback * 2 * YDSXG_PLAYBACK_VOICES + 0x00ff) & ~0x00ff) +
  1767. ((chip->bank_size_capture * 2 * YDSXG_CAPTURE_VOICES + 0x00ff) & ~0x00ff) +
  1768. ((chip->bank_size_effect * 2 * YDSXG_EFFECT_VOICES + 0x00ff) & ~0x00ff) +
  1769. chip->work_size;
  1770. /* work_ptr must be aligned to 256 bytes, but it's already
  1771. covered with the kernel page allocation mechanism */
  1772. if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
  1773. size, &chip->work_ptr) < 0)
  1774. return -ENOMEM;
  1775. ptr = chip->work_ptr.area;
  1776. ptr_addr = chip->work_ptr.addr;
  1777. memset(ptr, 0, size); /* for sure */
  1778. chip->bank_base_playback = ptr;
  1779. chip->bank_base_playback_addr = ptr_addr;
  1780. chip->ctrl_playback = (u32 *)ptr;
  1781. chip->ctrl_playback[0] = cpu_to_le32(YDSXG_PLAYBACK_VOICES);
  1782. ptr += (playback_ctrl_size + 0x00ff) & ~0x00ff;
  1783. ptr_addr += (playback_ctrl_size + 0x00ff) & ~0x00ff;
  1784. for (voice = 0; voice < YDSXG_PLAYBACK_VOICES; voice++) {
  1785. chip->voices[voice].number = voice;
  1786. chip->voices[voice].bank = (struct snd_ymfpci_playback_bank *)ptr;
  1787. chip->voices[voice].bank_addr = ptr_addr;
  1788. for (bank = 0; bank < 2; bank++) {
  1789. chip->bank_playback[voice][bank] = (struct snd_ymfpci_playback_bank *)ptr;
  1790. ptr += chip->bank_size_playback;
  1791. ptr_addr += chip->bank_size_playback;
  1792. }
  1793. }
  1794. ptr = (char *)(((unsigned long)ptr + 0x00ff) & ~0x00ff);
  1795. ptr_addr = (ptr_addr + 0x00ff) & ~0x00ff;
  1796. chip->bank_base_capture = ptr;
  1797. chip->bank_base_capture_addr = ptr_addr;
  1798. for (voice = 0; voice < YDSXG_CAPTURE_VOICES; voice++)
  1799. for (bank = 0; bank < 2; bank++) {
  1800. chip->bank_capture[voice][bank] = (struct snd_ymfpci_capture_bank *)ptr;
  1801. ptr += chip->bank_size_capture;
  1802. ptr_addr += chip->bank_size_capture;
  1803. }
  1804. ptr = (char *)(((unsigned long)ptr + 0x00ff) & ~0x00ff);
  1805. ptr_addr = (ptr_addr + 0x00ff) & ~0x00ff;
  1806. chip->bank_base_effect = ptr;
  1807. chip->bank_base_effect_addr = ptr_addr;
  1808. for (voice = 0; voice < YDSXG_EFFECT_VOICES; voice++)
  1809. for (bank = 0; bank < 2; bank++) {
  1810. chip->bank_effect[voice][bank] = (struct snd_ymfpci_effect_bank *)ptr;
  1811. ptr += chip->bank_size_effect;
  1812. ptr_addr += chip->bank_size_effect;
  1813. }
  1814. ptr = (char *)(((unsigned long)ptr + 0x00ff) & ~0x00ff);
  1815. ptr_addr = (ptr_addr + 0x00ff) & ~0x00ff;
  1816. chip->work_base = ptr;
  1817. chip->work_base_addr = ptr_addr;
  1818. snd_assert(ptr + chip->work_size == chip->work_ptr.area + chip->work_ptr.bytes, );
  1819. snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, chip->bank_base_playback_addr);
  1820. snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, chip->bank_base_capture_addr);
  1821. snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, chip->bank_base_effect_addr);
  1822. snd_ymfpci_writel(chip, YDSXGR_WORKBASE, chip->work_base_addr);
  1823. snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, chip->work_size >> 2);
  1824. /* S/PDIF output initialization */
  1825. chip->spdif_bits = chip->spdif_pcm_bits = SNDRV_PCM_DEFAULT_CON_SPDIF & 0xffff;
  1826. snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL, 0);
  1827. snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
  1828. /* S/PDIF input initialization */
  1829. snd_ymfpci_writew(chip, YDSXGR_SPDIFINCTRL, 0);
  1830. /* digital mixer setup */
  1831. for (reg = 0x80; reg < 0xc0; reg += 4)
  1832. snd_ymfpci_writel(chip, reg, 0);
  1833. snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x3fff3fff);
  1834. snd_ymfpci_writel(chip, YDSXGR_ZVOUTVOL, 0x3fff3fff);
  1835. snd_ymfpci_writel(chip, YDSXGR_SPDIFOUTVOL, 0x3fff3fff);
  1836. snd_ymfpci_writel(chip, YDSXGR_NATIVEADCINVOL, 0x3fff3fff);
  1837. snd_ymfpci_writel(chip, YDSXGR_NATIVEDACINVOL, 0x3fff3fff);
  1838. snd_ymfpci_writel(chip, YDSXGR_PRIADCLOOPVOL, 0x3fff3fff);
  1839. snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0x3fff3fff);
  1840. return 0;
  1841. }
  1842. static int snd_ymfpci_free(struct snd_ymfpci *chip)
  1843. {
  1844. u16 ctrl;
  1845. snd_assert(chip != NULL, return -EINVAL);
  1846. if (chip->res_reg_area) { /* don't touch busy hardware */
  1847. snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0);
  1848. snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0);
  1849. snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0);
  1850. snd_ymfpci_writel(chip, YDSXGR_STATUS, ~0);
  1851. snd_ymfpci_disable_dsp(chip);
  1852. snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0);
  1853. snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0);
  1854. snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0);
  1855. snd_ymfpci_writel(chip, YDSXGR_WORKBASE, 0);
  1856. snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, 0);
  1857. ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
  1858. snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007);
  1859. }
  1860. snd_ymfpci_ac3_done(chip);
  1861. /* Set PCI device to D3 state */
  1862. #if 0
  1863. /* FIXME: temporarily disabled, otherwise we cannot fire up
  1864. * the chip again unless reboot. ACPI bug?
  1865. */
  1866. pci_set_power_state(chip->pci, 3);
  1867. #endif
  1868. #ifdef CONFIG_PM
  1869. vfree(chip->saved_regs);
  1870. #endif
  1871. release_and_free_resource(chip->mpu_res);
  1872. release_and_free_resource(chip->fm_res);
  1873. snd_ymfpci_free_gameport(chip);
  1874. if (chip->reg_area_virt)
  1875. iounmap(chip->reg_area_virt);
  1876. if (chip->work_ptr.area)
  1877. snd_dma_free_pages(&chip->work_ptr);
  1878. if (chip->irq >= 0)
  1879. free_irq(chip->irq, (void *)chip);
  1880. release_and_free_resource(chip->res_reg_area);
  1881. pci_write_config_word(chip->pci, 0x40, chip->old_legacy_ctrl);
  1882. pci_disable_device(chip->pci);
  1883. kfree(chip);
  1884. return 0;
  1885. }
  1886. static int snd_ymfpci_dev_free(struct snd_device *device)
  1887. {
  1888. struct snd_ymfpci *chip = device->device_data;
  1889. return snd_ymfpci_free(chip);
  1890. }
  1891. #ifdef CONFIG_PM
  1892. static int saved_regs_index[] = {
  1893. /* spdif */
  1894. YDSXGR_SPDIFOUTCTRL,
  1895. YDSXGR_SPDIFOUTSTATUS,
  1896. YDSXGR_SPDIFINCTRL,
  1897. /* volumes */
  1898. YDSXGR_PRIADCLOOPVOL,
  1899. YDSXGR_NATIVEDACINVOL,
  1900. YDSXGR_NATIVEDACOUTVOL,
  1901. // YDSXGR_BUF441OUTVOL,
  1902. YDSXGR_NATIVEADCINVOL,
  1903. YDSXGR_SPDIFLOOPVOL,
  1904. YDSXGR_SPDIFOUTVOL,
  1905. YDSXGR_ZVOUTVOL,
  1906. YDSXGR_LEGACYOUTVOL,
  1907. /* address bases */
  1908. YDSXGR_PLAYCTRLBASE,
  1909. YDSXGR_RECCTRLBASE,
  1910. YDSXGR_EFFCTRLBASE,
  1911. YDSXGR_WORKBASE,
  1912. /* capture set up */
  1913. YDSXGR_MAPOFREC,
  1914. YDSXGR_RECFORMAT,
  1915. YDSXGR_RECSLOTSR,
  1916. YDSXGR_ADCFORMAT,
  1917. YDSXGR_ADCSLOTSR,
  1918. };
  1919. #define YDSXGR_NUM_SAVED_REGS ARRAY_SIZE(saved_regs_index)
  1920. int snd_ymfpci_suspend(struct pci_dev *pci, pm_message_t state)
  1921. {
  1922. struct snd_card *card = pci_get_drvdata(pci);
  1923. struct snd_ymfpci *chip = card->private_data;
  1924. unsigned int i;
  1925. snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
  1926. snd_pcm_suspend_all(chip->pcm);
  1927. snd_pcm_suspend_all(chip->pcm2);
  1928. snd_pcm_suspend_all(chip->pcm_spdif);
  1929. snd_pcm_suspend_all(chip->pcm_4ch);
  1930. snd_ac97_suspend(chip->ac97);
  1931. for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++)
  1932. chip->saved_regs[i] = snd_ymfpci_readl(chip, saved_regs_index[i]);
  1933. chip->saved_ydsxgr_mode = snd_ymfpci_readl(chip, YDSXGR_MODE);
  1934. snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0);
  1935. snd_ymfpci_disable_dsp(chip);
  1936. pci_disable_device(pci);
  1937. pci_save_state(pci);
  1938. return 0;
  1939. }
  1940. int snd_ymfpci_resume(struct pci_dev *pci)
  1941. {
  1942. struct snd_card *card = pci_get_drvdata(pci);
  1943. struct snd_ymfpci *chip = card->private_data;
  1944. unsigned int i;
  1945. pci_restore_state(pci);
  1946. pci_enable_device(pci);
  1947. pci_set_master(pci);
  1948. snd_ymfpci_aclink_reset(pci);
  1949. snd_ymfpci_codec_ready(chip, 0);
  1950. snd_ymfpci_download_image(chip);
  1951. udelay(100);
  1952. for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++)
  1953. snd_ymfpci_writel(chip, saved_regs_index[i], chip->saved_regs[i]);
  1954. snd_ac97_resume(chip->ac97);
  1955. /* start hw again */
  1956. if (chip->start_count > 0) {
  1957. spin_lock_irq(&chip->reg_lock);
  1958. snd_ymfpci_writel(chip, YDSXGR_MODE, chip->saved_ydsxgr_mode);
  1959. chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT);
  1960. spin_unlock_irq(&chip->reg_lock);
  1961. }
  1962. snd_power_change_state(card, SNDRV_CTL_POWER_D0);
  1963. return 0;
  1964. }
  1965. #endif /* CONFIG_PM */
  1966. int __devinit snd_ymfpci_create(struct snd_card *card,
  1967. struct pci_dev * pci,
  1968. unsigned short old_legacy_ctrl,
  1969. struct snd_ymfpci ** rchip)
  1970. {
  1971. struct snd_ymfpci *chip;
  1972. int err;
  1973. static struct snd_device_ops ops = {
  1974. .dev_free = snd_ymfpci_dev_free,
  1975. };
  1976. *rchip = NULL;
  1977. /* enable PCI device */
  1978. if ((err = pci_enable_device(pci)) < 0)
  1979. return err;
  1980. chip = kzalloc(sizeof(*chip), GFP_KERNEL);
  1981. if (chip == NULL) {
  1982. pci_disable_device(pci);
  1983. return -ENOMEM;
  1984. }
  1985. chip->old_legacy_ctrl = old_legacy_ctrl;
  1986. spin_lock_init(&chip->reg_lock);
  1987. spin_lock_init(&chip->voice_lock);
  1988. init_waitqueue_head(&chip->interrupt_sleep);
  1989. atomic_set(&chip->interrupt_sleep_count, 0);
  1990. chip->card = card;
  1991. chip->pci = pci;
  1992. chip->irq = -1;
  1993. chip->device_id = pci->device;
  1994. pci_read_config_byte(pci, PCI_REVISION_ID, (u8 *)&chip->rev);
  1995. chip->reg_area_phys = pci_resource_start(pci, 0);
  1996. chip->reg_area_virt = ioremap_nocache(chip->reg_area_phys, 0x8000);
  1997. pci_set_master(pci);
  1998. if ((chip->res_reg_area = request_mem_region(chip->reg_area_phys, 0x8000, "YMFPCI")) == NULL) {
  1999. snd_printk(KERN_ERR "unable to grab memory region 0x%lx-0x%lx\n", chip->reg_area_phys, chip->reg_area_phys + 0x8000 - 1);
  2000. snd_ymfpci_free(chip);
  2001. return -EBUSY;
  2002. }
  2003. if (request_irq(pci->irq, snd_ymfpci_interrupt, SA_INTERRUPT|SA_SHIRQ, "YMFPCI", (void *) chip)) {
  2004. snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
  2005. snd_ymfpci_free(chip);
  2006. return -EBUSY;
  2007. }
  2008. chip->irq = pci->irq;
  2009. snd_ymfpci_aclink_reset(pci);
  2010. if (snd_ymfpci_codec_ready(chip, 0) < 0) {
  2011. snd_ymfpci_free(chip);
  2012. return -EIO;
  2013. }
  2014. snd_ymfpci_download_image(chip);
  2015. udelay(100); /* seems we need a delay after downloading image.. */
  2016. if (snd_ymfpci_memalloc(chip) < 0) {
  2017. snd_ymfpci_free(chip);
  2018. return -EIO;
  2019. }
  2020. if ((err = snd_ymfpci_ac3_init(chip)) < 0) {
  2021. snd_ymfpci_free(chip);
  2022. return err;
  2023. }
  2024. #ifdef CONFIG_PM
  2025. chip->saved_regs = vmalloc(YDSXGR_NUM_SAVED_REGS * sizeof(u32));
  2026. if (chip->saved_regs == NULL) {
  2027. snd_ymfpci_free(chip);
  2028. return -ENOMEM;
  2029. }
  2030. #endif
  2031. if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
  2032. snd_ymfpci_free(chip);
  2033. return err;
  2034. }
  2035. snd_ymfpci_proc_init(card, chip);
  2036. snd_card_set_dev(card, &pci->dev);
  2037. *rchip = chip;
  2038. return 0;
  2039. }