qla_init.c 141 KB

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  1. /*
  2. * QLogic Fibre Channel HBA Driver
  3. * Copyright (c) 2003-2008 QLogic Corporation
  4. *
  5. * See LICENSE.qla2xxx for copyright and licensing details.
  6. */
  7. #include "qla_def.h"
  8. #include "qla_gbl.h"
  9. #include <linux/delay.h>
  10. #include <linux/slab.h>
  11. #include <linux/vmalloc.h>
  12. #include "qla_devtbl.h"
  13. #ifdef CONFIG_SPARC
  14. #include <asm/prom.h>
  15. #endif
  16. /*
  17. * QLogic ISP2x00 Hardware Support Function Prototypes.
  18. */
  19. static int qla2x00_isp_firmware(scsi_qla_host_t *);
  20. static int qla2x00_setup_chip(scsi_qla_host_t *);
  21. static int qla2x00_init_rings(scsi_qla_host_t *);
  22. static int qla2x00_fw_ready(scsi_qla_host_t *);
  23. static int qla2x00_configure_hba(scsi_qla_host_t *);
  24. static int qla2x00_configure_loop(scsi_qla_host_t *);
  25. static int qla2x00_configure_local_loop(scsi_qla_host_t *);
  26. static int qla2x00_configure_fabric(scsi_qla_host_t *);
  27. static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *);
  28. static int qla2x00_device_resync(scsi_qla_host_t *);
  29. static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *,
  30. uint16_t *);
  31. static int qla2x00_restart_isp(scsi_qla_host_t *);
  32. static int qla2x00_find_new_loop_id(scsi_qla_host_t *, fc_port_t *);
  33. static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
  34. static int qla84xx_init_chip(scsi_qla_host_t *);
  35. static int qla25xx_init_queues(struct qla_hw_data *);
  36. /* SRB Extensions ---------------------------------------------------------- */
  37. static void
  38. qla2x00_ctx_sp_timeout(unsigned long __data)
  39. {
  40. srb_t *sp = (srb_t *)__data;
  41. struct srb_ctx *ctx;
  42. struct srb_iocb *iocb;
  43. fc_port_t *fcport = sp->fcport;
  44. struct qla_hw_data *ha = fcport->vha->hw;
  45. struct req_que *req;
  46. unsigned long flags;
  47. spin_lock_irqsave(&ha->hardware_lock, flags);
  48. req = ha->req_q_map[0];
  49. req->outstanding_cmds[sp->handle] = NULL;
  50. ctx = sp->ctx;
  51. iocb = ctx->u.iocb_cmd;
  52. iocb->timeout(sp);
  53. iocb->free(sp);
  54. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  55. }
  56. void
  57. qla2x00_ctx_sp_free(srb_t *sp)
  58. {
  59. struct srb_ctx *ctx = sp->ctx;
  60. struct srb_iocb *iocb = ctx->u.iocb_cmd;
  61. del_timer_sync(&iocb->timer);
  62. kfree(iocb);
  63. kfree(ctx);
  64. mempool_free(sp, sp->fcport->vha->hw->srb_mempool);
  65. }
  66. inline srb_t *
  67. qla2x00_get_ctx_sp(scsi_qla_host_t *vha, fc_port_t *fcport, size_t size,
  68. unsigned long tmo)
  69. {
  70. srb_t *sp;
  71. struct qla_hw_data *ha = vha->hw;
  72. struct srb_ctx *ctx;
  73. struct srb_iocb *iocb;
  74. sp = mempool_alloc(ha->srb_mempool, GFP_KERNEL);
  75. if (!sp)
  76. goto done;
  77. ctx = kzalloc(size, GFP_KERNEL);
  78. if (!ctx) {
  79. mempool_free(sp, ha->srb_mempool);
  80. sp = NULL;
  81. goto done;
  82. }
  83. iocb = kzalloc(sizeof(struct srb_iocb), GFP_KERNEL);
  84. if (!iocb) {
  85. mempool_free(sp, ha->srb_mempool);
  86. sp = NULL;
  87. kfree(ctx);
  88. goto done;
  89. }
  90. memset(sp, 0, sizeof(*sp));
  91. sp->fcport = fcport;
  92. sp->ctx = ctx;
  93. ctx->u.iocb_cmd = iocb;
  94. iocb->free = qla2x00_ctx_sp_free;
  95. init_timer(&iocb->timer);
  96. if (!tmo)
  97. goto done;
  98. iocb->timer.expires = jiffies + tmo * HZ;
  99. iocb->timer.data = (unsigned long)sp;
  100. iocb->timer.function = qla2x00_ctx_sp_timeout;
  101. add_timer(&iocb->timer);
  102. done:
  103. return sp;
  104. }
  105. /* Asynchronous Login/Logout Routines -------------------------------------- */
  106. static inline unsigned long
  107. qla2x00_get_async_timeout(struct scsi_qla_host *vha)
  108. {
  109. unsigned long tmo;
  110. struct qla_hw_data *ha = vha->hw;
  111. /* Firmware should use switch negotiated r_a_tov for timeout. */
  112. tmo = ha->r_a_tov / 10 * 2;
  113. if (!IS_FWI2_CAPABLE(ha)) {
  114. /*
  115. * Except for earlier ISPs where the timeout is seeded from the
  116. * initialization control block.
  117. */
  118. tmo = ha->login_timeout;
  119. }
  120. return tmo;
  121. }
  122. static void
  123. qla2x00_async_iocb_timeout(srb_t *sp)
  124. {
  125. fc_port_t *fcport = sp->fcport;
  126. struct srb_ctx *ctx = sp->ctx;
  127. DEBUG2(printk(KERN_WARNING
  128. "scsi(%ld:%x): Async-%s timeout - portid=%02x%02x%02x.\n",
  129. fcport->vha->host_no, sp->handle,
  130. ctx->name, fcport->d_id.b.domain,
  131. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  132. fcport->flags &= ~FCF_ASYNC_SENT;
  133. if (ctx->type == SRB_LOGIN_CMD) {
  134. struct srb_iocb *lio = ctx->u.iocb_cmd;
  135. qla2x00_post_async_logout_work(fcport->vha, fcport, NULL);
  136. /* Retry as needed. */
  137. lio->u.logio.data[0] = MBS_COMMAND_ERROR;
  138. lio->u.logio.data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ?
  139. QLA_LOGIO_LOGIN_RETRIED : 0;
  140. qla2x00_post_async_login_done_work(fcport->vha, fcport,
  141. lio->u.logio.data);
  142. }
  143. }
  144. static void
  145. qla2x00_async_login_ctx_done(srb_t *sp)
  146. {
  147. struct srb_ctx *ctx = sp->ctx;
  148. struct srb_iocb *lio = ctx->u.iocb_cmd;
  149. qla2x00_post_async_login_done_work(sp->fcport->vha, sp->fcport,
  150. lio->u.logio.data);
  151. lio->free(sp);
  152. }
  153. int
  154. qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport,
  155. uint16_t *data)
  156. {
  157. srb_t *sp;
  158. struct srb_ctx *ctx;
  159. struct srb_iocb *lio;
  160. int rval;
  161. rval = QLA_FUNCTION_FAILED;
  162. sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx),
  163. qla2x00_get_async_timeout(vha) + 2);
  164. if (!sp)
  165. goto done;
  166. ctx = sp->ctx;
  167. ctx->type = SRB_LOGIN_CMD;
  168. ctx->name = "login";
  169. lio = ctx->u.iocb_cmd;
  170. lio->timeout = qla2x00_async_iocb_timeout;
  171. lio->done = qla2x00_async_login_ctx_done;
  172. lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI;
  173. if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
  174. lio->u.logio.flags |= SRB_LOGIN_RETRIED;
  175. rval = qla2x00_start_sp(sp);
  176. if (rval != QLA_SUCCESS)
  177. goto done_free_sp;
  178. DEBUG2(printk(KERN_DEBUG
  179. "scsi(%ld:%x): Async-login - loop-id=%x portid=%02x%02x%02x "
  180. "retries=%d.\n", fcport->vha->host_no, sp->handle, fcport->loop_id,
  181. fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa,
  182. fcport->login_retry));
  183. return rval;
  184. done_free_sp:
  185. lio->free(sp);
  186. done:
  187. return rval;
  188. }
  189. static void
  190. qla2x00_async_logout_ctx_done(srb_t *sp)
  191. {
  192. struct srb_ctx *ctx = sp->ctx;
  193. struct srb_iocb *lio = ctx->u.iocb_cmd;
  194. qla2x00_post_async_logout_done_work(sp->fcport->vha, sp->fcport,
  195. lio->u.logio.data);
  196. lio->free(sp);
  197. }
  198. int
  199. qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport)
  200. {
  201. srb_t *sp;
  202. struct srb_ctx *ctx;
  203. struct srb_iocb *lio;
  204. int rval;
  205. rval = QLA_FUNCTION_FAILED;
  206. sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx),
  207. qla2x00_get_async_timeout(vha) + 2);
  208. if (!sp)
  209. goto done;
  210. ctx = sp->ctx;
  211. ctx->type = SRB_LOGOUT_CMD;
  212. ctx->name = "logout";
  213. lio = ctx->u.iocb_cmd;
  214. lio->timeout = qla2x00_async_iocb_timeout;
  215. lio->done = qla2x00_async_logout_ctx_done;
  216. rval = qla2x00_start_sp(sp);
  217. if (rval != QLA_SUCCESS)
  218. goto done_free_sp;
  219. DEBUG2(printk(KERN_DEBUG
  220. "scsi(%ld:%x): Async-logout - loop-id=%x portid=%02x%02x%02x.\n",
  221. fcport->vha->host_no, sp->handle, fcport->loop_id,
  222. fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa));
  223. return rval;
  224. done_free_sp:
  225. lio->free(sp);
  226. done:
  227. return rval;
  228. }
  229. static void
  230. qla2x00_async_adisc_ctx_done(srb_t *sp)
  231. {
  232. struct srb_ctx *ctx = sp->ctx;
  233. struct srb_iocb *lio = ctx->u.iocb_cmd;
  234. qla2x00_post_async_adisc_done_work(sp->fcport->vha, sp->fcport,
  235. lio->u.logio.data);
  236. lio->free(sp);
  237. }
  238. int
  239. qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport,
  240. uint16_t *data)
  241. {
  242. srb_t *sp;
  243. struct srb_ctx *ctx;
  244. struct srb_iocb *lio;
  245. int rval;
  246. rval = QLA_FUNCTION_FAILED;
  247. sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx),
  248. qla2x00_get_async_timeout(vha) + 2);
  249. if (!sp)
  250. goto done;
  251. ctx = sp->ctx;
  252. ctx->type = SRB_ADISC_CMD;
  253. ctx->name = "adisc";
  254. lio = ctx->u.iocb_cmd;
  255. lio->timeout = qla2x00_async_iocb_timeout;
  256. lio->done = qla2x00_async_adisc_ctx_done;
  257. if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
  258. lio->u.logio.flags |= SRB_LOGIN_RETRIED;
  259. rval = qla2x00_start_sp(sp);
  260. if (rval != QLA_SUCCESS)
  261. goto done_free_sp;
  262. DEBUG2(printk(KERN_DEBUG
  263. "scsi(%ld:%x): Async-adisc - loop-id=%x portid=%02x%02x%02x.\n",
  264. fcport->vha->host_no, sp->handle, fcport->loop_id,
  265. fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa));
  266. return rval;
  267. done_free_sp:
  268. lio->free(sp);
  269. done:
  270. return rval;
  271. }
  272. static void
  273. qla2x00_async_tm_cmd_ctx_done(srb_t *sp)
  274. {
  275. struct srb_ctx *ctx = sp->ctx;
  276. struct srb_iocb *iocb = (struct srb_iocb *)ctx->u.iocb_cmd;
  277. qla2x00_async_tm_cmd_done(sp->fcport->vha, sp->fcport, iocb);
  278. iocb->free(sp);
  279. }
  280. int
  281. qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun,
  282. uint32_t tag)
  283. {
  284. struct scsi_qla_host *vha = fcport->vha;
  285. srb_t *sp;
  286. struct srb_ctx *ctx;
  287. struct srb_iocb *tcf;
  288. int rval;
  289. rval = QLA_FUNCTION_FAILED;
  290. sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx),
  291. qla2x00_get_async_timeout(vha) + 2);
  292. if (!sp)
  293. goto done;
  294. ctx = sp->ctx;
  295. ctx->type = SRB_TM_CMD;
  296. ctx->name = "tmf";
  297. tcf = ctx->u.iocb_cmd;
  298. tcf->u.tmf.flags = flags;
  299. tcf->u.tmf.lun = lun;
  300. tcf->u.tmf.data = tag;
  301. tcf->timeout = qla2x00_async_iocb_timeout;
  302. tcf->done = qla2x00_async_tm_cmd_ctx_done;
  303. rval = qla2x00_start_sp(sp);
  304. if (rval != QLA_SUCCESS)
  305. goto done_free_sp;
  306. DEBUG2(printk(KERN_DEBUG
  307. "scsi(%ld:%x): Async-tmf - loop-id=%x portid=%02x%02x%02x.\n",
  308. fcport->vha->host_no, sp->handle, fcport->loop_id,
  309. fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa));
  310. return rval;
  311. done_free_sp:
  312. tcf->free(sp);
  313. done:
  314. return rval;
  315. }
  316. void
  317. qla2x00_async_login_done(struct scsi_qla_host *vha, fc_port_t *fcport,
  318. uint16_t *data)
  319. {
  320. int rval;
  321. switch (data[0]) {
  322. case MBS_COMMAND_COMPLETE:
  323. if (fcport->flags & FCF_FCP2_DEVICE) {
  324. fcport->flags |= FCF_ASYNC_SENT;
  325. qla2x00_post_async_adisc_work(vha, fcport, data);
  326. break;
  327. }
  328. qla2x00_update_fcport(vha, fcport);
  329. break;
  330. case MBS_COMMAND_ERROR:
  331. fcport->flags &= ~FCF_ASYNC_SENT;
  332. if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
  333. set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
  334. else
  335. qla2x00_mark_device_lost(vha, fcport, 1, 1);
  336. break;
  337. case MBS_PORT_ID_USED:
  338. fcport->loop_id = data[1];
  339. qla2x00_post_async_logout_work(vha, fcport, NULL);
  340. qla2x00_post_async_login_work(vha, fcport, NULL);
  341. break;
  342. case MBS_LOOP_ID_USED:
  343. fcport->loop_id++;
  344. rval = qla2x00_find_new_loop_id(vha, fcport);
  345. if (rval != QLA_SUCCESS) {
  346. fcport->flags &= ~FCF_ASYNC_SENT;
  347. qla2x00_mark_device_lost(vha, fcport, 1, 1);
  348. break;
  349. }
  350. qla2x00_post_async_login_work(vha, fcport, NULL);
  351. break;
  352. }
  353. return;
  354. }
  355. void
  356. qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport,
  357. uint16_t *data)
  358. {
  359. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  360. return;
  361. }
  362. void
  363. qla2x00_async_adisc_done(struct scsi_qla_host *vha, fc_port_t *fcport,
  364. uint16_t *data)
  365. {
  366. if (data[0] == MBS_COMMAND_COMPLETE) {
  367. qla2x00_update_fcport(vha, fcport);
  368. return;
  369. }
  370. /* Retry login. */
  371. fcport->flags &= ~FCF_ASYNC_SENT;
  372. if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
  373. set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
  374. else
  375. qla2x00_mark_device_lost(vha, fcport, 1, 1);
  376. return;
  377. }
  378. void
  379. qla2x00_async_tm_cmd_done(struct scsi_qla_host *vha, fc_port_t *fcport,
  380. struct srb_iocb *iocb)
  381. {
  382. int rval;
  383. uint32_t flags;
  384. uint16_t lun;
  385. flags = iocb->u.tmf.flags;
  386. lun = (uint16_t)iocb->u.tmf.lun;
  387. /* Issue Marker IOCB */
  388. rval = qla2x00_marker(vha, vha->hw->req_q_map[0],
  389. vha->hw->rsp_q_map[0], fcport->loop_id, lun,
  390. flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID);
  391. if ((rval != QLA_SUCCESS) || iocb->u.tmf.data) {
  392. DEBUG2_3_11(printk(KERN_WARNING
  393. "%s(%ld): TM IOCB failed (%x).\n",
  394. __func__, vha->host_no, rval));
  395. }
  396. return;
  397. }
  398. /****************************************************************************/
  399. /* QLogic ISP2x00 Hardware Support Functions. */
  400. /****************************************************************************/
  401. /*
  402. * qla2x00_initialize_adapter
  403. * Initialize board.
  404. *
  405. * Input:
  406. * ha = adapter block pointer.
  407. *
  408. * Returns:
  409. * 0 = success
  410. */
  411. int
  412. qla2x00_initialize_adapter(scsi_qla_host_t *vha)
  413. {
  414. int rval;
  415. struct qla_hw_data *ha = vha->hw;
  416. struct req_que *req = ha->req_q_map[0];
  417. /* Clear adapter flags. */
  418. vha->flags.online = 0;
  419. ha->flags.chip_reset_done = 0;
  420. vha->flags.reset_active = 0;
  421. ha->flags.pci_channel_io_perm_failure = 0;
  422. ha->flags.eeh_busy = 0;
  423. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  424. atomic_set(&vha->loop_state, LOOP_DOWN);
  425. vha->device_flags = DFLG_NO_CABLE;
  426. vha->dpc_flags = 0;
  427. vha->flags.management_server_logged_in = 0;
  428. vha->marker_needed = 0;
  429. ha->isp_abort_cnt = 0;
  430. ha->beacon_blink_led = 0;
  431. set_bit(0, ha->req_qid_map);
  432. set_bit(0, ha->rsp_qid_map);
  433. qla_printk(KERN_INFO, ha, "Configuring PCI space...\n");
  434. rval = ha->isp_ops->pci_config(vha);
  435. if (rval) {
  436. DEBUG2(printk("scsi(%ld): Unable to configure PCI space.\n",
  437. vha->host_no));
  438. return (rval);
  439. }
  440. ha->isp_ops->reset_chip(vha);
  441. rval = qla2xxx_get_flash_info(vha);
  442. if (rval) {
  443. DEBUG2(printk("scsi(%ld): Unable to validate FLASH data.\n",
  444. vha->host_no));
  445. return (rval);
  446. }
  447. ha->isp_ops->get_flash_version(vha, req->ring);
  448. qla_printk(KERN_INFO, ha, "Configure NVRAM parameters...\n");
  449. ha->isp_ops->nvram_config(vha);
  450. if (ha->flags.disable_serdes) {
  451. /* Mask HBA via NVRAM settings? */
  452. qla_printk(KERN_INFO, ha, "Masking HBA WWPN "
  453. "%02x%02x%02x%02x%02x%02x%02x%02x (via NVRAM).\n",
  454. vha->port_name[0], vha->port_name[1],
  455. vha->port_name[2], vha->port_name[3],
  456. vha->port_name[4], vha->port_name[5],
  457. vha->port_name[6], vha->port_name[7]);
  458. return QLA_FUNCTION_FAILED;
  459. }
  460. qla_printk(KERN_INFO, ha, "Verifying loaded RISC code...\n");
  461. if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
  462. rval = ha->isp_ops->chip_diag(vha);
  463. if (rval)
  464. return (rval);
  465. rval = qla2x00_setup_chip(vha);
  466. if (rval)
  467. return (rval);
  468. }
  469. if (IS_QLA84XX(ha)) {
  470. ha->cs84xx = qla84xx_get_chip(vha);
  471. if (!ha->cs84xx) {
  472. qla_printk(KERN_ERR, ha,
  473. "Unable to configure ISP84XX.\n");
  474. return QLA_FUNCTION_FAILED;
  475. }
  476. }
  477. rval = qla2x00_init_rings(vha);
  478. ha->flags.chip_reset_done = 1;
  479. if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) {
  480. /* Issue verify 84xx FW IOCB to complete 84xx initialization */
  481. rval = qla84xx_init_chip(vha);
  482. if (rval != QLA_SUCCESS) {
  483. qla_printk(KERN_ERR, ha,
  484. "Unable to initialize ISP84XX.\n");
  485. qla84xx_put_chip(vha);
  486. }
  487. }
  488. if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha))
  489. qla24xx_read_fcp_prio_cfg(vha);
  490. return (rval);
  491. }
  492. /**
  493. * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
  494. * @ha: HA context
  495. *
  496. * Returns 0 on success.
  497. */
  498. int
  499. qla2100_pci_config(scsi_qla_host_t *vha)
  500. {
  501. uint16_t w;
  502. unsigned long flags;
  503. struct qla_hw_data *ha = vha->hw;
  504. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  505. pci_set_master(ha->pdev);
  506. pci_try_set_mwi(ha->pdev);
  507. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  508. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  509. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  510. pci_disable_rom(ha->pdev);
  511. /* Get PCI bus information. */
  512. spin_lock_irqsave(&ha->hardware_lock, flags);
  513. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  514. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  515. return QLA_SUCCESS;
  516. }
  517. /**
  518. * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
  519. * @ha: HA context
  520. *
  521. * Returns 0 on success.
  522. */
  523. int
  524. qla2300_pci_config(scsi_qla_host_t *vha)
  525. {
  526. uint16_t w;
  527. unsigned long flags = 0;
  528. uint32_t cnt;
  529. struct qla_hw_data *ha = vha->hw;
  530. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  531. pci_set_master(ha->pdev);
  532. pci_try_set_mwi(ha->pdev);
  533. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  534. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  535. if (IS_QLA2322(ha) || IS_QLA6322(ha))
  536. w &= ~PCI_COMMAND_INTX_DISABLE;
  537. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  538. /*
  539. * If this is a 2300 card and not 2312, reset the
  540. * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
  541. * the 2310 also reports itself as a 2300 so we need to get the
  542. * fb revision level -- a 6 indicates it really is a 2300 and
  543. * not a 2310.
  544. */
  545. if (IS_QLA2300(ha)) {
  546. spin_lock_irqsave(&ha->hardware_lock, flags);
  547. /* Pause RISC. */
  548. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  549. for (cnt = 0; cnt < 30000; cnt++) {
  550. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) != 0)
  551. break;
  552. udelay(10);
  553. }
  554. /* Select FPM registers. */
  555. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  556. RD_REG_WORD(&reg->ctrl_status);
  557. /* Get the fb rev level */
  558. ha->fb_rev = RD_FB_CMD_REG(ha, reg);
  559. if (ha->fb_rev == FPM_2300)
  560. pci_clear_mwi(ha->pdev);
  561. /* Deselect FPM registers. */
  562. WRT_REG_WORD(&reg->ctrl_status, 0x0);
  563. RD_REG_WORD(&reg->ctrl_status);
  564. /* Release RISC module. */
  565. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  566. for (cnt = 0; cnt < 30000; cnt++) {
  567. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0)
  568. break;
  569. udelay(10);
  570. }
  571. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  572. }
  573. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  574. pci_disable_rom(ha->pdev);
  575. /* Get PCI bus information. */
  576. spin_lock_irqsave(&ha->hardware_lock, flags);
  577. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  578. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  579. return QLA_SUCCESS;
  580. }
  581. /**
  582. * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
  583. * @ha: HA context
  584. *
  585. * Returns 0 on success.
  586. */
  587. int
  588. qla24xx_pci_config(scsi_qla_host_t *vha)
  589. {
  590. uint16_t w;
  591. unsigned long flags = 0;
  592. struct qla_hw_data *ha = vha->hw;
  593. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  594. pci_set_master(ha->pdev);
  595. pci_try_set_mwi(ha->pdev);
  596. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  597. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  598. w &= ~PCI_COMMAND_INTX_DISABLE;
  599. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  600. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  601. /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
  602. if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
  603. pcix_set_mmrbc(ha->pdev, 2048);
  604. /* PCIe -- adjust Maximum Read Request Size (2048). */
  605. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  606. pcie_set_readrq(ha->pdev, 2048);
  607. pci_disable_rom(ha->pdev);
  608. ha->chip_revision = ha->pdev->revision;
  609. /* Get PCI bus information. */
  610. spin_lock_irqsave(&ha->hardware_lock, flags);
  611. ha->pci_attr = RD_REG_DWORD(&reg->ctrl_status);
  612. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  613. return QLA_SUCCESS;
  614. }
  615. /**
  616. * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
  617. * @ha: HA context
  618. *
  619. * Returns 0 on success.
  620. */
  621. int
  622. qla25xx_pci_config(scsi_qla_host_t *vha)
  623. {
  624. uint16_t w;
  625. struct qla_hw_data *ha = vha->hw;
  626. pci_set_master(ha->pdev);
  627. pci_try_set_mwi(ha->pdev);
  628. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  629. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  630. w &= ~PCI_COMMAND_INTX_DISABLE;
  631. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  632. /* PCIe -- adjust Maximum Read Request Size (2048). */
  633. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  634. pcie_set_readrq(ha->pdev, 2048);
  635. pci_disable_rom(ha->pdev);
  636. ha->chip_revision = ha->pdev->revision;
  637. return QLA_SUCCESS;
  638. }
  639. /**
  640. * qla2x00_isp_firmware() - Choose firmware image.
  641. * @ha: HA context
  642. *
  643. * Returns 0 on success.
  644. */
  645. static int
  646. qla2x00_isp_firmware(scsi_qla_host_t *vha)
  647. {
  648. int rval;
  649. uint16_t loop_id, topo, sw_cap;
  650. uint8_t domain, area, al_pa;
  651. struct qla_hw_data *ha = vha->hw;
  652. /* Assume loading risc code */
  653. rval = QLA_FUNCTION_FAILED;
  654. if (ha->flags.disable_risc_code_load) {
  655. DEBUG2(printk("scsi(%ld): RISC CODE NOT loaded\n",
  656. vha->host_no));
  657. qla_printk(KERN_INFO, ha, "RISC CODE NOT loaded\n");
  658. /* Verify checksum of loaded RISC code. */
  659. rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address);
  660. if (rval == QLA_SUCCESS) {
  661. /* And, verify we are not in ROM code. */
  662. rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa,
  663. &area, &domain, &topo, &sw_cap);
  664. }
  665. }
  666. if (rval) {
  667. DEBUG2_3(printk("scsi(%ld): **** Load RISC code ****\n",
  668. vha->host_no));
  669. }
  670. return (rval);
  671. }
  672. /**
  673. * qla2x00_reset_chip() - Reset ISP chip.
  674. * @ha: HA context
  675. *
  676. * Returns 0 on success.
  677. */
  678. void
  679. qla2x00_reset_chip(scsi_qla_host_t *vha)
  680. {
  681. unsigned long flags = 0;
  682. struct qla_hw_data *ha = vha->hw;
  683. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  684. uint32_t cnt;
  685. uint16_t cmd;
  686. if (unlikely(pci_channel_offline(ha->pdev)))
  687. return;
  688. ha->isp_ops->disable_intrs(ha);
  689. spin_lock_irqsave(&ha->hardware_lock, flags);
  690. /* Turn off master enable */
  691. cmd = 0;
  692. pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
  693. cmd &= ~PCI_COMMAND_MASTER;
  694. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  695. if (!IS_QLA2100(ha)) {
  696. /* Pause RISC. */
  697. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  698. if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
  699. for (cnt = 0; cnt < 30000; cnt++) {
  700. if ((RD_REG_WORD(&reg->hccr) &
  701. HCCR_RISC_PAUSE) != 0)
  702. break;
  703. udelay(100);
  704. }
  705. } else {
  706. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  707. udelay(10);
  708. }
  709. /* Select FPM registers. */
  710. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  711. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  712. /* FPM Soft Reset. */
  713. WRT_REG_WORD(&reg->fpm_diag_config, 0x100);
  714. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  715. /* Toggle Fpm Reset. */
  716. if (!IS_QLA2200(ha)) {
  717. WRT_REG_WORD(&reg->fpm_diag_config, 0x0);
  718. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  719. }
  720. /* Select frame buffer registers. */
  721. WRT_REG_WORD(&reg->ctrl_status, 0x10);
  722. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  723. /* Reset frame buffer FIFOs. */
  724. if (IS_QLA2200(ha)) {
  725. WRT_FB_CMD_REG(ha, reg, 0xa000);
  726. RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
  727. } else {
  728. WRT_FB_CMD_REG(ha, reg, 0x00fc);
  729. /* Read back fb_cmd until zero or 3 seconds max */
  730. for (cnt = 0; cnt < 3000; cnt++) {
  731. if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
  732. break;
  733. udelay(100);
  734. }
  735. }
  736. /* Select RISC module registers. */
  737. WRT_REG_WORD(&reg->ctrl_status, 0);
  738. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  739. /* Reset RISC processor. */
  740. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  741. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  742. /* Release RISC processor. */
  743. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  744. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  745. }
  746. WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
  747. WRT_REG_WORD(&reg->hccr, HCCR_CLR_HOST_INT);
  748. /* Reset ISP chip. */
  749. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  750. /* Wait for RISC to recover from reset. */
  751. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  752. /*
  753. * It is necessary to for a delay here since the card doesn't
  754. * respond to PCI reads during a reset. On some architectures
  755. * this will result in an MCA.
  756. */
  757. udelay(20);
  758. for (cnt = 30000; cnt; cnt--) {
  759. if ((RD_REG_WORD(&reg->ctrl_status) &
  760. CSR_ISP_SOFT_RESET) == 0)
  761. break;
  762. udelay(100);
  763. }
  764. } else
  765. udelay(10);
  766. /* Reset RISC processor. */
  767. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  768. WRT_REG_WORD(&reg->semaphore, 0);
  769. /* Release RISC processor. */
  770. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  771. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  772. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  773. for (cnt = 0; cnt < 30000; cnt++) {
  774. if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
  775. break;
  776. udelay(100);
  777. }
  778. } else
  779. udelay(100);
  780. /* Turn on master enable */
  781. cmd |= PCI_COMMAND_MASTER;
  782. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  783. /* Disable RISC pause on FPM parity error. */
  784. if (!IS_QLA2100(ha)) {
  785. WRT_REG_WORD(&reg->hccr, HCCR_DISABLE_PARITY_PAUSE);
  786. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  787. }
  788. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  789. }
  790. /**
  791. * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
  792. * @ha: HA context
  793. *
  794. * Returns 0 on success.
  795. */
  796. static inline void
  797. qla24xx_reset_risc(scsi_qla_host_t *vha)
  798. {
  799. unsigned long flags = 0;
  800. struct qla_hw_data *ha = vha->hw;
  801. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  802. uint32_t cnt, d2;
  803. uint16_t wd;
  804. spin_lock_irqsave(&ha->hardware_lock, flags);
  805. /* Reset RISC. */
  806. WRT_REG_DWORD(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  807. for (cnt = 0; cnt < 30000; cnt++) {
  808. if ((RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
  809. break;
  810. udelay(10);
  811. }
  812. WRT_REG_DWORD(&reg->ctrl_status,
  813. CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  814. pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
  815. udelay(100);
  816. /* Wait for firmware to complete NVRAM accesses. */
  817. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  818. for (cnt = 10000 ; cnt && d2; cnt--) {
  819. udelay(5);
  820. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  821. barrier();
  822. }
  823. /* Wait for soft-reset to complete. */
  824. d2 = RD_REG_DWORD(&reg->ctrl_status);
  825. for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) {
  826. udelay(5);
  827. d2 = RD_REG_DWORD(&reg->ctrl_status);
  828. barrier();
  829. }
  830. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  831. RD_REG_DWORD(&reg->hccr);
  832. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  833. RD_REG_DWORD(&reg->hccr);
  834. WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_RESET);
  835. RD_REG_DWORD(&reg->hccr);
  836. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  837. for (cnt = 6000000 ; cnt && d2; cnt--) {
  838. udelay(5);
  839. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  840. barrier();
  841. }
  842. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  843. if (IS_NOPOLLING_TYPE(ha))
  844. ha->isp_ops->enable_intrs(ha);
  845. }
  846. /**
  847. * qla24xx_reset_chip() - Reset ISP24xx chip.
  848. * @ha: HA context
  849. *
  850. * Returns 0 on success.
  851. */
  852. void
  853. qla24xx_reset_chip(scsi_qla_host_t *vha)
  854. {
  855. struct qla_hw_data *ha = vha->hw;
  856. if (pci_channel_offline(ha->pdev) &&
  857. ha->flags.pci_channel_io_perm_failure) {
  858. return;
  859. }
  860. ha->isp_ops->disable_intrs(ha);
  861. /* Perform RISC reset. */
  862. qla24xx_reset_risc(vha);
  863. }
  864. /**
  865. * qla2x00_chip_diag() - Test chip for proper operation.
  866. * @ha: HA context
  867. *
  868. * Returns 0 on success.
  869. */
  870. int
  871. qla2x00_chip_diag(scsi_qla_host_t *vha)
  872. {
  873. int rval;
  874. struct qla_hw_data *ha = vha->hw;
  875. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  876. unsigned long flags = 0;
  877. uint16_t data;
  878. uint32_t cnt;
  879. uint16_t mb[5];
  880. struct req_que *req = ha->req_q_map[0];
  881. /* Assume a failed state */
  882. rval = QLA_FUNCTION_FAILED;
  883. DEBUG3(printk("scsi(%ld): Testing device at %lx.\n",
  884. vha->host_no, (u_long)&reg->flash_address));
  885. spin_lock_irqsave(&ha->hardware_lock, flags);
  886. /* Reset ISP chip. */
  887. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  888. /*
  889. * We need to have a delay here since the card will not respond while
  890. * in reset causing an MCA on some architectures.
  891. */
  892. udelay(20);
  893. data = qla2x00_debounce_register(&reg->ctrl_status);
  894. for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
  895. udelay(5);
  896. data = RD_REG_WORD(&reg->ctrl_status);
  897. barrier();
  898. }
  899. if (!cnt)
  900. goto chip_diag_failed;
  901. DEBUG3(printk("scsi(%ld): Reset register cleared by chip reset\n",
  902. vha->host_no));
  903. /* Reset RISC processor. */
  904. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  905. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  906. /* Workaround for QLA2312 PCI parity error */
  907. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  908. data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
  909. for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
  910. udelay(5);
  911. data = RD_MAILBOX_REG(ha, reg, 0);
  912. barrier();
  913. }
  914. } else
  915. udelay(10);
  916. if (!cnt)
  917. goto chip_diag_failed;
  918. /* Check product ID of chip */
  919. DEBUG3(printk("scsi(%ld): Checking product ID of chip\n", vha->host_no));
  920. mb[1] = RD_MAILBOX_REG(ha, reg, 1);
  921. mb[2] = RD_MAILBOX_REG(ha, reg, 2);
  922. mb[3] = RD_MAILBOX_REG(ha, reg, 3);
  923. mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
  924. if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
  925. mb[3] != PROD_ID_3) {
  926. qla_printk(KERN_WARNING, ha,
  927. "Wrong product ID = 0x%x,0x%x,0x%x\n", mb[1], mb[2], mb[3]);
  928. goto chip_diag_failed;
  929. }
  930. ha->product_id[0] = mb[1];
  931. ha->product_id[1] = mb[2];
  932. ha->product_id[2] = mb[3];
  933. ha->product_id[3] = mb[4];
  934. /* Adjust fw RISC transfer size */
  935. if (req->length > 1024)
  936. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
  937. else
  938. ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
  939. req->length;
  940. if (IS_QLA2200(ha) &&
  941. RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
  942. /* Limit firmware transfer size with a 2200A */
  943. DEBUG3(printk("scsi(%ld): Found QLA2200A chip.\n",
  944. vha->host_no));
  945. ha->device_type |= DT_ISP2200A;
  946. ha->fw_transfer_size = 128;
  947. }
  948. /* Wrap Incoming Mailboxes Test. */
  949. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  950. DEBUG3(printk("scsi(%ld): Checking mailboxes.\n", vha->host_no));
  951. rval = qla2x00_mbx_reg_test(vha);
  952. if (rval) {
  953. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  954. vha->host_no));
  955. qla_printk(KERN_WARNING, ha,
  956. "Failed mailbox send register test\n");
  957. }
  958. else {
  959. /* Flag a successful rval */
  960. rval = QLA_SUCCESS;
  961. }
  962. spin_lock_irqsave(&ha->hardware_lock, flags);
  963. chip_diag_failed:
  964. if (rval)
  965. DEBUG2_3(printk("scsi(%ld): Chip diagnostics **** FAILED "
  966. "****\n", vha->host_no));
  967. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  968. return (rval);
  969. }
  970. /**
  971. * qla24xx_chip_diag() - Test ISP24xx for proper operation.
  972. * @ha: HA context
  973. *
  974. * Returns 0 on success.
  975. */
  976. int
  977. qla24xx_chip_diag(scsi_qla_host_t *vha)
  978. {
  979. int rval;
  980. struct qla_hw_data *ha = vha->hw;
  981. struct req_que *req = ha->req_q_map[0];
  982. if (IS_QLA82XX(ha))
  983. return QLA_SUCCESS;
  984. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
  985. rval = qla2x00_mbx_reg_test(vha);
  986. if (rval) {
  987. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  988. vha->host_no));
  989. qla_printk(KERN_WARNING, ha,
  990. "Failed mailbox send register test\n");
  991. } else {
  992. /* Flag a successful rval */
  993. rval = QLA_SUCCESS;
  994. }
  995. return rval;
  996. }
  997. void
  998. qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
  999. {
  1000. int rval;
  1001. uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
  1002. eft_size, fce_size, mq_size;
  1003. dma_addr_t tc_dma;
  1004. void *tc;
  1005. struct qla_hw_data *ha = vha->hw;
  1006. struct req_que *req = ha->req_q_map[0];
  1007. struct rsp_que *rsp = ha->rsp_q_map[0];
  1008. if (ha->fw_dump) {
  1009. qla_printk(KERN_WARNING, ha,
  1010. "Firmware dump previously allocated.\n");
  1011. return;
  1012. }
  1013. ha->fw_dumped = 0;
  1014. fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
  1015. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  1016. fixed_size = sizeof(struct qla2100_fw_dump);
  1017. } else if (IS_QLA23XX(ha)) {
  1018. fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
  1019. mem_size = (ha->fw_memory_size - 0x11000 + 1) *
  1020. sizeof(uint16_t);
  1021. } else if (IS_FWI2_CAPABLE(ha)) {
  1022. if (IS_QLA81XX(ha))
  1023. fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
  1024. else if (IS_QLA25XX(ha))
  1025. fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem);
  1026. else
  1027. fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem);
  1028. mem_size = (ha->fw_memory_size - 0x100000 + 1) *
  1029. sizeof(uint32_t);
  1030. if (ha->mqenable)
  1031. mq_size = sizeof(struct qla2xxx_mq_chain);
  1032. /* Allocate memory for Fibre Channel Event Buffer. */
  1033. if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha))
  1034. goto try_eft;
  1035. tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
  1036. GFP_KERNEL);
  1037. if (!tc) {
  1038. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  1039. "(%d KB) for FCE.\n", FCE_SIZE / 1024);
  1040. goto try_eft;
  1041. }
  1042. memset(tc, 0, FCE_SIZE);
  1043. rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS,
  1044. ha->fce_mb, &ha->fce_bufs);
  1045. if (rval) {
  1046. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  1047. "FCE (%d).\n", rval);
  1048. dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc,
  1049. tc_dma);
  1050. ha->flags.fce_enabled = 0;
  1051. goto try_eft;
  1052. }
  1053. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for FCE...\n",
  1054. FCE_SIZE / 1024);
  1055. fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE;
  1056. ha->flags.fce_enabled = 1;
  1057. ha->fce_dma = tc_dma;
  1058. ha->fce = tc;
  1059. try_eft:
  1060. /* Allocate memory for Extended Trace Buffer. */
  1061. tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
  1062. GFP_KERNEL);
  1063. if (!tc) {
  1064. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  1065. "(%d KB) for EFT.\n", EFT_SIZE / 1024);
  1066. goto cont_alloc;
  1067. }
  1068. memset(tc, 0, EFT_SIZE);
  1069. rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS);
  1070. if (rval) {
  1071. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  1072. "EFT (%d).\n", rval);
  1073. dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc,
  1074. tc_dma);
  1075. goto cont_alloc;
  1076. }
  1077. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for EFT...\n",
  1078. EFT_SIZE / 1024);
  1079. eft_size = EFT_SIZE;
  1080. ha->eft_dma = tc_dma;
  1081. ha->eft = tc;
  1082. }
  1083. cont_alloc:
  1084. req_q_size = req->length * sizeof(request_t);
  1085. rsp_q_size = rsp->length * sizeof(response_t);
  1086. dump_size = offsetof(struct qla2xxx_fw_dump, isp);
  1087. dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size;
  1088. ha->chain_offset = dump_size;
  1089. dump_size += mq_size + fce_size;
  1090. ha->fw_dump = vmalloc(dump_size);
  1091. if (!ha->fw_dump) {
  1092. qla_printk(KERN_WARNING, ha, "Unable to allocate (%d KB) for "
  1093. "firmware dump!!!\n", dump_size / 1024);
  1094. if (ha->eft) {
  1095. dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft,
  1096. ha->eft_dma);
  1097. ha->eft = NULL;
  1098. ha->eft_dma = 0;
  1099. }
  1100. return;
  1101. }
  1102. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for firmware dump...\n",
  1103. dump_size / 1024);
  1104. ha->fw_dump_len = dump_size;
  1105. ha->fw_dump->signature[0] = 'Q';
  1106. ha->fw_dump->signature[1] = 'L';
  1107. ha->fw_dump->signature[2] = 'G';
  1108. ha->fw_dump->signature[3] = 'C';
  1109. ha->fw_dump->version = __constant_htonl(1);
  1110. ha->fw_dump->fixed_size = htonl(fixed_size);
  1111. ha->fw_dump->mem_size = htonl(mem_size);
  1112. ha->fw_dump->req_q_size = htonl(req_q_size);
  1113. ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
  1114. ha->fw_dump->eft_size = htonl(eft_size);
  1115. ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma));
  1116. ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma));
  1117. ha->fw_dump->header_size =
  1118. htonl(offsetof(struct qla2xxx_fw_dump, isp));
  1119. }
  1120. static int
  1121. qla81xx_mpi_sync(scsi_qla_host_t *vha)
  1122. {
  1123. #define MPS_MASK 0xe0
  1124. int rval;
  1125. uint16_t dc;
  1126. uint32_t dw;
  1127. struct qla_hw_data *ha = vha->hw;
  1128. if (!IS_QLA81XX(vha->hw))
  1129. return QLA_SUCCESS;
  1130. rval = qla2x00_write_ram_word(vha, 0x7c00, 1);
  1131. if (rval != QLA_SUCCESS) {
  1132. DEBUG2(qla_printk(KERN_WARNING, ha,
  1133. "Sync-MPI: Unable to acquire semaphore.\n"));
  1134. goto done;
  1135. }
  1136. pci_read_config_word(vha->hw->pdev, 0x54, &dc);
  1137. rval = qla2x00_read_ram_word(vha, 0x7a15, &dw);
  1138. if (rval != QLA_SUCCESS) {
  1139. DEBUG2(qla_printk(KERN_WARNING, ha,
  1140. "Sync-MPI: Unable to read sync.\n"));
  1141. goto done_release;
  1142. }
  1143. dc &= MPS_MASK;
  1144. if (dc == (dw & MPS_MASK))
  1145. goto done_release;
  1146. dw &= ~MPS_MASK;
  1147. dw |= dc;
  1148. rval = qla2x00_write_ram_word(vha, 0x7a15, dw);
  1149. if (rval != QLA_SUCCESS) {
  1150. DEBUG2(qla_printk(KERN_WARNING, ha,
  1151. "Sync-MPI: Unable to gain sync.\n"));
  1152. }
  1153. done_release:
  1154. rval = qla2x00_write_ram_word(vha, 0x7c00, 0);
  1155. if (rval != QLA_SUCCESS) {
  1156. DEBUG2(qla_printk(KERN_WARNING, ha,
  1157. "Sync-MPI: Unable to release semaphore.\n"));
  1158. }
  1159. done:
  1160. return rval;
  1161. }
  1162. /**
  1163. * qla2x00_setup_chip() - Load and start RISC firmware.
  1164. * @ha: HA context
  1165. *
  1166. * Returns 0 on success.
  1167. */
  1168. static int
  1169. qla2x00_setup_chip(scsi_qla_host_t *vha)
  1170. {
  1171. int rval;
  1172. uint32_t srisc_address = 0;
  1173. struct qla_hw_data *ha = vha->hw;
  1174. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1175. unsigned long flags;
  1176. uint16_t fw_major_version;
  1177. if (IS_QLA82XX(ha)) {
  1178. rval = ha->isp_ops->load_risc(vha, &srisc_address);
  1179. if (rval == QLA_SUCCESS) {
  1180. qla2x00_stop_firmware(vha);
  1181. goto enable_82xx_npiv;
  1182. } else
  1183. goto failed;
  1184. }
  1185. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  1186. /* Disable SRAM, Instruction RAM and GP RAM parity. */
  1187. spin_lock_irqsave(&ha->hardware_lock, flags);
  1188. WRT_REG_WORD(&reg->hccr, (HCCR_ENABLE_PARITY + 0x0));
  1189. RD_REG_WORD(&reg->hccr);
  1190. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1191. }
  1192. qla81xx_mpi_sync(vha);
  1193. /* Load firmware sequences */
  1194. rval = ha->isp_ops->load_risc(vha, &srisc_address);
  1195. if (rval == QLA_SUCCESS) {
  1196. DEBUG(printk("scsi(%ld): Verifying Checksum of loaded RISC "
  1197. "code.\n", vha->host_no));
  1198. rval = qla2x00_verify_checksum(vha, srisc_address);
  1199. if (rval == QLA_SUCCESS) {
  1200. /* Start firmware execution. */
  1201. DEBUG(printk("scsi(%ld): Checksum OK, start "
  1202. "firmware.\n", vha->host_no));
  1203. rval = qla2x00_execute_fw(vha, srisc_address);
  1204. /* Retrieve firmware information. */
  1205. if (rval == QLA_SUCCESS) {
  1206. enable_82xx_npiv:
  1207. fw_major_version = ha->fw_major_version;
  1208. rval = qla2x00_get_fw_version(vha,
  1209. &ha->fw_major_version,
  1210. &ha->fw_minor_version,
  1211. &ha->fw_subminor_version,
  1212. &ha->fw_attributes, &ha->fw_memory_size,
  1213. ha->mpi_version, &ha->mpi_capabilities,
  1214. ha->phy_version);
  1215. if (rval != QLA_SUCCESS)
  1216. goto failed;
  1217. ha->flags.npiv_supported = 0;
  1218. if (IS_QLA2XXX_MIDTYPE(ha) &&
  1219. (ha->fw_attributes & BIT_2)) {
  1220. ha->flags.npiv_supported = 1;
  1221. if ((!ha->max_npiv_vports) ||
  1222. ((ha->max_npiv_vports + 1) %
  1223. MIN_MULTI_ID_FABRIC))
  1224. ha->max_npiv_vports =
  1225. MIN_MULTI_ID_FABRIC - 1;
  1226. }
  1227. qla2x00_get_resource_cnts(vha, NULL,
  1228. &ha->fw_xcb_count, NULL, NULL,
  1229. &ha->max_npiv_vports, NULL);
  1230. if (!fw_major_version && ql2xallocfwdump) {
  1231. if (!IS_QLA82XX(ha))
  1232. qla2x00_alloc_fw_dump(vha);
  1233. }
  1234. }
  1235. } else {
  1236. DEBUG2(printk(KERN_INFO
  1237. "scsi(%ld): ISP Firmware failed checksum.\n",
  1238. vha->host_no));
  1239. }
  1240. }
  1241. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  1242. /* Enable proper parity. */
  1243. spin_lock_irqsave(&ha->hardware_lock, flags);
  1244. if (IS_QLA2300(ha))
  1245. /* SRAM parity */
  1246. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x1);
  1247. else
  1248. /* SRAM, Instruction RAM and GP RAM parity */
  1249. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x7);
  1250. RD_REG_WORD(&reg->hccr);
  1251. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1252. }
  1253. if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) {
  1254. uint32_t size;
  1255. rval = qla81xx_fac_get_sector_size(vha, &size);
  1256. if (rval == QLA_SUCCESS) {
  1257. ha->flags.fac_supported = 1;
  1258. ha->fdt_block_size = size << 2;
  1259. } else {
  1260. qla_printk(KERN_ERR, ha,
  1261. "Unsupported FAC firmware (%d.%02d.%02d).\n",
  1262. ha->fw_major_version, ha->fw_minor_version,
  1263. ha->fw_subminor_version);
  1264. }
  1265. }
  1266. failed:
  1267. if (rval) {
  1268. DEBUG2_3(printk("scsi(%ld): Setup chip **** FAILED ****.\n",
  1269. vha->host_no));
  1270. }
  1271. return (rval);
  1272. }
  1273. /**
  1274. * qla2x00_init_response_q_entries() - Initializes response queue entries.
  1275. * @ha: HA context
  1276. *
  1277. * Beginning of request ring has initialization control block already built
  1278. * by nvram config routine.
  1279. *
  1280. * Returns 0 on success.
  1281. */
  1282. void
  1283. qla2x00_init_response_q_entries(struct rsp_que *rsp)
  1284. {
  1285. uint16_t cnt;
  1286. response_t *pkt;
  1287. rsp->ring_ptr = rsp->ring;
  1288. rsp->ring_index = 0;
  1289. rsp->status_srb = NULL;
  1290. pkt = rsp->ring_ptr;
  1291. for (cnt = 0; cnt < rsp->length; cnt++) {
  1292. pkt->signature = RESPONSE_PROCESSED;
  1293. pkt++;
  1294. }
  1295. }
  1296. /**
  1297. * qla2x00_update_fw_options() - Read and process firmware options.
  1298. * @ha: HA context
  1299. *
  1300. * Returns 0 on success.
  1301. */
  1302. void
  1303. qla2x00_update_fw_options(scsi_qla_host_t *vha)
  1304. {
  1305. uint16_t swing, emphasis, tx_sens, rx_sens;
  1306. struct qla_hw_data *ha = vha->hw;
  1307. memset(ha->fw_options, 0, sizeof(ha->fw_options));
  1308. qla2x00_get_fw_options(vha, ha->fw_options);
  1309. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  1310. return;
  1311. /* Serial Link options. */
  1312. DEBUG3(printk("scsi(%ld): Serial link options:\n",
  1313. vha->host_no));
  1314. DEBUG3(qla2x00_dump_buffer((uint8_t *)&ha->fw_seriallink_options,
  1315. sizeof(ha->fw_seriallink_options)));
  1316. ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
  1317. if (ha->fw_seriallink_options[3] & BIT_2) {
  1318. ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
  1319. /* 1G settings */
  1320. swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
  1321. emphasis = (ha->fw_seriallink_options[2] &
  1322. (BIT_4 | BIT_3)) >> 3;
  1323. tx_sens = ha->fw_seriallink_options[0] &
  1324. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1325. rx_sens = (ha->fw_seriallink_options[0] &
  1326. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  1327. ha->fw_options[10] = (emphasis << 14) | (swing << 8);
  1328. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  1329. if (rx_sens == 0x0)
  1330. rx_sens = 0x3;
  1331. ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
  1332. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  1333. ha->fw_options[10] |= BIT_5 |
  1334. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  1335. (tx_sens & (BIT_1 | BIT_0));
  1336. /* 2G settings */
  1337. swing = (ha->fw_seriallink_options[2] &
  1338. (BIT_7 | BIT_6 | BIT_5)) >> 5;
  1339. emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
  1340. tx_sens = ha->fw_seriallink_options[1] &
  1341. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1342. rx_sens = (ha->fw_seriallink_options[1] &
  1343. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  1344. ha->fw_options[11] = (emphasis << 14) | (swing << 8);
  1345. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  1346. if (rx_sens == 0x0)
  1347. rx_sens = 0x3;
  1348. ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
  1349. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  1350. ha->fw_options[11] |= BIT_5 |
  1351. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  1352. (tx_sens & (BIT_1 | BIT_0));
  1353. }
  1354. /* FCP2 options. */
  1355. /* Return command IOCBs without waiting for an ABTS to complete. */
  1356. ha->fw_options[3] |= BIT_13;
  1357. /* LED scheme. */
  1358. if (ha->flags.enable_led_scheme)
  1359. ha->fw_options[2] |= BIT_12;
  1360. /* Detect ISP6312. */
  1361. if (IS_QLA6312(ha))
  1362. ha->fw_options[2] |= BIT_13;
  1363. /* Update firmware options. */
  1364. qla2x00_set_fw_options(vha, ha->fw_options);
  1365. }
  1366. void
  1367. qla24xx_update_fw_options(scsi_qla_host_t *vha)
  1368. {
  1369. int rval;
  1370. struct qla_hw_data *ha = vha->hw;
  1371. if (IS_QLA82XX(ha))
  1372. return;
  1373. /* Update Serial Link options. */
  1374. if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
  1375. return;
  1376. rval = qla2x00_set_serdes_params(vha,
  1377. le16_to_cpu(ha->fw_seriallink_options24[1]),
  1378. le16_to_cpu(ha->fw_seriallink_options24[2]),
  1379. le16_to_cpu(ha->fw_seriallink_options24[3]));
  1380. if (rval != QLA_SUCCESS) {
  1381. qla_printk(KERN_WARNING, ha,
  1382. "Unable to update Serial Link options (%x).\n", rval);
  1383. }
  1384. }
  1385. void
  1386. qla2x00_config_rings(struct scsi_qla_host *vha)
  1387. {
  1388. struct qla_hw_data *ha = vha->hw;
  1389. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1390. struct req_que *req = ha->req_q_map[0];
  1391. struct rsp_que *rsp = ha->rsp_q_map[0];
  1392. /* Setup ring parameters in initialization control block. */
  1393. ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0);
  1394. ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0);
  1395. ha->init_cb->request_q_length = cpu_to_le16(req->length);
  1396. ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
  1397. ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
  1398. ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
  1399. ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
  1400. ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
  1401. WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
  1402. WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
  1403. WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
  1404. WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
  1405. RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
  1406. }
  1407. void
  1408. qla24xx_config_rings(struct scsi_qla_host *vha)
  1409. {
  1410. struct qla_hw_data *ha = vha->hw;
  1411. device_reg_t __iomem *reg = ISP_QUE_REG(ha, 0);
  1412. struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp;
  1413. struct qla_msix_entry *msix;
  1414. struct init_cb_24xx *icb;
  1415. uint16_t rid = 0;
  1416. struct req_que *req = ha->req_q_map[0];
  1417. struct rsp_que *rsp = ha->rsp_q_map[0];
  1418. /* Setup ring parameters in initialization control block. */
  1419. icb = (struct init_cb_24xx *)ha->init_cb;
  1420. icb->request_q_outpointer = __constant_cpu_to_le16(0);
  1421. icb->response_q_inpointer = __constant_cpu_to_le16(0);
  1422. icb->request_q_length = cpu_to_le16(req->length);
  1423. icb->response_q_length = cpu_to_le16(rsp->length);
  1424. icb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
  1425. icb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
  1426. icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
  1427. icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
  1428. if (ha->mqenable) {
  1429. icb->qos = __constant_cpu_to_le16(QLA_DEFAULT_QUE_QOS);
  1430. icb->rid = __constant_cpu_to_le16(rid);
  1431. if (ha->flags.msix_enabled) {
  1432. msix = &ha->msix_entries[1];
  1433. DEBUG2_17(printk(KERN_INFO
  1434. "Registering vector 0x%x for base que\n", msix->entry));
  1435. icb->msix = cpu_to_le16(msix->entry);
  1436. }
  1437. /* Use alternate PCI bus number */
  1438. if (MSB(rid))
  1439. icb->firmware_options_2 |=
  1440. __constant_cpu_to_le32(BIT_19);
  1441. /* Use alternate PCI devfn */
  1442. if (LSB(rid))
  1443. icb->firmware_options_2 |=
  1444. __constant_cpu_to_le32(BIT_18);
  1445. /* Use Disable MSIX Handshake mode for capable adapters */
  1446. if (IS_MSIX_NACK_CAPABLE(ha)) {
  1447. icb->firmware_options_2 &=
  1448. __constant_cpu_to_le32(~BIT_22);
  1449. ha->flags.disable_msix_handshake = 1;
  1450. qla_printk(KERN_INFO, ha,
  1451. "MSIX Handshake Disable Mode turned on\n");
  1452. } else {
  1453. icb->firmware_options_2 |=
  1454. __constant_cpu_to_le32(BIT_22);
  1455. }
  1456. icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_23);
  1457. WRT_REG_DWORD(&reg->isp25mq.req_q_in, 0);
  1458. WRT_REG_DWORD(&reg->isp25mq.req_q_out, 0);
  1459. WRT_REG_DWORD(&reg->isp25mq.rsp_q_in, 0);
  1460. WRT_REG_DWORD(&reg->isp25mq.rsp_q_out, 0);
  1461. } else {
  1462. WRT_REG_DWORD(&reg->isp24.req_q_in, 0);
  1463. WRT_REG_DWORD(&reg->isp24.req_q_out, 0);
  1464. WRT_REG_DWORD(&reg->isp24.rsp_q_in, 0);
  1465. WRT_REG_DWORD(&reg->isp24.rsp_q_out, 0);
  1466. }
  1467. /* PCI posting */
  1468. RD_REG_DWORD(&ioreg->hccr);
  1469. }
  1470. /**
  1471. * qla2x00_init_rings() - Initializes firmware.
  1472. * @ha: HA context
  1473. *
  1474. * Beginning of request ring has initialization control block already built
  1475. * by nvram config routine.
  1476. *
  1477. * Returns 0 on success.
  1478. */
  1479. static int
  1480. qla2x00_init_rings(scsi_qla_host_t *vha)
  1481. {
  1482. int rval;
  1483. unsigned long flags = 0;
  1484. int cnt, que;
  1485. struct qla_hw_data *ha = vha->hw;
  1486. struct req_que *req;
  1487. struct rsp_que *rsp;
  1488. struct scsi_qla_host *vp;
  1489. struct mid_init_cb_24xx *mid_init_cb =
  1490. (struct mid_init_cb_24xx *) ha->init_cb;
  1491. spin_lock_irqsave(&ha->hardware_lock, flags);
  1492. /* Clear outstanding commands array. */
  1493. for (que = 0; que < ha->max_req_queues; que++) {
  1494. req = ha->req_q_map[que];
  1495. if (!req)
  1496. continue;
  1497. for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++)
  1498. req->outstanding_cmds[cnt] = NULL;
  1499. req->current_outstanding_cmd = 1;
  1500. /* Initialize firmware. */
  1501. req->ring_ptr = req->ring;
  1502. req->ring_index = 0;
  1503. req->cnt = req->length;
  1504. }
  1505. for (que = 0; que < ha->max_rsp_queues; que++) {
  1506. rsp = ha->rsp_q_map[que];
  1507. if (!rsp)
  1508. continue;
  1509. /* Initialize response queue entries */
  1510. qla2x00_init_response_q_entries(rsp);
  1511. }
  1512. /* Clear RSCN queue. */
  1513. list_for_each_entry(vp, &ha->vp_list, list) {
  1514. vp->rscn_in_ptr = 0;
  1515. vp->rscn_out_ptr = 0;
  1516. }
  1517. ha->isp_ops->config_rings(vha);
  1518. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1519. /* Update any ISP specific firmware options before initialization. */
  1520. ha->isp_ops->update_fw_options(vha);
  1521. DEBUG(printk("scsi(%ld): Issue init firmware.\n", vha->host_no));
  1522. if (ha->flags.npiv_supported) {
  1523. if (ha->operating_mode == LOOP)
  1524. ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1;
  1525. mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
  1526. }
  1527. if (IS_FWI2_CAPABLE(ha)) {
  1528. mid_init_cb->options = __constant_cpu_to_le16(BIT_1);
  1529. mid_init_cb->init_cb.execution_throttle =
  1530. cpu_to_le16(ha->fw_xcb_count);
  1531. }
  1532. rval = qla2x00_init_firmware(vha, ha->init_cb_size);
  1533. if (rval) {
  1534. DEBUG2_3(printk("scsi(%ld): Init firmware **** FAILED ****.\n",
  1535. vha->host_no));
  1536. } else {
  1537. DEBUG3(printk("scsi(%ld): Init firmware -- success.\n",
  1538. vha->host_no));
  1539. }
  1540. return (rval);
  1541. }
  1542. /**
  1543. * qla2x00_fw_ready() - Waits for firmware ready.
  1544. * @ha: HA context
  1545. *
  1546. * Returns 0 on success.
  1547. */
  1548. static int
  1549. qla2x00_fw_ready(scsi_qla_host_t *vha)
  1550. {
  1551. int rval;
  1552. unsigned long wtime, mtime, cs84xx_time;
  1553. uint16_t min_wait; /* Minimum wait time if loop is down */
  1554. uint16_t wait_time; /* Wait time if loop is coming ready */
  1555. uint16_t state[5];
  1556. struct qla_hw_data *ha = vha->hw;
  1557. rval = QLA_SUCCESS;
  1558. /* 20 seconds for loop down. */
  1559. min_wait = 20;
  1560. /*
  1561. * Firmware should take at most one RATOV to login, plus 5 seconds for
  1562. * our own processing.
  1563. */
  1564. if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
  1565. wait_time = min_wait;
  1566. }
  1567. /* Min wait time if loop down */
  1568. mtime = jiffies + (min_wait * HZ);
  1569. /* wait time before firmware ready */
  1570. wtime = jiffies + (wait_time * HZ);
  1571. /* Wait for ISP to finish LIP */
  1572. if (!vha->flags.init_done)
  1573. qla_printk(KERN_INFO, ha, "Waiting for LIP to complete...\n");
  1574. DEBUG3(printk("scsi(%ld): Waiting for LIP to complete...\n",
  1575. vha->host_no));
  1576. do {
  1577. rval = qla2x00_get_firmware_state(vha, state);
  1578. if (rval == QLA_SUCCESS) {
  1579. if (state[0] < FSTATE_LOSS_OF_SYNC) {
  1580. vha->device_flags &= ~DFLG_NO_CABLE;
  1581. }
  1582. if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
  1583. DEBUG16(printk("scsi(%ld): fw_state=%x "
  1584. "84xx=%x.\n", vha->host_no, state[0],
  1585. state[2]));
  1586. if ((state[2] & FSTATE_LOGGED_IN) &&
  1587. (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
  1588. DEBUG16(printk("scsi(%ld): Sending "
  1589. "verify iocb.\n", vha->host_no));
  1590. cs84xx_time = jiffies;
  1591. rval = qla84xx_init_chip(vha);
  1592. if (rval != QLA_SUCCESS)
  1593. break;
  1594. /* Add time taken to initialize. */
  1595. cs84xx_time = jiffies - cs84xx_time;
  1596. wtime += cs84xx_time;
  1597. mtime += cs84xx_time;
  1598. DEBUG16(printk("scsi(%ld): Increasing "
  1599. "wait time by %ld. New time %ld\n",
  1600. vha->host_no, cs84xx_time, wtime));
  1601. }
  1602. } else if (state[0] == FSTATE_READY) {
  1603. DEBUG(printk("scsi(%ld): F/W Ready - OK \n",
  1604. vha->host_no));
  1605. qla2x00_get_retry_cnt(vha, &ha->retry_count,
  1606. &ha->login_timeout, &ha->r_a_tov);
  1607. rval = QLA_SUCCESS;
  1608. break;
  1609. }
  1610. rval = QLA_FUNCTION_FAILED;
  1611. if (atomic_read(&vha->loop_down_timer) &&
  1612. state[0] != FSTATE_READY) {
  1613. /* Loop down. Timeout on min_wait for states
  1614. * other than Wait for Login.
  1615. */
  1616. if (time_after_eq(jiffies, mtime)) {
  1617. qla_printk(KERN_INFO, ha,
  1618. "Cable is unplugged...\n");
  1619. vha->device_flags |= DFLG_NO_CABLE;
  1620. break;
  1621. }
  1622. }
  1623. } else {
  1624. /* Mailbox cmd failed. Timeout on min_wait. */
  1625. if (time_after_eq(jiffies, mtime) ||
  1626. (IS_QLA82XX(ha) && ha->flags.fw_hung))
  1627. break;
  1628. }
  1629. if (time_after_eq(jiffies, wtime))
  1630. break;
  1631. /* Delay for a while */
  1632. msleep(500);
  1633. DEBUG3(printk("scsi(%ld): fw_state=%x curr time=%lx.\n",
  1634. vha->host_no, state[0], jiffies));
  1635. } while (1);
  1636. DEBUG(printk("scsi(%ld): fw_state=%x (%x, %x, %x, %x) curr time=%lx.\n",
  1637. vha->host_no, state[0], state[1], state[2], state[3], state[4],
  1638. jiffies));
  1639. if (rval) {
  1640. DEBUG2_3(printk("scsi(%ld): Firmware ready **** FAILED ****.\n",
  1641. vha->host_no));
  1642. }
  1643. return (rval);
  1644. }
  1645. /*
  1646. * qla2x00_configure_hba
  1647. * Setup adapter context.
  1648. *
  1649. * Input:
  1650. * ha = adapter state pointer.
  1651. *
  1652. * Returns:
  1653. * 0 = success
  1654. *
  1655. * Context:
  1656. * Kernel context.
  1657. */
  1658. static int
  1659. qla2x00_configure_hba(scsi_qla_host_t *vha)
  1660. {
  1661. int rval;
  1662. uint16_t loop_id;
  1663. uint16_t topo;
  1664. uint16_t sw_cap;
  1665. uint8_t al_pa;
  1666. uint8_t area;
  1667. uint8_t domain;
  1668. char connect_type[22];
  1669. struct qla_hw_data *ha = vha->hw;
  1670. /* Get host addresses. */
  1671. rval = qla2x00_get_adapter_id(vha,
  1672. &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
  1673. if (rval != QLA_SUCCESS) {
  1674. if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) ||
  1675. (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
  1676. DEBUG2(printk("%s(%ld) Loop is in a transition state\n",
  1677. __func__, vha->host_no));
  1678. } else {
  1679. qla_printk(KERN_WARNING, ha,
  1680. "ERROR -- Unable to get host loop ID.\n");
  1681. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  1682. }
  1683. return (rval);
  1684. }
  1685. if (topo == 4) {
  1686. qla_printk(KERN_INFO, ha,
  1687. "Cannot get topology - retrying.\n");
  1688. return (QLA_FUNCTION_FAILED);
  1689. }
  1690. vha->loop_id = loop_id;
  1691. /* initialize */
  1692. ha->min_external_loopid = SNS_FIRST_LOOP_ID;
  1693. ha->operating_mode = LOOP;
  1694. ha->switch_cap = 0;
  1695. switch (topo) {
  1696. case 0:
  1697. DEBUG3(printk("scsi(%ld): HBA in NL topology.\n",
  1698. vha->host_no));
  1699. ha->current_topology = ISP_CFG_NL;
  1700. strcpy(connect_type, "(Loop)");
  1701. break;
  1702. case 1:
  1703. DEBUG3(printk("scsi(%ld): HBA in FL topology.\n",
  1704. vha->host_no));
  1705. ha->switch_cap = sw_cap;
  1706. ha->current_topology = ISP_CFG_FL;
  1707. strcpy(connect_type, "(FL_Port)");
  1708. break;
  1709. case 2:
  1710. DEBUG3(printk("scsi(%ld): HBA in N P2P topology.\n",
  1711. vha->host_no));
  1712. ha->operating_mode = P2P;
  1713. ha->current_topology = ISP_CFG_N;
  1714. strcpy(connect_type, "(N_Port-to-N_Port)");
  1715. break;
  1716. case 3:
  1717. DEBUG3(printk("scsi(%ld): HBA in F P2P topology.\n",
  1718. vha->host_no));
  1719. ha->switch_cap = sw_cap;
  1720. ha->operating_mode = P2P;
  1721. ha->current_topology = ISP_CFG_F;
  1722. strcpy(connect_type, "(F_Port)");
  1723. break;
  1724. default:
  1725. DEBUG3(printk("scsi(%ld): HBA in unknown topology %x. "
  1726. "Using NL.\n",
  1727. vha->host_no, topo));
  1728. ha->current_topology = ISP_CFG_NL;
  1729. strcpy(connect_type, "(Loop)");
  1730. break;
  1731. }
  1732. /* Save Host port and loop ID. */
  1733. /* byte order - Big Endian */
  1734. vha->d_id.b.domain = domain;
  1735. vha->d_id.b.area = area;
  1736. vha->d_id.b.al_pa = al_pa;
  1737. if (!vha->flags.init_done)
  1738. qla_printk(KERN_INFO, ha,
  1739. "Topology - %s, Host Loop address 0x%x\n",
  1740. connect_type, vha->loop_id);
  1741. if (rval) {
  1742. DEBUG2_3(printk("scsi(%ld): FAILED.\n", vha->host_no));
  1743. } else {
  1744. DEBUG3(printk("scsi(%ld): exiting normally.\n", vha->host_no));
  1745. }
  1746. return(rval);
  1747. }
  1748. inline void
  1749. qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len,
  1750. char *def)
  1751. {
  1752. char *st, *en;
  1753. uint16_t index;
  1754. struct qla_hw_data *ha = vha->hw;
  1755. int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) &&
  1756. !IS_QLA8XXX_TYPE(ha);
  1757. if (memcmp(model, BINZERO, len) != 0) {
  1758. strncpy(ha->model_number, model, len);
  1759. st = en = ha->model_number;
  1760. en += len - 1;
  1761. while (en > st) {
  1762. if (*en != 0x20 && *en != 0x00)
  1763. break;
  1764. *en-- = '\0';
  1765. }
  1766. index = (ha->pdev->subsystem_device & 0xff);
  1767. if (use_tbl &&
  1768. ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1769. index < QLA_MODEL_NAMES)
  1770. strncpy(ha->model_desc,
  1771. qla2x00_model_name[index * 2 + 1],
  1772. sizeof(ha->model_desc) - 1);
  1773. } else {
  1774. index = (ha->pdev->subsystem_device & 0xff);
  1775. if (use_tbl &&
  1776. ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1777. index < QLA_MODEL_NAMES) {
  1778. strcpy(ha->model_number,
  1779. qla2x00_model_name[index * 2]);
  1780. strncpy(ha->model_desc,
  1781. qla2x00_model_name[index * 2 + 1],
  1782. sizeof(ha->model_desc) - 1);
  1783. } else {
  1784. strcpy(ha->model_number, def);
  1785. }
  1786. }
  1787. if (IS_FWI2_CAPABLE(ha))
  1788. qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc,
  1789. sizeof(ha->model_desc));
  1790. }
  1791. /* On sparc systems, obtain port and node WWN from firmware
  1792. * properties.
  1793. */
  1794. static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv)
  1795. {
  1796. #ifdef CONFIG_SPARC
  1797. struct qla_hw_data *ha = vha->hw;
  1798. struct pci_dev *pdev = ha->pdev;
  1799. struct device_node *dp = pci_device_to_OF_node(pdev);
  1800. const u8 *val;
  1801. int len;
  1802. val = of_get_property(dp, "port-wwn", &len);
  1803. if (val && len >= WWN_SIZE)
  1804. memcpy(nv->port_name, val, WWN_SIZE);
  1805. val = of_get_property(dp, "node-wwn", &len);
  1806. if (val && len >= WWN_SIZE)
  1807. memcpy(nv->node_name, val, WWN_SIZE);
  1808. #endif
  1809. }
  1810. /*
  1811. * NVRAM configuration for ISP 2xxx
  1812. *
  1813. * Input:
  1814. * ha = adapter block pointer.
  1815. *
  1816. * Output:
  1817. * initialization control block in response_ring
  1818. * host adapters parameters in host adapter block
  1819. *
  1820. * Returns:
  1821. * 0 = success.
  1822. */
  1823. int
  1824. qla2x00_nvram_config(scsi_qla_host_t *vha)
  1825. {
  1826. int rval;
  1827. uint8_t chksum = 0;
  1828. uint16_t cnt;
  1829. uint8_t *dptr1, *dptr2;
  1830. struct qla_hw_data *ha = vha->hw;
  1831. init_cb_t *icb = ha->init_cb;
  1832. nvram_t *nv = ha->nvram;
  1833. uint8_t *ptr = ha->nvram;
  1834. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1835. rval = QLA_SUCCESS;
  1836. /* Determine NVRAM starting address. */
  1837. ha->nvram_size = sizeof(nvram_t);
  1838. ha->nvram_base = 0;
  1839. if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
  1840. if ((RD_REG_WORD(&reg->ctrl_status) >> 14) == 1)
  1841. ha->nvram_base = 0x80;
  1842. /* Get NVRAM data and calculate checksum. */
  1843. ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size);
  1844. for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
  1845. chksum += *ptr++;
  1846. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  1847. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  1848. /* Bad NVRAM data, set defaults parameters. */
  1849. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' ||
  1850. nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) {
  1851. /* Reset NVRAM data. */
  1852. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  1853. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  1854. nv->nvram_version);
  1855. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  1856. "invalid -- WWPN) defaults.\n");
  1857. /*
  1858. * Set default initialization control block.
  1859. */
  1860. memset(nv, 0, ha->nvram_size);
  1861. nv->parameter_block_version = ICB_VERSION;
  1862. if (IS_QLA23XX(ha)) {
  1863. nv->firmware_options[0] = BIT_2 | BIT_1;
  1864. nv->firmware_options[1] = BIT_7 | BIT_5;
  1865. nv->add_firmware_options[0] = BIT_5;
  1866. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1867. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1868. nv->special_options[1] = BIT_7;
  1869. } else if (IS_QLA2200(ha)) {
  1870. nv->firmware_options[0] = BIT_2 | BIT_1;
  1871. nv->firmware_options[1] = BIT_7 | BIT_5;
  1872. nv->add_firmware_options[0] = BIT_5;
  1873. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1874. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1875. } else if (IS_QLA2100(ha)) {
  1876. nv->firmware_options[0] = BIT_3 | BIT_1;
  1877. nv->firmware_options[1] = BIT_5;
  1878. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1879. }
  1880. nv->max_iocb_allocation = __constant_cpu_to_le16(256);
  1881. nv->execution_throttle = __constant_cpu_to_le16(16);
  1882. nv->retry_count = 8;
  1883. nv->retry_delay = 1;
  1884. nv->port_name[0] = 33;
  1885. nv->port_name[3] = 224;
  1886. nv->port_name[4] = 139;
  1887. qla2xxx_nvram_wwn_from_ofw(vha, nv);
  1888. nv->login_timeout = 4;
  1889. /*
  1890. * Set default host adapter parameters
  1891. */
  1892. nv->host_p[1] = BIT_2;
  1893. nv->reset_delay = 5;
  1894. nv->port_down_retry_count = 8;
  1895. nv->max_luns_per_target = __constant_cpu_to_le16(8);
  1896. nv->link_down_timeout = 60;
  1897. rval = 1;
  1898. }
  1899. #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
  1900. /*
  1901. * The SN2 does not provide BIOS emulation which means you can't change
  1902. * potentially bogus BIOS settings. Force the use of default settings
  1903. * for link rate and frame size. Hope that the rest of the settings
  1904. * are valid.
  1905. */
  1906. if (ia64_platform_is("sn2")) {
  1907. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1908. if (IS_QLA23XX(ha))
  1909. nv->special_options[1] = BIT_7;
  1910. }
  1911. #endif
  1912. /* Reset Initialization control block */
  1913. memset(icb, 0, ha->init_cb_size);
  1914. /*
  1915. * Setup driver NVRAM options.
  1916. */
  1917. nv->firmware_options[0] |= (BIT_6 | BIT_1);
  1918. nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
  1919. nv->firmware_options[1] |= (BIT_5 | BIT_0);
  1920. nv->firmware_options[1] &= ~BIT_4;
  1921. if (IS_QLA23XX(ha)) {
  1922. nv->firmware_options[0] |= BIT_2;
  1923. nv->firmware_options[0] &= ~BIT_3;
  1924. nv->firmware_options[0] &= ~BIT_6;
  1925. nv->add_firmware_options[1] |= BIT_5 | BIT_4;
  1926. if (IS_QLA2300(ha)) {
  1927. if (ha->fb_rev == FPM_2310) {
  1928. strcpy(ha->model_number, "QLA2310");
  1929. } else {
  1930. strcpy(ha->model_number, "QLA2300");
  1931. }
  1932. } else {
  1933. qla2x00_set_model_info(vha, nv->model_number,
  1934. sizeof(nv->model_number), "QLA23xx");
  1935. }
  1936. } else if (IS_QLA2200(ha)) {
  1937. nv->firmware_options[0] |= BIT_2;
  1938. /*
  1939. * 'Point-to-point preferred, else loop' is not a safe
  1940. * connection mode setting.
  1941. */
  1942. if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
  1943. (BIT_5 | BIT_4)) {
  1944. /* Force 'loop preferred, else point-to-point'. */
  1945. nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
  1946. nv->add_firmware_options[0] |= BIT_5;
  1947. }
  1948. strcpy(ha->model_number, "QLA22xx");
  1949. } else /*if (IS_QLA2100(ha))*/ {
  1950. strcpy(ha->model_number, "QLA2100");
  1951. }
  1952. /*
  1953. * Copy over NVRAM RISC parameter block to initialization control block.
  1954. */
  1955. dptr1 = (uint8_t *)icb;
  1956. dptr2 = (uint8_t *)&nv->parameter_block_version;
  1957. cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
  1958. while (cnt--)
  1959. *dptr1++ = *dptr2++;
  1960. /* Copy 2nd half. */
  1961. dptr1 = (uint8_t *)icb->add_firmware_options;
  1962. cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
  1963. while (cnt--)
  1964. *dptr1++ = *dptr2++;
  1965. /* Use alternate WWN? */
  1966. if (nv->host_p[1] & BIT_7) {
  1967. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  1968. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  1969. }
  1970. /* Prepare nodename */
  1971. if ((icb->firmware_options[1] & BIT_6) == 0) {
  1972. /*
  1973. * Firmware will apply the following mask if the nodename was
  1974. * not provided.
  1975. */
  1976. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  1977. icb->node_name[0] &= 0xF0;
  1978. }
  1979. /*
  1980. * Set host adapter parameters.
  1981. */
  1982. if (nv->host_p[0] & BIT_7)
  1983. ql2xextended_error_logging = 1;
  1984. ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
  1985. /* Always load RISC code on non ISP2[12]00 chips. */
  1986. if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
  1987. ha->flags.disable_risc_code_load = 0;
  1988. ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
  1989. ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
  1990. ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
  1991. ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
  1992. ha->flags.disable_serdes = 0;
  1993. ha->operating_mode =
  1994. (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
  1995. memcpy(ha->fw_seriallink_options, nv->seriallink_options,
  1996. sizeof(ha->fw_seriallink_options));
  1997. /* save HBA serial number */
  1998. ha->serial0 = icb->port_name[5];
  1999. ha->serial1 = icb->port_name[6];
  2000. ha->serial2 = icb->port_name[7];
  2001. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  2002. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  2003. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  2004. ha->retry_count = nv->retry_count;
  2005. /* Set minimum login_timeout to 4 seconds. */
  2006. if (nv->login_timeout != ql2xlogintimeout)
  2007. nv->login_timeout = ql2xlogintimeout;
  2008. if (nv->login_timeout < 4)
  2009. nv->login_timeout = 4;
  2010. ha->login_timeout = nv->login_timeout;
  2011. icb->login_timeout = nv->login_timeout;
  2012. /* Set minimum RATOV to 100 tenths of a second. */
  2013. ha->r_a_tov = 100;
  2014. ha->loop_reset_delay = nv->reset_delay;
  2015. /* Link Down Timeout = 0:
  2016. *
  2017. * When Port Down timer expires we will start returning
  2018. * I/O's to OS with "DID_NO_CONNECT".
  2019. *
  2020. * Link Down Timeout != 0:
  2021. *
  2022. * The driver waits for the link to come up after link down
  2023. * before returning I/Os to OS with "DID_NO_CONNECT".
  2024. */
  2025. if (nv->link_down_timeout == 0) {
  2026. ha->loop_down_abort_time =
  2027. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  2028. } else {
  2029. ha->link_down_timeout = nv->link_down_timeout;
  2030. ha->loop_down_abort_time =
  2031. (LOOP_DOWN_TIME - ha->link_down_timeout);
  2032. }
  2033. /*
  2034. * Need enough time to try and get the port back.
  2035. */
  2036. ha->port_down_retry_count = nv->port_down_retry_count;
  2037. if (qlport_down_retry)
  2038. ha->port_down_retry_count = qlport_down_retry;
  2039. /* Set login_retry_count */
  2040. ha->login_retry_count = nv->retry_count;
  2041. if (ha->port_down_retry_count == nv->port_down_retry_count &&
  2042. ha->port_down_retry_count > 3)
  2043. ha->login_retry_count = ha->port_down_retry_count;
  2044. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  2045. ha->login_retry_count = ha->port_down_retry_count;
  2046. if (ql2xloginretrycount)
  2047. ha->login_retry_count = ql2xloginretrycount;
  2048. icb->lun_enables = __constant_cpu_to_le16(0);
  2049. icb->command_resource_count = 0;
  2050. icb->immediate_notify_resource_count = 0;
  2051. icb->timeout = __constant_cpu_to_le16(0);
  2052. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  2053. /* Enable RIO */
  2054. icb->firmware_options[0] &= ~BIT_3;
  2055. icb->add_firmware_options[0] &=
  2056. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  2057. icb->add_firmware_options[0] |= BIT_2;
  2058. icb->response_accumulation_timer = 3;
  2059. icb->interrupt_delay_timer = 5;
  2060. vha->flags.process_response_queue = 1;
  2061. } else {
  2062. /* Enable ZIO. */
  2063. if (!vha->flags.init_done) {
  2064. ha->zio_mode = icb->add_firmware_options[0] &
  2065. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  2066. ha->zio_timer = icb->interrupt_delay_timer ?
  2067. icb->interrupt_delay_timer: 2;
  2068. }
  2069. icb->add_firmware_options[0] &=
  2070. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  2071. vha->flags.process_response_queue = 0;
  2072. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  2073. ha->zio_mode = QLA_ZIO_MODE_6;
  2074. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer "
  2075. "delay (%d us).\n", vha->host_no, ha->zio_mode,
  2076. ha->zio_timer * 100));
  2077. qla_printk(KERN_INFO, ha,
  2078. "ZIO mode %d enabled; timer delay (%d us).\n",
  2079. ha->zio_mode, ha->zio_timer * 100);
  2080. icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
  2081. icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
  2082. vha->flags.process_response_queue = 1;
  2083. }
  2084. }
  2085. if (rval) {
  2086. DEBUG2_3(printk(KERN_WARNING
  2087. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  2088. }
  2089. return (rval);
  2090. }
  2091. static void
  2092. qla2x00_rport_del(void *data)
  2093. {
  2094. fc_port_t *fcport = data;
  2095. struct fc_rport *rport;
  2096. spin_lock_irq(fcport->vha->host->host_lock);
  2097. rport = fcport->drport ? fcport->drport: fcport->rport;
  2098. fcport->drport = NULL;
  2099. spin_unlock_irq(fcport->vha->host->host_lock);
  2100. if (rport)
  2101. fc_remote_port_delete(rport);
  2102. }
  2103. /**
  2104. * qla2x00_alloc_fcport() - Allocate a generic fcport.
  2105. * @ha: HA context
  2106. * @flags: allocation flags
  2107. *
  2108. * Returns a pointer to the allocated fcport, or NULL, if none available.
  2109. */
  2110. fc_port_t *
  2111. qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
  2112. {
  2113. fc_port_t *fcport;
  2114. fcport = kzalloc(sizeof(fc_port_t), flags);
  2115. if (!fcport)
  2116. return NULL;
  2117. /* Setup fcport template structure. */
  2118. fcport->vha = vha;
  2119. fcport->vp_idx = vha->vp_idx;
  2120. fcport->port_type = FCT_UNKNOWN;
  2121. fcport->loop_id = FC_NO_LOOP_ID;
  2122. atomic_set(&fcport->state, FCS_UNCONFIGURED);
  2123. fcport->supported_classes = FC_COS_UNSPECIFIED;
  2124. return fcport;
  2125. }
  2126. /*
  2127. * qla2x00_configure_loop
  2128. * Updates Fibre Channel Device Database with what is actually on loop.
  2129. *
  2130. * Input:
  2131. * ha = adapter block pointer.
  2132. *
  2133. * Returns:
  2134. * 0 = success.
  2135. * 1 = error.
  2136. * 2 = database was full and device was not configured.
  2137. */
  2138. static int
  2139. qla2x00_configure_loop(scsi_qla_host_t *vha)
  2140. {
  2141. int rval;
  2142. unsigned long flags, save_flags;
  2143. struct qla_hw_data *ha = vha->hw;
  2144. rval = QLA_SUCCESS;
  2145. /* Get Initiator ID */
  2146. if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) {
  2147. rval = qla2x00_configure_hba(vha);
  2148. if (rval != QLA_SUCCESS) {
  2149. DEBUG(printk("scsi(%ld): Unable to configure HBA.\n",
  2150. vha->host_no));
  2151. return (rval);
  2152. }
  2153. }
  2154. save_flags = flags = vha->dpc_flags;
  2155. DEBUG(printk("scsi(%ld): Configure loop -- dpc flags =0x%lx\n",
  2156. vha->host_no, flags));
  2157. /*
  2158. * If we have both an RSCN and PORT UPDATE pending then handle them
  2159. * both at the same time.
  2160. */
  2161. clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  2162. clear_bit(RSCN_UPDATE, &vha->dpc_flags);
  2163. qla2x00_get_data_rate(vha);
  2164. /* Determine what we need to do */
  2165. if (ha->current_topology == ISP_CFG_FL &&
  2166. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  2167. vha->flags.rscn_queue_overflow = 1;
  2168. set_bit(RSCN_UPDATE, &flags);
  2169. } else if (ha->current_topology == ISP_CFG_F &&
  2170. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  2171. vha->flags.rscn_queue_overflow = 1;
  2172. set_bit(RSCN_UPDATE, &flags);
  2173. clear_bit(LOCAL_LOOP_UPDATE, &flags);
  2174. } else if (ha->current_topology == ISP_CFG_N) {
  2175. clear_bit(RSCN_UPDATE, &flags);
  2176. } else if (!vha->flags.online ||
  2177. (test_bit(ABORT_ISP_ACTIVE, &flags))) {
  2178. vha->flags.rscn_queue_overflow = 1;
  2179. set_bit(RSCN_UPDATE, &flags);
  2180. set_bit(LOCAL_LOOP_UPDATE, &flags);
  2181. }
  2182. if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
  2183. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2184. rval = QLA_FUNCTION_FAILED;
  2185. else
  2186. rval = qla2x00_configure_local_loop(vha);
  2187. }
  2188. if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
  2189. if (LOOP_TRANSITION(vha))
  2190. rval = QLA_FUNCTION_FAILED;
  2191. else
  2192. rval = qla2x00_configure_fabric(vha);
  2193. }
  2194. if (rval == QLA_SUCCESS) {
  2195. if (atomic_read(&vha->loop_down_timer) ||
  2196. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
  2197. rval = QLA_FUNCTION_FAILED;
  2198. } else {
  2199. atomic_set(&vha->loop_state, LOOP_READY);
  2200. DEBUG(printk("scsi(%ld): LOOP READY\n", vha->host_no));
  2201. }
  2202. }
  2203. if (rval) {
  2204. DEBUG2_3(printk("%s(%ld): *** FAILED ***\n",
  2205. __func__, vha->host_no));
  2206. } else {
  2207. DEBUG3(printk("%s: exiting normally\n", __func__));
  2208. }
  2209. /* Restore state if a resync event occurred during processing */
  2210. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
  2211. if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
  2212. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  2213. if (test_bit(RSCN_UPDATE, &save_flags)) {
  2214. set_bit(RSCN_UPDATE, &vha->dpc_flags);
  2215. if (!IS_ALOGIO_CAPABLE(ha))
  2216. vha->flags.rscn_queue_overflow = 1;
  2217. }
  2218. }
  2219. return (rval);
  2220. }
  2221. /*
  2222. * qla2x00_configure_local_loop
  2223. * Updates Fibre Channel Device Database with local loop devices.
  2224. *
  2225. * Input:
  2226. * ha = adapter block pointer.
  2227. *
  2228. * Returns:
  2229. * 0 = success.
  2230. */
  2231. static int
  2232. qla2x00_configure_local_loop(scsi_qla_host_t *vha)
  2233. {
  2234. int rval, rval2;
  2235. int found_devs;
  2236. int found;
  2237. fc_port_t *fcport, *new_fcport;
  2238. uint16_t index;
  2239. uint16_t entries;
  2240. char *id_iter;
  2241. uint16_t loop_id;
  2242. uint8_t domain, area, al_pa;
  2243. struct qla_hw_data *ha = vha->hw;
  2244. found_devs = 0;
  2245. new_fcport = NULL;
  2246. entries = MAX_FIBRE_DEVICES;
  2247. DEBUG3(printk("scsi(%ld): Getting FCAL position map\n", vha->host_no));
  2248. DEBUG3(qla2x00_get_fcal_position_map(vha, NULL));
  2249. /* Get list of logged in devices. */
  2250. memset(ha->gid_list, 0, GID_LIST_SIZE);
  2251. rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma,
  2252. &entries);
  2253. if (rval != QLA_SUCCESS)
  2254. goto cleanup_allocation;
  2255. DEBUG3(printk("scsi(%ld): Entries in ID list (%d)\n",
  2256. vha->host_no, entries));
  2257. DEBUG3(qla2x00_dump_buffer((uint8_t *)ha->gid_list,
  2258. entries * sizeof(struct gid_list_info)));
  2259. /* Allocate temporary fcport for any new fcports discovered. */
  2260. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2261. if (new_fcport == NULL) {
  2262. rval = QLA_MEMORY_ALLOC_FAILED;
  2263. goto cleanup_allocation;
  2264. }
  2265. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  2266. /*
  2267. * Mark local devices that were present with FCF_DEVICE_LOST for now.
  2268. */
  2269. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2270. if (atomic_read(&fcport->state) == FCS_ONLINE &&
  2271. fcport->port_type != FCT_BROADCAST &&
  2272. (fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  2273. DEBUG(printk("scsi(%ld): Marking port lost, "
  2274. "loop_id=0x%04x\n",
  2275. vha->host_no, fcport->loop_id));
  2276. atomic_set(&fcport->state, FCS_DEVICE_LOST);
  2277. }
  2278. }
  2279. /* Add devices to port list. */
  2280. id_iter = (char *)ha->gid_list;
  2281. for (index = 0; index < entries; index++) {
  2282. domain = ((struct gid_list_info *)id_iter)->domain;
  2283. area = ((struct gid_list_info *)id_iter)->area;
  2284. al_pa = ((struct gid_list_info *)id_iter)->al_pa;
  2285. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  2286. loop_id = (uint16_t)
  2287. ((struct gid_list_info *)id_iter)->loop_id_2100;
  2288. else
  2289. loop_id = le16_to_cpu(
  2290. ((struct gid_list_info *)id_iter)->loop_id);
  2291. id_iter += ha->gid_list_info_size;
  2292. /* Bypass reserved domain fields. */
  2293. if ((domain & 0xf0) == 0xf0)
  2294. continue;
  2295. /* Bypass if not same domain and area of adapter. */
  2296. if (area && domain &&
  2297. (area != vha->d_id.b.area || domain != vha->d_id.b.domain))
  2298. continue;
  2299. /* Bypass invalid local loop ID. */
  2300. if (loop_id > LAST_LOCAL_LOOP_ID)
  2301. continue;
  2302. /* Fill in member data. */
  2303. new_fcport->d_id.b.domain = domain;
  2304. new_fcport->d_id.b.area = area;
  2305. new_fcport->d_id.b.al_pa = al_pa;
  2306. new_fcport->loop_id = loop_id;
  2307. new_fcport->vp_idx = vha->vp_idx;
  2308. rval2 = qla2x00_get_port_database(vha, new_fcport, 0);
  2309. if (rval2 != QLA_SUCCESS) {
  2310. DEBUG2(printk("scsi(%ld): Failed to retrieve fcport "
  2311. "information -- get_port_database=%x, "
  2312. "loop_id=0x%04x\n",
  2313. vha->host_no, rval2, new_fcport->loop_id));
  2314. DEBUG2(printk("scsi(%ld): Scheduling resync...\n",
  2315. vha->host_no));
  2316. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  2317. continue;
  2318. }
  2319. /* Check for matching device in port list. */
  2320. found = 0;
  2321. fcport = NULL;
  2322. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2323. if (memcmp(new_fcport->port_name, fcport->port_name,
  2324. WWN_SIZE))
  2325. continue;
  2326. fcport->flags &= ~FCF_FABRIC_DEVICE;
  2327. fcport->loop_id = new_fcport->loop_id;
  2328. fcport->port_type = new_fcport->port_type;
  2329. fcport->d_id.b24 = new_fcport->d_id.b24;
  2330. memcpy(fcport->node_name, new_fcport->node_name,
  2331. WWN_SIZE);
  2332. found++;
  2333. break;
  2334. }
  2335. if (!found) {
  2336. /* New device, add to fcports list. */
  2337. if (vha->vp_idx) {
  2338. new_fcport->vha = vha;
  2339. new_fcport->vp_idx = vha->vp_idx;
  2340. }
  2341. list_add_tail(&new_fcport->list, &vha->vp_fcports);
  2342. /* Allocate a new replacement fcport. */
  2343. fcport = new_fcport;
  2344. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2345. if (new_fcport == NULL) {
  2346. rval = QLA_MEMORY_ALLOC_FAILED;
  2347. goto cleanup_allocation;
  2348. }
  2349. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  2350. }
  2351. /* Base iIDMA settings on HBA port speed. */
  2352. fcport->fp_speed = ha->link_data_rate;
  2353. qla2x00_update_fcport(vha, fcport);
  2354. found_devs++;
  2355. }
  2356. cleanup_allocation:
  2357. kfree(new_fcport);
  2358. if (rval != QLA_SUCCESS) {
  2359. DEBUG2(printk("scsi(%ld): Configure local loop error exit: "
  2360. "rval=%x\n", vha->host_no, rval));
  2361. }
  2362. return (rval);
  2363. }
  2364. static void
  2365. qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
  2366. {
  2367. #define LS_UNKNOWN 2
  2368. static char *link_speeds[] = { "1", "2", "?", "4", "8", "10" };
  2369. char *link_speed;
  2370. int rval;
  2371. uint16_t mb[4];
  2372. struct qla_hw_data *ha = vha->hw;
  2373. if (!IS_IIDMA_CAPABLE(ha))
  2374. return;
  2375. if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
  2376. fcport->fp_speed > ha->link_data_rate)
  2377. return;
  2378. rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed,
  2379. mb);
  2380. if (rval != QLA_SUCCESS) {
  2381. DEBUG2(printk("scsi(%ld): Unable to adjust iIDMA "
  2382. "%02x%02x%02x%02x%02x%02x%02x%02x -- %04x %x %04x %04x.\n",
  2383. vha->host_no, fcport->port_name[0], fcport->port_name[1],
  2384. fcport->port_name[2], fcport->port_name[3],
  2385. fcport->port_name[4], fcport->port_name[5],
  2386. fcport->port_name[6], fcport->port_name[7], rval,
  2387. fcport->fp_speed, mb[0], mb[1]));
  2388. } else {
  2389. link_speed = link_speeds[LS_UNKNOWN];
  2390. if (fcport->fp_speed < 5)
  2391. link_speed = link_speeds[fcport->fp_speed];
  2392. else if (fcport->fp_speed == 0x13)
  2393. link_speed = link_speeds[5];
  2394. DEBUG2(qla_printk(KERN_INFO, ha,
  2395. "iIDMA adjusted to %s GB/s on "
  2396. "%02x%02x%02x%02x%02x%02x%02x%02x.\n",
  2397. link_speed, fcport->port_name[0],
  2398. fcport->port_name[1], fcport->port_name[2],
  2399. fcport->port_name[3], fcport->port_name[4],
  2400. fcport->port_name[5], fcport->port_name[6],
  2401. fcport->port_name[7]));
  2402. }
  2403. }
  2404. static void
  2405. qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport)
  2406. {
  2407. struct fc_rport_identifiers rport_ids;
  2408. struct fc_rport *rport;
  2409. struct qla_hw_data *ha = vha->hw;
  2410. qla2x00_rport_del(fcport);
  2411. rport_ids.node_name = wwn_to_u64(fcport->node_name);
  2412. rport_ids.port_name = wwn_to_u64(fcport->port_name);
  2413. rport_ids.port_id = fcport->d_id.b.domain << 16 |
  2414. fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
  2415. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  2416. fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids);
  2417. if (!rport) {
  2418. qla_printk(KERN_WARNING, ha,
  2419. "Unable to allocate fc remote port!\n");
  2420. return;
  2421. }
  2422. spin_lock_irq(fcport->vha->host->host_lock);
  2423. *((fc_port_t **)rport->dd_data) = fcport;
  2424. spin_unlock_irq(fcport->vha->host->host_lock);
  2425. rport->supported_classes = fcport->supported_classes;
  2426. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  2427. if (fcport->port_type == FCT_INITIATOR)
  2428. rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR;
  2429. if (fcport->port_type == FCT_TARGET)
  2430. rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET;
  2431. fc_remote_port_rolechg(rport, rport_ids.roles);
  2432. }
  2433. /*
  2434. * qla2x00_update_fcport
  2435. * Updates device on list.
  2436. *
  2437. * Input:
  2438. * ha = adapter block pointer.
  2439. * fcport = port structure pointer.
  2440. *
  2441. * Return:
  2442. * 0 - Success
  2443. * BIT_0 - error
  2444. *
  2445. * Context:
  2446. * Kernel context.
  2447. */
  2448. void
  2449. qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
  2450. {
  2451. struct qla_hw_data *ha = vha->hw;
  2452. fcport->vha = vha;
  2453. fcport->login_retry = 0;
  2454. fcport->port_login_retry_count = ha->port_down_retry_count *
  2455. PORT_RETRY_TIME;
  2456. atomic_set(&fcport->port_down_timer, ha->port_down_retry_count *
  2457. PORT_RETRY_TIME);
  2458. fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
  2459. qla2x00_iidma_fcport(vha, fcport);
  2460. atomic_set(&fcport->state, FCS_ONLINE);
  2461. qla2x00_reg_remote_port(vha, fcport);
  2462. }
  2463. /*
  2464. * qla2x00_configure_fabric
  2465. * Setup SNS devices with loop ID's.
  2466. *
  2467. * Input:
  2468. * ha = adapter block pointer.
  2469. *
  2470. * Returns:
  2471. * 0 = success.
  2472. * BIT_0 = error
  2473. */
  2474. static int
  2475. qla2x00_configure_fabric(scsi_qla_host_t *vha)
  2476. {
  2477. int rval, rval2;
  2478. fc_port_t *fcport, *fcptemp;
  2479. uint16_t next_loopid;
  2480. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2481. uint16_t loop_id;
  2482. LIST_HEAD(new_fcports);
  2483. struct qla_hw_data *ha = vha->hw;
  2484. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  2485. /* If FL port exists, then SNS is present */
  2486. if (IS_FWI2_CAPABLE(ha))
  2487. loop_id = NPH_F_PORT;
  2488. else
  2489. loop_id = SNS_FL_PORT;
  2490. rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1);
  2491. if (rval != QLA_SUCCESS) {
  2492. DEBUG2(printk("scsi(%ld): MBC_GET_PORT_NAME Failed, No FL "
  2493. "Port\n", vha->host_no));
  2494. vha->device_flags &= ~SWITCH_FOUND;
  2495. return (QLA_SUCCESS);
  2496. }
  2497. vha->device_flags |= SWITCH_FOUND;
  2498. /* Mark devices that need re-synchronization. */
  2499. rval2 = qla2x00_device_resync(vha);
  2500. if (rval2 == QLA_RSCNS_HANDLED) {
  2501. /* No point doing the scan, just continue. */
  2502. return (QLA_SUCCESS);
  2503. }
  2504. do {
  2505. /* FDMI support. */
  2506. if (ql2xfdmienable &&
  2507. test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags))
  2508. qla2x00_fdmi_register(vha);
  2509. /* Ensure we are logged into the SNS. */
  2510. if (IS_FWI2_CAPABLE(ha))
  2511. loop_id = NPH_SNS;
  2512. else
  2513. loop_id = SIMPLE_NAME_SERVER;
  2514. ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff,
  2515. 0xfc, mb, BIT_1 | BIT_0);
  2516. if (mb[0] != MBS_COMMAND_COMPLETE) {
  2517. DEBUG2(qla_printk(KERN_INFO, ha,
  2518. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  2519. "mb[2]=%x mb[6]=%x mb[7]=%x\n", loop_id,
  2520. mb[0], mb[1], mb[2], mb[6], mb[7]));
  2521. return (QLA_SUCCESS);
  2522. }
  2523. if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) {
  2524. if (qla2x00_rft_id(vha)) {
  2525. /* EMPTY */
  2526. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2527. "TYPE failed.\n", vha->host_no));
  2528. }
  2529. if (qla2x00_rff_id(vha)) {
  2530. /* EMPTY */
  2531. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2532. "Features failed.\n", vha->host_no));
  2533. }
  2534. if (qla2x00_rnn_id(vha)) {
  2535. /* EMPTY */
  2536. DEBUG2(printk("scsi(%ld): Register Node Name "
  2537. "failed.\n", vha->host_no));
  2538. } else if (qla2x00_rsnn_nn(vha)) {
  2539. /* EMPTY */
  2540. DEBUG2(printk("scsi(%ld): Register Symbolic "
  2541. "Node Name failed.\n", vha->host_no));
  2542. }
  2543. }
  2544. rval = qla2x00_find_all_fabric_devs(vha, &new_fcports);
  2545. if (rval != QLA_SUCCESS)
  2546. break;
  2547. /*
  2548. * Logout all previous fabric devices marked lost, except
  2549. * FCP2 devices.
  2550. */
  2551. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2552. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2553. break;
  2554. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)
  2555. continue;
  2556. if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) {
  2557. qla2x00_mark_device_lost(vha, fcport,
  2558. ql2xplogiabsentdevice, 0);
  2559. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2560. (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
  2561. fcport->port_type != FCT_INITIATOR &&
  2562. fcport->port_type != FCT_BROADCAST) {
  2563. ha->isp_ops->fabric_logout(vha,
  2564. fcport->loop_id,
  2565. fcport->d_id.b.domain,
  2566. fcport->d_id.b.area,
  2567. fcport->d_id.b.al_pa);
  2568. fcport->loop_id = FC_NO_LOOP_ID;
  2569. }
  2570. }
  2571. }
  2572. /* Starting free loop ID. */
  2573. next_loopid = ha->min_external_loopid;
  2574. /*
  2575. * Scan through our port list and login entries that need to be
  2576. * logged in.
  2577. */
  2578. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2579. if (atomic_read(&vha->loop_down_timer) ||
  2580. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2581. break;
  2582. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  2583. (fcport->flags & FCF_LOGIN_NEEDED) == 0)
  2584. continue;
  2585. if (fcport->loop_id == FC_NO_LOOP_ID) {
  2586. fcport->loop_id = next_loopid;
  2587. rval = qla2x00_find_new_loop_id(
  2588. base_vha, fcport);
  2589. if (rval != QLA_SUCCESS) {
  2590. /* Ran out of IDs to use */
  2591. break;
  2592. }
  2593. }
  2594. /* Login and update database */
  2595. qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
  2596. }
  2597. /* Exit if out of loop IDs. */
  2598. if (rval != QLA_SUCCESS) {
  2599. break;
  2600. }
  2601. /*
  2602. * Login and add the new devices to our port list.
  2603. */
  2604. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2605. if (atomic_read(&vha->loop_down_timer) ||
  2606. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2607. break;
  2608. /* Find a new loop ID to use. */
  2609. fcport->loop_id = next_loopid;
  2610. rval = qla2x00_find_new_loop_id(base_vha, fcport);
  2611. if (rval != QLA_SUCCESS) {
  2612. /* Ran out of IDs to use */
  2613. break;
  2614. }
  2615. /* Login and update database */
  2616. qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
  2617. if (vha->vp_idx) {
  2618. fcport->vha = vha;
  2619. fcport->vp_idx = vha->vp_idx;
  2620. }
  2621. list_move_tail(&fcport->list, &vha->vp_fcports);
  2622. }
  2623. } while (0);
  2624. /* Free all new device structures not processed. */
  2625. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2626. list_del(&fcport->list);
  2627. kfree(fcport);
  2628. }
  2629. if (rval) {
  2630. DEBUG2(printk("scsi(%ld): Configure fabric error exit: "
  2631. "rval=%d\n", vha->host_no, rval));
  2632. }
  2633. return (rval);
  2634. }
  2635. /*
  2636. * qla2x00_find_all_fabric_devs
  2637. *
  2638. * Input:
  2639. * ha = adapter block pointer.
  2640. * dev = database device entry pointer.
  2641. *
  2642. * Returns:
  2643. * 0 = success.
  2644. *
  2645. * Context:
  2646. * Kernel context.
  2647. */
  2648. static int
  2649. qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha,
  2650. struct list_head *new_fcports)
  2651. {
  2652. int rval;
  2653. uint16_t loop_id;
  2654. fc_port_t *fcport, *new_fcport, *fcptemp;
  2655. int found;
  2656. sw_info_t *swl;
  2657. int swl_idx;
  2658. int first_dev, last_dev;
  2659. port_id_t wrap = {}, nxt_d_id;
  2660. struct qla_hw_data *ha = vha->hw;
  2661. struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev);
  2662. struct scsi_qla_host *tvp;
  2663. rval = QLA_SUCCESS;
  2664. /* Try GID_PT to get device list, else GAN. */
  2665. swl = kcalloc(MAX_FIBRE_DEVICES, sizeof(sw_info_t), GFP_KERNEL);
  2666. if (!swl) {
  2667. /*EMPTY*/
  2668. DEBUG2(printk("scsi(%ld): GID_PT allocations failed, fallback "
  2669. "on GA_NXT\n", vha->host_no));
  2670. } else {
  2671. if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) {
  2672. kfree(swl);
  2673. swl = NULL;
  2674. } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) {
  2675. kfree(swl);
  2676. swl = NULL;
  2677. } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) {
  2678. kfree(swl);
  2679. swl = NULL;
  2680. } else if (ql2xiidmaenable &&
  2681. qla2x00_gfpn_id(vha, swl) == QLA_SUCCESS) {
  2682. qla2x00_gpsc(vha, swl);
  2683. }
  2684. /* If other queries succeeded probe for FC-4 type */
  2685. if (swl)
  2686. qla2x00_gff_id(vha, swl);
  2687. }
  2688. swl_idx = 0;
  2689. /* Allocate temporary fcport for any new fcports discovered. */
  2690. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2691. if (new_fcport == NULL) {
  2692. kfree(swl);
  2693. return (QLA_MEMORY_ALLOC_FAILED);
  2694. }
  2695. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2696. /* Set start port ID scan at adapter ID. */
  2697. first_dev = 1;
  2698. last_dev = 0;
  2699. /* Starting free loop ID. */
  2700. loop_id = ha->min_external_loopid;
  2701. for (; loop_id <= ha->max_loop_id; loop_id++) {
  2702. if (qla2x00_is_reserved_id(vha, loop_id))
  2703. continue;
  2704. if (ha->current_topology == ISP_CFG_FL &&
  2705. (atomic_read(&vha->loop_down_timer) ||
  2706. LOOP_TRANSITION(vha))) {
  2707. atomic_set(&vha->loop_down_timer, 0);
  2708. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  2709. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  2710. break;
  2711. }
  2712. if (swl != NULL) {
  2713. if (last_dev) {
  2714. wrap.b24 = new_fcport->d_id.b24;
  2715. } else {
  2716. new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
  2717. memcpy(new_fcport->node_name,
  2718. swl[swl_idx].node_name, WWN_SIZE);
  2719. memcpy(new_fcport->port_name,
  2720. swl[swl_idx].port_name, WWN_SIZE);
  2721. memcpy(new_fcport->fabric_port_name,
  2722. swl[swl_idx].fabric_port_name, WWN_SIZE);
  2723. new_fcport->fp_speed = swl[swl_idx].fp_speed;
  2724. new_fcport->fc4_type = swl[swl_idx].fc4_type;
  2725. if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
  2726. last_dev = 1;
  2727. }
  2728. swl_idx++;
  2729. }
  2730. } else {
  2731. /* Send GA_NXT to the switch */
  2732. rval = qla2x00_ga_nxt(vha, new_fcport);
  2733. if (rval != QLA_SUCCESS) {
  2734. qla_printk(KERN_WARNING, ha,
  2735. "SNS scan failed -- assuming zero-entry "
  2736. "result...\n");
  2737. list_for_each_entry_safe(fcport, fcptemp,
  2738. new_fcports, list) {
  2739. list_del(&fcport->list);
  2740. kfree(fcport);
  2741. }
  2742. rval = QLA_SUCCESS;
  2743. break;
  2744. }
  2745. }
  2746. /* If wrap on switch device list, exit. */
  2747. if (first_dev) {
  2748. wrap.b24 = new_fcport->d_id.b24;
  2749. first_dev = 0;
  2750. } else if (new_fcport->d_id.b24 == wrap.b24) {
  2751. DEBUG2(printk("scsi(%ld): device wrap (%02x%02x%02x)\n",
  2752. vha->host_no, new_fcport->d_id.b.domain,
  2753. new_fcport->d_id.b.area, new_fcport->d_id.b.al_pa));
  2754. break;
  2755. }
  2756. /* Bypass if same physical adapter. */
  2757. if (new_fcport->d_id.b24 == base_vha->d_id.b24)
  2758. continue;
  2759. /* Bypass virtual ports of the same host. */
  2760. found = 0;
  2761. if (ha->num_vhosts) {
  2762. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  2763. if (new_fcport->d_id.b24 == vp->d_id.b24) {
  2764. found = 1;
  2765. break;
  2766. }
  2767. }
  2768. if (found)
  2769. continue;
  2770. }
  2771. /* Bypass if same domain and area of adapter. */
  2772. if (((new_fcport->d_id.b24 & 0xffff00) ==
  2773. (vha->d_id.b24 & 0xffff00)) && ha->current_topology ==
  2774. ISP_CFG_FL)
  2775. continue;
  2776. /* Bypass reserved domain fields. */
  2777. if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
  2778. continue;
  2779. /* Bypass ports whose FCP-4 type is not FCP_SCSI */
  2780. if (new_fcport->fc4_type != FC4_TYPE_FCP_SCSI &&
  2781. new_fcport->fc4_type != FC4_TYPE_UNKNOWN)
  2782. continue;
  2783. /* Locate matching device in database. */
  2784. found = 0;
  2785. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2786. if (memcmp(new_fcport->port_name, fcport->port_name,
  2787. WWN_SIZE))
  2788. continue;
  2789. found++;
  2790. /* Update port state. */
  2791. memcpy(fcport->fabric_port_name,
  2792. new_fcport->fabric_port_name, WWN_SIZE);
  2793. fcport->fp_speed = new_fcport->fp_speed;
  2794. /*
  2795. * If address the same and state FCS_ONLINE, nothing
  2796. * changed.
  2797. */
  2798. if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
  2799. atomic_read(&fcport->state) == FCS_ONLINE) {
  2800. break;
  2801. }
  2802. /*
  2803. * If device was not a fabric device before.
  2804. */
  2805. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  2806. fcport->d_id.b24 = new_fcport->d_id.b24;
  2807. fcport->loop_id = FC_NO_LOOP_ID;
  2808. fcport->flags |= (FCF_FABRIC_DEVICE |
  2809. FCF_LOGIN_NEEDED);
  2810. break;
  2811. }
  2812. /*
  2813. * Port ID changed or device was marked to be updated;
  2814. * Log it out if still logged in and mark it for
  2815. * relogin later.
  2816. */
  2817. fcport->d_id.b24 = new_fcport->d_id.b24;
  2818. fcport->flags |= FCF_LOGIN_NEEDED;
  2819. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2820. (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
  2821. fcport->port_type != FCT_INITIATOR &&
  2822. fcport->port_type != FCT_BROADCAST) {
  2823. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2824. fcport->d_id.b.domain, fcport->d_id.b.area,
  2825. fcport->d_id.b.al_pa);
  2826. fcport->loop_id = FC_NO_LOOP_ID;
  2827. }
  2828. break;
  2829. }
  2830. if (found)
  2831. continue;
  2832. /* If device was not in our fcports list, then add it. */
  2833. list_add_tail(&new_fcport->list, new_fcports);
  2834. /* Allocate a new replacement fcport. */
  2835. nxt_d_id.b24 = new_fcport->d_id.b24;
  2836. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2837. if (new_fcport == NULL) {
  2838. kfree(swl);
  2839. return (QLA_MEMORY_ALLOC_FAILED);
  2840. }
  2841. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2842. new_fcport->d_id.b24 = nxt_d_id.b24;
  2843. }
  2844. kfree(swl);
  2845. kfree(new_fcport);
  2846. return (rval);
  2847. }
  2848. /*
  2849. * qla2x00_find_new_loop_id
  2850. * Scan through our port list and find a new usable loop ID.
  2851. *
  2852. * Input:
  2853. * ha: adapter state pointer.
  2854. * dev: port structure pointer.
  2855. *
  2856. * Returns:
  2857. * qla2x00 local function return status code.
  2858. *
  2859. * Context:
  2860. * Kernel context.
  2861. */
  2862. static int
  2863. qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
  2864. {
  2865. int rval;
  2866. int found;
  2867. fc_port_t *fcport;
  2868. uint16_t first_loop_id;
  2869. struct qla_hw_data *ha = vha->hw;
  2870. struct scsi_qla_host *vp;
  2871. struct scsi_qla_host *tvp;
  2872. rval = QLA_SUCCESS;
  2873. /* Save starting loop ID. */
  2874. first_loop_id = dev->loop_id;
  2875. for (;;) {
  2876. /* Skip loop ID if already used by adapter. */
  2877. if (dev->loop_id == vha->loop_id)
  2878. dev->loop_id++;
  2879. /* Skip reserved loop IDs. */
  2880. while (qla2x00_is_reserved_id(vha, dev->loop_id))
  2881. dev->loop_id++;
  2882. /* Reset loop ID if passed the end. */
  2883. if (dev->loop_id > ha->max_loop_id) {
  2884. /* first loop ID. */
  2885. dev->loop_id = ha->min_external_loopid;
  2886. }
  2887. /* Check for loop ID being already in use. */
  2888. found = 0;
  2889. fcport = NULL;
  2890. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  2891. list_for_each_entry(fcport, &vp->vp_fcports, list) {
  2892. if (fcport->loop_id == dev->loop_id &&
  2893. fcport != dev) {
  2894. /* ID possibly in use */
  2895. found++;
  2896. break;
  2897. }
  2898. }
  2899. if (found)
  2900. break;
  2901. }
  2902. /* If not in use then it is free to use. */
  2903. if (!found) {
  2904. break;
  2905. }
  2906. /* ID in use. Try next value. */
  2907. dev->loop_id++;
  2908. /* If wrap around. No free ID to use. */
  2909. if (dev->loop_id == first_loop_id) {
  2910. dev->loop_id = FC_NO_LOOP_ID;
  2911. rval = QLA_FUNCTION_FAILED;
  2912. break;
  2913. }
  2914. }
  2915. return (rval);
  2916. }
  2917. /*
  2918. * qla2x00_device_resync
  2919. * Marks devices in the database that needs resynchronization.
  2920. *
  2921. * Input:
  2922. * ha = adapter block pointer.
  2923. *
  2924. * Context:
  2925. * Kernel context.
  2926. */
  2927. static int
  2928. qla2x00_device_resync(scsi_qla_host_t *vha)
  2929. {
  2930. int rval;
  2931. uint32_t mask;
  2932. fc_port_t *fcport;
  2933. uint32_t rscn_entry;
  2934. uint8_t rscn_out_iter;
  2935. uint8_t format;
  2936. port_id_t d_id = {};
  2937. rval = QLA_RSCNS_HANDLED;
  2938. while (vha->rscn_out_ptr != vha->rscn_in_ptr ||
  2939. vha->flags.rscn_queue_overflow) {
  2940. rscn_entry = vha->rscn_queue[vha->rscn_out_ptr];
  2941. format = MSB(MSW(rscn_entry));
  2942. d_id.b.domain = LSB(MSW(rscn_entry));
  2943. d_id.b.area = MSB(LSW(rscn_entry));
  2944. d_id.b.al_pa = LSB(LSW(rscn_entry));
  2945. DEBUG(printk("scsi(%ld): RSCN queue entry[%d] = "
  2946. "[%02x/%02x%02x%02x].\n",
  2947. vha->host_no, vha->rscn_out_ptr, format, d_id.b.domain,
  2948. d_id.b.area, d_id.b.al_pa));
  2949. vha->rscn_out_ptr++;
  2950. if (vha->rscn_out_ptr == MAX_RSCN_COUNT)
  2951. vha->rscn_out_ptr = 0;
  2952. /* Skip duplicate entries. */
  2953. for (rscn_out_iter = vha->rscn_out_ptr;
  2954. !vha->flags.rscn_queue_overflow &&
  2955. rscn_out_iter != vha->rscn_in_ptr;
  2956. rscn_out_iter = (rscn_out_iter ==
  2957. (MAX_RSCN_COUNT - 1)) ? 0: rscn_out_iter + 1) {
  2958. if (rscn_entry != vha->rscn_queue[rscn_out_iter])
  2959. break;
  2960. DEBUG(printk("scsi(%ld): Skipping duplicate RSCN queue "
  2961. "entry found at [%d].\n", vha->host_no,
  2962. rscn_out_iter));
  2963. vha->rscn_out_ptr = rscn_out_iter;
  2964. }
  2965. /* Queue overflow, set switch default case. */
  2966. if (vha->flags.rscn_queue_overflow) {
  2967. DEBUG(printk("scsi(%ld): device_resync: rscn "
  2968. "overflow.\n", vha->host_no));
  2969. format = 3;
  2970. vha->flags.rscn_queue_overflow = 0;
  2971. }
  2972. switch (format) {
  2973. case 0:
  2974. mask = 0xffffff;
  2975. break;
  2976. case 1:
  2977. mask = 0xffff00;
  2978. break;
  2979. case 2:
  2980. mask = 0xff0000;
  2981. break;
  2982. default:
  2983. mask = 0x0;
  2984. d_id.b24 = 0;
  2985. vha->rscn_out_ptr = vha->rscn_in_ptr;
  2986. break;
  2987. }
  2988. rval = QLA_SUCCESS;
  2989. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2990. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  2991. (fcport->d_id.b24 & mask) != d_id.b24 ||
  2992. fcport->port_type == FCT_BROADCAST)
  2993. continue;
  2994. if (atomic_read(&fcport->state) == FCS_ONLINE) {
  2995. if (format != 3 ||
  2996. fcport->port_type != FCT_INITIATOR) {
  2997. qla2x00_mark_device_lost(vha, fcport,
  2998. 0, 0);
  2999. }
  3000. }
  3001. }
  3002. }
  3003. return (rval);
  3004. }
  3005. /*
  3006. * qla2x00_fabric_dev_login
  3007. * Login fabric target device and update FC port database.
  3008. *
  3009. * Input:
  3010. * ha: adapter state pointer.
  3011. * fcport: port structure list pointer.
  3012. * next_loopid: contains value of a new loop ID that can be used
  3013. * by the next login attempt.
  3014. *
  3015. * Returns:
  3016. * qla2x00 local function return status code.
  3017. *
  3018. * Context:
  3019. * Kernel context.
  3020. */
  3021. static int
  3022. qla2x00_fabric_dev_login(scsi_qla_host_t *vha, fc_port_t *fcport,
  3023. uint16_t *next_loopid)
  3024. {
  3025. int rval;
  3026. int retry;
  3027. uint8_t opts;
  3028. struct qla_hw_data *ha = vha->hw;
  3029. rval = QLA_SUCCESS;
  3030. retry = 0;
  3031. if (IS_ALOGIO_CAPABLE(ha)) {
  3032. if (fcport->flags & FCF_ASYNC_SENT)
  3033. return rval;
  3034. fcport->flags |= FCF_ASYNC_SENT;
  3035. rval = qla2x00_post_async_login_work(vha, fcport, NULL);
  3036. if (!rval)
  3037. return rval;
  3038. }
  3039. fcport->flags &= ~FCF_ASYNC_SENT;
  3040. rval = qla2x00_fabric_login(vha, fcport, next_loopid);
  3041. if (rval == QLA_SUCCESS) {
  3042. /* Send an ADISC to FCP2 devices.*/
  3043. opts = 0;
  3044. if (fcport->flags & FCF_FCP2_DEVICE)
  3045. opts |= BIT_1;
  3046. rval = qla2x00_get_port_database(vha, fcport, opts);
  3047. if (rval != QLA_SUCCESS) {
  3048. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  3049. fcport->d_id.b.domain, fcport->d_id.b.area,
  3050. fcport->d_id.b.al_pa);
  3051. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  3052. } else {
  3053. qla2x00_update_fcport(vha, fcport);
  3054. }
  3055. }
  3056. return (rval);
  3057. }
  3058. /*
  3059. * qla2x00_fabric_login
  3060. * Issue fabric login command.
  3061. *
  3062. * Input:
  3063. * ha = adapter block pointer.
  3064. * device = pointer to FC device type structure.
  3065. *
  3066. * Returns:
  3067. * 0 - Login successfully
  3068. * 1 - Login failed
  3069. * 2 - Initiator device
  3070. * 3 - Fatal error
  3071. */
  3072. int
  3073. qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport,
  3074. uint16_t *next_loopid)
  3075. {
  3076. int rval;
  3077. int retry;
  3078. uint16_t tmp_loopid;
  3079. uint16_t mb[MAILBOX_REGISTER_COUNT];
  3080. struct qla_hw_data *ha = vha->hw;
  3081. retry = 0;
  3082. tmp_loopid = 0;
  3083. for (;;) {
  3084. DEBUG(printk("scsi(%ld): Trying Fabric Login w/loop id 0x%04x "
  3085. "for port %02x%02x%02x.\n",
  3086. vha->host_no, fcport->loop_id, fcport->d_id.b.domain,
  3087. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  3088. /* Login fcport on switch. */
  3089. ha->isp_ops->fabric_login(vha, fcport->loop_id,
  3090. fcport->d_id.b.domain, fcport->d_id.b.area,
  3091. fcport->d_id.b.al_pa, mb, BIT_0);
  3092. if (mb[0] == MBS_PORT_ID_USED) {
  3093. /*
  3094. * Device has another loop ID. The firmware team
  3095. * recommends the driver perform an implicit login with
  3096. * the specified ID again. The ID we just used is save
  3097. * here so we return with an ID that can be tried by
  3098. * the next login.
  3099. */
  3100. retry++;
  3101. tmp_loopid = fcport->loop_id;
  3102. fcport->loop_id = mb[1];
  3103. DEBUG(printk("Fabric Login: port in use - next "
  3104. "loop id=0x%04x, port Id=%02x%02x%02x.\n",
  3105. fcport->loop_id, fcport->d_id.b.domain,
  3106. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  3107. } else if (mb[0] == MBS_COMMAND_COMPLETE) {
  3108. /*
  3109. * Login succeeded.
  3110. */
  3111. if (retry) {
  3112. /* A retry occurred before. */
  3113. *next_loopid = tmp_loopid;
  3114. } else {
  3115. /*
  3116. * No retry occurred before. Just increment the
  3117. * ID value for next login.
  3118. */
  3119. *next_loopid = (fcport->loop_id + 1);
  3120. }
  3121. if (mb[1] & BIT_0) {
  3122. fcport->port_type = FCT_INITIATOR;
  3123. } else {
  3124. fcport->port_type = FCT_TARGET;
  3125. if (mb[1] & BIT_1) {
  3126. fcport->flags |= FCF_FCP2_DEVICE;
  3127. }
  3128. }
  3129. if (mb[10] & BIT_0)
  3130. fcport->supported_classes |= FC_COS_CLASS2;
  3131. if (mb[10] & BIT_1)
  3132. fcport->supported_classes |= FC_COS_CLASS3;
  3133. rval = QLA_SUCCESS;
  3134. break;
  3135. } else if (mb[0] == MBS_LOOP_ID_USED) {
  3136. /*
  3137. * Loop ID already used, try next loop ID.
  3138. */
  3139. fcport->loop_id++;
  3140. rval = qla2x00_find_new_loop_id(vha, fcport);
  3141. if (rval != QLA_SUCCESS) {
  3142. /* Ran out of loop IDs to use */
  3143. break;
  3144. }
  3145. } else if (mb[0] == MBS_COMMAND_ERROR) {
  3146. /*
  3147. * Firmware possibly timed out during login. If NO
  3148. * retries are left to do then the device is declared
  3149. * dead.
  3150. */
  3151. *next_loopid = fcport->loop_id;
  3152. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  3153. fcport->d_id.b.domain, fcport->d_id.b.area,
  3154. fcport->d_id.b.al_pa);
  3155. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  3156. rval = 1;
  3157. break;
  3158. } else {
  3159. /*
  3160. * unrecoverable / not handled error
  3161. */
  3162. DEBUG2(printk("%s(%ld): failed=%x port_id=%02x%02x%02x "
  3163. "loop_id=%x jiffies=%lx.\n",
  3164. __func__, vha->host_no, mb[0],
  3165. fcport->d_id.b.domain, fcport->d_id.b.area,
  3166. fcport->d_id.b.al_pa, fcport->loop_id, jiffies));
  3167. *next_loopid = fcport->loop_id;
  3168. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  3169. fcport->d_id.b.domain, fcport->d_id.b.area,
  3170. fcport->d_id.b.al_pa);
  3171. fcport->loop_id = FC_NO_LOOP_ID;
  3172. fcport->login_retry = 0;
  3173. rval = 3;
  3174. break;
  3175. }
  3176. }
  3177. return (rval);
  3178. }
  3179. /*
  3180. * qla2x00_local_device_login
  3181. * Issue local device login command.
  3182. *
  3183. * Input:
  3184. * ha = adapter block pointer.
  3185. * loop_id = loop id of device to login to.
  3186. *
  3187. * Returns (Where's the #define!!!!):
  3188. * 0 - Login successfully
  3189. * 1 - Login failed
  3190. * 3 - Fatal error
  3191. */
  3192. int
  3193. qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport)
  3194. {
  3195. int rval;
  3196. uint16_t mb[MAILBOX_REGISTER_COUNT];
  3197. memset(mb, 0, sizeof(mb));
  3198. rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0);
  3199. if (rval == QLA_SUCCESS) {
  3200. /* Interrogate mailbox registers for any errors */
  3201. if (mb[0] == MBS_COMMAND_ERROR)
  3202. rval = 1;
  3203. else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
  3204. /* device not in PCB table */
  3205. rval = 3;
  3206. }
  3207. return (rval);
  3208. }
  3209. /*
  3210. * qla2x00_loop_resync
  3211. * Resync with fibre channel devices.
  3212. *
  3213. * Input:
  3214. * ha = adapter block pointer.
  3215. *
  3216. * Returns:
  3217. * 0 = success
  3218. */
  3219. int
  3220. qla2x00_loop_resync(scsi_qla_host_t *vha)
  3221. {
  3222. int rval = QLA_SUCCESS;
  3223. uint32_t wait_time;
  3224. struct req_que *req;
  3225. struct rsp_que *rsp;
  3226. if (vha->hw->flags.cpu_affinity_enabled)
  3227. req = vha->hw->req_q_map[0];
  3228. else
  3229. req = vha->req;
  3230. rsp = req->rsp;
  3231. atomic_set(&vha->loop_state, LOOP_UPDATE);
  3232. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  3233. if (vha->flags.online) {
  3234. if (!(rval = qla2x00_fw_ready(vha))) {
  3235. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  3236. wait_time = 256;
  3237. do {
  3238. atomic_set(&vha->loop_state, LOOP_UPDATE);
  3239. /* Issue a marker after FW becomes ready. */
  3240. qla2x00_marker(vha, req, rsp, 0, 0,
  3241. MK_SYNC_ALL);
  3242. vha->marker_needed = 0;
  3243. /* Remap devices on Loop. */
  3244. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  3245. qla2x00_configure_loop(vha);
  3246. wait_time--;
  3247. } while (!atomic_read(&vha->loop_down_timer) &&
  3248. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  3249. && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
  3250. &vha->dpc_flags)));
  3251. }
  3252. }
  3253. if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  3254. return (QLA_FUNCTION_FAILED);
  3255. if (rval)
  3256. DEBUG2_3(printk("%s(): **** FAILED ****\n", __func__));
  3257. return (rval);
  3258. }
  3259. void
  3260. qla2x00_update_fcports(scsi_qla_host_t *base_vha)
  3261. {
  3262. fc_port_t *fcport;
  3263. struct scsi_qla_host *tvp, *vha;
  3264. /* Go with deferred removal of rport references. */
  3265. list_for_each_entry_safe(vha, tvp, &base_vha->hw->vp_list, list)
  3266. list_for_each_entry(fcport, &vha->vp_fcports, list)
  3267. if (fcport && fcport->drport &&
  3268. atomic_read(&fcport->state) != FCS_UNCONFIGURED)
  3269. qla2x00_rport_del(fcport);
  3270. }
  3271. void
  3272. qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha)
  3273. {
  3274. struct qla_hw_data *ha = vha->hw;
  3275. struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev);
  3276. struct scsi_qla_host *tvp;
  3277. vha->flags.online = 0;
  3278. ha->flags.chip_reset_done = 0;
  3279. clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  3280. ha->qla_stats.total_isp_aborts++;
  3281. qla_printk(KERN_INFO, ha,
  3282. "Performing ISP error recovery - ha= %p.\n", ha);
  3283. /* Chip reset does not apply to 82XX */
  3284. if (!IS_QLA82XX(ha))
  3285. ha->isp_ops->reset_chip(vha);
  3286. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  3287. if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
  3288. atomic_set(&vha->loop_state, LOOP_DOWN);
  3289. qla2x00_mark_all_devices_lost(vha, 0);
  3290. list_for_each_entry_safe(vp, tvp, &base_vha->hw->vp_list, list)
  3291. qla2x00_mark_all_devices_lost(vp, 0);
  3292. } else {
  3293. if (!atomic_read(&vha->loop_down_timer))
  3294. atomic_set(&vha->loop_down_timer,
  3295. LOOP_DOWN_TIME);
  3296. }
  3297. /* Make sure for ISP 82XX IO DMA is complete */
  3298. if (IS_QLA82XX(ha))
  3299. qla82xx_wait_for_pending_commands(vha);
  3300. /* Requeue all commands in outstanding command list. */
  3301. qla2x00_abort_all_cmds(vha, DID_RESET << 16);
  3302. }
  3303. /*
  3304. * qla2x00_abort_isp
  3305. * Resets ISP and aborts all outstanding commands.
  3306. *
  3307. * Input:
  3308. * ha = adapter block pointer.
  3309. *
  3310. * Returns:
  3311. * 0 = success
  3312. */
  3313. int
  3314. qla2x00_abort_isp(scsi_qla_host_t *vha)
  3315. {
  3316. int rval;
  3317. uint8_t status = 0;
  3318. struct qla_hw_data *ha = vha->hw;
  3319. struct scsi_qla_host *vp;
  3320. struct scsi_qla_host *tvp;
  3321. struct req_que *req = ha->req_q_map[0];
  3322. if (vha->flags.online) {
  3323. qla2x00_abort_isp_cleanup(vha);
  3324. if (unlikely(pci_channel_offline(ha->pdev) &&
  3325. ha->flags.pci_channel_io_perm_failure)) {
  3326. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  3327. status = 0;
  3328. return status;
  3329. }
  3330. ha->isp_ops->get_flash_version(vha, req->ring);
  3331. ha->isp_ops->nvram_config(vha);
  3332. if (!qla2x00_restart_isp(vha)) {
  3333. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  3334. if (!atomic_read(&vha->loop_down_timer)) {
  3335. /*
  3336. * Issue marker command only when we are going
  3337. * to start the I/O .
  3338. */
  3339. vha->marker_needed = 1;
  3340. }
  3341. vha->flags.online = 1;
  3342. ha->isp_ops->enable_intrs(ha);
  3343. ha->isp_abort_cnt = 0;
  3344. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  3345. if (IS_QLA81XX(ha))
  3346. qla2x00_get_fw_version(vha,
  3347. &ha->fw_major_version,
  3348. &ha->fw_minor_version,
  3349. &ha->fw_subminor_version,
  3350. &ha->fw_attributes, &ha->fw_memory_size,
  3351. ha->mpi_version, &ha->mpi_capabilities,
  3352. ha->phy_version);
  3353. if (ha->fce) {
  3354. ha->flags.fce_enabled = 1;
  3355. memset(ha->fce, 0,
  3356. fce_calc_size(ha->fce_bufs));
  3357. rval = qla2x00_enable_fce_trace(vha,
  3358. ha->fce_dma, ha->fce_bufs, ha->fce_mb,
  3359. &ha->fce_bufs);
  3360. if (rval) {
  3361. qla_printk(KERN_WARNING, ha,
  3362. "Unable to reinitialize FCE "
  3363. "(%d).\n", rval);
  3364. ha->flags.fce_enabled = 0;
  3365. }
  3366. }
  3367. if (ha->eft) {
  3368. memset(ha->eft, 0, EFT_SIZE);
  3369. rval = qla2x00_enable_eft_trace(vha,
  3370. ha->eft_dma, EFT_NUM_BUFFERS);
  3371. if (rval) {
  3372. qla_printk(KERN_WARNING, ha,
  3373. "Unable to reinitialize EFT "
  3374. "(%d).\n", rval);
  3375. }
  3376. }
  3377. } else { /* failed the ISP abort */
  3378. vha->flags.online = 1;
  3379. if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
  3380. if (ha->isp_abort_cnt == 0) {
  3381. qla_printk(KERN_WARNING, ha,
  3382. "ISP error recovery failed - "
  3383. "board disabled\n");
  3384. /*
  3385. * The next call disables the board
  3386. * completely.
  3387. */
  3388. ha->isp_ops->reset_adapter(vha);
  3389. vha->flags.online = 0;
  3390. clear_bit(ISP_ABORT_RETRY,
  3391. &vha->dpc_flags);
  3392. status = 0;
  3393. } else { /* schedule another ISP abort */
  3394. ha->isp_abort_cnt--;
  3395. DEBUG(printk("qla%ld: ISP abort - "
  3396. "retry remaining %d\n",
  3397. vha->host_no, ha->isp_abort_cnt));
  3398. status = 1;
  3399. }
  3400. } else {
  3401. ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
  3402. DEBUG(printk("qla2x00(%ld): ISP error recovery "
  3403. "- retrying (%d) more times\n",
  3404. vha->host_no, ha->isp_abort_cnt));
  3405. set_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  3406. status = 1;
  3407. }
  3408. }
  3409. }
  3410. if (!status) {
  3411. DEBUG(printk(KERN_INFO
  3412. "qla2x00_abort_isp(%ld): succeeded.\n",
  3413. vha->host_no));
  3414. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  3415. if (vp->vp_idx)
  3416. qla2x00_vp_abort_isp(vp);
  3417. }
  3418. } else {
  3419. qla_printk(KERN_INFO, ha,
  3420. "qla2x00_abort_isp: **** FAILED ****\n");
  3421. }
  3422. return(status);
  3423. }
  3424. /*
  3425. * qla2x00_restart_isp
  3426. * restarts the ISP after a reset
  3427. *
  3428. * Input:
  3429. * ha = adapter block pointer.
  3430. *
  3431. * Returns:
  3432. * 0 = success
  3433. */
  3434. static int
  3435. qla2x00_restart_isp(scsi_qla_host_t *vha)
  3436. {
  3437. int status = 0;
  3438. uint32_t wait_time;
  3439. struct qla_hw_data *ha = vha->hw;
  3440. struct req_que *req = ha->req_q_map[0];
  3441. struct rsp_que *rsp = ha->rsp_q_map[0];
  3442. /* If firmware needs to be loaded */
  3443. if (qla2x00_isp_firmware(vha)) {
  3444. vha->flags.online = 0;
  3445. status = ha->isp_ops->chip_diag(vha);
  3446. if (!status)
  3447. status = qla2x00_setup_chip(vha);
  3448. }
  3449. if (!status && !(status = qla2x00_init_rings(vha))) {
  3450. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  3451. ha->flags.chip_reset_done = 1;
  3452. /* Initialize the queues in use */
  3453. qla25xx_init_queues(ha);
  3454. status = qla2x00_fw_ready(vha);
  3455. if (!status) {
  3456. DEBUG(printk("%s(): Start configure loop, "
  3457. "status = %d\n", __func__, status));
  3458. /* Issue a marker after FW becomes ready. */
  3459. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  3460. vha->flags.online = 1;
  3461. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  3462. wait_time = 256;
  3463. do {
  3464. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  3465. qla2x00_configure_loop(vha);
  3466. wait_time--;
  3467. } while (!atomic_read(&vha->loop_down_timer) &&
  3468. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  3469. && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
  3470. &vha->dpc_flags)));
  3471. }
  3472. /* if no cable then assume it's good */
  3473. if ((vha->device_flags & DFLG_NO_CABLE))
  3474. status = 0;
  3475. DEBUG(printk("%s(): Configure loop done, status = 0x%x\n",
  3476. __func__,
  3477. status));
  3478. }
  3479. return (status);
  3480. }
  3481. static int
  3482. qla25xx_init_queues(struct qla_hw_data *ha)
  3483. {
  3484. struct rsp_que *rsp = NULL;
  3485. struct req_que *req = NULL;
  3486. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  3487. int ret = -1;
  3488. int i;
  3489. for (i = 1; i < ha->max_rsp_queues; i++) {
  3490. rsp = ha->rsp_q_map[i];
  3491. if (rsp) {
  3492. rsp->options &= ~BIT_0;
  3493. ret = qla25xx_init_rsp_que(base_vha, rsp);
  3494. if (ret != QLA_SUCCESS)
  3495. DEBUG2_17(printk(KERN_WARNING
  3496. "%s Rsp que:%d init failed\n", __func__,
  3497. rsp->id));
  3498. else
  3499. DEBUG2_17(printk(KERN_INFO
  3500. "%s Rsp que:%d inited\n", __func__,
  3501. rsp->id));
  3502. }
  3503. }
  3504. for (i = 1; i < ha->max_req_queues; i++) {
  3505. req = ha->req_q_map[i];
  3506. if (req) {
  3507. /* Clear outstanding commands array. */
  3508. req->options &= ~BIT_0;
  3509. ret = qla25xx_init_req_que(base_vha, req);
  3510. if (ret != QLA_SUCCESS)
  3511. DEBUG2_17(printk(KERN_WARNING
  3512. "%s Req que:%d init failed\n", __func__,
  3513. req->id));
  3514. else
  3515. DEBUG2_17(printk(KERN_WARNING
  3516. "%s Req que:%d inited\n", __func__,
  3517. req->id));
  3518. }
  3519. }
  3520. return ret;
  3521. }
  3522. /*
  3523. * qla2x00_reset_adapter
  3524. * Reset adapter.
  3525. *
  3526. * Input:
  3527. * ha = adapter block pointer.
  3528. */
  3529. void
  3530. qla2x00_reset_adapter(scsi_qla_host_t *vha)
  3531. {
  3532. unsigned long flags = 0;
  3533. struct qla_hw_data *ha = vha->hw;
  3534. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  3535. vha->flags.online = 0;
  3536. ha->isp_ops->disable_intrs(ha);
  3537. spin_lock_irqsave(&ha->hardware_lock, flags);
  3538. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  3539. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  3540. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  3541. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  3542. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3543. }
  3544. void
  3545. qla24xx_reset_adapter(scsi_qla_host_t *vha)
  3546. {
  3547. unsigned long flags = 0;
  3548. struct qla_hw_data *ha = vha->hw;
  3549. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  3550. if (IS_QLA82XX(ha))
  3551. return;
  3552. vha->flags.online = 0;
  3553. ha->isp_ops->disable_intrs(ha);
  3554. spin_lock_irqsave(&ha->hardware_lock, flags);
  3555. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  3556. RD_REG_DWORD(&reg->hccr);
  3557. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  3558. RD_REG_DWORD(&reg->hccr);
  3559. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3560. if (IS_NOPOLLING_TYPE(ha))
  3561. ha->isp_ops->enable_intrs(ha);
  3562. }
  3563. /* On sparc systems, obtain port and node WWN from firmware
  3564. * properties.
  3565. */
  3566. static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha,
  3567. struct nvram_24xx *nv)
  3568. {
  3569. #ifdef CONFIG_SPARC
  3570. struct qla_hw_data *ha = vha->hw;
  3571. struct pci_dev *pdev = ha->pdev;
  3572. struct device_node *dp = pci_device_to_OF_node(pdev);
  3573. const u8 *val;
  3574. int len;
  3575. val = of_get_property(dp, "port-wwn", &len);
  3576. if (val && len >= WWN_SIZE)
  3577. memcpy(nv->port_name, val, WWN_SIZE);
  3578. val = of_get_property(dp, "node-wwn", &len);
  3579. if (val && len >= WWN_SIZE)
  3580. memcpy(nv->node_name, val, WWN_SIZE);
  3581. #endif
  3582. }
  3583. int
  3584. qla24xx_nvram_config(scsi_qla_host_t *vha)
  3585. {
  3586. int rval;
  3587. struct init_cb_24xx *icb;
  3588. struct nvram_24xx *nv;
  3589. uint32_t *dptr;
  3590. uint8_t *dptr1, *dptr2;
  3591. uint32_t chksum;
  3592. uint16_t cnt;
  3593. struct qla_hw_data *ha = vha->hw;
  3594. rval = QLA_SUCCESS;
  3595. icb = (struct init_cb_24xx *)ha->init_cb;
  3596. nv = ha->nvram;
  3597. /* Determine NVRAM starting address. */
  3598. if (ha->flags.port0) {
  3599. ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
  3600. ha->vpd_base = FA_NVRAM_VPD0_ADDR;
  3601. } else {
  3602. ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
  3603. ha->vpd_base = FA_NVRAM_VPD1_ADDR;
  3604. }
  3605. ha->nvram_size = sizeof(struct nvram_24xx);
  3606. ha->vpd_size = FA_NVRAM_VPD_SIZE;
  3607. if (IS_QLA82XX(ha))
  3608. ha->vpd_size = FA_VPD_SIZE_82XX;
  3609. /* Get VPD data into cache */
  3610. ha->vpd = ha->nvram + VPD_OFFSET;
  3611. ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd,
  3612. ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
  3613. /* Get NVRAM data into cache and calculate checksum. */
  3614. dptr = (uint32_t *)nv;
  3615. ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base,
  3616. ha->nvram_size);
  3617. for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
  3618. chksum += le32_to_cpu(*dptr++);
  3619. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  3620. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  3621. /* Bad NVRAM data, set defaults parameters. */
  3622. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
  3623. || nv->id[3] != ' ' ||
  3624. nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
  3625. /* Reset NVRAM data. */
  3626. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  3627. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  3628. le16_to_cpu(nv->nvram_version));
  3629. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  3630. "invalid -- WWPN) defaults.\n");
  3631. /*
  3632. * Set default initialization control block.
  3633. */
  3634. memset(nv, 0, ha->nvram_size);
  3635. nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
  3636. nv->version = __constant_cpu_to_le16(ICB_VERSION);
  3637. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  3638. nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3639. nv->exchange_count = __constant_cpu_to_le16(0);
  3640. nv->hard_address = __constant_cpu_to_le16(124);
  3641. nv->port_name[0] = 0x21;
  3642. nv->port_name[1] = 0x00 + ha->port_no;
  3643. nv->port_name[2] = 0x00;
  3644. nv->port_name[3] = 0xe0;
  3645. nv->port_name[4] = 0x8b;
  3646. nv->port_name[5] = 0x1c;
  3647. nv->port_name[6] = 0x55;
  3648. nv->port_name[7] = 0x86;
  3649. nv->node_name[0] = 0x20;
  3650. nv->node_name[1] = 0x00;
  3651. nv->node_name[2] = 0x00;
  3652. nv->node_name[3] = 0xe0;
  3653. nv->node_name[4] = 0x8b;
  3654. nv->node_name[5] = 0x1c;
  3655. nv->node_name[6] = 0x55;
  3656. nv->node_name[7] = 0x86;
  3657. qla24xx_nvram_wwn_from_ofw(vha, nv);
  3658. nv->login_retry_count = __constant_cpu_to_le16(8);
  3659. nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
  3660. nv->login_timeout = __constant_cpu_to_le16(0);
  3661. nv->firmware_options_1 =
  3662. __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
  3663. nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
  3664. nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
  3665. nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
  3666. nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
  3667. nv->efi_parameters = __constant_cpu_to_le32(0);
  3668. nv->reset_delay = 5;
  3669. nv->max_luns_per_target = __constant_cpu_to_le16(128);
  3670. nv->port_down_retry_count = __constant_cpu_to_le16(30);
  3671. nv->link_down_timeout = __constant_cpu_to_le16(30);
  3672. rval = 1;
  3673. }
  3674. /* Reset Initialization control block */
  3675. memset(icb, 0, ha->init_cb_size);
  3676. /* Copy 1st segment. */
  3677. dptr1 = (uint8_t *)icb;
  3678. dptr2 = (uint8_t *)&nv->version;
  3679. cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
  3680. while (cnt--)
  3681. *dptr1++ = *dptr2++;
  3682. icb->login_retry_count = nv->login_retry_count;
  3683. icb->link_down_on_nos = nv->link_down_on_nos;
  3684. /* Copy 2nd segment. */
  3685. dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
  3686. dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
  3687. cnt = (uint8_t *)&icb->reserved_3 -
  3688. (uint8_t *)&icb->interrupt_delay_timer;
  3689. while (cnt--)
  3690. *dptr1++ = *dptr2++;
  3691. /*
  3692. * Setup driver NVRAM options.
  3693. */
  3694. qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
  3695. "QLA2462");
  3696. /* Use alternate WWN? */
  3697. if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
  3698. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  3699. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  3700. }
  3701. /* Prepare nodename */
  3702. if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
  3703. /*
  3704. * Firmware will apply the following mask if the nodename was
  3705. * not provided.
  3706. */
  3707. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  3708. icb->node_name[0] &= 0xF0;
  3709. }
  3710. /* Set host adapter parameters. */
  3711. ha->flags.disable_risc_code_load = 0;
  3712. ha->flags.enable_lip_reset = 0;
  3713. ha->flags.enable_lip_full_login =
  3714. le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
  3715. ha->flags.enable_target_reset =
  3716. le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
  3717. ha->flags.enable_led_scheme = 0;
  3718. ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
  3719. ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
  3720. (BIT_6 | BIT_5 | BIT_4)) >> 4;
  3721. memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
  3722. sizeof(ha->fw_seriallink_options24));
  3723. /* save HBA serial number */
  3724. ha->serial0 = icb->port_name[5];
  3725. ha->serial1 = icb->port_name[6];
  3726. ha->serial2 = icb->port_name[7];
  3727. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  3728. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  3729. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3730. ha->retry_count = le16_to_cpu(nv->login_retry_count);
  3731. /* Set minimum login_timeout to 4 seconds. */
  3732. if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
  3733. nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
  3734. if (le16_to_cpu(nv->login_timeout) < 4)
  3735. nv->login_timeout = __constant_cpu_to_le16(4);
  3736. ha->login_timeout = le16_to_cpu(nv->login_timeout);
  3737. icb->login_timeout = nv->login_timeout;
  3738. /* Set minimum RATOV to 100 tenths of a second. */
  3739. ha->r_a_tov = 100;
  3740. ha->loop_reset_delay = nv->reset_delay;
  3741. /* Link Down Timeout = 0:
  3742. *
  3743. * When Port Down timer expires we will start returning
  3744. * I/O's to OS with "DID_NO_CONNECT".
  3745. *
  3746. * Link Down Timeout != 0:
  3747. *
  3748. * The driver waits for the link to come up after link down
  3749. * before returning I/Os to OS with "DID_NO_CONNECT".
  3750. */
  3751. if (le16_to_cpu(nv->link_down_timeout) == 0) {
  3752. ha->loop_down_abort_time =
  3753. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  3754. } else {
  3755. ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
  3756. ha->loop_down_abort_time =
  3757. (LOOP_DOWN_TIME - ha->link_down_timeout);
  3758. }
  3759. /* Need enough time to try and get the port back. */
  3760. ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
  3761. if (qlport_down_retry)
  3762. ha->port_down_retry_count = qlport_down_retry;
  3763. /* Set login_retry_count */
  3764. ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
  3765. if (ha->port_down_retry_count ==
  3766. le16_to_cpu(nv->port_down_retry_count) &&
  3767. ha->port_down_retry_count > 3)
  3768. ha->login_retry_count = ha->port_down_retry_count;
  3769. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  3770. ha->login_retry_count = ha->port_down_retry_count;
  3771. if (ql2xloginretrycount)
  3772. ha->login_retry_count = ql2xloginretrycount;
  3773. /* Enable ZIO. */
  3774. if (!vha->flags.init_done) {
  3775. ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
  3776. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  3777. ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
  3778. le16_to_cpu(icb->interrupt_delay_timer): 2;
  3779. }
  3780. icb->firmware_options_2 &= __constant_cpu_to_le32(
  3781. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
  3782. vha->flags.process_response_queue = 0;
  3783. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  3784. ha->zio_mode = QLA_ZIO_MODE_6;
  3785. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay "
  3786. "(%d us).\n", vha->host_no, ha->zio_mode,
  3787. ha->zio_timer * 100));
  3788. qla_printk(KERN_INFO, ha,
  3789. "ZIO mode %d enabled; timer delay (%d us).\n",
  3790. ha->zio_mode, ha->zio_timer * 100);
  3791. icb->firmware_options_2 |= cpu_to_le32(
  3792. (uint32_t)ha->zio_mode);
  3793. icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
  3794. vha->flags.process_response_queue = 1;
  3795. }
  3796. if (rval) {
  3797. DEBUG2_3(printk(KERN_WARNING
  3798. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  3799. }
  3800. return (rval);
  3801. }
  3802. static int
  3803. qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr,
  3804. uint32_t faddr)
  3805. {
  3806. int rval = QLA_SUCCESS;
  3807. int segments, fragment;
  3808. uint32_t *dcode, dlen;
  3809. uint32_t risc_addr;
  3810. uint32_t risc_size;
  3811. uint32_t i;
  3812. struct qla_hw_data *ha = vha->hw;
  3813. struct req_que *req = ha->req_q_map[0];
  3814. qla_printk(KERN_INFO, ha,
  3815. "FW: Loading from flash (%x)...\n", faddr);
  3816. rval = QLA_SUCCESS;
  3817. segments = FA_RISC_CODE_SEGMENTS;
  3818. dcode = (uint32_t *)req->ring;
  3819. *srisc_addr = 0;
  3820. /* Validate firmware image by checking version. */
  3821. qla24xx_read_flash_data(vha, dcode, faddr + 4, 4);
  3822. for (i = 0; i < 4; i++)
  3823. dcode[i] = be32_to_cpu(dcode[i]);
  3824. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  3825. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  3826. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  3827. dcode[3] == 0)) {
  3828. qla_printk(KERN_WARNING, ha,
  3829. "Unable to verify integrity of flash firmware image!\n");
  3830. qla_printk(KERN_WARNING, ha,
  3831. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  3832. dcode[1], dcode[2], dcode[3]);
  3833. return QLA_FUNCTION_FAILED;
  3834. }
  3835. while (segments && rval == QLA_SUCCESS) {
  3836. /* Read segment's load information. */
  3837. qla24xx_read_flash_data(vha, dcode, faddr, 4);
  3838. risc_addr = be32_to_cpu(dcode[2]);
  3839. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  3840. risc_size = be32_to_cpu(dcode[3]);
  3841. fragment = 0;
  3842. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3843. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  3844. if (dlen > risc_size)
  3845. dlen = risc_size;
  3846. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3847. "addr %x, number of dwords 0x%x, offset 0x%x.\n",
  3848. vha->host_no, risc_addr, dlen, faddr));
  3849. qla24xx_read_flash_data(vha, dcode, faddr, dlen);
  3850. for (i = 0; i < dlen; i++)
  3851. dcode[i] = swab32(dcode[i]);
  3852. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3853. dlen);
  3854. if (rval) {
  3855. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3856. "segment %d of firmware\n", vha->host_no,
  3857. fragment));
  3858. qla_printk(KERN_WARNING, ha,
  3859. "[ERROR] Failed to load segment %d of "
  3860. "firmware\n", fragment);
  3861. break;
  3862. }
  3863. faddr += dlen;
  3864. risc_addr += dlen;
  3865. risc_size -= dlen;
  3866. fragment++;
  3867. }
  3868. /* Next segment. */
  3869. segments--;
  3870. }
  3871. return rval;
  3872. }
  3873. #define QLA_FW_URL "ftp://ftp.qlogic.com/outgoing/linux/firmware/"
  3874. int
  3875. qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3876. {
  3877. int rval;
  3878. int i, fragment;
  3879. uint16_t *wcode, *fwcode;
  3880. uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
  3881. struct fw_blob *blob;
  3882. struct qla_hw_data *ha = vha->hw;
  3883. struct req_que *req = ha->req_q_map[0];
  3884. /* Load firmware blob. */
  3885. blob = qla2x00_request_firmware(vha);
  3886. if (!blob) {
  3887. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  3888. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  3889. "from: " QLA_FW_URL ".\n");
  3890. return QLA_FUNCTION_FAILED;
  3891. }
  3892. rval = QLA_SUCCESS;
  3893. wcode = (uint16_t *)req->ring;
  3894. *srisc_addr = 0;
  3895. fwcode = (uint16_t *)blob->fw->data;
  3896. fwclen = 0;
  3897. /* Validate firmware image by checking version. */
  3898. if (blob->fw->size < 8 * sizeof(uint16_t)) {
  3899. qla_printk(KERN_WARNING, ha,
  3900. "Unable to verify integrity of firmware image (%Zd)!\n",
  3901. blob->fw->size);
  3902. goto fail_fw_integrity;
  3903. }
  3904. for (i = 0; i < 4; i++)
  3905. wcode[i] = be16_to_cpu(fwcode[i + 4]);
  3906. if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
  3907. wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
  3908. wcode[2] == 0 && wcode[3] == 0)) {
  3909. qla_printk(KERN_WARNING, ha,
  3910. "Unable to verify integrity of firmware image!\n");
  3911. qla_printk(KERN_WARNING, ha,
  3912. "Firmware data: %04x %04x %04x %04x!\n", wcode[0],
  3913. wcode[1], wcode[2], wcode[3]);
  3914. goto fail_fw_integrity;
  3915. }
  3916. seg = blob->segs;
  3917. while (*seg && rval == QLA_SUCCESS) {
  3918. risc_addr = *seg;
  3919. *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
  3920. risc_size = be16_to_cpu(fwcode[3]);
  3921. /* Validate firmware image size. */
  3922. fwclen += risc_size * sizeof(uint16_t);
  3923. if (blob->fw->size < fwclen) {
  3924. qla_printk(KERN_WARNING, ha,
  3925. "Unable to verify integrity of firmware image "
  3926. "(%Zd)!\n", blob->fw->size);
  3927. goto fail_fw_integrity;
  3928. }
  3929. fragment = 0;
  3930. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3931. wlen = (uint16_t)(ha->fw_transfer_size >> 1);
  3932. if (wlen > risc_size)
  3933. wlen = risc_size;
  3934. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3935. "addr %x, number of words 0x%x.\n", vha->host_no,
  3936. risc_addr, wlen));
  3937. for (i = 0; i < wlen; i++)
  3938. wcode[i] = swab16(fwcode[i]);
  3939. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3940. wlen);
  3941. if (rval) {
  3942. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3943. "segment %d of firmware\n", vha->host_no,
  3944. fragment));
  3945. qla_printk(KERN_WARNING, ha,
  3946. "[ERROR] Failed to load segment %d of "
  3947. "firmware\n", fragment);
  3948. break;
  3949. }
  3950. fwcode += wlen;
  3951. risc_addr += wlen;
  3952. risc_size -= wlen;
  3953. fragment++;
  3954. }
  3955. /* Next segment. */
  3956. seg++;
  3957. }
  3958. return rval;
  3959. fail_fw_integrity:
  3960. return QLA_FUNCTION_FAILED;
  3961. }
  3962. static int
  3963. qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3964. {
  3965. int rval;
  3966. int segments, fragment;
  3967. uint32_t *dcode, dlen;
  3968. uint32_t risc_addr;
  3969. uint32_t risc_size;
  3970. uint32_t i;
  3971. struct fw_blob *blob;
  3972. uint32_t *fwcode, fwclen;
  3973. struct qla_hw_data *ha = vha->hw;
  3974. struct req_que *req = ha->req_q_map[0];
  3975. /* Load firmware blob. */
  3976. blob = qla2x00_request_firmware(vha);
  3977. if (!blob) {
  3978. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  3979. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  3980. "from: " QLA_FW_URL ".\n");
  3981. return QLA_FUNCTION_FAILED;
  3982. }
  3983. qla_printk(KERN_INFO, ha,
  3984. "FW: Loading via request-firmware...\n");
  3985. rval = QLA_SUCCESS;
  3986. segments = FA_RISC_CODE_SEGMENTS;
  3987. dcode = (uint32_t *)req->ring;
  3988. *srisc_addr = 0;
  3989. fwcode = (uint32_t *)blob->fw->data;
  3990. fwclen = 0;
  3991. /* Validate firmware image by checking version. */
  3992. if (blob->fw->size < 8 * sizeof(uint32_t)) {
  3993. qla_printk(KERN_WARNING, ha,
  3994. "Unable to verify integrity of firmware image (%Zd)!\n",
  3995. blob->fw->size);
  3996. goto fail_fw_integrity;
  3997. }
  3998. for (i = 0; i < 4; i++)
  3999. dcode[i] = be32_to_cpu(fwcode[i + 4]);
  4000. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  4001. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  4002. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  4003. dcode[3] == 0)) {
  4004. qla_printk(KERN_WARNING, ha,
  4005. "Unable to verify integrity of firmware image!\n");
  4006. qla_printk(KERN_WARNING, ha,
  4007. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  4008. dcode[1], dcode[2], dcode[3]);
  4009. goto fail_fw_integrity;
  4010. }
  4011. while (segments && rval == QLA_SUCCESS) {
  4012. risc_addr = be32_to_cpu(fwcode[2]);
  4013. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  4014. risc_size = be32_to_cpu(fwcode[3]);
  4015. /* Validate firmware image size. */
  4016. fwclen += risc_size * sizeof(uint32_t);
  4017. if (blob->fw->size < fwclen) {
  4018. qla_printk(KERN_WARNING, ha,
  4019. "Unable to verify integrity of firmware image "
  4020. "(%Zd)!\n", blob->fw->size);
  4021. goto fail_fw_integrity;
  4022. }
  4023. fragment = 0;
  4024. while (risc_size > 0 && rval == QLA_SUCCESS) {
  4025. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  4026. if (dlen > risc_size)
  4027. dlen = risc_size;
  4028. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  4029. "addr %x, number of dwords 0x%x.\n", vha->host_no,
  4030. risc_addr, dlen));
  4031. for (i = 0; i < dlen; i++)
  4032. dcode[i] = swab32(fwcode[i]);
  4033. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  4034. dlen);
  4035. if (rval) {
  4036. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  4037. "segment %d of firmware\n", vha->host_no,
  4038. fragment));
  4039. qla_printk(KERN_WARNING, ha,
  4040. "[ERROR] Failed to load segment %d of "
  4041. "firmware\n", fragment);
  4042. break;
  4043. }
  4044. fwcode += dlen;
  4045. risc_addr += dlen;
  4046. risc_size -= dlen;
  4047. fragment++;
  4048. }
  4049. /* Next segment. */
  4050. segments--;
  4051. }
  4052. return rval;
  4053. fail_fw_integrity:
  4054. return QLA_FUNCTION_FAILED;
  4055. }
  4056. int
  4057. qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  4058. {
  4059. int rval;
  4060. if (ql2xfwloadbin == 1)
  4061. return qla81xx_load_risc(vha, srisc_addr);
  4062. /*
  4063. * FW Load priority:
  4064. * 1) Firmware via request-firmware interface (.bin file).
  4065. * 2) Firmware residing in flash.
  4066. */
  4067. rval = qla24xx_load_risc_blob(vha, srisc_addr);
  4068. if (rval == QLA_SUCCESS)
  4069. return rval;
  4070. return qla24xx_load_risc_flash(vha, srisc_addr,
  4071. vha->hw->flt_region_fw);
  4072. }
  4073. int
  4074. qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  4075. {
  4076. int rval;
  4077. struct qla_hw_data *ha = vha->hw;
  4078. if (ql2xfwloadbin == 2)
  4079. goto try_blob_fw;
  4080. /*
  4081. * FW Load priority:
  4082. * 1) Firmware residing in flash.
  4083. * 2) Firmware via request-firmware interface (.bin file).
  4084. * 3) Golden-Firmware residing in flash -- limited operation.
  4085. */
  4086. rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw);
  4087. if (rval == QLA_SUCCESS)
  4088. return rval;
  4089. try_blob_fw:
  4090. rval = qla24xx_load_risc_blob(vha, srisc_addr);
  4091. if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw)
  4092. return rval;
  4093. qla_printk(KERN_ERR, ha,
  4094. "FW: Attempting to fallback to golden firmware...\n");
  4095. rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw);
  4096. if (rval != QLA_SUCCESS)
  4097. return rval;
  4098. qla_printk(KERN_ERR, ha,
  4099. "FW: Please update operational firmware...\n");
  4100. ha->flags.running_gold_fw = 1;
  4101. return rval;
  4102. }
  4103. void
  4104. qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
  4105. {
  4106. int ret, retries;
  4107. struct qla_hw_data *ha = vha->hw;
  4108. if (ha->flags.pci_channel_io_perm_failure)
  4109. return;
  4110. if (!IS_FWI2_CAPABLE(ha))
  4111. return;
  4112. if (!ha->fw_major_version)
  4113. return;
  4114. ret = qla2x00_stop_firmware(vha);
  4115. for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
  4116. ret != QLA_INVALID_COMMAND && retries ; retries--) {
  4117. ha->isp_ops->reset_chip(vha);
  4118. if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS)
  4119. continue;
  4120. if (qla2x00_setup_chip(vha) != QLA_SUCCESS)
  4121. continue;
  4122. qla_printk(KERN_INFO, ha,
  4123. "Attempting retry of stop-firmware command...\n");
  4124. ret = qla2x00_stop_firmware(vha);
  4125. }
  4126. }
  4127. int
  4128. qla24xx_configure_vhba(scsi_qla_host_t *vha)
  4129. {
  4130. int rval = QLA_SUCCESS;
  4131. uint16_t mb[MAILBOX_REGISTER_COUNT];
  4132. struct qla_hw_data *ha = vha->hw;
  4133. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  4134. struct req_que *req;
  4135. struct rsp_que *rsp;
  4136. if (!vha->vp_idx)
  4137. return -EINVAL;
  4138. rval = qla2x00_fw_ready(base_vha);
  4139. if (ha->flags.cpu_affinity_enabled)
  4140. req = ha->req_q_map[0];
  4141. else
  4142. req = vha->req;
  4143. rsp = req->rsp;
  4144. if (rval == QLA_SUCCESS) {
  4145. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  4146. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  4147. }
  4148. vha->flags.management_server_logged_in = 0;
  4149. /* Login to SNS first */
  4150. ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, BIT_1);
  4151. if (mb[0] != MBS_COMMAND_COMPLETE) {
  4152. DEBUG15(qla_printk(KERN_INFO, ha,
  4153. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  4154. "mb[2]=%x mb[6]=%x mb[7]=%x\n", NPH_SNS,
  4155. mb[0], mb[1], mb[2], mb[6], mb[7]));
  4156. return (QLA_FUNCTION_FAILED);
  4157. }
  4158. atomic_set(&vha->loop_down_timer, 0);
  4159. atomic_set(&vha->loop_state, LOOP_UP);
  4160. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  4161. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  4162. rval = qla2x00_loop_resync(base_vha);
  4163. return rval;
  4164. }
  4165. /* 84XX Support **************************************************************/
  4166. static LIST_HEAD(qla_cs84xx_list);
  4167. static DEFINE_MUTEX(qla_cs84xx_mutex);
  4168. static struct qla_chip_state_84xx *
  4169. qla84xx_get_chip(struct scsi_qla_host *vha)
  4170. {
  4171. struct qla_chip_state_84xx *cs84xx;
  4172. struct qla_hw_data *ha = vha->hw;
  4173. mutex_lock(&qla_cs84xx_mutex);
  4174. /* Find any shared 84xx chip. */
  4175. list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
  4176. if (cs84xx->bus == ha->pdev->bus) {
  4177. kref_get(&cs84xx->kref);
  4178. goto done;
  4179. }
  4180. }
  4181. cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
  4182. if (!cs84xx)
  4183. goto done;
  4184. kref_init(&cs84xx->kref);
  4185. spin_lock_init(&cs84xx->access_lock);
  4186. mutex_init(&cs84xx->fw_update_mutex);
  4187. cs84xx->bus = ha->pdev->bus;
  4188. list_add_tail(&cs84xx->list, &qla_cs84xx_list);
  4189. done:
  4190. mutex_unlock(&qla_cs84xx_mutex);
  4191. return cs84xx;
  4192. }
  4193. static void
  4194. __qla84xx_chip_release(struct kref *kref)
  4195. {
  4196. struct qla_chip_state_84xx *cs84xx =
  4197. container_of(kref, struct qla_chip_state_84xx, kref);
  4198. mutex_lock(&qla_cs84xx_mutex);
  4199. list_del(&cs84xx->list);
  4200. mutex_unlock(&qla_cs84xx_mutex);
  4201. kfree(cs84xx);
  4202. }
  4203. void
  4204. qla84xx_put_chip(struct scsi_qla_host *vha)
  4205. {
  4206. struct qla_hw_data *ha = vha->hw;
  4207. if (ha->cs84xx)
  4208. kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
  4209. }
  4210. static int
  4211. qla84xx_init_chip(scsi_qla_host_t *vha)
  4212. {
  4213. int rval;
  4214. uint16_t status[2];
  4215. struct qla_hw_data *ha = vha->hw;
  4216. mutex_lock(&ha->cs84xx->fw_update_mutex);
  4217. rval = qla84xx_verify_chip(vha, status);
  4218. mutex_unlock(&ha->cs84xx->fw_update_mutex);
  4219. return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED:
  4220. QLA_SUCCESS;
  4221. }
  4222. /* 81XX Support **************************************************************/
  4223. int
  4224. qla81xx_nvram_config(scsi_qla_host_t *vha)
  4225. {
  4226. int rval;
  4227. struct init_cb_81xx *icb;
  4228. struct nvram_81xx *nv;
  4229. uint32_t *dptr;
  4230. uint8_t *dptr1, *dptr2;
  4231. uint32_t chksum;
  4232. uint16_t cnt;
  4233. struct qla_hw_data *ha = vha->hw;
  4234. rval = QLA_SUCCESS;
  4235. icb = (struct init_cb_81xx *)ha->init_cb;
  4236. nv = ha->nvram;
  4237. /* Determine NVRAM starting address. */
  4238. ha->nvram_size = sizeof(struct nvram_81xx);
  4239. ha->vpd_size = FA_NVRAM_VPD_SIZE;
  4240. /* Get VPD data into cache */
  4241. ha->vpd = ha->nvram + VPD_OFFSET;
  4242. ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2,
  4243. ha->vpd_size);
  4244. /* Get NVRAM data into cache and calculate checksum. */
  4245. ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2,
  4246. ha->nvram_size);
  4247. dptr = (uint32_t *)nv;
  4248. for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
  4249. chksum += le32_to_cpu(*dptr++);
  4250. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  4251. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  4252. /* Bad NVRAM data, set defaults parameters. */
  4253. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
  4254. || nv->id[3] != ' ' ||
  4255. nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
  4256. /* Reset NVRAM data. */
  4257. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  4258. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  4259. le16_to_cpu(nv->nvram_version));
  4260. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  4261. "invalid -- WWPN) defaults.\n");
  4262. /*
  4263. * Set default initialization control block.
  4264. */
  4265. memset(nv, 0, ha->nvram_size);
  4266. nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
  4267. nv->version = __constant_cpu_to_le16(ICB_VERSION);
  4268. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  4269. nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  4270. nv->exchange_count = __constant_cpu_to_le16(0);
  4271. nv->port_name[0] = 0x21;
  4272. nv->port_name[1] = 0x00 + ha->port_no;
  4273. nv->port_name[2] = 0x00;
  4274. nv->port_name[3] = 0xe0;
  4275. nv->port_name[4] = 0x8b;
  4276. nv->port_name[5] = 0x1c;
  4277. nv->port_name[6] = 0x55;
  4278. nv->port_name[7] = 0x86;
  4279. nv->node_name[0] = 0x20;
  4280. nv->node_name[1] = 0x00;
  4281. nv->node_name[2] = 0x00;
  4282. nv->node_name[3] = 0xe0;
  4283. nv->node_name[4] = 0x8b;
  4284. nv->node_name[5] = 0x1c;
  4285. nv->node_name[6] = 0x55;
  4286. nv->node_name[7] = 0x86;
  4287. nv->login_retry_count = __constant_cpu_to_le16(8);
  4288. nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
  4289. nv->login_timeout = __constant_cpu_to_le16(0);
  4290. nv->firmware_options_1 =
  4291. __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
  4292. nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
  4293. nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
  4294. nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
  4295. nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
  4296. nv->efi_parameters = __constant_cpu_to_le32(0);
  4297. nv->reset_delay = 5;
  4298. nv->max_luns_per_target = __constant_cpu_to_le16(128);
  4299. nv->port_down_retry_count = __constant_cpu_to_le16(30);
  4300. nv->link_down_timeout = __constant_cpu_to_le16(30);
  4301. nv->enode_mac[0] = 0x00;
  4302. nv->enode_mac[1] = 0x02;
  4303. nv->enode_mac[2] = 0x03;
  4304. nv->enode_mac[3] = 0x04;
  4305. nv->enode_mac[4] = 0x05;
  4306. nv->enode_mac[5] = 0x06 + ha->port_no;
  4307. rval = 1;
  4308. }
  4309. /* Reset Initialization control block */
  4310. memset(icb, 0, sizeof(struct init_cb_81xx));
  4311. /* Copy 1st segment. */
  4312. dptr1 = (uint8_t *)icb;
  4313. dptr2 = (uint8_t *)&nv->version;
  4314. cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
  4315. while (cnt--)
  4316. *dptr1++ = *dptr2++;
  4317. icb->login_retry_count = nv->login_retry_count;
  4318. /* Copy 2nd segment. */
  4319. dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
  4320. dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
  4321. cnt = (uint8_t *)&icb->reserved_5 -
  4322. (uint8_t *)&icb->interrupt_delay_timer;
  4323. while (cnt--)
  4324. *dptr1++ = *dptr2++;
  4325. memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac));
  4326. /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */
  4327. if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) {
  4328. icb->enode_mac[0] = 0x01;
  4329. icb->enode_mac[1] = 0x02;
  4330. icb->enode_mac[2] = 0x03;
  4331. icb->enode_mac[3] = 0x04;
  4332. icb->enode_mac[4] = 0x05;
  4333. icb->enode_mac[5] = 0x06 + ha->port_no;
  4334. }
  4335. /* Use extended-initialization control block. */
  4336. memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb));
  4337. /*
  4338. * Setup driver NVRAM options.
  4339. */
  4340. qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
  4341. "QLE8XXX");
  4342. /* Use alternate WWN? */
  4343. if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
  4344. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  4345. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  4346. }
  4347. /* Prepare nodename */
  4348. if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
  4349. /*
  4350. * Firmware will apply the following mask if the nodename was
  4351. * not provided.
  4352. */
  4353. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  4354. icb->node_name[0] &= 0xF0;
  4355. }
  4356. /* Set host adapter parameters. */
  4357. ha->flags.disable_risc_code_load = 0;
  4358. ha->flags.enable_lip_reset = 0;
  4359. ha->flags.enable_lip_full_login =
  4360. le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
  4361. ha->flags.enable_target_reset =
  4362. le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
  4363. ha->flags.enable_led_scheme = 0;
  4364. ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
  4365. ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
  4366. (BIT_6 | BIT_5 | BIT_4)) >> 4;
  4367. /* save HBA serial number */
  4368. ha->serial0 = icb->port_name[5];
  4369. ha->serial1 = icb->port_name[6];
  4370. ha->serial2 = icb->port_name[7];
  4371. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  4372. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  4373. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  4374. ha->retry_count = le16_to_cpu(nv->login_retry_count);
  4375. /* Set minimum login_timeout to 4 seconds. */
  4376. if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
  4377. nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
  4378. if (le16_to_cpu(nv->login_timeout) < 4)
  4379. nv->login_timeout = __constant_cpu_to_le16(4);
  4380. ha->login_timeout = le16_to_cpu(nv->login_timeout);
  4381. icb->login_timeout = nv->login_timeout;
  4382. /* Set minimum RATOV to 100 tenths of a second. */
  4383. ha->r_a_tov = 100;
  4384. ha->loop_reset_delay = nv->reset_delay;
  4385. /* Link Down Timeout = 0:
  4386. *
  4387. * When Port Down timer expires we will start returning
  4388. * I/O's to OS with "DID_NO_CONNECT".
  4389. *
  4390. * Link Down Timeout != 0:
  4391. *
  4392. * The driver waits for the link to come up after link down
  4393. * before returning I/Os to OS with "DID_NO_CONNECT".
  4394. */
  4395. if (le16_to_cpu(nv->link_down_timeout) == 0) {
  4396. ha->loop_down_abort_time =
  4397. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  4398. } else {
  4399. ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
  4400. ha->loop_down_abort_time =
  4401. (LOOP_DOWN_TIME - ha->link_down_timeout);
  4402. }
  4403. /* Need enough time to try and get the port back. */
  4404. ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
  4405. if (qlport_down_retry)
  4406. ha->port_down_retry_count = qlport_down_retry;
  4407. /* Set login_retry_count */
  4408. ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
  4409. if (ha->port_down_retry_count ==
  4410. le16_to_cpu(nv->port_down_retry_count) &&
  4411. ha->port_down_retry_count > 3)
  4412. ha->login_retry_count = ha->port_down_retry_count;
  4413. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  4414. ha->login_retry_count = ha->port_down_retry_count;
  4415. if (ql2xloginretrycount)
  4416. ha->login_retry_count = ql2xloginretrycount;
  4417. /* Enable ZIO. */
  4418. if (!vha->flags.init_done) {
  4419. ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
  4420. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  4421. ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
  4422. le16_to_cpu(icb->interrupt_delay_timer): 2;
  4423. }
  4424. icb->firmware_options_2 &= __constant_cpu_to_le32(
  4425. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
  4426. vha->flags.process_response_queue = 0;
  4427. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  4428. ha->zio_mode = QLA_ZIO_MODE_6;
  4429. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay "
  4430. "(%d us).\n", vha->host_no, ha->zio_mode,
  4431. ha->zio_timer * 100));
  4432. qla_printk(KERN_INFO, ha,
  4433. "ZIO mode %d enabled; timer delay (%d us).\n",
  4434. ha->zio_mode, ha->zio_timer * 100);
  4435. icb->firmware_options_2 |= cpu_to_le32(
  4436. (uint32_t)ha->zio_mode);
  4437. icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
  4438. vha->flags.process_response_queue = 1;
  4439. }
  4440. if (rval) {
  4441. DEBUG2_3(printk(KERN_WARNING
  4442. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  4443. }
  4444. return (rval);
  4445. }
  4446. int
  4447. qla82xx_restart_isp(scsi_qla_host_t *vha)
  4448. {
  4449. int status, rval;
  4450. uint32_t wait_time;
  4451. struct qla_hw_data *ha = vha->hw;
  4452. struct req_que *req = ha->req_q_map[0];
  4453. struct rsp_que *rsp = ha->rsp_q_map[0];
  4454. struct scsi_qla_host *vp;
  4455. struct scsi_qla_host *tvp;
  4456. status = qla2x00_init_rings(vha);
  4457. if (!status) {
  4458. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  4459. ha->flags.chip_reset_done = 1;
  4460. status = qla2x00_fw_ready(vha);
  4461. if (!status) {
  4462. qla_printk(KERN_INFO, ha,
  4463. "%s(): Start configure loop, "
  4464. "status = %d\n", __func__, status);
  4465. /* Issue a marker after FW becomes ready. */
  4466. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  4467. vha->flags.online = 1;
  4468. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  4469. wait_time = 256;
  4470. do {
  4471. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  4472. qla2x00_configure_loop(vha);
  4473. wait_time--;
  4474. } while (!atomic_read(&vha->loop_down_timer) &&
  4475. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) &&
  4476. wait_time &&
  4477. (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)));
  4478. }
  4479. /* if no cable then assume it's good */
  4480. if ((vha->device_flags & DFLG_NO_CABLE))
  4481. status = 0;
  4482. qla_printk(KERN_INFO, ha,
  4483. "%s(): Configure loop done, status = 0x%x\n",
  4484. __func__, status);
  4485. }
  4486. if (!status) {
  4487. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  4488. if (!atomic_read(&vha->loop_down_timer)) {
  4489. /*
  4490. * Issue marker command only when we are going
  4491. * to start the I/O .
  4492. */
  4493. vha->marker_needed = 1;
  4494. }
  4495. vha->flags.online = 1;
  4496. ha->isp_ops->enable_intrs(ha);
  4497. ha->isp_abort_cnt = 0;
  4498. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  4499. if (ha->fce) {
  4500. ha->flags.fce_enabled = 1;
  4501. memset(ha->fce, 0,
  4502. fce_calc_size(ha->fce_bufs));
  4503. rval = qla2x00_enable_fce_trace(vha,
  4504. ha->fce_dma, ha->fce_bufs, ha->fce_mb,
  4505. &ha->fce_bufs);
  4506. if (rval) {
  4507. qla_printk(KERN_WARNING, ha,
  4508. "Unable to reinitialize FCE "
  4509. "(%d).\n", rval);
  4510. ha->flags.fce_enabled = 0;
  4511. }
  4512. }
  4513. if (ha->eft) {
  4514. memset(ha->eft, 0, EFT_SIZE);
  4515. rval = qla2x00_enable_eft_trace(vha,
  4516. ha->eft_dma, EFT_NUM_BUFFERS);
  4517. if (rval) {
  4518. qla_printk(KERN_WARNING, ha,
  4519. "Unable to reinitialize EFT "
  4520. "(%d).\n", rval);
  4521. }
  4522. }
  4523. }
  4524. if (!status) {
  4525. DEBUG(printk(KERN_INFO
  4526. "qla82xx_restart_isp(%ld): succeeded.\n",
  4527. vha->host_no));
  4528. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  4529. if (vp->vp_idx)
  4530. qla2x00_vp_abort_isp(vp);
  4531. }
  4532. } else {
  4533. qla_printk(KERN_INFO, ha,
  4534. "qla82xx_restart_isp: **** FAILED ****\n");
  4535. }
  4536. return status;
  4537. }
  4538. void
  4539. qla81xx_update_fw_options(scsi_qla_host_t *vha)
  4540. {
  4541. struct qla_hw_data *ha = vha->hw;
  4542. if (!ql2xetsenable)
  4543. return;
  4544. /* Enable ETS Burst. */
  4545. memset(ha->fw_options, 0, sizeof(ha->fw_options));
  4546. ha->fw_options[2] |= BIT_9;
  4547. qla2x00_set_fw_options(vha, ha->fw_options);
  4548. }
  4549. /*
  4550. * qla24xx_get_fcp_prio
  4551. * Gets the fcp cmd priority value for the logged in port.
  4552. * Looks for a match of the port descriptors within
  4553. * each of the fcp prio config entries. If a match is found,
  4554. * the tag (priority) value is returned.
  4555. *
  4556. * Input:
  4557. * ha = adapter block po
  4558. * fcport = port structure pointer.
  4559. *
  4560. * Return:
  4561. * non-zero (if found)
  4562. * 0 (if not found)
  4563. *
  4564. * Context:
  4565. * Kernel context
  4566. */
  4567. uint8_t
  4568. qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
  4569. {
  4570. int i, entries;
  4571. uint8_t pid_match, wwn_match;
  4572. uint8_t priority;
  4573. uint32_t pid1, pid2;
  4574. uint64_t wwn1, wwn2;
  4575. struct qla_fcp_prio_entry *pri_entry;
  4576. struct qla_hw_data *ha = vha->hw;
  4577. if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled)
  4578. return 0;
  4579. priority = 0;
  4580. entries = ha->fcp_prio_cfg->num_entries;
  4581. pri_entry = &ha->fcp_prio_cfg->entry[0];
  4582. for (i = 0; i < entries; i++) {
  4583. pid_match = wwn_match = 0;
  4584. if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) {
  4585. pri_entry++;
  4586. continue;
  4587. }
  4588. /* check source pid for a match */
  4589. if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) {
  4590. pid1 = pri_entry->src_pid & INVALID_PORT_ID;
  4591. pid2 = vha->d_id.b24 & INVALID_PORT_ID;
  4592. if (pid1 == INVALID_PORT_ID)
  4593. pid_match++;
  4594. else if (pid1 == pid2)
  4595. pid_match++;
  4596. }
  4597. /* check destination pid for a match */
  4598. if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) {
  4599. pid1 = pri_entry->dst_pid & INVALID_PORT_ID;
  4600. pid2 = fcport->d_id.b24 & INVALID_PORT_ID;
  4601. if (pid1 == INVALID_PORT_ID)
  4602. pid_match++;
  4603. else if (pid1 == pid2)
  4604. pid_match++;
  4605. }
  4606. /* check source WWN for a match */
  4607. if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) {
  4608. wwn1 = wwn_to_u64(vha->port_name);
  4609. wwn2 = wwn_to_u64(pri_entry->src_wwpn);
  4610. if (wwn2 == (uint64_t)-1)
  4611. wwn_match++;
  4612. else if (wwn1 == wwn2)
  4613. wwn_match++;
  4614. }
  4615. /* check destination WWN for a match */
  4616. if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) {
  4617. wwn1 = wwn_to_u64(fcport->port_name);
  4618. wwn2 = wwn_to_u64(pri_entry->dst_wwpn);
  4619. if (wwn2 == (uint64_t)-1)
  4620. wwn_match++;
  4621. else if (wwn1 == wwn2)
  4622. wwn_match++;
  4623. }
  4624. if (pid_match == 2 || wwn_match == 2) {
  4625. /* Found a matching entry */
  4626. if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID)
  4627. priority = pri_entry->tag;
  4628. break;
  4629. }
  4630. pri_entry++;
  4631. }
  4632. return priority;
  4633. }
  4634. /*
  4635. * qla24xx_update_fcport_fcp_prio
  4636. * Activates fcp priority for the logged in fc port
  4637. *
  4638. * Input:
  4639. * ha = adapter block pointer.
  4640. * fcp = port structure pointer.
  4641. *
  4642. * Return:
  4643. * QLA_SUCCESS or QLA_FUNCTION_FAILED
  4644. *
  4645. * Context:
  4646. * Kernel context.
  4647. */
  4648. int
  4649. qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *ha, fc_port_t *fcport)
  4650. {
  4651. int ret;
  4652. uint8_t priority;
  4653. uint16_t mb[5];
  4654. if (atomic_read(&fcport->state) == FCS_UNCONFIGURED ||
  4655. fcport->port_type != FCT_TARGET ||
  4656. fcport->loop_id == FC_NO_LOOP_ID)
  4657. return QLA_FUNCTION_FAILED;
  4658. priority = qla24xx_get_fcp_prio(ha, fcport);
  4659. ret = qla24xx_set_fcp_prio(ha, fcport->loop_id, priority, mb);
  4660. if (ret == QLA_SUCCESS)
  4661. fcport->fcp_prio = priority;
  4662. else
  4663. DEBUG2(printk(KERN_WARNING
  4664. "scsi(%ld): Unable to activate fcp priority, "
  4665. " ret=0x%x\n", ha->host_no, ret));
  4666. return ret;
  4667. }
  4668. /*
  4669. * qla24xx_update_all_fcp_prio
  4670. * Activates fcp priority for all the logged in ports
  4671. *
  4672. * Input:
  4673. * ha = adapter block pointer.
  4674. *
  4675. * Return:
  4676. * QLA_SUCCESS or QLA_FUNCTION_FAILED
  4677. *
  4678. * Context:
  4679. * Kernel context.
  4680. */
  4681. int
  4682. qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha)
  4683. {
  4684. int ret;
  4685. fc_port_t *fcport;
  4686. ret = QLA_FUNCTION_FAILED;
  4687. /* We need to set priority for all logged in ports */
  4688. list_for_each_entry(fcport, &vha->vp_fcports, list)
  4689. ret = qla24xx_update_fcport_fcp_prio(vha, fcport);
  4690. return ret;
  4691. }