cxd2820r_t.c 9.2 KB

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  1. /*
  2. * Sony CXD2820R demodulator driver
  3. *
  4. * Copyright (C) 2010 Antti Palosaari <crope@iki.fi>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License along
  17. * with this program; if not, write to the Free Software Foundation, Inc.,
  18. * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  19. */
  20. #include "cxd2820r_priv.h"
  21. int cxd2820r_set_frontend_t(struct dvb_frontend *fe,
  22. struct dvb_frontend_parameters *p)
  23. {
  24. struct cxd2820r_priv *priv = fe->demodulator_priv;
  25. struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  26. int ret, i, bw_i;
  27. u32 if_freq, if_ctl;
  28. u64 num;
  29. u8 buf[3], bw_param;
  30. u8 bw_params1[][5] = {
  31. { 0x17, 0xea, 0xaa, 0xaa, 0xaa }, /* 6 MHz */
  32. { 0x14, 0x80, 0x00, 0x00, 0x00 }, /* 7 MHz */
  33. { 0x11, 0xf0, 0x00, 0x00, 0x00 }, /* 8 MHz */
  34. };
  35. u8 bw_params2[][2] = {
  36. { 0x1f, 0xdc }, /* 6 MHz */
  37. { 0x12, 0xf8 }, /* 7 MHz */
  38. { 0x01, 0xe0 }, /* 8 MHz */
  39. };
  40. struct reg_val_mask tab[] = {
  41. { 0x00080, 0x00, 0xff },
  42. { 0x00081, 0x03, 0xff },
  43. { 0x00085, 0x07, 0xff },
  44. { 0x00088, 0x01, 0xff },
  45. { 0x00070, priv->cfg.ts_mode, 0xff },
  46. { 0x000cb, priv->cfg.if_agc_polarity << 6, 0x40 },
  47. { 0x000a5, 0x00, 0x01 },
  48. { 0x00082, 0x20, 0x60 },
  49. { 0x000c2, 0xc3, 0xff },
  50. { 0x0016a, 0x50, 0xff },
  51. { 0x00427, 0x41, 0xff },
  52. };
  53. dbg("%s: RF=%d BW=%d", __func__, c->frequency, c->bandwidth_hz);
  54. switch (c->bandwidth_hz) {
  55. case 6000000:
  56. bw_i = 0;
  57. bw_param = 2;
  58. break;
  59. case 7000000:
  60. bw_i = 1;
  61. bw_param = 1;
  62. break;
  63. case 8000000:
  64. bw_i = 2;
  65. bw_param = 0;
  66. break;
  67. default:
  68. return -EINVAL;
  69. }
  70. /* update GPIOs */
  71. ret = cxd2820r_gpio(fe);
  72. if (ret)
  73. goto error;
  74. /* program tuner */
  75. if (fe->ops.tuner_ops.set_params)
  76. fe->ops.tuner_ops.set_params(fe);
  77. if (priv->delivery_system != SYS_DVBT) {
  78. for (i = 0; i < ARRAY_SIZE(tab); i++) {
  79. ret = cxd2820r_wr_reg_mask(priv, tab[i].reg,
  80. tab[i].val, tab[i].mask);
  81. if (ret)
  82. goto error;
  83. }
  84. }
  85. priv->delivery_system = SYS_DVBT;
  86. priv->ber_running = 0; /* tune stops BER counter */
  87. /* program IF frequency */
  88. if (fe->ops.tuner_ops.get_if_frequency) {
  89. ret = fe->ops.tuner_ops.get_if_frequency(fe, &if_freq);
  90. if (ret)
  91. goto error;
  92. } else
  93. if_freq = 0;
  94. dbg("%s: if_freq=%d", __func__, if_freq);
  95. num = if_freq / 1000; /* Hz => kHz */
  96. num *= 0x1000000;
  97. if_ctl = cxd2820r_div_u64_round_closest(num, 41000);
  98. buf[0] = ((if_ctl >> 16) & 0xff);
  99. buf[1] = ((if_ctl >> 8) & 0xff);
  100. buf[2] = ((if_ctl >> 0) & 0xff);
  101. ret = cxd2820r_wr_regs(priv, 0x000b6, buf, 3);
  102. if (ret)
  103. goto error;
  104. ret = cxd2820r_wr_regs(priv, 0x0009f, bw_params1[bw_i], 5);
  105. if (ret)
  106. goto error;
  107. ret = cxd2820r_wr_reg_mask(priv, 0x000d7, bw_param << 6, 0xc0);
  108. if (ret)
  109. goto error;
  110. ret = cxd2820r_wr_regs(priv, 0x000d9, bw_params2[bw_i], 2);
  111. if (ret)
  112. goto error;
  113. ret = cxd2820r_wr_reg(priv, 0x000ff, 0x08);
  114. if (ret)
  115. goto error;
  116. ret = cxd2820r_wr_reg(priv, 0x000fe, 0x01);
  117. if (ret)
  118. goto error;
  119. return ret;
  120. error:
  121. dbg("%s: failed:%d", __func__, ret);
  122. return ret;
  123. }
  124. int cxd2820r_get_frontend_t(struct dvb_frontend *fe,
  125. struct dvb_frontend_parameters *p)
  126. {
  127. struct cxd2820r_priv *priv = fe->demodulator_priv;
  128. struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  129. int ret;
  130. u8 buf[2];
  131. ret = cxd2820r_rd_regs(priv, 0x0002f, buf, sizeof(buf));
  132. if (ret)
  133. goto error;
  134. switch ((buf[0] >> 6) & 0x03) {
  135. case 0:
  136. c->modulation = QPSK;
  137. break;
  138. case 1:
  139. c->modulation = QAM_16;
  140. break;
  141. case 2:
  142. c->modulation = QAM_64;
  143. break;
  144. }
  145. switch ((buf[1] >> 1) & 0x03) {
  146. case 0:
  147. c->transmission_mode = TRANSMISSION_MODE_2K;
  148. break;
  149. case 1:
  150. c->transmission_mode = TRANSMISSION_MODE_8K;
  151. break;
  152. }
  153. switch ((buf[1] >> 3) & 0x03) {
  154. case 0:
  155. c->guard_interval = GUARD_INTERVAL_1_32;
  156. break;
  157. case 1:
  158. c->guard_interval = GUARD_INTERVAL_1_16;
  159. break;
  160. case 2:
  161. c->guard_interval = GUARD_INTERVAL_1_8;
  162. break;
  163. case 3:
  164. c->guard_interval = GUARD_INTERVAL_1_4;
  165. break;
  166. }
  167. switch ((buf[0] >> 3) & 0x07) {
  168. case 0:
  169. c->hierarchy = HIERARCHY_NONE;
  170. break;
  171. case 1:
  172. c->hierarchy = HIERARCHY_1;
  173. break;
  174. case 2:
  175. c->hierarchy = HIERARCHY_2;
  176. break;
  177. case 3:
  178. c->hierarchy = HIERARCHY_4;
  179. break;
  180. }
  181. switch ((buf[0] >> 0) & 0x07) {
  182. case 0:
  183. c->code_rate_HP = FEC_1_2;
  184. break;
  185. case 1:
  186. c->code_rate_HP = FEC_2_3;
  187. break;
  188. case 2:
  189. c->code_rate_HP = FEC_3_4;
  190. break;
  191. case 3:
  192. c->code_rate_HP = FEC_5_6;
  193. break;
  194. case 4:
  195. c->code_rate_HP = FEC_7_8;
  196. break;
  197. }
  198. switch ((buf[1] >> 5) & 0x07) {
  199. case 0:
  200. c->code_rate_LP = FEC_1_2;
  201. break;
  202. case 1:
  203. c->code_rate_LP = FEC_2_3;
  204. break;
  205. case 2:
  206. c->code_rate_LP = FEC_3_4;
  207. break;
  208. case 3:
  209. c->code_rate_LP = FEC_5_6;
  210. break;
  211. case 4:
  212. c->code_rate_LP = FEC_7_8;
  213. break;
  214. }
  215. ret = cxd2820r_rd_reg(priv, 0x007c6, &buf[0]);
  216. if (ret)
  217. goto error;
  218. switch ((buf[0] >> 0) & 0x01) {
  219. case 0:
  220. c->inversion = INVERSION_OFF;
  221. break;
  222. case 1:
  223. c->inversion = INVERSION_ON;
  224. break;
  225. }
  226. return ret;
  227. error:
  228. dbg("%s: failed:%d", __func__, ret);
  229. return ret;
  230. }
  231. int cxd2820r_read_ber_t(struct dvb_frontend *fe, u32 *ber)
  232. {
  233. struct cxd2820r_priv *priv = fe->demodulator_priv;
  234. int ret;
  235. u8 buf[3], start_ber = 0;
  236. *ber = 0;
  237. if (priv->ber_running) {
  238. ret = cxd2820r_rd_regs(priv, 0x00076, buf, sizeof(buf));
  239. if (ret)
  240. goto error;
  241. if ((buf[2] >> 7) & 0x01 || (buf[2] >> 4) & 0x01) {
  242. *ber = (buf[2] & 0x0f) << 16 | buf[1] << 8 | buf[0];
  243. start_ber = 1;
  244. }
  245. } else {
  246. priv->ber_running = 1;
  247. start_ber = 1;
  248. }
  249. if (start_ber) {
  250. /* (re)start BER */
  251. ret = cxd2820r_wr_reg(priv, 0x00079, 0x01);
  252. if (ret)
  253. goto error;
  254. }
  255. return ret;
  256. error:
  257. dbg("%s: failed:%d", __func__, ret);
  258. return ret;
  259. }
  260. int cxd2820r_read_signal_strength_t(struct dvb_frontend *fe,
  261. u16 *strength)
  262. {
  263. struct cxd2820r_priv *priv = fe->demodulator_priv;
  264. int ret;
  265. u8 buf[2];
  266. u16 tmp;
  267. ret = cxd2820r_rd_regs(priv, 0x00026, buf, sizeof(buf));
  268. if (ret)
  269. goto error;
  270. tmp = (buf[0] & 0x0f) << 8 | buf[1];
  271. tmp = ~tmp & 0x0fff;
  272. /* scale value to 0x0000-0xffff from 0x0000-0x0fff */
  273. *strength = tmp * 0xffff / 0x0fff;
  274. return ret;
  275. error:
  276. dbg("%s: failed:%d", __func__, ret);
  277. return ret;
  278. }
  279. int cxd2820r_read_snr_t(struct dvb_frontend *fe, u16 *snr)
  280. {
  281. struct cxd2820r_priv *priv = fe->demodulator_priv;
  282. int ret;
  283. u8 buf[2];
  284. u16 tmp;
  285. /* report SNR in dB * 10 */
  286. ret = cxd2820r_rd_regs(priv, 0x00028, buf, sizeof(buf));
  287. if (ret)
  288. goto error;
  289. tmp = (buf[0] & 0x1f) << 8 | buf[1];
  290. #define CXD2820R_LOG10_8_24 15151336 /* log10(8) << 24 */
  291. if (tmp)
  292. *snr = (intlog10(tmp) - CXD2820R_LOG10_8_24) / ((1 << 24)
  293. / 100);
  294. else
  295. *snr = 0;
  296. dbg("%s: dBx10=%d val=%04x", __func__, *snr, tmp);
  297. return ret;
  298. error:
  299. dbg("%s: failed:%d", __func__, ret);
  300. return ret;
  301. }
  302. int cxd2820r_read_ucblocks_t(struct dvb_frontend *fe, u32 *ucblocks)
  303. {
  304. *ucblocks = 0;
  305. /* no way to read ? */
  306. return 0;
  307. }
  308. int cxd2820r_read_status_t(struct dvb_frontend *fe, fe_status_t *status)
  309. {
  310. struct cxd2820r_priv *priv = fe->demodulator_priv;
  311. int ret;
  312. u8 buf[4];
  313. *status = 0;
  314. ret = cxd2820r_rd_reg(priv, 0x00010, &buf[0]);
  315. if (ret)
  316. goto error;
  317. if ((buf[0] & 0x07) == 6) {
  318. ret = cxd2820r_rd_reg(priv, 0x00073, &buf[1]);
  319. if (ret)
  320. goto error;
  321. if (((buf[1] >> 3) & 0x01) == 1) {
  322. *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
  323. FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
  324. } else {
  325. *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
  326. FE_HAS_VITERBI | FE_HAS_SYNC;
  327. }
  328. } else {
  329. ret = cxd2820r_rd_reg(priv, 0x00014, &buf[2]);
  330. if (ret)
  331. goto error;
  332. if ((buf[2] & 0x0f) >= 4) {
  333. ret = cxd2820r_rd_reg(priv, 0x00a14, &buf[3]);
  334. if (ret)
  335. goto error;
  336. if (((buf[3] >> 4) & 0x01) == 1)
  337. *status |= FE_HAS_SIGNAL;
  338. }
  339. }
  340. dbg("%s: lock=%02x %02x %02x %02x", __func__,
  341. buf[0], buf[1], buf[2], buf[3]);
  342. return ret;
  343. error:
  344. dbg("%s: failed:%d", __func__, ret);
  345. return ret;
  346. }
  347. int cxd2820r_init_t(struct dvb_frontend *fe)
  348. {
  349. struct cxd2820r_priv *priv = fe->demodulator_priv;
  350. int ret;
  351. ret = cxd2820r_wr_reg(priv, 0x00085, 0x07);
  352. if (ret)
  353. goto error;
  354. return ret;
  355. error:
  356. dbg("%s: failed:%d", __func__, ret);
  357. return ret;
  358. }
  359. int cxd2820r_sleep_t(struct dvb_frontend *fe)
  360. {
  361. struct cxd2820r_priv *priv = fe->demodulator_priv;
  362. int ret, i;
  363. struct reg_val_mask tab[] = {
  364. { 0x000ff, 0x1f, 0xff },
  365. { 0x00085, 0x00, 0xff },
  366. { 0x00088, 0x01, 0xff },
  367. { 0x00081, 0x00, 0xff },
  368. { 0x00080, 0x00, 0xff },
  369. };
  370. dbg("%s", __func__);
  371. priv->delivery_system = SYS_UNDEFINED;
  372. for (i = 0; i < ARRAY_SIZE(tab); i++) {
  373. ret = cxd2820r_wr_reg_mask(priv, tab[i].reg, tab[i].val,
  374. tab[i].mask);
  375. if (ret)
  376. goto error;
  377. }
  378. return ret;
  379. error:
  380. dbg("%s: failed:%d", __func__, ret);
  381. return ret;
  382. }
  383. int cxd2820r_get_tune_settings_t(struct dvb_frontend *fe,
  384. struct dvb_frontend_tune_settings *s)
  385. {
  386. s->min_delay_ms = 500;
  387. s->step_size = fe->ops.info.frequency_stepsize * 2;
  388. s->max_drift = (fe->ops.info.frequency_stepsize * 2) + 1;
  389. return 0;
  390. }